Changeset 92 for GPL/branches/alsa-resync1/alsa-kernel/pci
- Timestamp:
 - May 2, 2007, 9:13:43 AM (19 years ago)
 - Location:
 - GPL/branches/alsa-resync1/alsa-kernel/pci
 - Files:
 - 
      
- 4 added
 - 11 edited
 
- 
          
  ali5451/ali5451.c (modified) (2 diffs)
 - 
          
  als4000.c (modified) (3 diffs)
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  emu10k1/emu10k1_main.c (modified) (3 diffs)
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  emu10k1/tina2.h (added)
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  es1968.c (modified) (5 diffs)
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  hda/Makefile (added)
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  hda/patch_analog.c (modified) (2 diffs)
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  hda/patch_conexant.c (added)
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  hda/patch_via.c (added)
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  ice1712.c (modified) (115 diffs)
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  maestro3.c (modified) (1 diff)
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  rme96.c (modified) (23 diffs)
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  rme9652/rme9652.c (modified) (23 diffs)
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  trident/trident.c (modified) (3 diffs)
 - 
          
  ymfpci/ymfpci.c (modified) (4 diffs)
 
 
Legend:
- Unmodified
 - Added
 - Removed
 
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GPL/branches/alsa-resync1/alsa-kernel/pci/ali5451/ali5451.c
r34 r92 27 27 28 28 #define __SNDRV_OSS_COMPAT__ 29 #define SNDRV_MAIN_OBJECT_FILE 30 31 #include "sound/driver.h" 32 #include "sound/pcm.h" 33 #include "sound/info.h" 34 #include "sound/ac97_codec.h" 35 #include "sound/mpu401.h" 29 30 #include <sound/driver.h> 31 #include <asm/io.h> 32 #include <linux/delay.h> 33 #include <linux/interrupt.h> 34 #include <linux/init.h> 35 #include <linux/slab.h> 36 #include <sound/core.h> 37 #include <sound/pcm.h> 38 #include <sound/info.h> 39 #include <sound/ac97_codec.h> 40 #include <sound/mpu401.h> 36 41 #define SNDRV_GET_ID 37 #include "sound/initval.h"42 #include <sound/initval.h> 38 43 39 44 MODULE_AUTHOR("Matt Wu <Matt_Wu@acersoftech.com.cn>"); … … 2323 2328 if ((err = pci_module_init(&driver)) < 0) { 2324 2329 #ifdef MODULE 2325 // snd_printk("ALi pci audio not found or device busy.\n");2330 // snd_printk(KERN_ERR "ALi pci audio not found or device busy.\n"); 2326 2331 #endif 2327 2332 return err;  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/als4000.c
r34 r92 731 731 &chip->rmidi)) < 0) { 732 732 snd_card_free(card); 733 snd_printk("no MPU-401device at 0x%lx ?\n", gcr+0x30);733 printk(KERN_ERR "als4000: no MPU-401device at 0x%lx ?\n", gcr+0x30); 734 734 return err; 735 735 } … … 746 746 if (snd_opl3_create(card, gcr+0x10, gcr+0x12, 747 747 OPL3_HW_AUTO, 1, &opl3) < 0) { 748 snd_printk("no OPL device at 0x%lx-0x%lx ?\n",748 printk(KERN_ERR "als4000: no OPL device at 0x%lx-0x%lx ?\n", 749 749 gcr+0x10, gcr+0x12 ); 750 750 } else { … … 797 797 if ((err = pci_module_init(&driver)) < 0) { 798 798 #ifdef MODULE 799 // snd_printk("no ALS4000 based soundcards found or device busy\n");799 // snd_printk(KERN_ERR "no ALS4000 based soundcards found or device busy\n"); 800 800 #endif 801 801 return err;  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/emu10k1/emu10k1_main.c
r84 r92 39 39 #include <sound/core.h> 40 40 #include <sound/emu10k1.h> 41 #include < sound/firmware.h>41 #include <linux/firmware.h> 42 42 #include "p16v.h" 43 43 #include "tina2.h" … … 597 597 return 0; 598 598 } 599 599 600 600 601 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename) … … 1020 1021 return 0; 1021 1022 } 1022 1023 1023 1024 1024 /*  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/es1968.c
r77 r92 1606 1606 es->substream = substream; 1607 1607 es->mode = ESM_MODE_PLAY; 1608 INIT_LIST_HEAD(&es->list); 1608 1609 1609 1610 runtime->private_data = es; … … 1657 1658 es->substream = substream; 1658 1659 es->mode = ESM_MODE_CAPTURE; 1660 INIT_LIST_HEAD(&es->list); 1659 1661 1660 1662 /* get mixbuffer */ … … 1717 1719 return 0; 1718 1720 } 1721 1719 1722 static snd_pcm_ops_t snd_es1968_playback_ops = { 1720 1723 /* open: */ snd_es1968_playback_open, … … 2005 2008 2006 2009 if (event & ESM_SOUND_IRQ) { 2007 struct list_head *p;2010 struct list_head *p, *n; 2008 2011 spin_lock(&chip->substream_lock); 2009 list_for_each(p, &chip->substream_list) { 2012 /* we need to use list_for_each_safe here since the substream 2013 * can be deleted in period_elapsed(). 2014 */ 2015 list_for_each_safe(p, n, &chip->substream_list) { 2010 2016 esschan_t *es = list_entry(p, esschan_t, list); 2011 2017 if (es->running) … … 2841 2847 if ((err = pci_module_init(&driver)) < 0) { 2842 2848 #ifdef MODULE 2843 // snd_printk("ESS Maestro soundcard not found or device busy\n");2849 // snd_printk(KERN_ERR "ESS Maestro soundcard not found or device busy\n"); 2844 2850 #endif 2845 2851 return err;  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/hda/patch_analog.c
r88 r92 2619 2619 if (is_rev2(codec)) 2620 2620 snd_printk(KERN_INFO "patch_analog: AD1988A rev.2 is detected, enable workarounds\n"); 2621 2621 //paul 2622 snd_printk(KERN_INFO "patch_analog: Vendor Id: 0x%x\n", codec->vendor_id); 2623 snd_printk(KERN_INFO "patch_analog: Subsystem Id: 0x%x\n", codec->subsystem_id); 2624 snd_printk(KERN_INFO "patch_analog: Revision Id: 0x%x\n", codec->revision_id); 2625 snd_printk(KERN_INFO "patch_analog: Model Name: %s\n", codec->bus->modelname); 2626 //endpaul 2622 2627 board_config = snd_hda_check_board_config(codec, AD1988_MODEL_LAST, 2623 2628 ad1988_models, NULL); … … 2638 2643 } 2639 2644 } 2640 2645 //paul 2646 snd_printk(KERN_INFO "patch_analog: board_config: %d\n", board_config); 2647 board_config = AD1988_3STACK_DIG; 2648 snd_printk(KERN_INFO "patch_analog: kludged board_config: %d\n", board_config); 2649 //endpaul 2641 2650 switch (board_config) { 2642 2651 case AD1988_6STACK:  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712.c
r32 r92 16 16 * You should have received a copy of the GNU General Public License 17 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 19 * 20 20 */ … … 22 22 /* 23 23 NOTES: 24 - spdif nonaudio consumer mode does not work (at least with my 24 - spdif nonaudio consumer mode does not work (at least with my 25 25 Sony STR-DB830) 26 26 */ 27 27 28 #define SNDRV_MAIN_OBJECT_FILE29 30 28 #include <sound/driver.h> 29 #include <asm/io.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/init.h> 33 #include <linux/slab.h> 34 #include <sound/core.h> 31 35 #include <sound/control.h> 32 36 #include <sound/pcm.h> 33 37 #include <sound/ac97_codec.h> 34 38 #include <sound/mpu401.h> 39 #include <sound/i2c.h> 40 #include <sound/cs8427.h> 35 41 #include <sound/info.h> 36 42 #define SNDRV_GET_ID 37 43 #include <sound/initval.h> 38 44 45 #include <sound/asoundef.h> 46 47 #define SND_CS8403 48 #define SND_CS8404 49 #include <sound/cs8403.h> 50 39 51 EXPORT_NO_SYMBOLS; 52 53 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 40 54 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 55 MODULE_LICENSE("GPL"); 41 56 MODULE_CLASSES("{sound}"); 42 57 MODULE_DEVICES("{{Hoontech SoundTrack DSP 24}," … … 49 64 "{TerraTec,EWS 88MT}," 50 65 "{TerraTec,EWS 88D}," 66 "{TerraTec,DMX 6Fire}," 51 67 "{ICEnsemble,Generic ICE1712}," 52 68 "{ICEnsemble,Generic Envy24}}"); 53 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");54 69 55 70 static int snd_index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 56 71 static char *snd_id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 57 static int snd_enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE; /* Enable this card */ 72 static int snd_enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 73 static int snd_omni[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 0}; /* Delta44 & 66 Omni I/O support */ 58 74 59 75 MODULE_PARM(snd_index, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); … … 66 82 MODULE_PARM_DESC(snd_enable, "Enable ICE1712 soundcard."); 67 83 MODULE_PARM_SYNTAX(snd_enable, SNDRV_ENABLE_DESC); 84 MODULE_PARM(snd_omni, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 85 MODULE_PARM_DESC(snd_omni, "Enable Midiman M-Audio Delta Omni I/O support."); 86 MODULE_PARM_SYNTAX(snd_omni, SNDRV_ENABLED "," SNDRV_ENABLE_DESC); 68 87 69 88 #ifndef PCI_VENDOR_ID_ICE … … 83 102 #define ICE1712_SUBDEVICE_EWS88MT 0x3b151511 84 103 #define ICE1712_SUBDEVICE_EWS88D 0x3b152b11 104 #define ICE1712_SUBDEVICE_DMX6FIRE 0x3b153811 85 105 86 106 /* … … 256 276 #define ICE1712_CFG_SPDIF_OUT 0x01 /* S/PDIF output is present */ 257 277 258 /* MidiMan Delta GPIO definitions */ 259 260 #define ICE1712_DELTA_DFS 0x01 /* fast/slow sample rate mode */ 278 /* 279 * MidiMan M-Audio Delta GPIO definitions 280 */ 281 282 /* MidiMan M-Audio Delta1010 */ 283 #define ICE1712_DELTA_DFS 0x01 /* fast/slow sample rate mode */ 261 284 /* (>48kHz must be 1) */ 262 /* all cards */263 285 #define ICE1712_DELTA_SPDIF_IN_STAT 0x02 264 286 /* S/PDIF input status */ … … 275 297 /* all except Delta44 */ 276 298 /* look to CS8404A datasheet */ 299 /* MidiMan M-Audio DeltaDiO */ 300 /* 0x01 = DFS */ 301 /* 0x02 = SPDIF_IN_STAT */ 302 /* 0x04 = SPDIF_OUT_STAT_CLOCK */ 303 /* 0x08 = SPDIF_OUT_STAT_DATA */ 277 304 #define ICE1712_DELTA_SPDIF_INPUT_SELECT 0x10 278 305 /* coaxial (0), optical (1) */ 279 306 /* S/PDIF input select*/ 280 /* DeltaDiO only */ 307 308 /* MidiMan M-Audio Delta1010 */ 309 /* 0x01 = DFS */ 310 /* 0x02 = SPDIF_IN_STAT */ 311 /* 0x04 = SPDIF_OUT_STAT_CLOCK */ 312 /* 0x08 = SPDIF_OUT_STAT_DATA */ 281 313 #define ICE1712_DELTA_WORD_CLOCK_SELECT 0x10 282 314 /* 1 - clock are taken from S/PDIF input */ 283 315 /* 0 - clock are taken from Word Clock input */ 284 /* Delta1010 only (affected SPMCLKIN pin of Envy24) */ 316 /* affected SPMCLKIN pin of Envy24 */ 317 #define ICE1712_DELTA_WORD_CLOCK_STATUS 0x20 318 /* 0 = valid word clock signal is present */ 319 320 /* MidiMan M-Audio Delta66 */ 321 /* 0x01 = DFS */ 322 /* 0x02 = SPDIF_IN_STAT */ 323 /* 0x04 = SPDIF_OUT_STAT_CLOCK */ 324 /* 0x08 = SPDIF_OUT_STAT_DATA */ 285 325 #define ICE1712_DELTA_CODEC_SERIAL_DATA 0x10 286 326 /* AKM4524 serial data */ 287 /* Delta66 and Delta44 */288 #define ICE1712_DELTA_WORD_CLOCK_STATUS 0x20289 /* 0 = valid word clock signal is present */290 /* Delta1010 only */291 327 #define ICE1712_DELTA_CODEC_SERIAL_CLOCK 0x20 292 328 /* AKM4524 serial clock */ 293 329 /* (writting on rising edge - 0->1 */ 294 /* Delta66 and Delta44 */295 330 #define ICE1712_DELTA_CODEC_CHIP_A 0x40 296 331 #define ICE1712_DELTA_CODEC_CHIP_B 0x80 297 332 /* 1 - select chip A or B */ 298 /* Delta66 and Delta44 */ 299 300 /* M-Audio Audiophile definitions */ 333 334 /* MidiMan M-Audio Delta44 */ 301 335 /* 0x01 = DFS */ 302 #define ICE1712_DELTA_AP_CCLK 0x02 /* AudioPhile only */ 303 /* SPI clock */ 336 /* 0x10 = CODEC_SERIAL_DATA */ 337 /* 0x20 = CODEC_SERIAL_CLOCK */ 338 /* 0x40 = CODEC_CHIP_A */ 339 /* 0x80 = CODEC_CHIP_B */ 340 341 /* MidiMan M-Audio Audiophile definitions */ 342 /* 0x01 = DFS */ 343 #define ICE1712_DELTA_AP_CCLK 0x02 /* SPI clock */ 304 344 /* (clocking on rising edge - 0->1) */ 305 #define ICE1712_DELTA_AP_DIN 0x04 /* AudioPhile only -data input */306 #define ICE1712_DELTA_AP_DOUT 0x08 /* AudioPhile only -data output */307 #define ICE1712_DELTA_AP_CS_DIGITAL 0x10 /* AudioPhile only -CS8427 chip select */345 #define ICE1712_DELTA_AP_DIN 0x04 /* data input */ 346 #define ICE1712_DELTA_AP_DOUT 0x08 /* data output */ 347 #define ICE1712_DELTA_AP_CS_DIGITAL 0x10 /* CS8427 chip select */ 308 348 /* low signal = select */ 309 #define ICE1712_DELTA_AP_CS_CODEC 0x20 /* A udioPhile only - AK4528 chip select */349 #define ICE1712_DELTA_AP_CS_CODEC 0x20 /* AK4528 chip select */ 310 350 /* low signal = select */ 311 351 … … 353 393 /* TerraTec EWS 88MT/D configuration definitions */ 354 394 /* RW, SDA snd SCLK are identical with EWX24/96 */ 355 356 395 #define ICE1712_EWS88_CS8414_RATE 0x07 /* CS8414 sample rate: gpio 0-2 */ 357 396 #define ICE1712_EWS88_RW 0x08 /* read/write switch for i2c; high = write */ … … 362 401 363 402 /* i2c address */ 364 #define ICE1712_EWS88MT_CS8404_ADDR 0x40365 #define ICE1712_EWS88MT_INPUT_ADDR 0x46366 #define ICE1712_EWS88MT_OUTPUT_ADDR 0x48403 #define ICE1712_EWS88MT_CS8404_ADDR (0x40>>1) 404 #define ICE1712_EWS88MT_INPUT_ADDR (0x46>>1) 405 #define ICE1712_EWS88MT_OUTPUT_ADDR (0x48>>1) 367 406 #define ICE1712_EWS88MT_OUTPUT_SENSE 0x40 /* mask */ 368 #define ICE1712_EWS88D_PCF_ADDR 0x40 407 #define ICE1712_EWS88D_PCF_ADDR (0x40>>1) 408 409 /* TerraTec DMX 6Fire configuration definitions */ 410 #define ICE1712_6FIRE_AK4524_CS_MASK 0x07 /* AK4524 chip select #1-#3 */ 411 #define ICE1712_6FIRE_RW 0x08 /* read/write switch for i2c; high = write */ 412 #define ICE1712_6FIRE_SERIAL_DATA 0x10 /* i2c & ak4524 data */ 413 #define ICE1712_6FIRE_SERIAL_CLOCK 0x20 /* i2c & ak4524 clock */ 414 #define ICE1712_6FIRE_TX2 0x40 /* MIDI2 */ 415 #define ICE1712_6FIRE_RX2 0x80 /* MIDI2 */ 416 417 #define ICE1712_6FIRE_CS8427_ADDR (0x22>>1) /* ?? */ 369 418 370 419 /* … … 381 430 382 431 typedef struct _snd_ice1712 ice1712_t; 383 384 typedef struct {385 void (*write)(ice1712_t *ice, unsigned char reg, unsigned char data);386 unsigned char (*read)(ice1712_t *ice, unsigned char reg);387 void (*write_bytes)(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data);388 void (*read_bytes)(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data);389 } ice1712_cs8427_ops_t;390 432 391 433 typedef struct { … … 453 495 454 496 unsigned int pro_volumes[20]; 455 int num_adcs; 456 int num_dacs; 497 int ak4528: 1, /* AK4524 or AK4528 */ 498 omni: 1; /* Delta Omni I/O */ 499 int num_adcs; /* AK4524 or AK4528 ADCs */ 500 int num_dacs; /* AK4524 or AK4528 DACs */ 501 int num_total_dacs; /* total DACs */ 457 502 unsigned char ak4524_images[4][8]; 503 unsigned char ak4524_ipga_gain[4][2]; 458 504 unsigned char hoontech_boxbits[4]; 459 505 unsigned int hoontech_config; 460 506 unsigned short hoontech_boxconfig[4]; 461 507 508 snd_i2c_bus_t *i2c; /* I2C bus */ 509 snd_i2c_device_t *cs8404; /* CS8404A I2C device */ 510 snd_i2c_device_t *cs8427; /* CS8427 I2C device */ 511 snd_i2c_device_t *pcf8574[2]; /* PCF8574 Output/Input (EWS88MT) */ 512 snd_i2c_device_t *pcf8575; /* PCF8575 (EWS88D) */ 513 462 514 unsigned char cs8403_spdif_bits; 463 515 unsigned char cs8403_spdif_stream_bits; 464 516 snd_kcontrol_t *spdif_stream_ctl; 465 466 unsigned char cs8427_spdif_status[5];467 unsigned char cs8427_spdif_stream_status[5];468 ice1712_cs8427_ops_t *cs8427_ops;469 517 470 518 unsigned char gpio_direction, gpio_write_mask; … … 651 699 } 652 700 653 static snd_kcontrol_new_t snd_ice1712_mixer_digmix_route_ac97 = {701 static snd_kcontrol_new_t snd_ice1712_mixer_digmix_route_ac97 __devinitdata = { 654 702 #ifdef TARGET_OS2 655 703 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 670 718 /* 671 719 */ 720 672 721 static void snd_ice1712_delta_cs8403_spdif_write(ice1712_t *ice, unsigned char bits) 673 722 { … … 694 743 } 695 744 696 static void snd_ice1712_decode_cs8403_spdif_bits(snd_aes_iec958_t *diga,697 unsigned char bits)698 {699 if (bits & 0x01) { /* consumer */700 if (!(bits & 0x02))701 diga->status[0] |= IEC958_AES0_NONAUDIO;702 if (!(bits & 0x08))703 diga->status[0] |= IEC958_AES0_CON_NOT_COPYRIGHT;704 switch (bits & 0x10) {705 case 0x10: diga->status[0] |= IEC958_AES0_CON_EMPHASIS_NONE; break;706 case 0x00: diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; break;707 }708 if (!(bits & 0x80))709 diga->status[1] |= IEC958_AES1_CON_ORIGINAL;710 switch (bits & 0x60) {711 case 0x00: diga->status[1] |= IEC958_AES1_CON_MAGNETIC_ID; break;712 case 0x20: diga->status[1] |= IEC958_AES1_CON_DIGDIGCONV_ID; break;713 case 0x40: diga->status[1] |= IEC958_AES1_CON_LASEROPT_ID; break;714 case 0x60: diga->status[1] |= IEC958_AES1_CON_GENERAL; break;715 }716 switch (bits & 0x06) {717 case 0x00: diga->status[3] |= IEC958_AES3_CON_FS_44100; break;718 case 0x02: diga->status[3] |= IEC958_AES3_CON_FS_48000; break;719 case 0x04: diga->status[3] |= IEC958_AES3_CON_FS_32000; break;720 }721 } else {722 diga->status[0] = IEC958_AES0_PROFESSIONAL;723 switch (bits & 0x18) {724 case 0x00: diga->status[0] |= IEC958_AES0_PRO_FS_32000; break;725 case 0x10: diga->status[0] |= IEC958_AES0_PRO_FS_44100; break;726 case 0x08: diga->status[0] |= IEC958_AES0_PRO_FS_48000; break;727 case 0x18: diga->status[0] |= IEC958_AES0_PRO_FS_NOTID; break;728 }729 switch (bits & 0x60) {730 case 0x20: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NONE; break;731 case 0x40: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; break;732 case 0x00: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_CCITT; break;733 case 0x60: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NOTID; break;734 }735 if (bits & 0x80)736 diga->status[1] |= IEC958_AES1_PRO_MODE_STEREOPHONIC;737 }738 }739 740 static unsigned char snd_ice1712_encode_cs8403_spdif_bits(snd_aes_iec958_t *diga)741 {742 unsigned char bits;743 744 if (!(diga->status[0] & IEC958_AES0_PROFESSIONAL)) {745 bits = 0x01; /* consumer mode */746 if (diga->status[0] & IEC958_AES0_NONAUDIO)747 bits &= ~0x02;748 else749 bits |= 0x02;750 if (diga->status[0] & IEC958_AES0_CON_NOT_COPYRIGHT)751 bits &= ~0x08;752 else753 bits |= 0x08;754 switch (diga->status[0] & IEC958_AES0_CON_EMPHASIS) {755 default:756 case IEC958_AES0_CON_EMPHASIS_NONE: bits |= 0x10; break;757 case IEC958_AES0_CON_EMPHASIS_5015: bits |= 0x00; break;758 }759 if (diga->status[1] & IEC958_AES1_CON_ORIGINAL)760 bits &= ~0x80;761 else762 bits |= 0x80;763 if ((diga->status[1] & IEC958_AES1_CON_CATEGORY) == IEC958_AES1_CON_GENERAL)764 bits |= 0x60;765 else {766 switch(diga->status[1] & IEC958_AES1_CON_MAGNETIC_MASK) {767 case IEC958_AES1_CON_MAGNETIC_ID:768 bits |= 0x00; break;769 case IEC958_AES1_CON_DIGDIGCONV_ID:770 bits |= 0x20; break;771 default:772 case IEC958_AES1_CON_LASEROPT_ID:773 bits |= 0x40; break;774 }775 }776 switch (diga->status[3] & IEC958_AES3_CON_FS) {777 default:778 case IEC958_AES3_CON_FS_44100: bits |= 0x00; break;779 case IEC958_AES3_CON_FS_48000: bits |= 0x02; break;780 case IEC958_AES3_CON_FS_32000: bits |= 0x04; break;781 }782 } else {783 bits = 0x00; /* professional mode */784 if (diga->status[0] & IEC958_AES0_NONAUDIO)785 bits &= ~0x02;786 else787 bits |= 0x02;788 /* CHECKME: I'm not sure about the bit order in val here */789 switch (diga->status[0] & IEC958_AES0_PRO_FS) {790 case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break;791 case IEC958_AES0_PRO_FS_44100: bits |= 0x10; break; /* 44.1kHz */792 case IEC958_AES0_PRO_FS_48000: bits |= 0x08; break; /* 48kHz */793 default:794 case IEC958_AES0_PRO_FS_NOTID: bits |= 0x18; break;795 }796 switch (diga->status[0] & IEC958_AES0_PRO_EMPHASIS) {797 case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x20; break;798 case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x40; break;799 case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break;800 default:801 case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x60; break;802 }803 switch (diga->status[1] & IEC958_AES1_PRO_MODE) {804 case IEC958_AES1_PRO_MODE_TWO:805 case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break;806 default: bits |= 0x80; break;807 }808 }809 return bits;810 }811 812 745 813 746 /* … … 841 774 842 775 /* 843 * CS8427 via SPI mode (for Audiophile) 776 * CS8427 via SPI mode (for Audiophile), emulated I2C 844 777 */ 845 778 … … 899 832 } 900 833 901 /* write a register */ 902 static void snd_ice1712_ap_cs8427_write(ice1712_t *ice, unsigned char reg, unsigned char data) 903 { 834 /* sequential write */ 835 static int ap_cs8427_sendbytes(snd_i2c_device_t *device, unsigned char *bytes, int count) 836 { 837 ice1712_t *ice = snd_magic_cast(ice1712_t, device->bus->private_data, return -EIO); 838 int res = count; 904 839 unsigned char tmp; 840 905 841 down(&ice->gpio_mutex); 906 842 tmp = ap_cs8427_codec_select(ice); 907 ap_cs8427_write_byte(ice, 0x20, tmp); /* address + write mode */908 ap_cs8427_write_byte(ice, reg, tmp);909 ap_cs8427_write_byte(ice, data, tmp);843 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 844 while (count-- > 0) 845 ap_cs8427_write_byte(ice, *bytes++, tmp); 910 846 ap_cs8427_codec_deassert(ice, tmp); 911 847 up(&ice->gpio_mutex); 912 } 913 914 /* read a register */ 915 static unsigned char snd_ice1712_ap_cs8427_read(ice1712_t *ice, unsigned char reg) 916 { 917 unsigned char tmp, data; 848 return res; 849 } 850 851 /* sequential read */ 852 static int ap_cs8427_readbytes(snd_i2c_device_t *device, unsigned char *bytes, int count) 853 { 854 ice1712_t *ice = snd_magic_cast(ice1712_t, device->bus->private_data, return -EIO); 855 int res = count; 856 unsigned char tmp; 918 857 919 858 down(&ice->gpio_mutex); 920 859 tmp = ap_cs8427_codec_select(ice); 921 ap_cs8427_write_byte(ice, 0x20, tmp); /* address + write mode */ 922 ap_cs8427_write_byte(ice, reg, tmp); 923 ap_cs8427_codec_deassert(ice, tmp); 924 udelay(5); 925 tmp = ap_cs8427_codec_select(ice); 926 ap_cs8427_write_byte(ice, 0x21, tmp); /* address + read mode */ 927 data = ap_cs8427_read_byte(ice, tmp); 860 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 861 while (count-- > 0) 862 *bytes++ = ap_cs8427_read_byte(ice, tmp); 928 863 ap_cs8427_codec_deassert(ice, tmp); 929 864 up(&ice->gpio_mutex); 930 return data; 931 } 932 933 /* sequential write */ 934 static void snd_ice1712_ap_cs8427_write_bytes(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data) 935 { 936 #if 1 937 unsigned char tmp; 938 down(&ice->gpio_mutex); 939 tmp = ap_cs8427_codec_select(ice); 940 ap_cs8427_write_byte(ice, 0x20, tmp); /* address + write mode */ 941 ap_cs8427_write_byte(ice, reg | 0x80, tmp); /* incremental mode */ 942 while (bytes-- > 0) 943 ap_cs8427_write_byte(ice, *data++, tmp); 944 ap_cs8427_codec_deassert(ice, tmp); 945 up(&ice->gpio_mutex); 946 #else 947 while (bytes-- > 0) 948 snd_ice1712_ap_cs8427_write(ice, reg++, *data++); 949 #endif 950 } 951 952 /* sequential read */ 953 static void snd_ice1712_ap_cs8427_read_bytes(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data) 954 { 955 #if 0 // is this working? -- ti 956 unsigned char tmp; 957 958 down(&ice->gpio_mutex); 959 tmp = ap_cs8427_codec_select(ice); 960 ap_cs8427_write_byte(ice, 0x20, tmp); /* address + write mode */ 961 ap_cs8427_write_byte(ice, reg | 0x80, tmp); /* incremental mode */ 962 ap_cs8427_codec_deassert(ice, tmp); 963 udelay(5); 964 tmp = ap_cs8427_codec_select(ice); 965 ap_cs8427_write_byte(ice, 0x21, tmp); /* address + read mode */ 966 while (bytes-- > 0) 967 *data++ = ap_cs8427_read_byte(ice, tmp); 968 ap_cs8427_codec_deassert(ice, tmp); 969 up(&ice->gpio_mutex); 970 #else 971 while (bytes-- > 0) 972 *data++ = snd_ice1712_ap_cs8427_read(ice, reg++); 973 #endif 865 return res; 866 } 867 868 static int ap_cs8427_probeaddr(snd_i2c_bus_t *bus, unsigned short addr) 869 { 870 if (addr == 0x10) 871 return 1; 872 return -ENOENT; 974 873 } 975 874 976 875 #ifdef TARGET_OS2 977 876 static ice1712_cs8427_ops_t snd_ice1712_ap_cs8427_ops = { 978 snd_ice1712_ap_cs8427_write, 979 snd_ice1712_ap_cs8427_read, 980 snd_ice1712_ap_cs8427_write_bytes, 981 snd_ice1712_ap_cs8427_read_bytes 877 ap_cs8427_sendbytes, 878 ap_cs8427_readbytes, 879 ap_cs8427_probeaddr, 982 880 }; 983 881 #else 984 static ice1712_cs8427_ops_t snd_ice1712_ap_cs8427_ops = { 985 write: snd_ice1712_ap_cs8427_write, 986 read: snd_ice1712_ap_cs8427_read, 987 write_bytes: snd_ice1712_ap_cs8427_write_bytes, 988 read_bytes: snd_ice1712_ap_cs8427_read_bytes, 882 static snd_i2c_ops_t ap_cs8427_i2c_ops = { 883 sendbytes: ap_cs8427_sendbytes, 884 readbytes: ap_cs8427_readbytes, 885 probeaddr: ap_cs8427_probeaddr, 989 886 }; 990 887 #endif 991 992 888 993 889 /* … … 996 892 997 893 /* send SDA and SCL */ 998 static void ewx_i2c_set(ice1712_t *ice, int clk, int data) 999 { 894 static void ewx_i2c_setlines(snd_i2c_bus_t *bus, int clk, int data) 895 { 896 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return); 1000 897 unsigned char tmp = 0; 1001 898 if (clk) … … 1007 904 } 1008 905 1009 /* send one bit */ 1010 static void ewx_i2c_send(ice1712_t *ice, int data) 1011 { 1012 ewx_i2c_set(ice, 0, data); 1013 ewx_i2c_set(ice, 1, data); 1014 ewx_i2c_set(ice, 0, data); 1015 } 1016 1017 /* start i2c */ 1018 static void ewx_i2c_start(ice1712_t *ice) 1019 { 1020 ewx_i2c_set(ice, 0, 1); 1021 ewx_i2c_set(ice, 1, 1); 1022 ewx_i2c_set(ice, 1, 0); 1023 ewx_i2c_set(ice, 0, 0); 1024 } 1025 1026 /* stop i2c */ 1027 static void ewx_i2c_stop(ice1712_t *ice) 1028 { 1029 ewx_i2c_set(ice, 0, 0); 1030 ewx_i2c_set(ice, 1, 0); 1031 ewx_i2c_set(ice, 1, 1); 1032 } 1033 1034 /* send a byte and get ack */ 1035 static void ewx_i2c_write(ice1712_t *ice, unsigned char val) 1036 { 1037 int i; 1038 for (i = 7; i >= 0; i--) 1039 ewx_i2c_send(ice, val & (1 << i)); 1040 ewx_i2c_send(ice, 1); /* ack */ 1041 } 1042 1043 /* prepare for write and send i2c_start */ 1044 static void ewx_i2c_write_prepare(ice1712_t *ice) 1045 { 1046 /* set RW high */ 1047 unsigned char mask = ICE1712_EWX2496_RW; 1048 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_EWX2496) 1049 mask |= ICE1712_EWX2496_AK4524_CS; /* CS high also */ 1050 snd_ice1712_gpio_write_bits(ice, mask, mask); 1051 /* set direction both SDA and SCL write */ 1052 ice->gpio_direction |= ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA; 1053 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio_direction); 1054 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA)); 1055 1056 ewx_i2c_start(ice); 1057 } 1058 1059 /* read a bit from serial data; 1060 this changes write mask 1061 SDA direction must be set to low 1062 */ 1063 static int ewx_i2c_read_bit(ice1712_t *ice) 1064 { 1065 int data; 906 static int ewx_i2c_getclock(snd_i2c_bus_t *bus) 907 { 908 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return -EIO); 909 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_CLOCK ? 1 : 0; 910 } 911 912 static int ewx_i2c_getdata(snd_i2c_bus_t *bus, int ack) 913 { 914 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return -EIO); 915 int bit; 1066 916 /* set RW pin to low */ 1067 917 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_RW); 1068 918 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 0); 1069 data = (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_DATA) ? 1 : 0; 919 if (ack) 920 udelay(5); 921 bit = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_EWX2496_SERIAL_DATA ? 1 : 0; 1070 922 /* set RW pin to high */ 1071 923 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ICE1712_EWX2496_RW); 1072 return data; 1073 } 1074 1075 static void ewx_i2c_read_prepare(ice1712_t *ice) 1076 { 1077 /* set SCL - write, SDA - read */ 1078 ice->gpio_direction |= ICE1712_EWX2496_SERIAL_CLOCK; 1079 ice->gpio_direction &= ~ICE1712_EWX2496_SERIAL_DATA; 924 /* reset write mask */ 925 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_SERIAL_CLOCK); 926 return bit; 927 } 928 929 static void ewx_i2c_start(snd_i2c_bus_t *bus) 930 { 931 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return); 932 unsigned char mask; 933 934 save_gpio_status(ice, (unsigned char *)&bus->private_value); 935 /* set RW high */ 936 mask = ICE1712_EWX2496_RW; 937 switch (ice->eeprom.subvendor) { 938 case ICE1712_SUBDEVICE_EWX2496: 939 mask |= ICE1712_EWX2496_AK4524_CS; /* CS high also */ 940 break; 941 case ICE1712_SUBDEVICE_DMX6FIRE: 942 mask |= ICE1712_6FIRE_AK4524_CS_MASK; /* CS high also */ 943 break; 944 } 945 snd_ice1712_gpio_write_bits(ice, mask, mask); 946 } 947 948 static void ewx_i2c_stop(snd_i2c_bus_t *bus) 949 { 950 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return); 951 restore_gpio_status(ice, (unsigned char *)&bus->private_value); 952 } 953 954 static void ewx_i2c_direction(snd_i2c_bus_t *bus, int clock, int data) 955 { 956 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return); 957 unsigned char mask = 0; 958 959 if (clock) 960 mask |= ICE1712_EWX2496_SERIAL_CLOCK; /* write SCL */ 961 if (data) 962 mask |= ICE1712_EWX2496_SERIAL_DATA; /* write SDA */ 963 ice->gpio_direction &= ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA); 964 ice->gpio_direction |= mask; 1080 965 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio_direction); 1081 /* set write mask only to SCL */ 1082 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~ICE1712_EWX2496_SERIAL_CLOCK); 1083 } 1084 1085 static void ewx_i2c_read_post(ice1712_t *ice) 1086 { 1087 /* reset direction both SDA and SCL to write */ 1088 ice->gpio_direction |= ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA; 1089 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio_direction); 1090 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA)); 1091 } 1092 1093 /* read a byte (and ack bit) */ 1094 static unsigned char ewx_i2c_read(ice1712_t *ice) 1095 { 1096 int i; 1097 unsigned char data = 0; 1098 1099 for (i = 7; i >= 0; i--) { 1100 ewx_i2c_set(ice, 1, 0); 1101 data |= ewx_i2c_read_bit(ice) << i; 1102 /* reset write mask */ 1103 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 1104 ~ICE1712_EWX2496_SERIAL_CLOCK); 1105 ewx_i2c_set(ice, 0, 0); 1106 } 1107 /* reset write mask */ 1108 ewx_i2c_read_post(ice); 1109 ewx_i2c_send(ice, 1); /* ack */ 1110 return data; 1111 } 1112 1113 1114 /* 1115 * CS8427 on EWX 24/96; Address 0x20 1116 */ 1117 /* write a register */ 1118 static void snd_ice1712_ewx_cs8427_write(ice1712_t *ice, unsigned char reg, unsigned char data) 1119 { 1120 unsigned char saved[2]; 1121 1122 save_gpio_status(ice, saved); 1123 ewx_i2c_write_prepare(ice); 1124 ewx_i2c_write(ice, 0x20); /* address + write */ 1125 ewx_i2c_write(ice, reg); /* MAP */ 1126 ewx_i2c_write(ice, data); 1127 ewx_i2c_stop(ice); 1128 restore_gpio_status(ice, saved); 1129 } 1130 1131 /* sequential write */ 1132 static void snd_ice1712_ewx_cs8427_write_bytes(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data) 1133 { 1134 unsigned char saved[2]; 1135 1136 save_gpio_status(ice, saved); 1137 ewx_i2c_write_prepare(ice); 1138 ewx_i2c_write(ice, 0x20); /* address + write */ 1139 ewx_i2c_write(ice, reg | 0x80); /* MAP incremental mode */ 1140 while (bytes-- > 0) 1141 ewx_i2c_write(ice, *data++); 1142 ewx_i2c_stop(ice); 1143 restore_gpio_status(ice, saved); 1144 } 1145 1146 /* read a register */ 1147 static unsigned char snd_ice1712_ewx_cs8427_read(ice1712_t *ice, unsigned char reg) 1148 { 1149 unsigned char saved[2]; 1150 unsigned char data; 1151 1152 save_gpio_status(ice, saved); 1153 ewx_i2c_write_prepare(ice); 1154 ewx_i2c_write(ice, 0x20); /* address + write */ 1155 ewx_i2c_write(ice, reg); /* MAP */ 1156 /* we set up the address first but without data */ 1157 ewx_i2c_stop(ice); 1158 1159 /* now read */ 1160 ewx_i2c_start(ice); 1161 ewx_i2c_write(ice, 0x21); /* address + read */ 1162 ewx_i2c_read_prepare(ice); 1163 data = ewx_i2c_read(ice); 1164 ewx_i2c_read_post(ice); 1165 ewx_i2c_stop(ice); 1166 1167 restore_gpio_status(ice, saved); 1168 return data; 1169 } 1170 1171 /* sequential read */ 1172 static void snd_ice1712_ewx_cs8427_read_bytes(ice1712_t *ice, unsigned char reg, int bytes, unsigned char *data) 1173 { 1174 #if 0 // the sequential read seems not working (yet).. 1175 unsigned char saved[2]; 1176 1177 save_gpio_status(ice, saved); 1178 ewx_i2c_write_prepare(ice); 1179 ewx_i2c_write(ice, 0x20); /* address + write */ 1180 ewx_i2c_write(ice, reg | 0x80); /* MAP incremental mode */ 1181 /* we set up the address first but without data */ 1182 ewx_i2c_stop(ice); 1183 1184 /* now read */ 1185 ewx_i2c_start(ice); 1186 ewx_i2c_write(ice, 0x21); /* address + read */ 1187 ewx_i2c_read_prepare(ice); 1188 while (bytes-- > 0) 1189 *data++ = ewx_i2c_read(ice); 1190 ewx_i2c_read_post(ice); 1191 ewx_i2c_stop(ice); 1192 restore_gpio_status(ice, saved); 1193 #else 1194 while (bytes-- > 0) 1195 *data++ = snd_ice1712_ewx_cs8427_read(ice, reg++); 1196 #endif 966 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~mask); 1197 967 } 1198 968 1199 969 #ifdef TARGET_OS2 1200 static ice1712_cs8427_ops_t snd_ice1712_ewx_cs8427_ops = { 1201 snd_ice1712_ewx_cs8427_write, 1202 snd_ice1712_ewx_cs8427_read, 1203 snd_ice1712_ewx_cs8427_write_bytes, 1204 snd_ice1712_ewx_cs8427_read_bytes, 970 static snd_i2c_bit_ops_t snd_ice1712_ewx_cs8427_bit_ops = { 971 ewx_i2c_start, 972 ewx_i2c_stop, 973 ewx_i2c_direction, 974 ewx_i2c_setlines, 975 ewx_i2c_getclock, 976 ewx_i2c_getdata, 1205 977 }; 1206 978 #else 1207 static ice1712_cs8427_ops_t snd_ice1712_ewx_cs8427_ops = { 1208 write: snd_ice1712_ewx_cs8427_write, 1209 read: snd_ice1712_ewx_cs8427_read, 1210 write_bytes: snd_ice1712_ewx_cs8427_write_bytes, 1211 read_bytes: snd_ice1712_ewx_cs8427_read_bytes, 979 static snd_i2c_bit_ops_t snd_ice1712_ewx_cs8427_bit_ops = { 980 start: ewx_i2c_start, 981 stop: ewx_i2c_stop, 982 direction: ewx_i2c_direction, 983 setlines: ewx_i2c_setlines, 984 getclock: ewx_i2c_getclock, 985 getdata: ewx_i2c_getdata, 1212 986 }; 1213 987 #endif 1214 988 1215 /*1216 * PCF8574 on EWS88MT1217 */1218 static void snd_ice1712_ews88mt_pcf8574_write(ice1712_t *ice, unsigned char addr, unsigned char data)1219 {1220 ewx_i2c_write_prepare(ice);1221 ewx_i2c_write(ice, addr); /* address + write */1222 ewx_i2c_write(ice, data);1223 ewx_i2c_stop(ice);1224 }1225 1226 static unsigned char snd_ice1712_ews88mt_pcf8574_read(ice1712_t *ice, unsigned char addr)1227 {1228 unsigned char data;1229 ewx_i2c_write_prepare(ice);1230 ewx_i2c_write(ice, addr | 0x01); /* address + read */1231 ewx_i2c_read_prepare(ice);1232 data = ewx_i2c_read(ice);1233 ewx_i2c_read_post(ice);1234 ewx_i2c_stop(ice);1235 return data;1236 }1237 1238 989 /* AK4524 chip select; address 0x48 bit 0-3 */ 1239 990 static void snd_ice1712_ews88mt_chip_select(ice1712_t *ice, int chip_mask) … … 1242 993 1243 994 snd_assert(chip_mask >= 0 && chip_mask <= 0x0f, return); 1244 data = snd_ice1712_ews88mt_pcf8574_read(ice, ICE1712_EWS88MT_OUTPUT_ADDR); 995 snd_i2c_lock(ice->i2c); 996 snd_runtime_check(snd_i2c_readbytes(ice->pcf8574[1], &data, 1) == 1, snd_i2c_unlock(ice->i2c); return); 1245 997 ndata = (data & 0xf0) | chip_mask; 1246 998 if (ndata != data) 1247 snd_ice1712_ews88mt_pcf8574_write(ice, ICE1712_EWS88MT_OUTPUT_ADDR, ndata); 1248 } 1249 1250 1251 /* 1252 * PCF8575 on EWS88D (16bit) 1253 */ 1254 static void snd_ice1712_ews88d_pcf8575_write(ice1712_t *ice, unsigned char addr, unsigned short data) 1255 { 1256 ewx_i2c_write_prepare(ice); 1257 ewx_i2c_write(ice, addr); /* address + write */ 1258 ewx_i2c_write(ice, data & 0xff); 1259 ewx_i2c_write(ice, (data >> 8) & 0xff); 1260 ewx_i2c_stop(ice); 1261 } 1262 1263 static unsigned short snd_ice1712_ews88d_pcf8575_read(ice1712_t *ice, unsigned char addr) 1264 { 1265 unsigned short data; 1266 ewx_i2c_write_prepare(ice); 1267 ewx_i2c_write(ice, addr | 0x01); /* address + read */ 1268 ewx_i2c_read_prepare(ice); 1269 data = ewx_i2c_read(ice); 1270 data |= (unsigned short)ewx_i2c_read(ice) << 8; 1271 //printk("pcf: read = 0x%x\n", data); 1272 ewx_i2c_read_post(ice); 1273 ewx_i2c_stop(ice); 1274 return data; 999 snd_runtime_check(snd_i2c_sendbytes(ice->pcf8574[1], &ndata, 1) == 1, snd_i2c_unlock(ice->i2c); return); 1000 snd_i2c_unlock(ice->i2c); 1275 1001 } 1276 1002 … … 1286 1012 unsigned int addrdata; 1287 1013 1288 snd_assert(chip >=0 && chip < 4, return); 1014 snd_assert(chip >= 0 && chip < 4, return); 1015 1289 1016 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_EWS88MT) { 1290 1017 /* assert AK4524 CS */ … … 1327 1054 ~(data_mask | clk_mask | 1328 1055 codecs_mask | ICE1712_EWS88_RW)); 1056 cif = 1; /* CIF high */ 1057 break; 1058 case ICE1712_SUBDEVICE_DMX6FIRE: 1059 data_mask = ICE1712_6FIRE_SERIAL_DATA; 1060 clk_mask = ICE1712_6FIRE_SERIAL_CLOCK; 1061 codecs_mask = (1 << chip) & ICE1712_6FIRE_AK4524_CS_MASK; 1062 tmp |= ICE1712_6FIRE_RW; /* set rw bit high */ 1063 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 1064 ice->gpio_direction | data_mask | clk_mask | 1065 codecs_mask | ICE1712_6FIRE_RW); 1066 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 1067 ~(data_mask | clk_mask | 1068 codecs_mask | ICE1712_6FIRE_RW)); 1329 1069 cif = 1; /* CIF high */ 1330 1070 break; … … 1360 1100 1361 1101 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_EWS88MT) { 1102 restore_gpio_status(ice, saved); 1362 1103 //snd_ice1712_ews88mt_chip_select(ice, ~(1 << chip) & 0x0f); 1363 1104 udelay(1); … … 1373 1114 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 1374 1115 udelay(1); 1375 } 1376 1116 restore_gpio_status(ice, saved); 1117 } 1118 1119 if ((addr != 0x04 && addr != 0x05) || (data & 0x80) == 0) 1377 1120 ice->ak4524_images[chip][addr] = data; 1378 restore_gpio_status(ice, saved); 1379 } 1380 1381 1382 /* 1383 * decode/encode channel status bits from CS8404A on EWS88MT&D 1384 */ 1385 static void snd_ice1712_ews_decode_cs8404_spdif_bits(snd_aes_iec958_t *diga, 1386 unsigned char bits) 1387 { 1388 if (bits & 0x10) { /* consumer */ 1389 if (!(bits & 0x20)) 1390 diga->status[0] |= IEC958_AES0_CON_NOT_COPYRIGHT; 1391 if (!(bits & 0x40)) 1392 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1393 if (!(bits & 0x80)) 1394 diga->status[1] |= IEC958_AES1_CON_ORIGINAL; 1395 switch (bits & 0x03) { 1396 case 0x00: diga->status[1] |= IEC958_AES1_CON_DAT; break; 1397 case 0x03: diga->status[1] |= IEC958_AES1_CON_GENERAL; break; 1398 } 1399 switch (bits & 0x06) { 1400 case 0x02: diga->status[3] |= IEC958_AES3_CON_FS_32000; break; 1401 case 0x04: diga->status[3] |= IEC958_AES3_CON_FS_48000; break; 1402 case 0x06: diga->status[3] |= IEC958_AES3_CON_FS_44100; break; 1403 } 1404 } else { 1405 diga->status[0] = IEC958_AES0_PROFESSIONAL; 1406 if (!(bits & 0x04)) 1407 diga->status[0] |= IEC958_AES0_NONAUDIO; 1408 switch (bits & 0x60) { 1409 case 0x00: diga->status[0] |= IEC958_AES0_PRO_FS_32000; break; 1410 case 0x40: diga->status[0] |= IEC958_AES0_PRO_FS_44100; break; 1411 case 0x20: diga->status[0] |= IEC958_AES0_PRO_FS_48000; break; 1412 case 0x60: diga->status[0] |= IEC958_AES0_PRO_FS_NOTID; break; 1413 } 1414 switch (bits & 0x03) { 1415 case 0x02: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NONE; break; 1416 case 0x01: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; break; 1417 case 0x00: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_CCITT; break; 1418 case 0x03: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NOTID; break; 1419 } 1420 if (!(bits & 0x80)) 1421 diga->status[1] |= IEC958_AES1_PRO_MODE_STEREOPHONIC; 1422 } 1423 } 1424 1425 static unsigned char snd_ice1712_ews_encode_cs8404_spdif_bits(snd_aes_iec958_t *diga) 1426 { 1427 unsigned char bits; 1428 1429 if (!(diga->status[0] & IEC958_AES0_PROFESSIONAL)) { 1430 bits = 0x10; /* consumer mode */ 1431 if (!(diga->status[0] & IEC958_AES0_CON_NOT_COPYRIGHT)) 1432 bits |= 0x20; 1433 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == IEC958_AES0_CON_EMPHASIS_NONE) 1434 bits |= 0x40; 1435 if (!(diga->status[1] & IEC958_AES1_CON_ORIGINAL)) 1436 bits |= 0x80; 1437 if ((diga->status[1] & IEC958_AES1_CON_CATEGORY) == IEC958_AES1_CON_GENERAL) 1438 bits |= 0x03; 1439 switch (diga->status[3] & IEC958_AES3_CON_FS) { 1440 default: 1441 case IEC958_AES3_CON_FS_44100: bits |= 0x06; break; 1442 case IEC958_AES3_CON_FS_48000: bits |= 0x04; break; 1443 case IEC958_AES3_CON_FS_32000: bits |= 0x02; break; 1444 } 1445 } else { 1446 bits = 0x00; /* professional mode */ 1447 if (!(diga->status[0] & IEC958_AES0_NONAUDIO)) 1448 bits |= 0x04; 1449 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1450 case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break; 1451 case IEC958_AES0_PRO_FS_44100: bits |= 0x40; break; /* 44.1kHz */ 1452 case IEC958_AES0_PRO_FS_48000: bits |= 0x20; break; /* 48kHz */ 1453 default: 1454 case IEC958_AES0_PRO_FS_NOTID: bits |= 0x00; break; 1455 } 1456 switch (diga->status[0] & IEC958_AES0_PRO_EMPHASIS) { 1457 case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x02; break; 1458 case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x01; break; 1459 case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break; 1460 default: 1461 case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x03; break; 1462 } 1463 switch (diga->status[1] & IEC958_AES1_PRO_MODE) { 1464 case IEC958_AES1_PRO_MODE_TWO: 1465 case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break; 1466 default: bits |= 0x80; break; 1467 } 1468 } 1469 return bits; 1470 } 1471 1472 /* write on i2c address 0x40 */ 1121 else 1122 ice->ak4524_ipga_gain[chip][addr-4] = data; 1123 } 1124 1125 static void snd_ice1712_ak4524_reset(ice1712_t *ice, int state) 1126 { 1127 int chip; 1128 unsigned char reg; 1129 1130 for (chip = 0; chip < ice->num_dacs/2; chip++) { 1131 snd_ice1712_ak4524_write(ice, chip, 0x01, state ? 0x00 : 0x03); 1132 if (state) 1133 continue; 1134 for (reg = 0x04; reg < (ice->ak4528 ? 0x06 : 0x08); reg++) 1135 snd_ice1712_ak4524_write(ice, chip, reg, ice->ak4524_images[chip][reg]); 1136 if (ice->ak4528) 1137 continue; 1138 for (reg = 0x04; reg < 0x06; reg++) 1139 snd_ice1712_ak4524_write(ice, chip, reg, ice->ak4524_ipga_gain[chip][reg-4]); 1140 } 1141 } 1142 1473 1143 static void snd_ice1712_ews_cs8404_spdif_write(ice1712_t *ice, unsigned char bits) 1474 1144 { 1475 unsigned short val, nval; 1476 1145 unsigned char bytes[2]; 1146 1147 snd_i2c_lock(ice->i2c); 1477 1148 switch (ice->eeprom.subvendor) { 1478 1149 case ICE1712_SUBDEVICE_EWS88MT: 1479 snd_ ice1712_ews88mt_pcf8574_write(ice, ICE1712_EWS88MT_CS8404_ADDR, bits);1150 snd_runtime_check(snd_i2c_sendbytes(ice->cs8404, &bits, 1) == 1, snd_i2c_unlock(ice->i2c); return); 1480 1151 break; 1481 1152 case ICE1712_SUBDEVICE_EWS88D: 1482 val = snd_ice1712_ews88d_pcf8575_read(ice, ICE1712_EWS88D_PCF_ADDR); 1483 nval = val & 0xff; 1484 nval |= bits << 8; 1485 if (val != nval) 1486 snd_ice1712_ews88d_pcf8575_write(ice, ICE1712_EWS88D_PCF_ADDR, nval); 1487 break; 1488 } 1153 snd_runtime_check(snd_i2c_readbytes(ice->pcf8575, bytes, 2) == 2, snd_i2c_unlock(ice->i2c); return); 1154 if (bits != bytes[1]) { 1155 bytes[1] = bits; 1156 snd_runtime_check(snd_i2c_readbytes(ice->pcf8575, bytes, 2) == 2, snd_i2c_unlock(ice->i2c); return); 1157 } 1158 break; 1159 } 1160 snd_i2c_unlock(ice->i2c); 1489 1161 } 1490 1162 … … 1496 1168 static int snd_ice1712_cs8427_set_input_clock(ice1712_t *ice, int spdif_clock) 1497 1169 { 1170 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 1498 1171 unsigned char val, nval; 1499 val = ice->cs8427_ops->read(ice, 4); 1172 snd_i2c_lock(ice->i2c); 1173 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 1174 snd_i2c_unlock(ice->i2c); 1175 return -EREMOTE; 1176 } 1177 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 1178 snd_i2c_unlock(ice->i2c); 1179 return -EREMOTE; 1180 } 1500 1181 nval = val & 0xf0; 1501 1182 if (spdif_clock) … … 1504 1185 nval |= 0x04; 1505 1186 if (val != nval) { 1506 ice->cs8427_ops->write(ice, 4, nval); 1187 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 1188 snd_i2c_unlock(ice->i2c); 1189 return -EREMOTE; 1190 } 1507 1191 return 1; 1508 1192 } 1509 return 0; 1510 } 1511 1512 #if 0 // we change clock selection automatically according to the ice1712 clock source 1513 static int snd_ice1712_cs8427_clock_select_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 1514 { 1515 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1516 uinfo->count = 1; 1517 uinfo->value.integer.min = 0; 1518 uinfo->value.integer.max = 1; 1519 return 0; 1520 } 1521 1522 static int snd_ice1712_cs8427_clock_select_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1523 { 1524 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1525 int val; 1526 val = ice->cs8427_ops->read(ice, 4); 1527 ucontrol->value.integer.value[0] = (val & 0x01) ? 1 : 0; 1528 return 0; 1529 } 1530 1531 static int snd_ice1712_cs8427_clock_select_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 1532 { 1533 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1534 return snd_ice1712_cs8427_set_input_clock(ice, ucontrol->value.integer.value[0]); 1535 } 1536 1537 static snd_kcontrol_new_t snd_ice1712_cs8427_clock_select = { 1538 iface: SNDRV_CTL_ELEM_IFACE_MIXER, 1539 name: "CS8427 Clock Select", 1540 info: snd_ice1712_cs8427_clock_select_info, 1541 get: snd_ice1712_cs8427_clock_select_get, 1542 put: snd_ice1712_cs8427_clock_select_put, 1543 }; 1544 #endif 1545 1546 1547 /* 1548 */ 1549 static int snd_ice1712_cs8427_in_status_info(snd_kcontrol_t *kcontrol, 1550 snd_ctl_elem_info_t *uinfo) 1551 { 1552 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1553 uinfo->count = 1; 1554 uinfo->value.integer.min = 0; 1555 uinfo->value.integer.max = 255; 1556 return 0; 1557 } 1558 1559 static int snd_ice1712_cs8427_in_status_get(snd_kcontrol_t *kcontrol, 1560 snd_ctl_elem_value_t *ucontrol) 1561 { 1562 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1563 ucontrol->value.integer.value[0] = ice->cs8427_ops->read(ice, 15); 1564 return 0; 1565 } 1566 1567 static snd_kcontrol_new_t snd_ice1712_cs8427_in_status = { 1568 #ifdef TARGET_OS2 1569 SNDRV_CTL_ELEM_IFACE_PCM,0,0, 1570 "IEC958 Input Status",0, 1571 SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 1572 snd_ice1712_cs8427_in_status_info, 1573 snd_ice1712_cs8427_in_status_get,0,0 1574 #else 1575 iface: SNDRV_CTL_ELEM_IFACE_PCM, 1576 info: snd_ice1712_cs8427_in_status_info, 1577 name: "IEC958 Input Status", 1578 access: SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 1579 get: snd_ice1712_cs8427_in_status_get, 1580 #endif 1581 }; 1582 1193 snd_i2c_unlock(ice->i2c); 1194 return 0; 1195 } 1583 1196 1584 1197 /* … … 1624 1237 case ICE1712_SUBDEVICE_DELTA44: 1625 1238 case ICE1712_SUBDEVICE_AUDIOPHILE: 1626 /* FIXME: we should put AK452x codecs to reset state1627 when this bit is being changed */1628 1239 spin_unlock_irqrestore(&ice->reg_lock, flags); 1240 snd_ice1712_ak4524_reset(ice, 1); 1629 1241 down(&ice->gpio_mutex); 1630 1242 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); … … 1636 1248 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 1637 1249 up(&ice->gpio_mutex); 1250 snd_ice1712_ak4524_reset(ice, 0); 1638 1251 return; 1639 1252 } … … 2197 1810 #endif 2198 1811 2199 static void __exitsnd_ice1712_pcm_free(snd_pcm_t *pcm)1812 static void snd_ice1712_pcm_free(snd_pcm_t *pcm) 2200 1813 { 2201 1814 ice1712_t *ice = snd_magic_cast(ice1712_t, pcm->private_data, return); … … 2204 1817 } 2205 1818 2206 static int __ init snd_ice1712_pcm(ice1712_t * ice, int device, snd_pcm_t ** rpcm)1819 static int __devinit snd_ice1712_pcm(ice1712_t * ice, int device, snd_pcm_t ** rpcm) 2207 1820 { 2208 1821 snd_pcm_t *pcm; … … 2229 1842 *rpcm = pcm; 2230 1843 2231 printk( "Consumer PCM code does not work well at the moment --jk\n");2232 2233 return 0; 2234 } 2235 2236 static void __exitsnd_ice1712_pcm_free_ds(snd_pcm_t *pcm)1844 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n"); 1845 1846 return 0; 1847 } 1848 1849 static void snd_ice1712_pcm_free_ds(snd_pcm_t *pcm) 2237 1850 { 2238 1851 ice1712_t *ice = snd_magic_cast(ice1712_t, pcm->private_data, return); … … 2241 1854 } 2242 1855 2243 static int __ init snd_ice1712_pcm_ds(ice1712_t * ice, int device, snd_pcm_t ** rpcm)1856 static int __devinit snd_ice1712_pcm_ds(ice1712_t * ice, int device, snd_pcm_t ** rpcm) 2244 1857 { 2245 1858 snd_pcm_t *pcm; … … 2384 1997 } 2385 1998 2386 static void snd_ice1712_cs8427_set_status(ice1712_t *ice, snd_pcm_runtime_t *runtime,2387 unsigned char *status)2388 {2389 if (status[0] & IEC958_AES0_PROFESSIONAL) {2390 status[0] &= ~IEC958_AES0_PRO_FS;2391 switch (runtime->rate) {2392 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;2393 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;2394 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;2395 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;2396 }2397 } else {2398 status[3] &= ~IEC958_AES3_CON_FS;2399 switch (runtime->rate) {2400 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;2401 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;2402 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;2403 }2404 }2405 }2406 2407 1999 static int snd_ice1712_playback_pro_prepare(snd_pcm_substream_t * substream) 2408 2000 { … … 2410 2002 ice1712_t *ice = snd_pcm_substream_chip(substream); 2411 2003 unsigned int tmp; 2412 unsigned char tmpst[5];2413 2004 int change; 2414 2005 … … 2442 2033 case ICE1712_SUBDEVICE_EWX2496: 2443 2034 case ICE1712_SUBDEVICE_AUDIOPHILE: 2444 /* setup S/PDIF */ 2445 memcpy(tmpst, ice->cs8427_spdif_stream_status, 5); 2446 snd_ice1712_cs8427_set_status(ice, substream->runtime, tmpst); 2447 change = memcmp(tmpst, ice->cs8427_spdif_stream_status, 5) != 0; 2448 memcpy(ice->cs8427_spdif_stream_status, tmpst, 5); 2449 spin_unlock_irqrestore(&ice->reg_lock, flags); 2450 if (change) { 2451 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif_stream_ctl->id); 2452 ice->cs8427_ops->write_bytes(ice, 32, 5, tmpst); 2453 } 2454 return 0; 2035 snd_cs8427_iec958_pcm(ice->cs8427, substream->runtime->rate); 2036 break; 2455 2037 case ICE1712_SUBDEVICE_EWS88MT: 2456 2038 case ICE1712_SUBDEVICE_EWS88D: … … 2609 2191 2610 2192 ice->cs8403_spdif_stream_bits = ice->cs8403_spdif_bits; 2611 memcpy(ice->cs8427_spdif_stream_status, ice->cs8427_spdif_status, 5); 2612 if (ice->spdif_stream_ctl != NULL) { 2613 ice->spdif_stream_ctl->access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2614 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE | 2615 SNDRV_CTL_EVENT_MASK_INFO, &ice->spdif_stream_ctl->id); 2616 } 2193 if (ice->cs8427) 2194 snd_cs8427_iec958_active(ice->cs8427, 1); 2617 2195 2618 2196 return 0; … … 2637 2215 2638 2216 ice->playback_pro_substream = NULL; 2639 2640 if (ice->spdif_stream_ctl != NULL) { 2641 ice->spdif_stream_ctl->access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2642 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE | 2643 SNDRV_CTL_EVENT_MASK_INFO, &ice->spdif_stream_ctl->id); 2644 } 2217 if (ice->cs8427) 2218 snd_cs8427_iec958_active(ice->cs8427, 0); 2645 2219 2646 2220 return 0; … … 2655 2229 } 2656 2230 2657 static void __exitsnd_ice1712_pcm_profi_free(snd_pcm_t *pcm)2231 static void snd_ice1712_pcm_profi_free(snd_pcm_t *pcm) 2658 2232 { 2659 2233 ice1712_t *ice = snd_magic_cast(ice1712_t, pcm->private_data, return); … … 2708 2282 #endif 2709 2283 2710 static int __ init snd_ice1712_pcm_profi(ice1712_t * ice, int device, snd_pcm_t ** rpcm)2284 static int __devinit snd_ice1712_pcm_profi(ice1712_t * ice, int device, snd_pcm_t ** rpcm) 2711 2285 { 2712 2286 snd_pcm_t *pcm; … … 2733 2307 *rpcm = pcm; 2734 2308 2309 if (ice->cs8427) { 2310 /* assign channels to iec958 */ 2311 err = snd_cs8427_iec958_build(ice->cs8427, 2312 pcm->streams[0].substream, 2313 pcm->streams[1].substream); 2314 if (err < 0) 2315 return err; 2316 } 2317 2735 2318 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0) 2736 2319 return err; … … 2858 2441 unsigned char nval = ucontrol->value.integer.value[0]; 2859 2442 int change = ice->ak4524_images[chip][addr] != nval; 2443 if (change) 2444 snd_ice1712_ak4524_write(ice, chip, addr, nval); 2445 return change; 2446 } 2447 2448 static int snd_ice1712_ak4524_ipga_gain_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 2449 { 2450 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2451 uinfo->count = 1; 2452 uinfo->value.integer.min = 0; 2453 uinfo->value.integer.max = 36; 2454 return 0; 2455 } 2456 2457 static int snd_ice1712_ak4524_ipga_gain_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 2458 { 2459 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 2460 int chip = kcontrol->private_value / 8; 2461 int addr = kcontrol->private_value % 8; 2462 ucontrol->value.integer.value[0] = ice->ak4524_ipga_gain[chip][addr-4] & 0x7f; 2463 return 0; 2464 } 2465 2466 static int snd_ice1712_ak4524_ipga_gain_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 2467 { 2468 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 2469 int chip = kcontrol->private_value / 8; 2470 int addr = kcontrol->private_value % 8; 2471 unsigned char nval = (ucontrol->value.integer.value[0] % 37) | 0x80; 2472 int change = ice->ak4524_ipga_gain[chip][addr] != nval; 2860 2473 if (change) 2861 2474 snd_ice1712_ak4524_write(ice, chip, addr, nval); … … 2960 2573 } 2961 2574 2962 return 0; 2963 } 2964 2965 static void /*__init*/ snd_ice1712_ac97_init(ac97_t *ac97) 2575 /* initialize volumes */ 2576 for (idx = 0; idx < 20; idx++) { 2577 ice->pro_volumes[idx] = 0x80008000; /* mute */ 2578 snd_ice1712_update_volume(ice, idx); 2579 } 2580 return 0; 2581 } 2582 2583 static void snd_ice1712_ac97_init(ac97_t *ac97) 2966 2584 { 2967 2585 // ice1712_t *ice = snd_magic_cast(ice1712_t, ac97->private_data, return); … … 2971 2589 } 2972 2590 2973 static void __exitsnd_ice1712_mixer_free_ac97(ac97_t *ac97)2591 static void snd_ice1712_mixer_free_ac97(ac97_t *ac97) 2974 2592 { 2975 2593 ice1712_t *ice = snd_magic_cast(ice1712_t, ac97->private_data, return); … … 2977 2595 } 2978 2596 2979 static int __ init snd_ice1712_ac97_mixer(ice1712_t * ice)2597 static int __devinit snd_ice1712_ac97_mixer(ice1712_t * ice) 2980 2598 { 2981 2599 int err; … … 2989 2607 ac97.private_data = ice; 2990 2608 ac97.private_free = snd_ice1712_mixer_free_ac97; 2991 if ((err = snd_ac97_mixer(ice->card, &ac97, &ice->ac97)) < 0) 2609 if ((err = snd_ac97_mixer(ice->card, &ac97, &ice->ac97)) < 0) { 2610 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n"); 2611 // return err; 2612 } else { 2613 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0) 2992 2614 return err; 2615 } 2993 2616 return 0; 2994 2617 } … … 3003 2626 ac97.private_free = snd_ice1712_mixer_free_ac97; 3004 2627 if ((err = snd_ac97_mixer(ice->card, &ac97, &ice->ac97)) < 0) 3005 return err;3006 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)3007 2628 return err; 3008 2629 return 0; … … 3047 2668 } 3048 2669 3049 static void __ init snd_ice1712_proc_init(ice1712_t * ice)2670 static void __devinit snd_ice1712_proc_init(ice1712_t * ice) 3050 2671 { 3051 2672 snd_info_entry_t *entry; … … 3092 2713 } 3093 2714 3094 static snd_kcontrol_new_t snd_ice1712_eeprom = {2715 static snd_kcontrol_new_t snd_ice1712_eeprom __devinitdata = { 3095 2716 #ifdef TARGET_OS2 3096 2717 SNDRV_CTL_ELEM_IFACE_CARD,0,0, … … 3126 2747 case ICE1712_SUBDEVICE_DELTADIO2496: 3127 2748 case ICE1712_SUBDEVICE_DELTA66: 3128 snd_ice1712_decode_cs8403_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_bits); 3129 break; 3130 case ICE1712_SUBDEVICE_AUDIOPHILE: 3131 case ICE1712_SUBDEVICE_EWX2496: 3132 memcpy(ucontrol->value.iec958.status, ice->cs8427_spdif_status, 5); 2749 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_bits); 3133 2750 break; 3134 2751 case ICE1712_SUBDEVICE_EWS88MT: 3135 2752 case ICE1712_SUBDEVICE_EWS88D: 3136 snd_ ice1712_ews_decode_cs8404_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_bits);2753 snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_bits); 3137 2754 break; 3138 2755 } … … 3152 2769 case ICE1712_SUBDEVICE_DELTADIO2496: 3153 2770 case ICE1712_SUBDEVICE_DELTA66: 3154 val = snd_ ice1712_encode_cs8403_spdif_bits(&ucontrol->value.iec958);2771 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 3155 2772 spin_lock_irqsave(&ice->reg_lock, flags); 3156 2773 change = ice->cs8403_spdif_bits != val; … … 3163 2780 } 3164 2781 break; 3165 case ICE1712_SUBDEVICE_AUDIOPHILE:3166 case ICE1712_SUBDEVICE_EWX2496:3167 spin_lock_irqsave(&ice->reg_lock, flags);3168 change = memcmp(ucontrol->value.iec958.status, ice->cs8427_spdif_status, 5) != 0;3169 memcpy(ice->cs8427_spdif_status, ucontrol->value.iec958.status, 5);3170 if (change && ice->playback_pro_substream == NULL) {3171 spin_unlock_irqrestore(&ice->reg_lock, flags);3172 ice->cs8427_ops->write_bytes(ice, 32, 5, ice->cs8427_spdif_status);3173 } else3174 spin_unlock_irqrestore(&ice->reg_lock, flags);3175 break;3176 2782 case ICE1712_SUBDEVICE_EWS88MT: 3177 2783 case ICE1712_SUBDEVICE_EWS88D: 3178 val = snd_ ice1712_ews_encode_cs8404_spdif_bits(&ucontrol->value.iec958);2784 val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958); 3179 2785 spin_lock_irqsave(&ice->reg_lock, flags); 3180 2786 change = ice->cs8403_spdif_bits != val; … … 3193 2799 } 3194 2800 3195 static snd_kcontrol_new_t snd_ice1712_spdif_default =2801 static snd_kcontrol_new_t snd_ice1712_spdif_default __devinitdata = 3196 2802 { 3197 2803 #ifdef TARGET_OS2 … … 3277 2883 } 3278 2884 3279 static snd_kcontrol_new_t snd_ice1712_spdif_maskc =2885 static snd_kcontrol_new_t snd_ice1712_spdif_maskc __devinitdata = 3280 2886 { 3281 2887 #ifdef TARGET_OS2 … … 3294 2900 }; 3295 2901 3296 static snd_kcontrol_new_t snd_ice1712_spdif_maskp =2902 static snd_kcontrol_new_t snd_ice1712_spdif_maskp __devinitdata = 3297 2903 { 3298 2904 #ifdef TARGET_OS2 … … 3327 2933 case ICE1712_SUBDEVICE_DELTADIO2496: 3328 2934 case ICE1712_SUBDEVICE_DELTA66: 3329 snd_ice1712_decode_cs8403_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_stream_bits); 3330 break; 3331 case ICE1712_SUBDEVICE_AUDIOPHILE: 3332 case ICE1712_SUBDEVICE_EWX2496: 3333 //ice->cs8427_ops->read_bytes(ice, 32, 5, ucontrol->value.iec958.status); 3334 memcpy(ucontrol->value.iec958.status, ice->cs8427_spdif_stream_status, 5); 2935 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_stream_bits); 3335 2936 break; 3336 2937 case ICE1712_SUBDEVICE_EWS88MT: 3337 2938 case ICE1712_SUBDEVICE_EWS88D: 3338 snd_ ice1712_ews_decode_cs8404_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_stream_bits);2939 snd_cs8404_decode_spdif_bits(&ucontrol->value.iec958, ice->cs8403_spdif_stream_bits); 3339 2940 break; 3340 2941 } … … 3354 2955 case ICE1712_SUBDEVICE_DELTADIO2496: 3355 2956 case ICE1712_SUBDEVICE_DELTA66: 3356 val = snd_ ice1712_encode_cs8403_spdif_bits(&ucontrol->value.iec958);2957 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 3357 2958 spin_lock_irqsave(&ice->reg_lock, flags); 3358 2959 change = ice->cs8403_spdif_stream_bits != val; … … 3365 2966 } 3366 2967 break; 3367 case ICE1712_SUBDEVICE_AUDIOPHILE:3368 case ICE1712_SUBDEVICE_EWX2496:3369 spin_lock_irqsave(&ice->reg_lock, flags);3370 change = memcmp(ice->cs8427_spdif_stream_status,3371 ucontrol->value.iec958.status, 5) != 0;3372 if (change && ice->playback_pro_substream != NULL) {3373 memcpy(ice->cs8427_spdif_stream_status,3374 ucontrol->value.iec958.status, 5);3375 spin_unlock_irqrestore(&ice->reg_lock, flags);3376 ice->cs8427_ops->write_bytes(ice, 32, 5, ucontrol->value.iec958.status);3377 } else3378 spin_unlock_irqrestore(&ice->reg_lock, flags);3379 break;3380 2968 case ICE1712_SUBDEVICE_EWS88MT: 3381 2969 case ICE1712_SUBDEVICE_EWS88D: 3382 val = snd_ ice1712_ews_encode_cs8404_spdif_bits(&ucontrol->value.iec958);2970 val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958); 3383 2971 spin_lock_irqsave(&ice->reg_lock, flags); 3384 2972 change = ice->cs8403_spdif_stream_bits != val; … … 3397 2985 } 3398 2986 3399 static snd_kcontrol_new_t snd_ice1712_spdif_stream =2987 static snd_kcontrol_new_t snd_ice1712_spdif_stream __devinitdata = 3400 2988 { 3401 2989 #ifdef TARGET_OS2 … … 3417 3005 3418 3006 #ifdef TARGET_OS2 3419 #define ICE1712_GPIO(xiface, xname, xindex, shift, xaccess) \3007 #define ICE1712_GPIO(xiface, xname, xindex, mask, invert, xaccess) \ 3420 3008 { xiface, 0, 0, xname, 0, xaccess, snd_ice1712_gpio_info, \ 3421 3009 snd_ice1712_gpio_get, snd_ice1712_gpio_put, \ 3422 shift}3010 mask | (invert << 24) } 3423 3011 #else 3424 #define ICE1712_GPIO(xiface, xname, xindex, shift, xaccess) \3012 #define ICE1712_GPIO(xiface, xname, xindex, mask, invert, xaccess) \ 3425 3013 { iface: xiface, name: xname, access: xaccess, info: snd_ice1712_gpio_info, \ 3426 3014 get: snd_ice1712_gpio_get, put: snd_ice1712_gpio_put, \ 3427 private_value: shift}3015 private_value: mask | (invert << 24) } 3428 3016 #endif 3429 3017 … … 3441 3029 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3442 3030 unsigned char mask = kcontrol->private_value & 0xff; 3031 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 3443 3032 unsigned char saved[2]; 3444 3033 3445 3034 save_gpio_status(ice, saved); 3446 ucontrol->value.integer.value[0] = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0;3035 ucontrol->value.integer.value[0] = (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0) ^ invert; 3447 3036 restore_gpio_status(ice, saved); 3448 3037 return 0; … … 3453 3042 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3454 3043 unsigned char mask = kcontrol->private_value & 0xff; 3044 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 3455 3045 unsigned char saved[2]; 3456 3046 int val, nval; … … 3458 3048 if (kcontrol->private_value & (1 << 31)) 3459 3049 return -EPERM; 3460 nval = ucontrol->value.integer.value[0] ? mask : 0;3050 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 3461 3051 save_gpio_status(ice, saved); 3462 3052 val = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); … … 3467 3057 } 3468 3058 3469 static snd_kcontrol_new_t snd_ice1712_delta1010_wordclock_select =3470 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 0);3471 static snd_kcontrol_new_t snd_ice1712_delta1010_wordclock_status =3472 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);3473 static snd_kcontrol_new_t snd_ice1712_deltadio2496_spdif_in_select =3474 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0 );3475 static snd_kcontrol_new_t snd_ice1712_delta_spdif_in_status =3476 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);3059 static snd_kcontrol_new_t snd_ice1712_delta1010_wordclock_select __devinitdata = 3060 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 3061 static snd_kcontrol_new_t snd_ice1712_delta1010_wordclock_status __devinitdata = 3062 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 3063 static snd_kcontrol_new_t snd_ice1712_deltadio2496_spdif_in_select __devinitdata = 3064 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 3065 static snd_kcontrol_new_t snd_ice1712_delta_spdif_in_status __devinitdata = 3066 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_PCM, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 3477 3067 3478 3068 static int snd_ice1712_pro_spdif_master_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) … … 3509 3099 spin_unlock_irqrestore(&ice->reg_lock, flags); 3510 3100 3511 if (ice->cs8427 _ops) {3101 if (ice->cs8427) { 3512 3102 /* change CS8427 clock source too */ 3513 3103 snd_ice1712_cs8427_set_input_clock(ice, ucontrol->value.integer.value[0]); … … 3517 3107 } 3518 3108 3519 static snd_kcontrol_new_t snd_ice1712_pro_spdif_master = {3109 static snd_kcontrol_new_t snd_ice1712_pro_spdif_master __devinitdata = { 3520 3110 #ifdef TARGET_OS2 3521 3111 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3563 3153 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 3564 3154 val &= 3; 3565 cval = in w(ICEMT(ice, ROUTE_CAPTURE));3155 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 3566 3156 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 3567 3157 if (val == 1 && idx < 2) … … 3585 3175 /* update PSDOUT */ 3586 3176 if (ucontrol->value.enumerated.item[0] >= 11) 3587 nval = idx < 2 ? 1 : 0; 3177 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 3588 3178 else if (ucontrol->value.enumerated.item[0] >= 9) 3589 nval = 3; 3179 nval = 3; /* spdif in */ 3590 3180 else if (ucontrol->value.enumerated.item[0] >= 1) 3591 nval = 2; 3181 nval = 2; /* analog in */ 3592 3182 else 3593 nval = 0; 3183 nval = 0; /* pcm */ 3594 3184 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 3595 3185 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); … … 3599 3189 if (change) 3600 3190 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 3601 if (nval < 2) 3191 if (nval < 2) /* dig mixer of pcm */ 3602 3192 return change; 3603 3193 3604 3194 /* update CAPTURE */ 3605 val = old_val = in w(ICEMT(ice, ROUTE_CAPTURE));3195 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 3606 3196 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 3607 if (nval == 2) { 3197 if (nval == 2) { /* analog in */ 3608 3198 nval = ucontrol->value.enumerated.item[0] - 1; 3609 3199 val &= ~(0x07 << shift); 3610 3200 val |= nval << shift; 3611 } else { 3201 } else { /* spdif in */ 3612 3202 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 3613 3203 val &= ~(0x08 << shift); … … 3616 3206 if (val != old_val) { 3617 3207 change = 1; 3618 out w(val, ICEMT(ice, ROUTE_CAPTURE));3208 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 3619 3209 } 3620 3210 return change; … … 3676 3266 } 3677 3267 3678 static snd_kcontrol_new_t snd_ice1712_mixer_pro_analog_route = {3268 static snd_kcontrol_new_t snd_ice1712_mixer_pro_analog_route __devinitdata = { 3679 3269 #ifdef TARGET_OS2 3680 3270 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3692 3282 }; 3693 3283 3694 static snd_kcontrol_new_t snd_ice1712_mixer_pro_spdif_route = {3284 static snd_kcontrol_new_t snd_ice1712_mixer_pro_spdif_route __devinitdata = { 3695 3285 #ifdef TARGET_OS2 3696 3286 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3742 3332 } 3743 3333 3744 static snd_kcontrol_new_t snd_ice1712_mixer_pro_volume_rate = {3334 static snd_kcontrol_new_t snd_ice1712_mixer_pro_volume_rate __devinitdata = { 3745 3335 #ifdef TARGET_OS2 3746 3336 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3782 3372 } 3783 3373 3784 static snd_kcontrol_new_t snd_ice1712_mixer_pro_peak = {3374 static snd_kcontrol_new_t snd_ice1712_mixer_pro_peak __devinitdata = { 3785 3375 #ifdef TARGET_OS2 3786 3376 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3846 3436 } 3847 3437 3848 static snd_kcontrol_new_t snd_ice1712_ewx_input_sense = {3438 static snd_kcontrol_new_t snd_ice1712_ewx_input_sense __devinitdata = { 3849 3439 #ifdef TARGET_OS2 3850 3440 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3864 3454 }; 3865 3455 3866 static snd_kcontrol_new_t snd_ice1712_ewx_output_sense = {3456 static snd_kcontrol_new_t snd_ice1712_ewx_output_sense __devinitdata = { 3867 3457 #ifdef TARGET_OS2 3868 3458 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3890 3480 { 3891 3481 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3892 unsigned char saved[2];3893 3482 unsigned char data; 3894 3483 3895 save_gpio_status(ice, saved); 3896 data = snd_ice1712_ews88mt_pcf8574_read(ice, ICE1712_EWS88MT_OUTPUT_ADDR); 3897 restore_gpio_status(ice, saved); 3484 snd_i2c_lock(ice->i2c); 3485 if (snd_i2c_readbytes(ice->pcf8574[1], &data, 1) != 1) { 3486 snd_i2c_unlock(ice->i2c); 3487 return -EREMOTE; 3488 } 3489 snd_i2c_unlock(ice->i2c); 3898 3490 ucontrol->value.enumerated.item[0] = data & ICE1712_EWS88MT_OUTPUT_SENSE ? 1 : 0; /* high = -10dBV, low = +4dBu */ 3899 3491 return 0; … … 3904 3496 { 3905 3497 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3906 unsigned char saved[2];3907 3498 unsigned char data, ndata; 3908 3499 3909 save_gpio_status(ice, saved); 3910 data = snd_ice1712_ews88mt_pcf8574_read(ice, ICE1712_EWS88MT_OUTPUT_ADDR); 3500 snd_i2c_lock(ice->i2c); 3501 if (snd_i2c_readbytes(ice->pcf8574[1], &data, 1) != 1) { 3502 snd_i2c_unlock(ice->i2c); 3503 return -EREMOTE; 3504 } 3911 3505 ndata = (data & ~ICE1712_EWS88MT_OUTPUT_SENSE) | (ucontrol->value.enumerated.item[0] ? ICE1712_EWS88MT_OUTPUT_SENSE : 0); 3912 if (ndata != data) 3913 snd_ice1712_ews88mt_pcf8574_write(ice, ICE1712_EWS88MT_OUTPUT_ADDR, ndata); 3914 restore_gpio_status(ice, saved); 3506 if (ndata != data && snd_i2c_sendbytes(ice->pcf8574[1], &ndata, 1) != 1) { 3507 snd_i2c_unlock(ice->i2c); 3508 return -EREMOTE; 3509 } 3510 snd_i2c_unlock(ice->i2c); 3915 3511 return ndata != data; 3916 3917 3512 } 3918 3513 … … 3922 3517 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3923 3518 int channel = kcontrol->id.index; 3924 unsigned char saved[2];3925 3519 unsigned char data; 3926 3520 3927 3521 snd_assert(channel >= 0 && channel <= 7, return 0); 3928 save_gpio_status(ice, saved); 3929 data = snd_ice1712_ews88mt_pcf8574_read(ice, ICE1712_EWS88MT_INPUT_ADDR); 3930 restore_gpio_status(ice, saved); 3522 snd_i2c_lock(ice->i2c); 3523 if (snd_i2c_readbytes(ice->pcf8574[0], &data, 1) != 1) { 3524 snd_i2c_unlock(ice->i2c); 3525 return -EREMOTE; 3526 } 3931 3527 /* reversed; high = +4dBu, low = -10dBV */ 3932 3528 ucontrol->value.enumerated.item[0] = data & (1 << channel) ? 0 : 1; … … 3939 3535 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3940 3536 int channel = kcontrol->id.index; 3941 unsigned char saved[2];3942 3537 unsigned char data, ndata; 3943 3538 3944 3539 snd_assert(channel >= 0 && channel <= 7, return 0); 3945 save_gpio_status(ice, saved); 3946 data = snd_ice1712_ews88mt_pcf8574_read(ice, ICE1712_EWS88MT_INPUT_ADDR); 3540 snd_i2c_lock(ice->i2c); 3541 if (snd_i2c_readbytes(ice->pcf8574[0], &data, 1) != 1) { 3542 snd_i2c_unlock(ice->i2c); 3543 return -EREMOTE; 3544 } 3947 3545 ndata = (data & ~(1 << channel)) | (ucontrol->value.enumerated.item[0] ? 0 : (1 << channel)); 3948 if (ndata != data) 3949 snd_ice1712_ews88mt_pcf8574_write(ice, ICE1712_EWS88MT_INPUT_ADDR, ndata); 3950 restore_gpio_status(ice, saved); 3546 if (ndata != data && snd_i2c_sendbytes(ice->pcf8574[0], &ndata, 1) != 1) { 3547 snd_i2c_unlock(ice->i2c); 3548 return -EREMOTE; 3549 } 3550 snd_i2c_unlock(ice->i2c); 3951 3551 return ndata != data; 3952 3552 } 3953 3553 3954 static snd_kcontrol_new_t snd_ice1712_ews88mt_input_sense = {3554 static snd_kcontrol_new_t snd_ice1712_ews88mt_input_sense __devinitdata = { 3955 3555 #ifdef TARGET_OS2 3956 3556 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 3968 3568 }; 3969 3569 3970 static snd_kcontrol_new_t snd_ice1712_ews88mt_output_sense = {3570 static snd_kcontrol_new_t snd_ice1712_ews88mt_output_sense __devinitdata = { 3971 3571 #ifdef TARGET_OS2 3972 3572 SNDRV_CTL_ELEM_IFACE_MIXER,0,0, … … 4003 3603 int shift = kcontrol->private_value & 0xff; 4004 3604 int invert = (kcontrol->private_value >> 8) & 1; 4005 unsigned short data;3605 unsigned char data[2]; 4006 3606 4007 data = snd_ice1712_ews88d_pcf8575_read(ice, ICE1712_EWS88D_PCF_ADDR); 4008 //printk("pcf: read 0x%x\n", data); 4009 data = (data >> shift) & 0x01; 3607 snd_i2c_lock(ice->i2c); 3608 if (snd_i2c_readbytes(ice->pcf8575, data, 2) != 2) { 3609 snd_i2c_unlock(ice->i2c); 3610 return -EREMOTE; 3611 } 3612 snd_i2c_unlock(ice->i2c); 3613 data[0] = (data[shift >> 3] >> (shift & 7)) & 0x01; 4010 3614 if (invert) 4011 data ^= 0x01;4012 ucontrol->value.integer.value[0] = data ;3615 data[0] ^= 0x01; 3616 ucontrol->value.integer.value[0] = data[0]; 4013 3617 return 0; 4014 3618 } … … 4019 3623 int shift = kcontrol->private_value & 0xff; 4020 3624 int invert = (kcontrol->private_value >> 8) & 1; 4021 unsigned short data, ndata;3625 unsigned char data[2], ndata[2]; 4022 3626 int change; 4023 3627 4024 data = snd_ice1712_ews88d_pcf8575_read(ice, ICE1712_EWS88D_PCF_ADDR); 4025 ndata = data & ~(1 << shift); 3628 snd_i2c_lock(ice->i2c); 3629 if (snd_i2c_readbytes(ice->pcf8575, data, 2) != 2) { 3630 snd_i2c_unlock(ice->i2c); 3631 return -EREMOTE; 3632 } 3633 ndata[shift >> 3] = data[shift >> 3] & ~(1 << (shift & 7)); 4026 3634 if (invert) { 4027 3635 if (! ucontrol->value.integer.value[0]) 4028 ndata |= (1 << shift);3636 ndata[shift >> 3] |= (1 << (shift & 7)); 4029 3637 } else { 4030 3638 if (ucontrol->value.integer.value[0]) 4031 ndata |= (1 << shift); 4032 } 4033 change = (data != ndata); 4034 if (change) { 4035 ndata &= 0xff; 4036 ndata |= (unsigned short)ice->cs8403_spdif_stream_bits << 8; 4037 snd_ice1712_ews88d_pcf8575_write(ice, ICE1712_EWS88D_PCF_ADDR, ndata); 4038 //printk("pcf: write 0x%x\n", ndata); 4039 } 3639 ndata[shift >> 3] |= (1 << (shift & 7)); 3640 } 3641 change = (data[shift >> 3] != ndata[shift >> 3]); 3642 if (change && snd_i2c_sendbytes(ice->pcf8575, data, 2) != 2) { 3643 snd_i2c_unlock(ice->i2c); 3644 return -EREMOTE; 3645 } 3646 snd_i2c_unlock(ice->i2c); 4040 3647 return change; 4041 3648 } 4042 3649 4043 3650 #ifdef TARGET_OS2 4044 #define EWS88D_CONTROL(xiface, xname, x index, xshift, xinvert, xaccess) \3651 #define EWS88D_CONTROL(xiface, xname, xshift, xinvert, xaccess) \ 4045 3652 { xiface,0,0,\ 4046 3653 xname, 0,\ … … 4052 3659 } 4053 3660 #else 4054 #define EWS88D_CONTROL(xiface, xname, x index, xshift, xinvert, xaccess) \3661 #define EWS88D_CONTROL(xiface, xname, xshift, xinvert, xaccess) \ 4055 3662 { iface: xiface,\ 4056 3663 name: xname,\ … … 4063 3670 #endif 4064 3671 4065 static snd_kcontrol_new_t snd_ice1712_ews88d_spdif_in_opt = 4066 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, 0, 1, 0); /* inverted */ 4067 static snd_kcontrol_new_t snd_ice1712_ews88d_opt_out_adat = 4068 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Output Optical", 0, 1, 0, 0); 4069 static snd_kcontrol_new_t snd_ice1712_ews88d_master_adat = 4070 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT External Master Clock", 0, 2, 0, 0); 4071 static snd_kcontrol_new_t snd_ice1712_ews88d_adat_enable = 4072 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "Enable ADAT", 0, 3, 0, 0); 4073 static snd_kcontrol_new_t snd_ice1712_ews88d_adat_through = 4074 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Through", 0, 4, 1, 0); 3672 static snd_kcontrol_new_t snd_ice1712_ews88d_controls[] __devinitdata = { 3673 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, 1, 0), /* inverted */ 3674 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Output Optical", 1, 0, 0), 3675 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT External Master Clock", 2, 0, 0), 3676 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "Enable ADAT", 3, 0, 0), 3677 EWS88D_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "ADAT Through", 4, 1, 0), 3678 }; 3679 3680 3681 /* 3682 * DMX 6Fire controls 3683 */ 3684 3685 #if 0 // XXX not working yet 3686 static int snd_ice1712_6fire_read_pca(ice1712_t *ice) 3687 { 3688 unsigned char byte; 3689 snd_i2c_lock(ice->i2c); 3690 byte = 0; /* read port */ 3691 snd_i2c_sendbytes(ice->pcf8575, &byte, 1); 3692 if (snd_i2c_readbytes(ice->pcf8575, &byte, 1) != 1) { 3693 snd_i2c_unlock(ice->i2c); 3694 return -EREMOTE; 3695 } 3696 snd_i2c_unlock(ice->i2c); 3697 return byte; 3698 } 3699 3700 static int snd_ice1712_6fire_write_pca(ice1712_t *ice, unsigned char data) 3701 { 3702 unsigned char bytes[2]; 3703 snd_i2c_lock(ice->i2c); 3704 bytes[0] = 1; /* write port */ 3705 bytes[1] = data; 3706 if (snd_i2c_sendbytes(ice->pcf8575, bytes, 2) != 2) { 3707 snd_i2c_unlock(ice->i2c); 3708 return -EREMOTE; 3709 } 3710 snd_i2c_unlock(ice->i2c); 3711 return 0; 3712 } 3713 3714 static int snd_ice1712_6fire_control_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 3715 { 3716 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 3717 uinfo->count = 1; 3718 uinfo->value.integer.min = 0; 3719 uinfo->value.integer.max = 1; 3720 return 0; 3721 } 3722 3723 static int snd_ice1712_6fire_control_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 3724 { 3725 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3726 int shift = kcontrol->private_value & 0xff; 3727 int invert = (kcontrol->private_value >> 8) & 1; 3728 int data; 3729 3730 if ((data = snd_ice1712_6fire_read_pca(ice)) < 0) 3731 return data; 3732 data = (data >> shift) & 1; 3733 if (invert) 3734 data ^= 1; 3735 ucontrol->value.integer.value[0] = data; 3736 return 0; 3737 } 3738 3739 static int snd_ice1712_6fire_control_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 3740 { 3741 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 3742 int shift = kcontrol->private_value & 0xff; 3743 int invert = (kcontrol->private_value >> 8) & 1; 3744 int data, ndata; 3745 3746 if ((data = snd_ice1712_6fire_read_pca(ice)) < 0) 3747 return data; 3748 ndata = data & ~(1 << shift); 3749 if (ucontrol->value.integer.value[0]) 3750 ndata |= (1 << shift); 3751 if (invert) 3752 ndata ^= (1 << shift); 3753 if (data != ndata) { 3754 snd_ice1712_6fire_write_pca(ice, (unsigned char)ndata); 3755 return 1; 3756 } 3757 return 0; 3758 } 3759 3760 #define DMX6FIRE_CONTROL(xiface, xname, xshift, xinvert, xaccess) \ 3761 { iface: xiface,\ 3762 name: xname,\ 3763 access: xaccess,\ 3764 info: snd_ice1712_6fire_control_info,\ 3765 get: snd_ice1712_6fire_control_get,\ 3766 put: snd_ice1712_6fire_control_put,\ 3767 private_value: xshift | (xinvert << 8),\ 3768 } 3769 3770 static snd_kcontrol_new_t snd_ice1712_6fire_led __devinitdata = 3771 DMX6FIRE_CONTROL(SNDRV_CTL_ELEM_IFACE_MIXER, "Breakbox LED", 6, 0, 0); 3772 3773 #endif // XXX not working yet 4075 3774 4076 3775 … … 4079 3778 */ 4080 3779 4081 static unsigned char __ init snd_ice1712_read_i2c(ice1712_t *ice,3780 static unsigned char __devinit snd_ice1712_read_i2c(ice1712_t *ice, 4082 3781 unsigned char dev, 4083 3782 unsigned char addr) … … 4091 3790 } 4092 3791 4093 static int __ init snd_ice1712_read_eeprom(ice1712_t *ice)3792 static int __devinit snd_ice1712_read_eeprom(ice1712_t *ice) 4094 3793 { 4095 3794 int dev = 0xa0; /* EEPROM device address */ … … 4137 3836 } 4138 3837 4139 static void __init snd_ice1712_ak4524_init(ice1712_t *ice) 4140 { 4141 static unsigned char inits[8] = { 4142 0x07, /* 0: all power up */ 4143 0x03, /* 1: ADC/DAC reset */ 4144 0x60, /* 2: 24bit I2S */ 4145 0x19, /* 3: deemphasis off */ 4146 0x00, /* 4: ADC left muted */ 4147 0x00, /* 5: ADC right muted */ 4148 0x00, /* 6: DAC left muted */ 4149 0x00, /* 7: DAC right muted */ 3838 static void __devinit snd_ice1712_ak4524_init(ice1712_t *ice) 3839 { 3840 static unsigned char inits[] = { 3841 0x00, 0x07, /* 0: all power up */ 3842 0x01, 0x00, /* 1: ADC/DAC reset */ 3843 0x02, 0x60, /* 2: 24bit I2S */ 3844 0x03, 0x19, /* 3: deemphasis off */ 3845 0x01, 0x03, /* 1: ADC/DAC enable */ 3846 0x04, 0x00, /* 4: ADC left muted */ 3847 0x05, 0x00, /* 5: ADC right muted */ 3848 0x04, 0x80, /* 4: ADC IPGA gain 0dB */ 3849 0x05, 0x80, /* 5: ADC IPGA gain 0dB */ 3850 0x06, 0x00, /* 6: DAC left muted */ 3851 0x07, 0x00, /* 7: DAC right muted */ 3852 0xff, 0xff 4150 3853 }; 4151 int chip; 4152 unsigned char reg; 4153 4154 for (chip = 0; chip < ice->num_dacs/2; chip++) { 4155 for (reg = 0; reg < 8; ++reg) 4156 snd_ice1712_ak4524_write(ice, chip, reg, inits[reg]); 4157 } 4158 } 4159 4160 /* init CS8427 transciever */ 4161 static void __init snd_ice1712_cs8427_init(ice1712_t *ice) 4162 { 4163 static unsigned char initvals[] = { 4164 /* RMCK to OMCK, no validity, disable mutes, TCBL=output */ 4165 0x80, 4166 /* hold last valid audio sample, RMCK=256*Fs, normal stereo operation */ 4167 0x00, 4168 /* output drivers normal operation, Tx<=serial, Rx=>serial */ 4169 0x0c, 4170 /* Run off, CMCK=256*Fs, output time base = OMCK, input time base = 4171 covered input clock, recovered input clock source is Envy24 */ 4172 0x04, 4173 /* Serial audio input port data format = I2S */ 4174 0x05, /* SIDEL=1, SILRPOL=1 */ 4175 /* Serial audio output port data format = I2S */ 4176 0x05, /* SODEL=1, SOLRPOL=1 */ 4177 }; 4178 unsigned char buf[32]; 4179 4180 /* verify CS8427 ID */ 4181 if (ice->cs8427_ops->read(ice, 127) != 0x71) { 4182 snd_printk("unable to find CS8427 signature, initialization is not completed\n"); 4183 return; 4184 } 4185 /* turn off run bit while making changes to configuration */ 4186 ice->cs8427_ops->write(ice, 4, 0x00); 4187 /* send initial values */ 4188 ice->cs8427_ops->write_bytes(ice, 1, 6, initvals); 4189 /* Turn off CS8427 interrupt stuff that is not used in hardware */ 4190 memset(buf, 0, sizeof(buf)); 4191 /* from address 9 to 15 */ 4192 ice->cs8427_ops->write_bytes(ice, 9, 7, buf); 4193 /* unmask the input PLL clock, V, confidence, biphase, parity status bits */ 4194 //buf[0] = 0x1f; 4195 buf[0] = 0; 4196 /* Registers 32-55 window to CS buffer 4197 Inhibit D->E transfers from overwriting first 5 bytes of CS data. 4198 Allow D->E transfers (all) of CS data. 4199 Allow E->F transfer of CS data. 4200 One byte mode; both A/B channels get same written CB data. 4201 A channel info is output to chip's EMPH* pin. */ 4202 buf[1] = 0x10; 4203 /* Use internal buffer to transmit User (U) data. 4204 Chip's U pin is an output. 4205 Transmit all O's for user data. */ 4206 //buf[2] = 0x10; 4207 buf[2] = 0x00; 4208 ice->cs8427_ops->write_bytes(ice, 17, 3, buf); 4209 /* turn on run bit and rock'n'roll */ 4210 ice->cs8427_ops->write(ice, 4, initvals[3] | 0x40); 4211 /* write default channel status bytes */ 4212 ice->cs8427_ops->write_bytes(ice, 32, 5, ice->cs8427_spdif_status); 4213 4214 /* 4215 * add controls.. 4216 */ 4217 snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_cs8427_in_status, ice)); 4218 #if 0 4219 snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_cs8427_clock_select, ice)); 4220 #endif 4221 } 4222 4223 static void __init snd_ice1712_stdsp24_gpio_write(ice1712_t *ice, unsigned char byte) 3854 int chip, idx; 3855 unsigned char *ptr, reg, data; 3856 3857 for (chip = idx = 0; chip < ice->num_dacs/2; chip++) { 3858 ptr = inits; 3859 while (*ptr != 0xff) { 3860 reg = *ptr++; 3861 data = *ptr++; 3862 if (ice->ak4528) { 3863 if (reg > 5) 3864 continue; 3865 if (reg >= 4 && (data & 0x80)) 3866 continue; 3867 } 3868 if (reg == 0x03 && ice->ak4528) 3869 data = 0x0d; /* deemphasis off, turn LR highpass filters on */ 3870 snd_ice1712_ak4524_write(ice, chip, reg, data); 3871 } 3872 } 3873 } 3874 3875 static void __devinit snd_ice1712_stdsp24_gpio_write(ice1712_t *ice, unsigned char byte) 4224 3876 { 4225 3877 byte |= ICE1712_STDSP24_CLOCK_BIT; … … 4234 3886 } 4235 3887 4236 static void __ init snd_ice1712_stdsp24_darear(ice1712_t *ice, int activate)3888 static void __devinit snd_ice1712_stdsp24_darear(ice1712_t *ice, int activate) 4237 3889 { 4238 3890 down(&ice->gpio_mutex); … … 4242 3894 } 4243 3895 4244 static void __ init snd_ice1712_stdsp24_mute(ice1712_t *ice, int activate)3896 static void __devinit snd_ice1712_stdsp24_mute(ice1712_t *ice, int activate) 4245 3897 { 4246 3898 down(&ice->gpio_mutex); … … 4250 3902 } 4251 3903 4252 static void __ init snd_ice1712_stdsp24_insel(ice1712_t *ice, int activate)3904 static void __devinit snd_ice1712_stdsp24_insel(ice1712_t *ice, int activate) 4253 3905 { 4254 3906 down(&ice->gpio_mutex); … … 4258 3910 } 4259 3911 4260 static void __ init snd_ice1712_stdsp24_box_channel(ice1712_t *ice, int box, int chn, int activate)3912 static void __devinit snd_ice1712_stdsp24_box_channel(ice1712_t *ice, int box, int chn, int activate) 4261 3913 { 4262 3914 down(&ice->gpio_mutex); … … 4305 3957 } 4306 3958 4307 static void __ init snd_ice1712_stdsp24_box_midi(ice1712_t *ice, int box, int master, int slave)3959 static void __devinit snd_ice1712_stdsp24_box_midi(ice1712_t *ice, int box, int master, int slave) 4308 3960 { 4309 3961 down(&ice->gpio_mutex); … … 4336 3988 } 4337 3989 4338 static void __ init snd_ice1712_stdsp24_init(ice1712_t *ice)3990 static void __devinit snd_ice1712_stdsp24_init(ice1712_t *ice) 4339 3991 { 4340 3992 int box, chn; … … 4394 4046 } 4395 4047 4396 static int __init snd_ice1712_chip_init(ice1712_t *ice) 4397 { 4048 static int __devinit snd_ice1712_chip_init(ice1712_t *ice) 4049 { 4050 int err, has_i2c = 0; 4051 4398 4052 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 4399 4053 udelay(200); … … 4426 4080 } 4427 4081 4082 /* determine I2C, DACs and ADCs */ 4428 4083 switch (ice->eeprom.subvendor) { 4429 4084 case ICE1712_SUBDEVICE_AUDIOPHILE: 4085 ice->ak4528 = 1; 4086 /* follow thru */ 4430 4087 case ICE1712_SUBDEVICE_EWX2496: 4431 ice->num_adcs = ice->num_dacs = 2; 4088 has_i2c = 1; 4089 ice->num_adcs = ice->num_dacs = ice->num_total_dacs = 2; 4432 4090 break; 4433 4091 case ICE1712_SUBDEVICE_DELTA44: 4434 4092 case ICE1712_SUBDEVICE_DELTA66: 4435 ice->num_adcs = ice->num_dacs = 4; 4093 ice->num_adcs = ice->num_dacs = ice->num_total_dacs = 4; 4094 if (ice->omni) 4095 ice->num_total_dacs = 8; 4436 4096 break; 4437 4097 case ICE1712_SUBDEVICE_EWS88MT: 4438 ice->num_adcs = ice->num_dacs = 8; 4439 break; 4440 } 4441 4098 has_i2c = 1; 4099 /* follow thru */ 4100 case ICE1712_SUBDEVICE_DELTA1010: 4101 ice->num_adcs = ice->num_dacs = ice->num_total_dacs = 8; 4102 break; 4103 case ICE1712_SUBDEVICE_EWS88D: 4104 has_i2c = 1; 4105 break; 4106 case ICE1712_SUBDEVICE_DMX6FIRE: 4107 has_i2c = 1; 4108 ice->num_adcs = ice->num_dacs = ice->num_total_dacs = 6; 4109 break; 4110 } 4111 4112 if (has_i2c) { 4113 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 4114 snd_printk("unable to create I2C bus\n"); 4115 return err; 4116 } 4117 ice->i2c->private_data = ice; 4118 switch (ice->eeprom.subvendor) { 4119 case ICE1712_SUBDEVICE_AUDIOPHILE: 4120 ice->i2c->ops = &ap_cs8427_i2c_ops; 4121 break; 4122 case ICE1712_SUBDEVICE_EWX2496: 4123 case ICE1712_SUBDEVICE_EWS88MT: 4124 case ICE1712_SUBDEVICE_EWS88D: 4125 case ICE1712_SUBDEVICE_DMX6FIRE: 4126 ice->i2c->hw_ops.bit = &snd_ice1712_ewx_cs8427_bit_ops; 4127 break; 4128 } 4129 switch (ice->eeprom.subvendor) { 4130 case ICE1712_SUBDEVICE_AUDIOPHILE: 4131 case ICE1712_SUBDEVICE_EWX2496: 4132 if ((err = snd_cs8427_create(ice->i2c, CS8427_BASE_ADDR, &ice->cs8427)) < 0) { 4133 snd_printk("CS8427 initialization failed\n"); 4134 return err; 4135 } 4136 break; 4137 case ICE1712_SUBDEVICE_DMX6FIRE: 4138 #if 0 // XXX not working yet 4139 if ((err = snd_i2c_device_create(ice->i2c, "PCF9554", 0x40>>1, &ice->pcf8575)) < 0) 4140 return err; 4141 if ((err = snd_cs8427_create(ice->i2c, 0x11, &ice->cs8427)) < 0) { 4142 snd_printk("CS8427 initialization failed\n"); 4143 return err; 4144 } 4145 #endif // XXX not working yet 4146 break; 4147 case ICE1712_SUBDEVICE_EWS88MT: 4148 if ((err = snd_i2c_device_create(ice->i2c, "CS8404", ICE1712_EWS88MT_CS8404_ADDR, &ice->cs8404)) < 0) 4149 return err; 4150 if ((err = snd_i2c_device_create(ice->i2c, "PCF8574 (1st)", ICE1712_EWS88MT_INPUT_ADDR, &ice->pcf8574[0])) < 0) 4151 return err; 4152 if ((err = snd_i2c_device_create(ice->i2c, "PCF8574 (2nd)", ICE1712_EWS88MT_OUTPUT_ADDR, &ice->pcf8574[1])) < 0) 4153 return err; 4154 break; 4155 case ICE1712_SUBDEVICE_EWS88D: 4156 if ((err = snd_i2c_device_create(ice->i2c, "PCF8575", ICE1712_EWS88D_PCF_ADDR, &ice->pcf8575)) < 0) 4157 return err; 4158 break; 4159 } 4160 } 4161 /* second stage of initialization, analog parts and others */ 4442 4162 switch (ice->eeprom.subvendor) { 4443 4163 case ICE1712_SUBDEVICE_DELTA66: … … 4446 4166 case ICE1712_SUBDEVICE_EWX2496: 4447 4167 case ICE1712_SUBDEVICE_EWS88MT: 4168 case ICE1712_SUBDEVICE_DMX6FIRE: 4448 4169 snd_ice1712_ak4524_init(ice); 4449 4170 break; … … 4467 4188 snd_ice1712_delta_cs8403_spdif_write(ice, ice->cs8403_spdif_bits); 4468 4189 break; 4190 } 4191 switch (ice->eeprom.subvendor) { 4469 4192 case ICE1712_SUBDEVICE_EWS88MT: 4470 4193 case ICE1712_SUBDEVICE_EWS88D: … … 4488 4211 if (err < 0) 4489 4212 return err; 4490 for (idx = 0; idx < ice->num_ dacs; idx++) {4213 for (idx = 0; idx < ice->num_total_dacs; idx++) { 4491 4214 kctl = snd_ctl_new1(&snd_ice1712_mixer_pro_analog_route, ice); 4492 4215 if (kctl == NULL) … … 4570 4293 case ICE1712_SUBDEVICE_DELTA66: 4571 4294 case ICE1712_SUBDEVICE_EWS88MT: 4295 case ICE1712_SUBDEVICE_DMX6FIRE: 4572 4296 for (idx = 0; idx < ice->num_dacs; ++idx) { 4573 4297 snd_kcontrol_t ctl; … … 4580 4304 ctl.get = snd_ice1712_ak4524_volume_get; 4581 4305 ctl.put = snd_ice1712_ak4524_volume_put; 4582 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 6; /* reigster 6 & 7 */ 4306 if (ice->ak4528) 4307 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 4; /* register 4 & 5 */ 4308 else 4309 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 6; /* register 6 & 7 */ 4583 4310 ctl.private_data = ice; 4584 4311 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 4585 4312 return err; 4586 4313 } 4587 for (idx = 0; idx < ice->num_adcs ; ++idx) {4314 for (idx = 0; idx < ice->num_adcs && !ice->ak4528; ++idx) { 4588 4315 snd_kcontrol_t ctl; 4589 4316 memset(&ctl, 0, sizeof(ctl)); … … 4595 4322 ctl.get = snd_ice1712_ak4524_volume_get; 4596 4323 ctl.put = snd_ice1712_ak4524_volume_put; 4597 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 4; /* reigster 4 & 5 */ 4324 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 4; /* register 4 & 5 */ 4325 ctl.private_data = ice; 4326 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 4327 return err; 4328 memset(&ctl, 0, sizeof(ctl)); 4329 strcpy(ctl.id.name, "IPGA Analog Capture Volume"); 4330 ctl.id.index = idx; 4331 ctl.id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 4332 ctl.info = snd_ice1712_ak4524_ipga_gain_info; 4333 ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE; 4334 ctl.get = snd_ice1712_ak4524_ipga_gain_get; 4335 ctl.put = snd_ice1712_ak4524_ipga_gain_put; 4336 ctl.private_value = (idx / 2) * 8 + (idx % 2) + 4; /* register 4 & 5 */ 4598 4337 ctl.private_data = ice; 4599 4338 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) … … 4638 4377 break; 4639 4378 case ICE1712_SUBDEVICE_EWS88D: 4640 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_spdif_in_opt, ice)); 4379 for (idx = 0; idx < sizeof(snd_ice1712_ews88d_controls)/sizeof(snd_ice1712_ews88d_controls[0]); idx++) { 4380 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_controls[idx], ice)); 4641 4381 if (err < 0) 4642 4382 return err; 4643 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_opt_out_adat, ice)); 4383 } 4384 break; 4385 case ICE1712_SUBDEVICE_DMX6FIRE: 4386 #if 0 // XXX not working yet 4387 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_6fire_led, ice)); 4644 4388 if (err < 0) 4645 4389 return err; 4646 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_master_adat, ice)); 4647 if (err < 0) 4648 return err; 4649 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_adat_enable, ice)); 4650 if (err < 0) 4651 return err; 4652 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_adat_through, ice)); 4653 if (err < 0) 4654 return err; 4655 break; 4656 } 4657 4658 return 0; 4659 } 4660 4661 static int __exit snd_ice1712_free(ice1712_t *ice) 4390 #endif 4391 break; 4392 } 4393 4394 return 0; 4395 } 4396 4397 static int snd_ice1712_free(ice1712_t *ice) 4662 4398 { 4663 4399 if (ice->res_port == NULL) … … 4672 4408 if (ice->irq) 4673 4409 free_irq(ice->irq, (void *) ice); 4674 if (ice->res_port) 4410 if (ice->res_port) { 4675 4411 release_resource(ice->res_port); 4676 if (ice->res_ddma_port) 4412 kfree_nocheck(ice->res_port); 4413 } 4414 if (ice->res_ddma_port) { 4677 4415 release_resource(ice->res_ddma_port); 4678 if (ice->res_dmapath_port) 4416 kfree_nocheck(ice->res_ddma_port); 4417 } 4418 if (ice->res_dmapath_port) { 4679 4419 release_resource(ice->res_dmapath_port); 4680 if (ice->res_profi_port) 4420 kfree_nocheck(ice->res_dmapath_port); 4421 } 4422 if (ice->res_profi_port) { 4681 4423 release_resource(ice->res_profi_port); 4424 kfree_nocheck(ice->res_profi_port); 4425 } 4682 4426 snd_magic_kfree(ice); 4683 4427 return 0; 4684 4428 } 4685 4429 4686 static int __exitsnd_ice1712_dev_free(snd_device_t *device)4430 static int snd_ice1712_dev_free(snd_device_t *device) 4687 4431 { 4688 4432 ice1712_t *ice = snd_magic_cast(ice1712_t, device->device_data, return -ENXIO); … … 4690 4434 } 4691 4435 4692 static int __ init snd_ice1712_create(snd_card_t * card,4436 static int __devinit snd_ice1712_create(snd_card_t * card, 4693 4437 struct pci_dev *pci, 4438 int omni, 4694 4439 ice1712_t ** r_ice1712) 4695 4440 { … … 4705 4450 }; 4706 4451 #endif 4452 4707 4453 *r_ice1712 = NULL; 4708 4454 … … 4720 4466 if (ice == NULL) 4721 4467 return -ENOMEM; 4468 ice->omni = omni ? 1 : 0; 4722 4469 spin_lock_init(&ice->reg_lock); 4723 4470 init_MUTEX(&ice->gpio_mutex); … … 4726 4473 0x10 | /* no emphasis */ 4727 4474 0x20); /* PCM encoder/decoder */ 4728 ice->cs8427_spdif_status[0] = (SNDRV_PCM_DEFAULT_CON_SPDIF >> 0) & 0xff;4729 ice->cs8427_spdif_status[1] = (SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff;4730 ice->cs8427_spdif_status[2] = (SNDRV_PCM_DEFAULT_CON_SPDIF >> 16) & 0xff;4731 ice->cs8427_spdif_status[3] = (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff;4732 memcpy(ice->cs8427_spdif_stream_status, ice->cs8427_spdif_status, 5);4733 4475 ice->card = card; 4734 4476 ice->pci = pci; … … 4795 4537 } 4796 4538 4797 static int __ init snd_ice1712_probe(struct pci_dev *pci,4539 static int __devinit snd_ice1712_probe(struct pci_dev *pci, 4798 4540 const struct pci_device_id *id) 4799 4541 { … … 4803 4545 int pcm_dev = 0, err; 4804 4546 4805 for ( ; dev < SNDRV_CARDS; dev++) { 4547 if (dev >= SNDRV_CARDS) 4548 return -ENODEV; 4806 4549 if (!snd_enable[dev]) { 4807 4550 dev++; 4808 4551 return -ENOENT; 4809 4552 } 4810 break;4811 }4812 if (dev >= SNDRV_CARDS)4813 return -ENODEV;4814 4553 4815 4554 card = snd_card_new(snd_index[dev], snd_id[dev], THIS_MODULE, 0); … … 4817 4556 return -ENOMEM; 4818 4557 4819 if ((err = snd_ice1712_create(card, pci, &ice)) < 0) {4558 if ((err = snd_ice1712_create(card, pci, snd_omni[dev], &ice)) < 0) { 4820 4559 snd_card_free(card); 4821 4560 return err; … … 4880 4619 strcpy(card->shortname, "TerraTec EWS 88D"); 4881 4620 break; 4621 case ICE1712_SUBDEVICE_DMX6FIRE: 4622 strcpy(card->shortname, "TerraTec DMX 6Fire"); 4623 break; 4882 4624 } 4883 4625 … … 4907 4649 return err; 4908 4650 } 4909 PCI_SET_DRIVER_DATA(pci, card);4651 pci_set_drvdata(pci, card); 4910 4652 dev++; 4911 4653 return 0; 4912 4654 } 4913 4655 4914 static void __ exit snd_ice1712_remove(struct pci_dev *pci)4915 { 4916 snd_card_free( PCI_GET_DRIVER_DATA(pci));4917 PCI_SET_DRIVER_DATA(pci, NULL);4656 static void __devexit snd_ice1712_remove(struct pci_dev *pci) 4657 { 4658 snd_card_free(pci_get_drvdata(pci)); 4659 pci_set_drvdata(pci, NULL); 4918 4660 } 4919 4661 … … 4930 4672 id_table: snd_ice1712_ids, 4931 4673 probe: snd_ice1712_probe, 4932 remove: snd_ice1712_remove,4674 remove: __devexit_p(snd_ice1712_remove), 4933 4675 }; 4934 4676 #endif … … 4940 4682 if ((err = pci_module_init(&driver)) < 0) { 4941 4683 #ifdef MODULE 4942 snd_printk("ICE1712 soundcard not found or device busy\n");4684 printk(KERN_ERR "ICE1712 soundcard not found or device busy\n"); 4943 4685 #endif 4944 4686 return err; … … 4957 4699 #ifndef MODULE 4958 4700 4959 /* format is: snd- card-ice1712=snd_enable,snd_index,snd_id */4701 /* format is: snd-ice1712=snd_enable,snd_index,snd_id */ 4960 4702 4961 4703 static int __init alsa_card_ice1712_setup(char *str) … … 4972 4714 } 4973 4715 4974 __setup("snd- card-ice1712=", alsa_card_ice1712_setup);4716 __setup("snd-ice1712=", alsa_card_ice1712_setup); 4975 4717 4976 4718 #endif /* ifndef MODULE */  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/maestro3.c
r77 r92 2924 2924 if ((err = pci_module_init(&driver)) < 0) { 2925 2925 #ifdef MODULE 2926 // snd_printk("Maestro3/Allegro soundcard not found or device busy\n");2926 // snd_printk(KERN_ERR "Maestro3/Allegro soundcard not found or device busy\n"); 2927 2927 #endif 2928 2928 return err;  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/rme96.c
r32 r92 20 20 * You should have received a copy of the GNU General Public License 21 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 23 * 24 24 */ 25 25 26 #define SNDRV_MAIN_OBJECT_FILE27 28 26 #include <sound/driver.h> 27 #include <asm/io.h> 28 #include <linux/delay.h> 29 #include <linux/init.h> 30 #include <linux/slab.h> 31 #include <sound/core.h> 29 32 #include <sound/info.h> 30 33 #include <sound/control.h> 31 34 #include <sound/pcm.h> 35 #include <sound/asoundef.h> 32 36 #define SNDRV_GET_ID 33 37 #include <sound/initval.h> … … 35 39 /* note, two last pcis should be equal, it is not a bug */ 36 40 EXPORT_NO_SYMBOLS; 41 42 MODULE_AUTHOR("Anders Torger <torger@ludd.luth.se>"); 37 43 MODULE_DESCRIPTION("RME Digi96, Digi96/8, Digi96/8 PRO, Digi96/8 PST, " 38 44 "Digi96/8 PAD"); 45 MODULE_LICENSE("GPL"); 39 46 MODULE_CLASSES("{sound}"); 40 47 MODULE_DEVICES("{{RME,Digi96}," … … 240 247 size_t capture_periodsize; /* in bytes, zero if not used */ 241 248 249 snd_pcm_uframes_t playback_last_appl_ptr; 242 250 size_t playback_ptr; 243 251 size_t capture_ptr; … … 693 701 } 694 702 695 696 static int697 snd_rme96_playback_getrate(rme96_t *rme96)698 {699 int rate;700 701 rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) +702 (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1);703 switch (rate) {704 case 1:705 rate = 32000;706 break;707 case 2:708 rate = 44100;709 break;710 case 3:711 rate = 48000;712 break;713 default:714 return -1;715 }716 return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate;717 }718 719 703 static int 720 704 snd_rme96_capture_getrate(rme96_t *rme96, … … 781 765 782 766 static int 767 snd_rme96_playback_getrate(rme96_t *rme96) 768 { 769 int rate, dummy; 770 771 if (!(rme96->wcreg & RME96_WCR_MASTER) && 772 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0) 773 { 774 /* slave clock */ 775 return rate; 776 } 777 rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) + 778 (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1); 779 switch (rate) { 780 case 1: 781 rate = 32000; 782 break; 783 case 2: 784 rate = 44100; 785 break; 786 case 3: 787 rate = 48000; 788 break; 789 default: 790 return -1; 791 } 792 return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate; 793 } 794 795 static int 783 796 snd_rme96_playback_setrate(rme96_t *rme96, 784 797 int rate) … … 930 943 break; 931 944 case RME96_INPUT_XLR: 932 if ( rme96->pci->device != PCI_DEVICE_ID_DIGI96_8_PAD_OR_PST ||933 rme96->pci->device != PCI_DEVICE_ID_DIGI96_8_PRO||945 if ((rme96->pci->device != PCI_DEVICE_ID_DIGI96_8_PAD_OR_PST && 946 rme96->pci->device != PCI_DEVICE_ID_DIGI96_8_PRO) || 934 947 (rme96->pci->device == PCI_DEVICE_ID_DIGI96_8_PAD_OR_PST && 935 948 rme96->rev > 4)) … … 1160 1173 int from_pause) 1161 1174 { 1162 snd_pcm_runtime_t *runtime = rme96->playback_substream->runtime;1163 1164 1175 if (!from_pause) { 1165 1176 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS); 1166 if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) { 1167 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER, 1168 runtime->dma_area, 1169 rme96->playback_periodsize); 1170 rme96->playback_ptr = rme96->playback_periodsize; 1171 } 1177 rme96->playback_last_appl_ptr = 0; 1178 rme96->playback_ptr = 0; 1172 1179 } 1173 1180 … … 1182 1189 if (!from_pause) { 1183 1190 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS); 1191 rme96->capture_ptr = 0; 1184 1192 } 1185 1193 … … 1220 1228 { 1221 1229 rme96_t *rme96 = (rme96_t *)dev_id; 1222 snd_pcm_runtime_t *runtime;1223 1230 1224 1231 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER); … … 1232 1239 if (rme96->rcreg & RME96_RCR_IRQ) { 1233 1240 /* playback */ 1234 runtime = rme96->playback_substream->runtime;1235 if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {1236 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER +1237 rme96->playback_ptr,1238 runtime->dma_area + rme96->playback_ptr,1239 rme96->playback_periodsize);1240 rme96->playback_ptr += rme96->playback_periodsize;1241 if (rme96->playback_ptr == RME96_BUFFER_SIZE) {1242 rme96->playback_ptr = 0;1243 }1244 }1245 1241 snd_pcm_period_elapsed(rme96->playback_substream); 1246 1242 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ); … … 1248 1244 if (rme96->rcreg & RME96_RCR_IRQ_2) { 1249 1245 /* capture */ 1250 runtime = rme96->capture_substream->runtime;1251 if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {1252 memcpy_fromio(runtime->dma_area + rme96->capture_ptr,1253 rme96->iobase + RME96_IO_REC_BUFFER +1254 rme96->capture_ptr,1255 rme96->capture_periodsize);1256 rme96->capture_ptr += rme96->capture_periodsize;1257 if (rme96->capture_ptr == RME96_BUFFER_SIZE) {1258 rme96->capture_ptr = 0;1259 }1260 }1261 1246 snd_pcm_period_elapsed(rme96->capture_substream); 1262 1247 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ); … … 1295 1280 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); 1296 1281 rme96->playback_substream = substream; 1282 rme96->playback_last_appl_ptr = 0; 1297 1283 rme96->playback_ptr = 0; 1298 1284 spin_unlock_irqrestore(&rme96->lock, flags); … … 1354 1340 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); 1355 1341 rme96->playback_substream = substream; 1342 rme96->playback_last_appl_ptr = 0; 1356 1343 rme96->playback_ptr = 0; 1357 1344 spin_unlock_irqrestore(&rme96->lock, flags); … … 1547 1534 { 1548 1535 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1536 snd_pcm_runtime_t *runtime = substream->runtime; 1537 snd_pcm_sframes_t diff; 1538 size_t bytes; 1539 1540 if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) { 1541 diff = runtime->control->appl_ptr - 1542 rme96->playback_last_appl_ptr; 1543 rme96->playback_last_appl_ptr = runtime->control->appl_ptr; 1544 if (diff != 0 && 1545 diff < -(snd_pcm_sframes_t)(runtime->boundary >> 1)) 1546 { 1547 diff += runtime->boundary; 1548 } 1549 bytes = diff << rme96->playback_frlog; 1550 1551 if (bytes > RME96_BUFFER_SIZE - rme96->playback_ptr) { 1552 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + 1553 rme96->playback_ptr, 1554 runtime->dma_area + rme96->playback_ptr, 1555 RME96_BUFFER_SIZE - rme96->playback_ptr); 1556 bytes -= RME96_BUFFER_SIZE - rme96->playback_ptr; 1557 if (bytes > RME96_BUFFER_SIZE) { 1558 bytes = RME96_BUFFER_SIZE; 1559 } 1560 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER, 1561 runtime->dma_area, 1562 bytes); 1563 rme96->playback_ptr = bytes; 1564 } else if (bytes != 0) { 1565 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + 1566 rme96->playback_ptr, 1567 runtime->dma_area + rme96->playback_ptr, 1568 bytes); 1569 rme96->playback_ptr += bytes; 1570 } 1571 } 1549 1572 return snd_rme96_playback_ptr(rme96); 1550 1573 } … … 1554 1577 { 1555 1578 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1556 return snd_rme96_capture_ptr(rme96); 1579 snd_pcm_runtime_t *runtime = substream->runtime; 1580 snd_pcm_uframes_t frameptr; 1581 size_t ptr; 1582 1583 frameptr = snd_rme96_capture_ptr(rme96); 1584 if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) { 1585 ptr = frameptr << rme96->capture_frlog; 1586 if (ptr > rme96->capture_ptr) { 1587 memcpy_fromio(runtime->dma_area + rme96->capture_ptr, 1588 rme96->iobase + RME96_IO_REC_BUFFER + 1589 rme96->capture_ptr, 1590 ptr - rme96->capture_ptr); 1591 rme96->capture_ptr += ptr - rme96->capture_ptr; 1592 } else if (ptr < rme96->capture_ptr) { 1593 memcpy_fromio(runtime->dma_area + rme96->capture_ptr, 1594 rme96->iobase + RME96_IO_REC_BUFFER + 1595 rme96->capture_ptr, 1596 RME96_BUFFER_SIZE - rme96->capture_ptr); 1597 memcpy_fromio(runtime->dma_area, 1598 rme96->iobase + RME96_IO_REC_BUFFER, 1599 ptr); 1600 rme96->capture_ptr = ptr; 1601 } 1602 } 1603 return frameptr; 1557 1604 } 1558 1605 … … 1683 1730 if (rme96->res_port != NULL) { 1684 1731 release_resource(rme96->res_port); 1732 kfree_nocheck(rme96->res_port); 1685 1733 rme96->res_port = NULL; 1686 1734 } … … 2614 2662 } 2615 2663 2616 static int __ init2664 static int __devinit 2617 2665 snd_rme96_probe(struct pci_dev *pci, 2618 2666 const struct pci_device_id *id) … … 2624 2672 u8 val; 2625 2673 2626 for ( ; dev < SNDRV_CARDS; dev++) { 2674 if (dev >= SNDRV_CARDS) { 2675 return -ENODEV; 2676 } 2627 2677 if (!snd_enable[dev]) { 2628 2678 dev++; 2629 2679 return -ENOENT; 2630 }2631 break;2632 }2633 if (dev >= SNDRV_CARDS) {2634 return -ENODEV;2635 2680 } 2636 2681 if ((card = snd_card_new(snd_index[dev], snd_id[dev], THIS_MODULE, … … 2673 2718 return err; 2674 2719 } 2675 PCI_SET_DRIVER_DATA(pci, card);2720 pci_set_drvdata(pci, card); 2676 2721 dev++; 2677 2722 return 0; 2678 2723 } 2679 2724 2680 static void __ exit snd_rme96_remove(struct pci_dev *pci)2681 { 2682 snd_card_free( PCI_GET_DRIVER_DATA(pci));2683 PCI_SET_DRIVER_DATA(pci, NULL);2725 static void __devexit snd_rme96_remove(struct pci_dev *pci) 2726 { 2727 snd_card_free(pci_get_drvdata(pci)); 2728 pci_set_drvdata(pci, NULL); 2684 2729 } 2685 2730 … … 2696 2741 id_table: snd_rme96_ids, 2697 2742 probe: snd_rme96_probe, 2698 remove: snd_rme96_remove,2743 remove: __devexit_p(snd_rme96_remove), 2699 2744 }; 2700 2745 #endif … … 2706 2751 if ((err = pci_module_init(&driver)) < 0) { 2707 2752 #ifdef MODULE 2708 // snd_printk( "No RME Digi96 cards found\n");2753 // snd_printk(KERN_ERR "No RME Digi96 cards found\n"); 2709 2754 #endif 2710 2755 return err; … … 2723 2768 #ifndef MODULE 2724 2769 2725 /* format is: snd- card-rme96=snd_enable,snd_index,snd_id */2770 /* format is: snd-rme96=snd_enable,snd_index,snd_id */ 2726 2771 2727 2772 static int __init alsa_card_rme96_setup(char *str) … … 2738 2783 } 2739 2784 2740 __setup("snd- card-rme96=", alsa_card_rme96_setup);2785 __setup("snd-rme96=", alsa_card_rme96_setup); 2741 2786 2742 2787 #endif /* ifndef MODULE */  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/rme9652/rme9652.c
r32 r92 17 17 * You should have received a copy of the GNU General Public License 18 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 20 * 21 21 */ 22 22 23 #define SNDRV_MAIN_OBJECT_FILE24 23 #include <sound/driver.h> 24 #include <asm/io.h> 25 #include <linux/delay.h> 26 #include <linux/init.h> 27 #include <linux/slab.h> 28 #include <sound/core.h> 25 29 #include <sound/control.h> 26 30 #include <sound/pcm.h> 27 31 #include <sound/info.h> 32 #include <sound/asoundef.h> 28 33 #define SNDRV_GET_ID 29 34 #include <sound/initval.h> … … 31 36 static int snd_index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 32 37 static char *snd_id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 33 static int snd_enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE; /* Enable this card */ 38 static int snd_enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 39 static int snd_precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */ 34 40 35 41 EXPORT_NO_SYMBOLS; … … 43 49 MODULE_PARM_DESC(snd_enable, "Enable/disable specific RME96{52,36} soundcards."); 44 50 MODULE_PARM_SYNTAX(snd_enable, SNDRV_ENABLE_DESC); 51 MODULE_PARM(snd_precise_ptr, "1-" __MODULE_STRING(SNDRV_CARDS) "i"); 52 MODULE_PARM_DESC(snd_precise_ptr, "Enable precise pointer (doesn't work reliably)."); 53 MODULE_PARM_SYNTAX(snd_precise_ptr, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC); 45 54 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 46 55 MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 56 MODULE_LICENSE("GPL"); 47 57 MODULE_CLASSES("{sound}"); 48 58 MODULE_DEVICES("{{RME,Hammerfall}," … … 206 216 unsigned long iobase; 207 217 218 int precise_ptr; 219 208 220 u32 control_register; /* cached value */ 209 221 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ … … 349 361 rme9652->hw_offsetmask = 350 362 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 351 rme9652->max_jitter = 16 + (rme9652->period_bytes <= 1024 ? 32 : 64);352 } 353 354 static inlinesnd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)363 rme9652->max_jitter = 80; 364 } 365 366 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652) 355 367 { 356 368 int status; … … 360 372 361 373 status = rme9652_read(rme9652, RME9652_status_register); 374 if (!rme9652->precise_ptr) 375 return (status & RME9652_buffer_id) ? period_size : 0; 362 376 offset = status & RME9652_buf_pos; 363 377 … … 379 393 if (offset > rme9652->max_jitter) { 380 394 if (frag) 381 printk( "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);395 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); 382 396 } else if (!frag) 383 397 return 0; … … 388 402 if (offset > period_size + rme9652->max_jitter) { 389 403 if (!frag) 390 printk( "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);404 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); 391 405 } else if (frag) 392 406 return period_size; … … 1732 1746 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1733 1747 rme9652->irq, rme9652->port, rme9652->iobase); 1748 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1734 1749 1735 1750 snd_iprintf(buffer, "\n"); … … 1948 1963 if (rme9652->iobase) 1949 1964 iounmap((void *) rme9652->iobase); 1950 if (rme9652->res_port) 1965 if (rme9652->res_port) { 1951 1966 release_resource(rme9652->res_port); 1967 kfree_nocheck(rme9652->res_port); 1968 } 1952 1969 if (rme9652->irq >= 0) 1953 1970 free_irq(rme9652->irq, (void *)rme9652); … … 1985 2002 } 1986 2003 1987 snd_printk("%s: no buffers available\n", 1988 rme9652->card_name); 2004 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); 1989 2005 return -ENOMEM; 1990 2006 } … … 1999 2015 /* Align to bus-space 64K boundary */ 2000 2016 2001 cb_bus = cb_addr; 2002 cb_bus = (cb_bus + 0xFFFF) & ~0xFFFFl; 2003 2004 pb_bus = pb_addr; 2005 pb_bus = (pb_bus + 0xFFFF) & ~0xFFFFl; 2017 cb_bus = (cb_addr + 0xFFFF) & ~0xFFFFl; 2018 pb_bus = (pb_addr + 0xFFFF) & ~0xFFFFl; 2006 2019 2007 2020 /* Tell the card where it is */ … … 2010 2023 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 2011 2024 2012 rme9652->capture_buffer = bus_to_virt(cb_bus);2013 rme9652->playback_buffer = bus_to_virt(pb_bus);2025 rme9652->capture_buffer = cb + (cb_bus - cb_addr); 2026 rme9652->playback_buffer = pb + (pb_bus - pb_addr); 2014 2027 2015 2028 return 0; … … 2745 2758 2746 2759 static int __init snd_rme9652_create(snd_card_t *card, 2747 rme9652_t *rme9652) 2760 rme9652_t *rme9652, 2761 int precise_ptr) 2748 2762 { 2749 2763 struct pci_dev *pci = rme9652->pci; … … 2772 2786 rme9652->irq = pci->irq; 2773 2787 2774 rme9652->iobase = (unsigned long) ioremap (rme9652->port, RME9652_IO_EXTENT);2788 rme9652->iobase = (unsigned long) ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2775 2789 if (rme9652->iobase == 0) { 2776 2790 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2777 2791 return -EBUSY; 2778 2792 } 2793 2794 rme9652->precise_ptr = precise_ptr; 2779 2795 2780 2796 /* Determine the h/w rev level of the card. This seems like … … 2871 2887 } 2872 2888 2873 static int snd_rme9652_probe(struct pci_dev *pci,2889 static int __devinit snd_rme9652_probe(struct pci_dev *pci, 2874 2890 const struct pci_device_id *id) 2875 2891 { … … 2879 2895 int err; 2880 2896 2881 for (; dev < SNDRV_CARDS; dev++) { 2897 if (dev >= SNDRV_CARDS) 2898 return -ENODEV; 2882 2899 if (!snd_enable[dev]) { 2883 2900 dev++; 2884 2901 return -ENOENT; 2885 2902 } 2886 break;2887 }2888 2889 if (dev >= SNDRV_CARDS)2890 return -ENODEV;2891 2903 2892 2904 card = snd_card_new(snd_index[dev], snd_id[dev], THIS_MODULE, … … 2901 2913 rme9652->pci = pci; 2902 2914 2903 if ((err = snd_rme9652_create(card, rme9652 )) < 0) {2915 if ((err = snd_rme9652_create(card, rme9652, snd_precise_ptr[dev])) < 0) { 2904 2916 snd_card_free(card); 2905 2917 return err; … … 2916 2928 return err; 2917 2929 } 2918 PCI_SET_DRIVER_DATA(pci, card);2930 pci_set_drvdata(pci, card); 2919 2931 dev++; 2920 2932 return 0; 2921 2933 } 2922 2934 2923 static void __ exit snd_rme9652_remove(struct pci_dev *pci)2924 { 2925 snd_card_free( PCI_GET_DRIVER_DATA(pci));2926 PCI_SET_DRIVER_DATA(pci, NULL);2935 static void __devexit snd_rme9652_remove(struct pci_dev *pci) 2936 { 2937 snd_card_free(pci_get_drvdata(pci)); 2938 pci_set_drvdata(pci, NULL); 2927 2939 } 2928 2940 … … 2939 2951 id_table:snd_rme9652_ids, 2940 2952 probe:snd_rme9652_probe, 2941 remove: snd_rme9652_remove,2953 remove:__devexit_p(snd_rme9652_remove), 2942 2954 }; 2943 2955 #endif … … 2947 2959 if (pci_module_init(&driver) < 0) { 2948 2960 #ifdef MODULE 2949 snd_printk("RME Digi9652/Digi9636: no cards found\n");2961 printk(KERN_ERR "RME Digi9652/Digi9636: no cards found\n"); 2950 2962 #endif 2951 2963 return -ENODEV; … … 2965 2977 #ifndef MODULE 2966 2978 2967 /* format is: snd- card-rme9652=snd_enable,snd_index,snd_id */2979 /* format is: snd-rme9652=snd_enable,snd_index,snd_id */ 2968 2980 2969 2981 static int __init alsa_card_rme9652_setup(char *str) … … 2980 2992 } 2981 2993 2982 __setup("snd- card-rme9652=", alsa_card_rme9652_setup);2994 __setup("snd-rme9652=", alsa_card_rme9652_setup); 2983 2995 2984 2996 #endif /* ifndef MODULE */  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/trident/trident.c
r77 r92 22 22 */ 23 23 24 #define SNDRV_MAIN_OBJECT_FILE25 24 #include <sound/driver.h> 25 #include <linux/init.h> 26 #include <linux/time.h> 27 #include <sound/core.h> 26 28 #include <sound/trident.h> 27 29 #define SNDRV_GET_ID 28 30 #include <sound/initval.h> 29 31 30 EXPORT_NO_SYMBOLS;31 32 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, <audio@tridentmicro.com>"); 32 33 MODULE_DESCRIPTION("Trident 4D-WaveDX/NX & SiS SI7018"); … … 195 196 if ((err = pci_module_init(&driver)) < 0) { 196 197 #ifdef MODULE 197 // snd_printk( "Trident 4DWave PCI soundcard not found or device busy\n");198 // snd_printk(KERN_ERR "Trident 4DWave PCI soundcard not found or device busy\n"); 198 199 #endif 199 200 return err; … … 212 213 #ifndef MODULE 213 214 214 /* format is: snd- card-trident=snd_enable,snd_index,snd_id,215 /* format is: snd-trident=snd_enable,snd_index,snd_id, 215 216 snd_pcm_channels,snd_wavetable_size */ 216 217  - 
      
GPL/branches/alsa-resync1/alsa-kernel/pci/ymfpci/ymfpci.c
r77 r92 20 20 */ 21 21 22 #define SNDRV_MAIN_OBJECT_FILE23 22 #include <sound/driver.h> 23 #include <linux/init.h> 24 #include <linux/time.h> 25 #include <sound/core.h> 24 26 #include <sound/ymfpci.h> 25 27 #include <sound/mpu401.h> … … 29 31 30 32 EXPORT_NO_SYMBOLS; 33 31 34 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 32 35 MODULE_DESCRIPTION("Yamaha DS-XG PCI"); … … 290 293 if ((err = pci_module_init(&driver)) < 0) { 291 294 #ifdef MODULE 292 // snd_printk( "Yamaha DS-XG PCI soundcard not found or device busy\n");295 // snd_printk(KERN_ERR "Yamaha DS-XG PCI soundcard not found or device busy\n"); 293 296 #endif 294 297 return err; … … 307 310 #ifndef MODULE 308 311 309 /* format is: snd- card-ymfpci=snd_enable,snd_index,snd_id,310 snd_fm_port,snd_mpu_port,snd_mpu_irq*/312 /* format is: snd-ymfpci=snd_enable,snd_index,snd_id, 313 snd_fm_port,snd_mpu_port */ 311 314 312 315 static int __init alsa_card_ymfpci_setup(char *str)  
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