Changeset 772 for GPL/trunk/alsa-kernel/pci/ca0106
- Timestamp:
- Apr 19, 2025, 8:08:37 PM (7 months ago)
- Location:
- GPL/trunk
- Files:
-
- 4 edited
-
. (modified) (1 prop)
-
alsa-kernel/pci/ca0106/ca0106.h (modified) (5 diffs)
-
alsa-kernel/pci/ca0106/ca0106_main.c (modified) (16 diffs)
-
alsa-kernel/pci/ca0106/ca0106_mixer.c (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
GPL/trunk
- Property svn:mergeinfo changed
/GPL/branches/uniaud32-6.6-LTS (added) merged: 765,768-769 /GPL/branches/uniaud32-exp (added) merged: 735-741,743-744,748-751,753-760,762-764 /GPL/branches/uniaud32-next merged: 718-734
- Property svn:mergeinfo changed
-
GPL/trunk/alsa-kernel/pci/ca0106/ca0106.h
r717 r772 60 60 /************************************************************************************************/ 61 61 62 #define PTR0x00 /* Indexed register set pointer register */62 #define CA0106_PTR 0x00 /* Indexed register set pointer register */ 63 63 /* NOTE: The CHANNELNUM and ADDRESS words can */ 64 64 /* be modified independently of each other. */ 65 65 /* CNL[1:0], ADDR[27:16] */ 66 66 67 #define DATA0x04 /* Indexed register set data register */67 #define CA0106_DATA 0x04 /* Indexed register set data register */ 68 68 /* DATA[31:0] */ 69 69 70 #define IPR0x08 /* Global interrupt pending register */70 #define CA0106_IPR 0x08 /* Global interrupt pending register */ 71 71 /* Clear pending interrupts by writing a 1 to */ 72 72 /* the relevant bits and zero to the other bits */ … … 89 89 #define IPR_PCI 0x00000001 /* PCI Bus error */ 90 90 91 #define INTE0x0c /* Interrupt enable register */91 #define CA0106_INTE 0x0c /* Interrupt enable register */ 92 92 93 93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */ … … 109 109 #define INTE_PCI 0x00000001 /* PCI Bus error */ 110 110 111 #define UNKNOWN100x10 /* Unknown ??. Defaults to 0 */112 #define HCFG0x14 /* Hardware config register */111 #define CA0106_UNKNOWN10 0x10 /* Unknown ??. Defaults to 0 */ 112 #define CA0106_HCFG 0x14 /* Hardware config register */ 113 113 /* 0x1000 causes AC3 to fails. It adds a dither bit. */ 114 114 … … 134 134 /* Should be set to 1 when the EMU10K1 is */ 135 135 /* completely initialized. */ 136 #define GPIO0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */136 #define CA0106_GPIO 0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */ 137 137 /* Here pins 0,1,2,3,4,,6 are output. 5,7 are input */ 138 138 /* For the Audigy LS, pin 0 (or bit 8) controls the SPDIF/Analog jack. */ … … 153 153 * GPO Enable [23:16] Default 0x0f. Setting a bit to 1, causes the pin to be an output pin. 154 154 */ 155 #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */156 157 #define AC97ADDRESS0x1e /* AC97 register set address register (8 bit) */155 #define CA0106_AC97DATA 0x1c /* AC97 register set data register (16 bit) */ 156 157 #define CA0106_AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */ 158 158 159 159 /********************************************************************************************************/ -
GPL/trunk/alsa-kernel/pci/ca0106/ca0106_main.c
r717 r772 343 343 344 344 spin_lock_irqsave(&emu->emu_lock, flags); 345 outl(regptr, emu->port + PTR);346 val = inl(emu->port + DATA);345 outl(regptr, emu->port + CA0106_PTR); 346 val = inl(emu->port + CA0106_DATA); 347 347 spin_unlock_irqrestore(&emu->emu_lock, flags); 348 348 return val; … … 360 360 361 361 spin_lock_irqsave(&emu->emu_lock, flags); 362 outl(regptr, emu->port + PTR);363 outl(data, emu->port + DATA);362 outl(regptr, emu->port + CA0106_PTR); 363 outl(data, emu->port + CA0106_DATA); 364 364 spin_unlock_irqrestore(&emu->emu_lock, flags); 365 365 } … … 460 460 461 461 spin_lock_irqsave(&emu->emu_lock, flags); 462 intr_enable = inl(emu->port + INTE) | intrenb;463 outl(intr_enable, emu->port + INTE);462 intr_enable = inl(emu->port + CA0106_INTE) | intrenb; 463 outl(intr_enable, emu->port + CA0106_INTE); 464 464 spin_unlock_irqrestore(&emu->emu_lock, flags); 465 465 } … … 471 471 472 472 spin_lock_irqsave(&emu->emu_lock, flags); 473 intr_enable = inl(emu->port + INTE) & ~intrenb;474 outl(intr_enable, emu->port + INTE);473 intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb; 474 outl(intr_enable, emu->port + CA0106_INTE); 475 475 spin_unlock_irqrestore(&emu->emu_lock, flags); 476 476 } … … 791 791 break; 792 792 } 793 hcfg = inl(emu->port + HCFG) ;793 hcfg = inl(emu->port + CA0106_HCFG) ; 794 794 hcfg = (hcfg & ~hcfg_mask) | hcfg_set; 795 outl(hcfg, emu->port + HCFG);795 outl(hcfg, emu->port + CA0106_HCFG); 796 796 reg40 = snd_ca0106_ptr_read(emu, 0x40, 0); 797 797 reg40 = (reg40 & ~reg40_mask) | reg40_set; … … 893 893 break; 894 894 } 895 hcfg = inl(emu->port + HCFG) ;895 hcfg = inl(emu->port + CA0106_HCFG) ; 896 896 hcfg = (hcfg & ~hcfg_mask) | hcfg_set; 897 outl(hcfg, emu->port + HCFG);897 outl(hcfg, emu->port + CA0106_HCFG); 898 898 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0); 899 899 reg71 = (reg71 & ~reg71_mask) | reg71_set; … … 1147 1147 1148 1148 spin_lock_irqsave(&emu->emu_lock, flags); 1149 outb(reg, emu->port + AC97ADDRESS);1150 val = inw(emu->port + AC97DATA);1149 outb(reg, emu->port + CA0106_AC97ADDRESS); 1150 val = inw(emu->port + CA0106_AC97DATA); 1151 1151 spin_unlock_irqrestore(&emu->emu_lock, flags); 1152 1152 return val; … … 1160 1160 1161 1161 spin_lock_irqsave(&emu->emu_lock, flags); 1162 outb(reg, emu->port + AC97ADDRESS);1163 outw(val, emu->port + AC97DATA);1162 outb(reg, emu->port + CA0106_AC97ADDRESS); 1163 outw(val, emu->port + CA0106_AC97DATA); 1164 1164 spin_unlock_irqrestore(&emu->emu_lock, flags); 1165 1165 } … … 1205 1205 struct snd_ca0106_channel *pchannel; 1206 1206 1207 status = inl(chip->port + IPR);1207 status = inl(chip->port + CA0106_IPR); 1208 1208 if (! status) 1209 1209 return IRQ_NONE; … … 1260 1260 1261 1261 // acknowledge the interrupt if necessary 1262 outl(status, chip->port +IPR);1262 outl(status, chip->port + CA0106_IPR); 1263 1263 1264 1264 return IRQ_HANDLED; … … 1388 1388 unsigned int def_bits; 1389 1389 1390 outl(0, chip->port + INTE);1390 outl(0, chip->port + CA0106_INTE); 1391 1391 1392 1392 /* … … 1425 1425 1426 1426 /* Write 0x8000 to AC97_REC_GAIN to mute it. */ 1427 outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);1428 outw(0x8000, chip->port + AC97DATA);1427 outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS); 1428 outw(0x8000, chip->port + CA0106_AC97DATA); 1429 1429 #if 0 /* FIXME: what are these? */ 1430 1430 snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006); … … 1500 1500 * E.g. For digital spdif out. 1501 1501 */ 1502 outl(0x0, chip->port +GPIO);1503 /* outl(0x00f0e000, chip->port +GPIO); */ /* Analog */1504 outl(0x005f5301, chip->port +GPIO); /* Analog */1502 outl(0x0, chip->port + CA0106_GPIO); 1503 /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */ 1504 outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */ 1505 1505 } else if (chip->details->gpio_type == 1) { 1506 1506 /* The SB0410 and SB0413 use GPIO differently. */ … … 1508 1508 * E.g. For digital spdif out. 1509 1509 */ 1510 outl(0x0, chip->port +GPIO);1511 /* outl(0x00f0e000, chip->port +GPIO); */ /* Analog */1512 outl(0x005f5301, chip->port +GPIO); /* Analog */1510 outl(0x0, chip->port + CA0106_GPIO); 1511 /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */ 1512 outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */ 1513 1513 } else { 1514 outl(0x0, chip->port +GPIO);1515 outl(0x005f03a3, chip->port +GPIO); /* Analog */1516 /* outl(0x005f02a2, chip->port +GPIO); */ /* SPDIF */1514 outl(0x0, chip->port + CA0106_GPIO); 1515 outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */ 1516 /* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */ 1517 1517 } 1518 1518 snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */ … … 1520 1520 /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */ 1521 1521 /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */ 1522 /* outl(0x00001409, chip->port +HCFG); */1523 /* outl(0x00000009, chip->port +HCFG); */1522 /* outl(0x00001409, chip->port + CA0106_HCFG); */ 1523 /* outl(0x00000009, chip->port + CA0106_HCFG); */ 1524 1524 /* AC97 2.0, Enable outputs. */ 1525 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port +HCFG);1525 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG); 1526 1526 1527 1527 if (chip->details->i2c_adc == 1) { … … 1565 1565 /* disable interrupts */ 1566 1566 snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0); 1567 outl(0, chip->port + INTE);1567 outl(0, chip->port + CA0106_INTE); 1568 1568 snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0); 1569 1569 udelay(1000); 1570 1570 /* disable audio */ 1571 1571 /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */ 1572 outl(0, chip->port + HCFG);1572 outl(0, chip->port + CA0106_HCFG); 1573 1573 /* FIXME: We need to stop and DMA transfers here. 1574 1574 * But as I am not sure how yet, we cannot from the dma pages. -
GPL/trunk/alsa-kernel/pci/ca0106/ca0106_mixer.c
r679 r772 71 71 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) & ~0x1000; 72 72 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); 73 val = inl(emu->port + GPIO) & ~0x101;74 outl(val, emu->port + GPIO);73 val = inl(emu->port + CA0106_GPIO) & ~0x101; 74 outl(val, emu->port + CA0106_GPIO); 75 75 76 76 } else { … … 80 80 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) | 0x1000; 81 81 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); 82 val = inl(emu->port + GPIO) | 0x101;83 outl(val, emu->port + GPIO);82 val = inl(emu->port + CA0106_GPIO) | 0x101; 83 outl(val, emu->port + CA0106_GPIO); 84 84 } 85 85 } … … 120 120 if (emu->capture_mic_line_in) { 121 121 /* snd_ca0106_i2c_write(emu, ADC_MUX, 0); */ /* Mute input */ 122 tmp = inl(emu->port +GPIO) & ~0x400;122 tmp = inl(emu->port + CA0106_GPIO) & ~0x400; 123 123 tmp = tmp | 0x400; 124 outl(tmp, emu->port +GPIO);124 outl(tmp, emu->port + CA0106_GPIO); 125 125 /* snd_ca0106_i2c_write(emu, ADC_MUX, ADC_MUX_MIC); */ 126 126 } else { 127 127 /* snd_ca0106_i2c_write(emu, ADC_MUX, 0); */ /* Mute input */ 128 tmp = inl(emu->port +GPIO) & ~0x400;129 outl(tmp, emu->port +GPIO);128 tmp = inl(emu->port + CA0106_GPIO) & ~0x400; 129 outl(tmp, emu->port + CA0106_GPIO); 130 130 /* snd_ca0106_i2c_write(emu, ADC_MUX, ADC_MUX_LINEIN); */ 131 131 } … … 707 707 } 708 708 709 static struct snd_kcontrol *ctl_find(struct snd_card *card, const char *name)710 {711 struct snd_ctl_elem_id sid;712 memset(&sid, 0, sizeof(sid));713 /* FIXME: strcpy is bad. */714 strcpy(sid.name, name);715 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;716 return snd_ctl_find_id(card, &sid);717 }718 719 709 static int rename_ctl(struct snd_card *card, const char *src, const char *dst) 720 710 { 721 struct snd_kcontrol *kctl = ctl_find(card, src);711 struct snd_kcontrol *kctl = snd_ctl_find_id_mixer(card, src); 722 712 if (kctl) { 723 s trcpy(kctl->id.name, dst);713 snd_ctl_rename(card, kctl, dst); 724 714 return 0; 725 715 } … … 761 751 NULL 762 752 }; 763 764 static void add_followers(struct snd_card *card,765 struct snd_kcontrol *master, const char * const *list)766 {767 for (; *list; list++) {768 struct snd_kcontrol *follower = ctl_find(card, *list);769 if (follower)770 snd_ctl_add_follower(master, follower);771 }772 }773 753 774 754 int snd_ca0106_mixer(struct snd_ca0106 *emu) … … 853 833 if (err < 0) 854 834 return err; 855 add_followers(card, vmaster, follower_vols); 835 err = snd_ctl_add_followers(card, vmaster, follower_vols); 836 if (err < 0) 837 return err; 856 838 857 839 if (emu->details->spi_dac) { … … 863 845 if (err < 0) 864 846 return err; 865 add_followers(card, vmaster, follower_sws); 847 err = snd_ctl_add_followers(card, vmaster, follower_sws); 848 if (err < 0) 849 return err; 866 850 } 867 851
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