Changeset 695 for GPL/trunk/alsa-kernel/pci/hda

Timestamp:

Aug 21, 2021, 3:35:34 AM (4 years ago)

Author:

David Azarewicz

Message:

Merge changes from next branch.

Location:

GPL/trunk

Files:

• . (modified) (1 prop)
• alsa-kernel/pci/hda/hda_auto_parser.c (modified) (1 diff)
• alsa-kernel/pci/hda/hda_auto_parser.h (modified) (1 diff)
• alsa-kernel/pci/hda/hda_codec.c (modified) (10 diffs)
• alsa-kernel/pci/hda/hda_controller.c (modified) (1 diff)
• alsa-kernel/pci/hda/hda_eld.c (modified) (1 diff)
• alsa-kernel/pci/hda/hda_generic.c (modified) (13 diffs)
• alsa-kernel/pci/hda/hda_generic.h (modified) (3 diffs)
• alsa-kernel/pci/hda/hda_intel.c (modified) (10 diffs)
• alsa-kernel/pci/hda/hda_jack.c (modified) (5 diffs)
• alsa-kernel/pci/hda/hda_jack.h (modified) (2 diffs)
• alsa-kernel/pci/hda/hda_local.h (modified) (4 diffs)
• alsa-kernel/pci/hda/hda_proc.c (modified) (2 diffs)
• alsa-kernel/pci/hda/hda_tegra.c (modified) (9 diffs)
• alsa-kernel/pci/hda/patch_ca0132.c (modified) (44 diffs)
• alsa-kernel/pci/hda/patch_cirrus.c (modified) (23 diffs)
• alsa-kernel/pci/hda/patch_conexant.c (modified) (1 diff)
• alsa-kernel/pci/hda/patch_hdmi.c (modified) (21 diffs)
• alsa-kernel/pci/hda/patch_realtek.c (modified) (14 diffs)
• alsa-kernel/pci/hda/patch_sigmatel.c (modified) (2 diffs)
• alsa-kernel/pci/hda/thinkpad_helper.c (modified) (1 diff)

GPL/trunk/alsa-kernel/pci/hda/hda_auto_parser.c

@@ -769 +769 @@
         if (!name)
                 return 0;
-        strlcpy(label, name, maxlen);
+        strscpy(label, name, maxlen);
         return 1;
 }

GPL/trunk/alsa-kernel/pci/hda/hda_auto_parser.h

@@ -28 +28 @@
 
 #define AUTO_CFG_MAX_OUTS       HDA_MAX_OUTS
-#define AUTO_CFG_MAX_INS        8
+#define AUTO_CFG_MAX_INS        18
 
 struct auto_pin_cfg_item {

GPL/trunk/alsa-kernel/pci/hda/hda_codec.c

@@ -1950 +1950 @@
  * @suffix: suffix string to each follower name (optional)
  * @init_follower_vol: initialize followers to unmute/0dB
+ * @access: kcontrol access rights
  * @ctl_ret: store the vmaster kcontrol in return
  *
@@ -1964 +1965 @@
                           unsigned int *tlv, const char * const *followers,
                           const char *suffix, bool init_follower_vol,
-                          struct snd_kcontrol **ctl_ret)
+                          unsigned int access, struct snd_kcontrol **ctl_ret)
 {
         struct snd_kcontrol *kctl;
@@ -1980 +1981 @@
         if (!kctl)
                 return -ENOMEM;
+        kctl->vd[0].access |= access;
         err = snd_hda_ctl_add(codec, 0, kctl);
         if (err < 0)
@@ -2011 +2013 @@
 EXPORT_SYMBOL_GPL(__snd_hda_add_vmaster);
 
-/*
- * mute-LED control using vmaster
- */
-static int vmaster_mute_mode_info(struct snd_kcontrol *kcontrol,
-                                  struct snd_ctl_elem_info *uinfo)
-{
-        static const char * const texts[] = {
-                "On", "Off", "Follow Master"
-        };
-
-        return snd_ctl_enum_info(uinfo, 1, 3, texts);
-}
-
-static int vmaster_mute_mode_get(struct snd_kcontrol *kcontrol,
-                                 struct snd_ctl_elem_value *ucontrol)
-{
-        struct hda_vmaster_mute_hook *hook = snd_kcontrol_chip(kcontrol);
-        ucontrol->value.enumerated.item[0] = hook->mute_mode;
-        return 0;
-}
-
-static int vmaster_mute_mode_put(struct snd_kcontrol *kcontrol,
-                                 struct snd_ctl_elem_value *ucontrol)
-{
-        struct hda_vmaster_mute_hook *hook = snd_kcontrol_chip(kcontrol);
-        unsigned int old_mode = hook->mute_mode;
-
-        hook->mute_mode = ucontrol->value.enumerated.item[0];
-        if (hook->mute_mode > HDA_VMUTE_FOLLOW_MASTER)
-                hook->mute_mode = HDA_VMUTE_FOLLOW_MASTER;
-        if (old_mode == hook->mute_mode)
-                return 0;
-        snd_hda_sync_vmaster_hook(hook);
-        return 1;
-}
-
-static const struct snd_kcontrol_new vmaster_mute_mode = {
-        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
-        .name = "Mute-LED Mode",
-        .info = vmaster_mute_mode_info,
-        .get = vmaster_mute_mode_get,
-        .put = vmaster_mute_mode_put,
-};
-
 /* meta hook to call each driver's vmaster hook */
 static void vmaster_hook(void *private_data, int enabled)
@@ -2060 +2018 @@
         struct hda_vmaster_mute_hook *hook = private_data;
 
-        if (hook->mute_mode != HDA_VMUTE_FOLLOW_MASTER)
-                enabled = hook->mute_mode;
         hook->hook(hook->codec, enabled);
 }
 
 /**
- * snd_hda_add_vmaster_hook - Add a vmaster hook for mute-LED
+ * snd_hda_add_vmaster_hook - Add a vmaster hw specific hook
  * @codec: the HDA codec
  * @hook: the vmaster hook object
- * @expose_enum_ctl: flag to create an enum ctl
- *
- * Add a mute-LED hook with the given vmaster switch kctl.
- * When @expose_enum_ctl is set, "Mute-LED Mode" control is automatically
- * created and associated with the given hook.
+ *
+ * Add a hw specific hook (like EAPD) with the given vmaster switch kctl.
  */
 int snd_hda_add_vmaster_hook(struct hda_codec *codec,
-                             struct hda_vmaster_mute_hook *hook,
-                             bool expose_enum_ctl)
-{
-        struct snd_kcontrol *kctl;
-
+                             struct hda_vmaster_mute_hook *hook)
+{
         if (!hook->hook || !hook->sw_kctl)
                 return 0;
         hook->codec = codec;
-        hook->mute_mode = HDA_VMUTE_FOLLOW_MASTER;
         snd_ctl_add_vmaster_hook(hook->sw_kctl, vmaster_hook, hook);
-        if (!expose_enum_ctl)
-                return 0;
-        kctl = snd_ctl_new1(&vmaster_mute_mode, hook);
-        if (!kctl)
-                return -ENOMEM;
-        return snd_hda_ctl_add(codec, 0, kctl);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(snd_hda_add_vmaster_hook);
@@ -3002 +2946 @@
                 dev->power.power_state = PMSG_RESUME;
 #endif
+
         if (pm_runtime_suspended(dev) && (codec->jackpoll_interval ||
             hda_codec_need_resume(codec) || codec->forced_resume))
@@ -3505 +3450 @@
 
 /**
- * snd_hda_input_mux_info_info - Info callback helper for the input-mux enum
+ * snd_hda_input_mux_info - Info callback helper for the input-mux enum
  * @imux: imux helper object
  * @uinfo: pointer to get/store the data
@@ -3528 +3473 @@
 
 /**
- * snd_hda_input_mux_info_put - Put callback helper for the input-mux enum
+ * snd_hda_input_mux_put - Put callback helper for the input-mux enum
  * @codec: the HDA codec
  * @imux: imux helper object
@@ -3963 +3908 @@
 
 /**
- * _snd_hda_pin_ctl - Helper to set pin ctl value
+ * _snd_hda_set_pin_ctl - Helper to set pin ctl value
  * @codec: the HDA codec
  * @pin: referred pin NID
@@ -4021 +3966 @@
                          "%s %d", label, label_idx);
         else
-                strlcpy(imux->items[imux->num_items].label, label,
+                strscpy(imux->items[imux->num_items].label, label,
                         sizeof(imux->items[imux->num_items].label));
         imux->items[imux->num_items].index = index;

GPL/trunk/alsa-kernel/pci/hda/hda_controller.c

@@ -753 +753 @@
         if (err < 0)
                 return err;
-        strlcpy(pcm->name, cpcm->name, sizeof(pcm->name));
+        strscpy(pcm->name, cpcm->name, sizeof(pcm->name));
         apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
         if (apcm == NULL) {

GPL/trunk/alsa-kernel/pci/hda/hda_eld.c

@@ -261 +261 @@
                 goto out_fail;
         } else
-                strlcpy(e->monitor_name, buf + ELD_FIXED_BYTES, mnl + 1);
+                strscpy(e->monitor_name, buf + ELD_FIXED_BYTES, mnl + 1);
 
         for (i = 0; i < e->sad_count; i++) {

GPL/trunk/alsa-kernel/pci/hda/hda_generic.c

@@ -985 +985 @@
         if (get_amp_nid_(val))
                 knew->subdevice = HDA_SUBDEV_AMP_FLAG;
+        if (knew->access == 0)
+                knew->access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
         knew->private_value = val;
         return knew;
@@ -3530 +3532 @@
         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
         .name = "Capture Switch",
+        .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
         .info = cap_sw_info,
         .get = cap_sw_get,
@@ -3636 +3639 @@
         if (!knew)
                 return -ENOMEM;
-        if (is_switch)
+        if (is_switch) {
                 knew->put = cap_single_sw_put;
+                if (spec->mic_mute_led)
+                        knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
+        }
         if (!inv_dmic)
                 return 0;
@@ -3652 +3658 @@
         if (!knew)
                 return -ENOMEM;
-        if (is_switch)
+        if (is_switch) {
                 knew->put = cap_single_sw_put;
+                if (spec->mic_mute_led)
+                        knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
+        }
         return 0;
 }
@@ -3694 +3703 @@
                 knew->private_value = sw_ctl;
                 knew->subdevice = HDA_SUBDEV_AMP_FLAG;
+                if (spec->mic_mute_led)
+                        knew->access |= SNDRV_CTL_ELEM_ACCESS_MIC_LED;
         }
         return 0;
@@ -3935 +3946 @@
 }
 
-static void vmaster_update_mute_led(void *private_data, int enabled)
-{
-        ledtrig_audio_set(LED_AUDIO_MUTE, enabled ? LED_OFF : LED_ON);
-}
-
 /**
- * snd_dha_gen_add_mute_led_cdev - Create a LED classdev and enable as vmaster mute LED
+ * snd_hda_gen_add_mute_led_cdev - Create a LED classdev and enable as vmaster mute LED
  * @codec: the HDA codec
  * @callback: the callback for LED classdev brightness_set_blocking
@@ -3963 +3969 @@
                 codec_err(codec, "vmaster hook already present before cdev!\n");
 
-        spec->vmaster_mute.hook = vmaster_update_mute_led;
-        spec->vmaster_mute_enum = 1;
+        spec->vmaster_mute_led = 1;
         return 0;
 }
 EXPORT_SYMBOL_GPL(snd_hda_gen_add_mute_led_cdev);
 
-/*
- * mic mute LED hook helpers
- */
-enum {
-        MICMUTE_LED_ON,
-        MICMUTE_LED_OFF,
-        MICMUTE_LED_FOLLOW_CAPTURE,
-        MICMUTE_LED_FOLLOW_MUTE,
-};
-
-static void call_micmute_led_update(struct hda_codec *codec)
-{
-        struct hda_gen_spec *spec = codec->spec;
-        unsigned int val;
-
-        switch (spec->micmute_led.led_mode) {
-        case MICMUTE_LED_ON:
-                val = 1;
-                break;
-        case MICMUTE_LED_OFF:
-                val = 0;
-                break;
-        case MICMUTE_LED_FOLLOW_CAPTURE:
-                val = !!spec->micmute_led.capture;
-                break;
-        case MICMUTE_LED_FOLLOW_MUTE:
-        default:
-                val = !spec->micmute_led.capture;
-                break;
-        }
-
-        if (val == spec->micmute_led.led_value)
-                return;
-        spec->micmute_led.led_value = val;
-        ledtrig_audio_set(LED_AUDIO_MICMUTE,
-                          spec->micmute_led.led_value ? LED_ON : LED_OFF);
-}
-
-static void update_micmute_led(struct hda_codec *codec,
-                               struct snd_kcontrol *kcontrol,
-                               struct snd_ctl_elem_value *ucontrol)
-{
-        struct hda_gen_spec *spec = codec->spec;
-        unsigned int mask;
-
-        if (spec->micmute_led.old_hook)
-                spec->micmute_led.old_hook(codec, kcontrol, ucontrol);
-
-        if (!ucontrol)
-                return;
-        mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
-        if (!strcmp("Capture Switch", ucontrol->id.name)) {
-                /* TODO: How do I verify if it's a mono or stereo here? */
-                if (ucontrol->value.integer.value[0] ||
-                    ucontrol->value.integer.value[1])
-                        spec->micmute_led.capture |= mask;
-                else
-                        spec->micmute_led.capture &= ~mask;
-                call_micmute_led_update(codec);
-        }
-}
-
-static int micmute_led_mode_info(struct snd_kcontrol *kcontrol,
-                                 struct snd_ctl_elem_info *uinfo)
-{
-        static const char * const texts[] = {
-                "On", "Off", "Follow Capture", "Follow Mute",
-        };
-
-        return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
-}
-
-static int micmute_led_mode_get(struct snd_kcontrol *kcontrol,
-                                struct snd_ctl_elem_value *ucontrol)
-{
-        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
-        struct hda_gen_spec *spec = codec->spec;
-
-        ucontrol->value.enumerated.item[0] = spec->micmute_led.led_mode;
-        return 0;
-}
-
-static int micmute_led_mode_put(struct snd_kcontrol *kcontrol,
-                                struct snd_ctl_elem_value *ucontrol)
-{
-        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
-        struct hda_gen_spec *spec = codec->spec;
-        unsigned int mode;
-
-        mode = ucontrol->value.enumerated.item[0];
-        if (mode > MICMUTE_LED_FOLLOW_MUTE)
-                mode = MICMUTE_LED_FOLLOW_MUTE;
-        if (mode == spec->micmute_led.led_mode)
-                return 0;
-        spec->micmute_led.led_mode = mode;
-        call_micmute_led_update(codec);
-        return 1;
-}
-
-static const struct snd_kcontrol_new micmute_led_mode_ctl = {
-        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
-        .name = "Mic Mute-LED Mode",
-        .info = micmute_led_mode_info,
-        .get = micmute_led_mode_get,
-        .put = micmute_led_mode_put,
-};
-
-/* Set up the capture sync hook for controlling the mic-mute LED */
-static int add_micmute_led_hook(struct hda_codec *codec)
-{
-        struct hda_gen_spec *spec = codec->spec;
-
-        spec->micmute_led.led_mode = MICMUTE_LED_FOLLOW_MUTE;
-        spec->micmute_led.capture = 0;
-        spec->micmute_led.led_value = -1;
-        spec->micmute_led.old_hook = spec->cap_sync_hook;
-        spec->cap_sync_hook = update_micmute_led;
-        if (!snd_hda_gen_add_kctl(spec, NULL, &micmute_led_mode_ctl))
-                return -ENOMEM;
-        return 0;
-}
-
 /**
- * snd_dha_gen_add_micmute_led_cdev - Create a LED classdev and enable as mic-mute LED
+ * snd_hda_gen_add_micmute_led_cdev - Create a LED classdev and enable as mic-mute LED
  * @codec: the HDA codec
  * @callback: the callback for LED classdev brightness_set_blocking
@@ -4109 +3992 @@
                                                      enum led_brightness))
 {
+        struct hda_gen_spec *spec = codec->spec;
         int err;
 
@@ -4119 +4003 @@
         }
 
-        return add_micmute_led_hook(codec);
+        spec->mic_mute_led = 1;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(snd_hda_gen_add_micmute_led_cdev);
@@ -5078 +4963 @@
         parse_user_hints(codec);
 
+        if (spec->vmaster_mute_led || spec->mic_mute_led)
+                snd_ctl_led_request();
+
         if (spec->mixer_nid && !spec->mixer_merge_nid)
                 spec->mixer_merge_nid = spec->mixer_nid;
@@ -5309 +5197 @@
                 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
                                           spec->vmaster_tlv, follower_pfxs,
-                                          "Playback Volume");
+                                          "Playback Volume", 0);
                 if (err < 0)
                         return err;
@@ -5317 +5205 @@
                 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
                                             NULL, follower_pfxs,
-                                            "Playback Switch",
-                                            true, &spec->vmaster_mute.sw_kctl);
+                                            "Playback Switch", true,
+                                            spec->vmaster_mute_led ?
+                                                SNDRV_CTL_ELEM_ACCESS_SPK_LED : 0,
+                                            &spec->vmaster_mute.sw_kctl);
                 if (err < 0)
                         return err;
                 if (spec->vmaster_mute.hook) {
-                        snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute,
-                                                 spec->vmaster_mute_enum);
+                        snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute);
                         snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
                 }
@@ -5739 +5628 @@
         if (*str)
                 return;
-        strlcpy(str, chip_name, len);
+        strscpy(str, chip_name, len);
 
         /* drop non-alnum chars after a space */

GPL/trunk/alsa-kernel/pci/hda/hda_generic.h

@@ -84 +84 @@
 extern const struct badness_table hda_main_out_badness;
 extern const struct badness_table hda_extra_out_badness;
-
-struct hda_micmute_hook {
-        unsigned int led_mode;
-        unsigned int capture;
-        unsigned int led_value;
-        void (*old_hook)(struct hda_codec *codec,
-                         struct snd_kcontrol *kcontrol,
-                         struct snd_ctl_elem_value *ucontrol);
-};
 
 struct hda_gen_spec {
@@ -230 +221 @@
         unsigned int own_eapd_ctl:1; /* set EAPD by own function */
         unsigned int keep_eapd_on:1; /* don't turn off EAPD automatically */
-        unsigned int vmaster_mute_enum:1; /* add vmaster mute mode enum */
+        unsigned int vmaster_mute_led:1; /* add SPK-LED flag to vmaster mute switch */
+        unsigned int mic_mute_led:1; /* add MIC-LED flag to capture mute switch */
         unsigned int indep_hp:1; /* independent HP supported */
         unsigned int prefer_hp_amp:1; /* enable HP amp for speaker if any */
@@ -285 +277 @@
                               struct snd_kcontrol *kcontrol,
                               struct snd_ctl_elem_value *ucontrol);
-
-        /* mic mute LED hook; called via cap_sync_hook */
-        struct hda_micmute_hook micmute_led;
 
         /* PCM hooks */

GPL/trunk/alsa-kernel/pci/hda/hda_intel.c

@@ -227 +227 @@
 
 MODULE_LICENSE("GPL");
-MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
-                         "{Intel, ICH6M},"
-                         "{Intel, ICH7},"
-                         "{Intel, ESB2},"
-                         "{Intel, ICH8},"
-                         "{Intel, ICH9},"
-                         "{Intel, ICH10},"
-                         "{Intel, PCH},"
-                         "{Intel, CPT},"
-                         "{Intel, PPT},"
-                         "{Intel, LPT},"
-                         "{Intel, LPT_LP},"
-                         "{Intel, WPT_LP},"
-                         "{Intel, SPT},"
-                         "{Intel, SPT_LP},"
-                         "{Intel, HPT},"
-                         "{Intel, PBG},"
-                         "{Intel, SCH},"
-                         "{ATI, SB450},"
-                         "{ATI, SB600},"
-                         "{ATI, RS600},"
-                         "{ATI, RS690},"
-                         "{ATI, RS780},"
-                         "{ATI, R600},"
-                         "{ATI, RV630},"
-                         "{ATI, RV610},"
-                         "{ATI, RV670},"
-                         "{ATI, RV635},"
-                         "{ATI, RV620},"
-                         "{ATI, RV770},"
-                         "{VIA, VT8251},"
-                         "{VIA, VT8237A},"
-                         "{SiS, SIS966},"
-                         "{ULI, M5461}}");
 MODULE_DESCRIPTION("Intel HDA driver");
 
@@ -1492 +1458 @@
                 if (dhandle) {
                         status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
-                        if (!ACPI_FAILURE(status)) {
+                        if (ACPI_SUCCESS(status)) {
                                 pci_dev_put(pdev);
                                 return true;
@@ -1502 +1468 @@
                 if (dhandle) {
                         status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
-                        if (!ACPI_FAILURE(status)) {
+                        if (ACPI_SUCCESS(status)) {
                                 pci_dev_put(pdev);
                                 return true;
@@ -2019 +1985 @@
         if (!(gcap & AZX_GCAP_64OK))
                 dma_bits = 32;
-        if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
-                dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
-        } else {
-                dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
-                dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
-        }
+        if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(dma_bits)))
+                dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32));
 
         /* read number of streams from GCAP register instead of using
@@ -2089 +2051 @@
 
         strcpy(card->driver, "HDA-Intel");
-        strlcpy(card->shortname, driver_short_names[chip->driver_type],
+        strscpy(card->shortname, driver_short_names[chip->driver_type],
                 sizeof(card->shortname));
         snprintf(card->longname, sizeof(card->longname),
@@ -2280 +2242 @@
         /* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
         SND_PCI_QUIRK(0x1043, 0x8733, "Asus Prime X370-Pro", 0),
-        /* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
-        SND_PCI_QUIRK(0x1558, 0x6504, "Clevo W65_67SB", 0),
         /* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
         SND_PCI_QUIRK(0x1028, 0x0497, "Dell Precision T3600", 0),
@@ -2364 +2324 @@
                 /* HSW/BDW controllers need this power */
                 if (CONTROLLER_IN_GPU(pci))
-                        hda->need_i915_power = 1;
+                        hda->need_i915_power = true;
         }
 
@@ -2575 +2535 @@
         { PCI_DEVICE(0x8086, 0x51c8),
           .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
+        /* Alderlake-M */
+        { PCI_DEVICE(0x8086, 0x51cc),
+          .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
         /* Elkhart Lake */
         { PCI_DEVICE(0x8086, 0x4b55),
@@ -2666 +2629 @@
         /* ATI HDMI */
         { PCI_DEVICE(0x1002, 0x0002),
-          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+          AZX_DCAPS_PM_RUNTIME },
         { PCI_DEVICE(0x1002, 0x1308),
           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
@@ -2728 +2692 @@
           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
         { PCI_DEVICE(0x1002, 0xaac0),
-          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+          AZX_DCAPS_PM_RUNTIME },
         { PCI_DEVICE(0x1002, 0xaac8),
-          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+          AZX_DCAPS_PM_RUNTIME },
         { PCI_DEVICE(0x1002, 0xaad8),
           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |

GPL/trunk/alsa-kernel/pci/hda/hda_jack.c

@@ -214 +214 @@
 
 /**
- * snd_hda_set_dirty_all - Mark all the cached as dirty
+ * snd_hda_jack_set_dirty_all - Mark all the cached as dirty
  * @codec: the HDA codec
  *
@@ -294 +294 @@
 
 /**
- * snd_hda_jack_detect_enable_mst - enable the jack-detection
+ * snd_hda_jack_detect_enable_callback_mst - enable the jack-detection
  * @codec: the HDA codec
  * @nid: pin NID to enable
@@ -388 +388 @@
 }
 EXPORT_SYMBOL_GPL(snd_hda_jack_set_gating_jack);
+
+/**
+ * snd_hda_jack_bind_keymap - bind keys generated from one NID to another jack.
+ * @codec: the HDA codec
+ * @key_nid: key event is generated by this pin NID
+ * @keymap: map of key type and key code
+ * @jack_nid: key reports to the jack of this pin NID
+ *
+ * This function is used in the case of key is generated from one NID while is
+ * reported to the jack of another NID.
+ */
+int snd_hda_jack_bind_keymap(struct hda_codec *codec, hda_nid_t key_nid,
+                             const struct hda_jack_keymap *keymap,
+                             hda_nid_t jack_nid)
+{
+        const struct hda_jack_keymap *map;
+        struct hda_jack_tbl *key_gen = snd_hda_jack_tbl_get(codec, key_nid);
+        struct hda_jack_tbl *report_to = snd_hda_jack_tbl_get(codec, jack_nid);
+
+        WARN_ON(codec->dp_mst);
+
+        if (!key_gen || !report_to || !report_to->jack)
+                return -EINVAL;
+
+        key_gen->key_report_jack = jack_nid;
+
+        if (keymap)
+                for (map = keymap; map->type; map++)
+                        snd_jack_set_key(report_to->jack, map->type, map->key);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(snd_hda_jack_bind_keymap);
+
+/**
+ * snd_hda_jack_set_button_state - report button event to the hda_jack_tbl button_state.
+ * @codec: the HDA codec
+ * @jack_nid: the button event reports to the jack_tbl of this NID
+ * @button_state: the button event captured by codec
+ *
+ * Codec driver calls this function to report the button event.
+ */
+void snd_hda_jack_set_button_state(struct hda_codec *codec, hda_nid_t jack_nid,
+                                   int button_state)
+{
+        struct hda_jack_tbl *jack = snd_hda_jack_tbl_get(codec, jack_nid);
+
+        if (!jack)
+                return;
+
+        if (jack->key_report_jack) {
+                struct hda_jack_tbl *report_to =
+                        snd_hda_jack_tbl_get(codec, jack->key_report_jack);
+
+                if (report_to) {
+                        report_to->button_state = button_state;
+                        return;
+                }
+        }
+
+        jack->button_state = button_state;
+}
+EXPORT_SYMBOL_GPL(snd_hda_jack_set_button_state);
 
 /**
@@ -531 +594 @@
 
         if (base_name)
-                strlcpy(name, base_name, sizeof(name));
+                strscpy(name, base_name, sizeof(name));
         else
                 snd_hda_get_pin_label(codec, nid, cfg, name, sizeof(name), NULL);
@@ -652 +715 @@
         if (!event)
                 return;
-        event->jack_dirty = 1;
+
+        if (event->key_report_jack) {
+                struct hda_jack_tbl *report_to =
+                        snd_hda_jack_tbl_get_mst(codec, event->key_report_jack,
+                                                 event->dev_id);
+                if (report_to)
+                        report_to->jack_dirty = 1;
+        } else
+                event->jack_dirty = 1;
 
         call_jack_callback(codec, res, event);

GPL/trunk/alsa-kernel/pci/hda/hda_jack.h

@@ -41 +41 @@
         hda_nid_t gating_jack;          /* valid when gating jack plugged */
         hda_nid_t gated_jack;           /* gated is dependent on this jack */
+        hda_nid_t key_report_jack;      /* key reports to this jack */
         int type;
         int button_state;
@@ -99 +100 @@
 int snd_hda_jack_set_gating_jack(struct hda_codec *codec, hda_nid_t gated_nid,
                                  hda_nid_t gating_nid);
+
+int snd_hda_jack_bind_keymap(struct hda_codec *codec, hda_nid_t key_nid,
+                             const struct hda_jack_keymap *keymap,
+                             hda_nid_t jack_nid);
+
+void snd_hda_jack_set_button_state(struct hda_codec *codec, hda_nid_t jack_nid,
+                                   int button_state);
 
 u32 snd_hda_jack_pin_sense(struct hda_codec *codec, hda_nid_t nid, int dev_id);

GPL/trunk/alsa-kernel/pci/hda/hda_local.h

@@ -132 +132 @@
                           unsigned int *tlv, const char * const *followers,
                           const char *suffix, bool init_follower_vol,
-                          struct snd_kcontrol **ctl_ret);
-#define snd_hda_add_vmaster(codec, name, tlv, followers, suffix) \
-        __snd_hda_add_vmaster(codec, name, tlv, followers, suffix, true, NULL)
+                          unsigned int access, struct snd_kcontrol **ctl_ret);
+#define snd_hda_add_vmaster(codec, name, tlv, followers, suffix, access) \
+        __snd_hda_add_vmaster(codec, name, tlv, followers, suffix, true, access, NULL)
 int snd_hda_codec_reset(struct hda_codec *codec);
 void snd_hda_codec_register(struct hda_codec *codec);
@@ -140 +140 @@
 
 #define snd_hda_regmap_sync(codec)      snd_hdac_regmap_sync(&(codec)->core)
-
-enum {
-        HDA_VMUTE_OFF,
-        HDA_VMUTE_ON,
-        HDA_VMUTE_FOLLOW_MASTER,
-};
 
 struct hda_vmaster_mute_hook {
@@ -154 +148 @@
         void (*hook)(void *, int);
         /* below are initialized automatically */
-        unsigned int mute_mode; /* HDA_VMUTE_XXX */
         struct hda_codec *codec;
 };
 
 int snd_hda_add_vmaster_hook(struct hda_codec *codec,
-                             struct hda_vmaster_mute_hook *hook,
-                             bool expose_enum_ctl);
+                             struct hda_vmaster_mute_hook *hook);
 void snd_hda_sync_vmaster_hook(struct hda_vmaster_mute_hook *hook);
 
@@ -181 +173 @@
  * input MUX helper
  */
-#define HDA_MAX_NUM_INPUTS      16
+#define HDA_MAX_NUM_INPUTS      36
 struct hda_input_mux_item {
         char label[32];

GPL/trunk/alsa-kernel/pci/hda/hda_proc.c

@@ -683 +683 @@
 }
 
+static void print_dpmst_connections(struct snd_info_buffer *buffer, struct hda_codec *codec,
+                                    hda_nid_t nid, int dev_num)
+{
+        int c, conn_len, curr, dev_id_saved;
+        hda_nid_t *conn;
+
+        conn_len = snd_hda_get_num_raw_conns(codec, nid);
+        if (conn_len <= 0)
+                return;
+
+        conn = kmalloc_array(conn_len, sizeof(hda_nid_t), GFP_KERNEL);
+        if (!conn)
+                return;
+
+        dev_id_saved = snd_hda_get_dev_select(codec, nid);
+
+        snd_hda_set_dev_select(codec, nid, dev_num);
+        curr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONNECT_SEL, 0);
+        if (snd_hda_get_raw_connections(codec, nid, conn, conn_len) < 0)
+                goto out;
+
+        for (c = 0; c < conn_len; c++) {
+                snd_iprintf(buffer, " 0x%02x", conn[c]);
+                if (c == curr)
+                        snd_iprintf(buffer, "*");
+        }
+
+out:
+        kfree(conn);
+        snd_hda_set_dev_select(codec, nid, dev_id_saved);
+}
+
 static void print_device_list(struct snd_info_buffer *buffer,
                             struct hda_codec *codec, hda_nid_t nid)
@@ -706 +738 @@
 
                 snd_iprintf(buffer,
-                        "Dev %02d: PD = %d, ELDV = %d, IA = %d\n", i,
+                        "Dev %02d: PD = %d, ELDV = %d, IA = %d, Connections [", i,
                         !!(dev_list[i] & AC_DE_PD),
                         !!(dev_list[i] & AC_DE_ELDV),
                         !!(dev_list[i] & AC_DE_IA));
+
+                print_dpmst_connections(buffer, codec, nid, i);
+
+                snd_iprintf(buffer, " ]\n");
         }
 }

GPL/trunk/alsa-kernel/pci/hda/hda_tegra.c

@@ -18 +18 @@
 #include <linux/mutex.h>
 #include <linux/of_device.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 #include <linux/time.h>
@@ -71 +72 @@
         struct azx chip;
         struct device *dev;
-        struct clk *hda_clk;
-        struct clk *hda2codec_2x_clk;
-        struct clk *hda2hdmi_clk;
+        struct reset_control *reset;
+        struct clk_bulk_data clocks[3];
+        unsigned int nclocks;
         void __iomem *regs;
         struct work_struct probe_work;
@@ -114 +115 @@
 }
 
-static int hda_tegra_enable_clocks(struct hda_tegra *data)
-{
-        int rc;
-
-        rc = clk_prepare_enable(data->hda_clk);
-        if (rc)
-                return rc;
-        rc = clk_prepare_enable(data->hda2codec_2x_clk);
-        if (rc)
-                goto disable_hda;
-        rc = clk_prepare_enable(data->hda2hdmi_clk);
-        if (rc)
-                goto disable_codec_2x;
-
-        return 0;
-
-disable_codec_2x:
-        clk_disable_unprepare(data->hda2codec_2x_clk);
-disable_hda:
-        clk_disable_unprepare(data->hda_clk);
-        return rc;
-}
-
-static void hda_tegra_disable_clocks(struct hda_tegra *data)
-{
-        clk_disable_unprepare(data->hda2hdmi_clk);
-        clk_disable_unprepare(data->hda2codec_2x_clk);
-        clk_disable_unprepare(data->hda_clk);
-}
-
 /*
  * power management
@@ -187 +158 @@
                 azx_enter_link_reset(chip);
         }
-        hda_tegra_disable_clocks(hda);
+        clk_bulk_disable_unprepare(hda->nclocks, hda->clocks);
 
         return 0;
@@ -199 +170 @@
         int rc;
 
-        rc = hda_tegra_enable_clocks(hda);
+        if (!chip->running) {
+                rc = reset_control_assert(hda->reset);
+                if (rc)
+                        return rc;
+        }
+
+        rc = clk_bulk_prepare_enable(hda->nclocks, hda->clocks);
         if (rc != 0)
                 return rc;
-        if (chip && chip->running) {
+        if (chip->running) {
                 hda_tegra_init(hda);
                 azx_init_chip(chip, 1);
@@ -208 +185 @@
                 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
                            ~STATESTS_INT_MASK);
+        } else {
+                usleep_range(10, 100);
+
+                rc = reset_control_deassert(hda->reset);
+                if (rc)
+                        return rc;
         }
 
@@ -265 +248 @@
 
         hda_tegra_init(hda);
-
-        return 0;
-}
-
-static int hda_tegra_init_clk(struct hda_tegra *hda)
-{
-        struct device *dev = hda->dev;
-
-        hda->hda_clk = devm_clk_get(dev, "hda");
-        if (IS_ERR(hda->hda_clk)) {
-                dev_err(dev, "failed to get hda clock\n");
-                return PTR_ERR(hda->hda_clk);
-        }
-        hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
-        if (IS_ERR(hda->hda2codec_2x_clk)) {
-                dev_err(dev, "failed to get hda2codec_2x clock\n");
-                return PTR_ERR(hda->hda2codec_2x_clk);
-        }
-        hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
-        if (IS_ERR(hda->hda2hdmi_clk)) {
-                dev_err(dev, "failed to get hda2hdmi clock\n");
-                return PTR_ERR(hda->hda2hdmi_clk);
-        }
 
         return 0;
@@ -302 +262 @@
         const char *sname, *drv_name = "tegra-hda";
         struct device_node *np = pdev->dev.of_node;
+
+        if (irq_id < 0)
+                return irq_id;
 
         err = hda_tegra_init_chip(chip, pdev);
@@ -496 +459 @@
         }
 
-        err = hda_tegra_init_clk(hda);
+        hda->reset = devm_reset_control_array_get_exclusive(&pdev->dev);
+        if (IS_ERR(hda->reset)) {
+                err = PTR_ERR(hda->reset);
+                goto out_free;
+        }
+
+        hda->clocks[hda->nclocks++].id = "hda";
+        hda->clocks[hda->nclocks++].id = "hda2hdmi";
+        hda->clocks[hda->nclocks++].id = "hda2codec_2x";
+
+        err = devm_clk_bulk_get(&pdev->dev, hda->nclocks, hda->clocks);
         if (err < 0)
                 goto out_free;

GPL/trunk/alsa-kernel/pci/hda/patch_ca0132.c

@@ -791 +791 @@
         { .name = "Fast Roll Off",
           .val = 0x80
+        }
+};
+
+/*
+ * Data structures for storing audio router remapping data. These are used to
+ * remap a currently active streams ports.
+ */
+struct chipio_stream_remap_data {
+        unsigned int stream_id;
+        unsigned int count;
+
+        unsigned int offset[16];
+        unsigned int value[16];
+};
+
+static const struct chipio_stream_remap_data stream_remap_data[] = {
+        { .stream_id = 0x14,
+          .count     = 0x04,
+          .offset    = { 0x00, 0x04, 0x08, 0x0c },
+          .value     = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
+        },
+        { .stream_id = 0x0c,
+          .count     = 0x0c,
+          .offset    = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
+                         0x20, 0x24, 0x28, 0x2c },
+          .value     = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
+                         0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
+                         0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
+        },
+        { .stream_id = 0x0c,
+          .count     = 0x08,
+          .offset    = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
+          .value     = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
+                         0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
         }
 };
@@ -1836 +1870 @@
 }
 
+/*
+ * Get ChipIO audio stream's status.
+ */
+static void chipio_get_stream_control(struct hda_codec *codec,
+                                int streamid, unsigned int *enable)
+{
+        chipio_set_control_param_no_mutex(codec,
+                        CONTROL_PARAM_STREAM_ID, streamid);
+        *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
+                           VENDOR_CHIPIO_PARAM_GET,
+                           CONTROL_PARAM_STREAM_CONTROL);
+}
 
 /*
@@ -1875 +1921 @@
 
 /*
+ * Writes to the 8051's exram, which has 16-bits of address space.
+ * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
+ * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
+ * setting the pmem bank selection SFR.
+ * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
+ * being writable.
+ */
+static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr)
+{
+        unsigned int tmp;
+
+        /* Lower 8-bits. */
+        tmp = addr & 0xff;
+        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
+                            VENDOR_CHIPIO_8051_ADDRESS_LOW, tmp);
+
+        /* Upper 8-bits. */
+        tmp = (addr >> 8) & 0xff;
+        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
+                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, tmp);
+}
+
+static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data)
+{
+        /* 8-bits of data. */
+        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
+                            VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff);
+}
+
+static unsigned int chipio_8051_get_data(struct hda_codec *codec)
+{
+        return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
+                                   VENDOR_CHIPIO_8051_DATA_READ, 0);
+}
+
+/* PLL_PMU writes share the lower address register of the 8051 exram writes. */
+static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data)
+{
+        /* 8-bits of data. */
+        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
+                            VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff);
+}
+
+static void chipio_8051_write_exram(struct hda_codec *codec,
+                unsigned int addr, unsigned int data)
+{
+        struct ca0132_spec *spec = codec->spec;
+
+        mutex_lock(&spec->chipio_mutex);
+
+        chipio_8051_set_address(codec, addr);
+        chipio_8051_set_data(codec, data);
+
+        mutex_unlock(&spec->chipio_mutex);
+}
+
+static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec,
+                unsigned int addr, unsigned int data)
+{
+        chipio_8051_set_address(codec, addr);
+        chipio_8051_set_data(codec, data);
+}
+
+/* Readback data from the 8051's exram. No mutex. */
+static void chipio_8051_read_exram(struct hda_codec *codec,
+                unsigned int addr, unsigned int *data)
+{
+        chipio_8051_set_address(codec, addr);
+        *data = chipio_8051_get_data(codec);
+}
+
+static void chipio_8051_write_pll_pmu(struct hda_codec *codec,
+                unsigned int addr, unsigned int data)
+{
+        struct ca0132_spec *spec = codec->spec;
+
+        mutex_lock(&spec->chipio_mutex);
+
+        chipio_8051_set_address(codec, addr & 0xff);
+        chipio_8051_set_data_pll(codec, data);
+
+        mutex_unlock(&spec->chipio_mutex);
+}
+
+static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec,
+                unsigned int addr, unsigned int data)
+{
+        chipio_8051_set_address(codec, addr & 0xff);
+        chipio_8051_set_data_pll(codec, data);
+}
+
+/*
  * Enable clocks.
  */
@@ -1882 +2020 @@
 
         mutex_lock(&spec->chipio_mutex);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 5);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 6);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
+
+        chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff);
+        chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b);
+        chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff);
+
         mutex_unlock(&spec->chipio_mutex);
 }
@@ -2214 +2345 @@
 
 /**
- * Prepare and send the SCP message to DSP
+ * dspio_scp - Prepare and send the SCP message to DSP
  * @codec: the HDA codec
  * @mod_id: ID of the DSP module to send the command
@@ -2323 +2454 @@
 }
 
-static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id,
-                        int req, const unsigned int data)
-{
-        return dspio_set_param(codec, mod_id, 0x00, req, &data,
-                        sizeof(unsigned int));
-}
-
 /*
  * Allocate a DSP DMA channel via an SCP message
@@ -2748 +2872 @@
 
 /**
- * Allocate router ports
+ * dsp_allocate_router_ports - Allocate router ports
  *
  * @codec: the HDA codec
@@ -3065 +3189 @@
 
 /**
- * Write a block of data into DSP code or data RAM using pre-allocated
- * DMA engine.
+ * dspxfr_one_seg - Write a block of data into DSP code or data RAM using pre-allocated DMA engine.
  *
  * @codec: the HDA codec
@@ -3263 +3386 @@
 
 /**
- * Write the entire DSP image of a DSP code/data overlay to DSP memories
+ * dspxfr_image - Write the entire DSP image of a DSP code/data overlay to DSP memories
  *
  * @codec: the HDA codec
@@ -7017 +7140 @@
                 snd_hda_add_vmaster(codec, "Master Playback Volume",
                                         spec->tlv, ca0132_alt_follower_pfxs,
-                                        "Playback Volume");
+                                        "Playback Volume", 0);
                 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
                                             NULL, ca0132_alt_follower_pfxs,
                                             "Playback Switch",
-                                            true, &spec->vmaster_mute.sw_kctl);
+                                            true, 0, &spec->vmaster_mute.sw_kctl);
                 if (err < 0)
                         return err;
@@ -7488 +7611 @@
 
         mutex_lock(&spec->chipio_mutex);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
+
+        chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00);
+        chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00);
+
         mutex_unlock(&spec->chipio_mutex);
 }
@@ -7521 +7636 @@
                 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
         }
+}
+
+
+/* If there is an active channel for some reason, find it and free it. */
+static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec)
+{
+        unsigned int i, tmp;
+        int status;
+
+        /* Read active DSPDMAC channel register. */
+        status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp);
+        if (status >= 0) {
+                /* AND against 0xfff to get the active channel bits. */
+                tmp = tmp & 0xfff;
+
+                /* If there are no active channels, nothing to free. */
+                if (!tmp)
+                        return;
+        } else {
+                codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n",
+                                __func__);
+                return;
+        }
+
+        /*
+         * Check each DSP DMA channel for activity, and if the channel is
+         * active, free it.
+         */
+        for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) {
+                if (dsp_is_dma_active(codec, i)) {
+                        status = dspio_free_dma_chan(codec, i);
+                        if (status < 0)
+                                codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n",
+                                                __func__, i);
+                }
+        }
+}
+
+/*
+ * In the case of CT_EXTENSIONS_ENABLE being set to 1, and the DSP being in
+ * use, audio is no longer routed directly to the DAC/ADC from the HDA stream.
+ * Instead, audio is now routed through the DSP's DMA controllers, which
+ * the DSP is tasked with setting up itself. Through debugging, it seems the
+ * cause of most of the no-audio on startup issues were due to improperly
+ * configured DSP DMA channels.
+ *
+ * Normally, the DSP configures these the first time an HDA audio stream is
+ * started post DSP firmware download. That is why creating a 'dummy' stream
+ * worked in fixing the audio in some cases. This works most of the time, but
+ * sometimes if a stream is started/stopped before the DSP can setup the DMA
+ * configuration registers, it ends up in a broken state. Issues can also
+ * arise if streams are started in an unusual order, i.e the audio output dma
+ * channel being sandwiched between the mic1 and mic2 dma channels.
+ *
+ * The solution to this is to make sure that the DSP has no DMA channels
+ * in use post DSP firmware download, and then to manually start each default
+ * DSP stream that uses the DMA channels. These are 0x0c, the audio output
+ * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
+ */
+static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec)
+{
+        const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 };
+        struct ca0132_spec *spec = codec->spec;
+        unsigned int i, tmp;
+
+        /*
+         * Check if any of the default streams are active, and if they are,
+         * stop them.
+         */
+        mutex_lock(&spec->chipio_mutex);
+
+        for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {
+                chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp);
+
+                if (tmp) {
+                        chipio_set_stream_control(codec,
+                                        dsp_dma_stream_ids[i], 0);
+                }
+        }
+
+        mutex_unlock(&spec->chipio_mutex);
+
+        /*
+         * If all DSP streams are inactive, there should be no active DSP DMA
+         * channels. Check and make sure this is the case, and if it isn't,
+         * free any active channels.
+         */
+        ca0132_alt_free_active_dma_channels(codec);
+
+        mutex_lock(&spec->chipio_mutex);
+
+        /* Make sure stream 0x0c is six channels. */
+        chipio_set_stream_channels(codec, 0x0c, 6);
+
+        for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {
+                chipio_set_stream_control(codec,
+                                dsp_dma_stream_ids[i], 1);
+
+                /* Give the DSP some time to setup the DMA channel. */
+                msleep(75);
+        }
+
+        mutex_unlock(&spec->chipio_mutex);
+}
+
+/*
+ * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
+ * router', where each entry represents a 48khz audio channel, with a format
+ * of an 8-bit destination, an 8-bit source, and an unknown 2-bit number
+ * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
+ * and 3 if it's using Sample Rate Converter ports.
+ * An example is:
+ * 0x0001f8c0
+ * In this case, f8 is the destination, and c0 is the source. The number value
+ * is 1.
+ * This region of memory is normally managed internally by the 8051, where
+ * the region of exram memory from 0x1477-0x1575 has each byte represent an
+ * entry within the 0x190000 range, and when a range of entries is in use, the
+ * ending value is overwritten with 0xff.
+ * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
+ * streamID's, where each entry is a starting 0x190000 port offset.
+ * 0x159d in exram is the same as 0x1578, except it contains the ending port
+ * offset for the corresponding streamID.
+ *
+ * On certain cards, such as the SBZ/ZxR/AE7, these are originally setup by
+ * the 8051, then manually overwritten to remap the ports to work with the
+ * new DACs.
+ *
+ * Currently known portID's:
+ * 0x00-0x1f: HDA audio stream input/output ports.
+ * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
+ *            have the lower-nibble set to 0x1, 0x2, and 0x9.
+ * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
+ * 0xe0-0xff: DAC/ADC audio input/output ports.
+ *
+ * Currently known streamID's:
+ * 0x03: Mic1 ADC to DSP.
+ * 0x04: Mic2 ADC to DSP.
+ * 0x05: HDA node 0x02 audio stream to DSP.
+ * 0x0f: DSP Mic exit to HDA node 0x07.
+ * 0x0c: DSP processed audio to DACs.
+ * 0x14: DAC0, front L/R.
+ *
+ * It is possible to route the HDA audio streams directly to the DAC and
+ * bypass the DSP entirely, with the only downside being that since the DSP
+ * does volume control, the only volume control you'll get is through PCM on
+ * the PC side, in the same way volume is handled for optical out. This may be
+ * useful for debugging.
+ */
+static void chipio_remap_stream(struct hda_codec *codec,
+                const struct chipio_stream_remap_data *remap_data)
+{
+        unsigned int i, stream_offset;
+
+        /* Get the starting port for the stream to be remapped. */
+        chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
+                        &stream_offset);
+
+        /*
+         * Check if the stream's port value is 0xff, because the 8051 may not
+         * have gotten around to setting up the stream yet. Wait until it's
+         * setup to remap it's ports.
+         */
+        if (stream_offset == 0xff) {
+                for (i = 0; i < 5; i++) {
+                        msleep(25);
+
+                        chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
+                                        &stream_offset);
+
+                        if (stream_offset != 0xff)
+                                break;
+                }
+        }
+
+        if (stream_offset == 0xff) {
+                codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n",
+                                __func__, remap_data->stream_id);
+                return;
+        }
+
+        /* Offset isn't in bytes, its in 32-bit words, so multiply it by 4. */
+        stream_offset *= 0x04;
+        stream_offset += 0x190000;
+
+        for (i = 0; i < remap_data->count; i++) {
+                chipio_write_no_mutex(codec,
+                                stream_offset + remap_data->offset[i],
+                                remap_data->value[i]);
+        }
+
+        /* Update stream map configuration. */
+        chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
 }
 
@@ -7583 +7891 @@
                 dspio_set_uint_param(codec, 0x96,
                                 SPEAKER_TUNING_FRONT_LEFT_DELAY + i, values[i]);
-}
-
-/*
- * Creates a dummy stream to bind the output to. This seems to have to be done
- * after changing the main outputs source and destination streams.
- */
-static void ca0132_alt_create_dummy_stream(struct hda_codec *codec)
-{
-        struct ca0132_spec *spec = codec->spec;
-        unsigned int stream_format;
-
-        stream_format = snd_hdac_calc_stream_format(48000, 2,
-                        SNDRV_PCM_FORMAT_S32_LE, 32, 0);
-
-        snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id,
-                                        0, stream_format);
-
-        snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
 }
 
@@ -7644 +7934 @@
         codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");
 
-        chipio_set_stream_channels(codec, 0x0C, 6);
-        chipio_set_stream_control(codec, 0x0C, 1);
-
         /* This value is 0x43 for 96khz, and 0x83 for 192khz. */
         chipio_write_no_mutex(codec, 0x18a020, 0x00000043);
@@ -7670 +7957 @@
 static void sbz_chipio_startup_data(struct hda_codec *codec)
 {
+        const struct chipio_stream_remap_data *dsp_out_remap_data;
         struct ca0132_spec *spec = codec->spec;
 
@@ -7675 +7963 @@
         codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");
 
-        /* These control audio output */
-        chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0);
-        chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1);
-        chipio_write_no_mutex(codec, 0x190068, 0x0001fac6);
-        chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7);
-        /* Signal to update I think */
-        chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
-
-        chipio_set_stream_channels(codec, 0x0C, 6);
-        chipio_set_stream_control(codec, 0x0C, 1);
-        /* No clue what these control */
-        if (ca0132_quirk(spec) == QUIRK_SBZ) {
-                chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0);
-                chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1);
-                chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2);
-                chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3);
-                chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4);
-                chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5);
-                chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6);
-                chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7);
-                chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8);
-                chipio_write_no_mutex(codec, 0x190054, 0x0001edc9);
-                chipio_write_no_mutex(codec, 0x190058, 0x0001eaca);
-                chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb);
-        } else if (ca0132_quirk(spec) == QUIRK_ZXR) {
-                chipio_write_no_mutex(codec, 0x190038, 0x000140c2);
-                chipio_write_no_mutex(codec, 0x19003c, 0x000141c3);
-                chipio_write_no_mutex(codec, 0x190040, 0x000150c4);
-                chipio_write_no_mutex(codec, 0x190044, 0x000151c5);
-                chipio_write_no_mutex(codec, 0x190050, 0x000142c8);
-                chipio_write_no_mutex(codec, 0x190054, 0x000143c9);
-                chipio_write_no_mutex(codec, 0x190058, 0x000152ca);
-                chipio_write_no_mutex(codec, 0x19005c, 0x000153cb);
-        }
-        chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
+        /* Remap DAC0's output ports. */
+        chipio_remap_stream(codec, &stream_remap_data[0]);
+
+        /* Remap DSP audio output stream ports. */
+        switch (ca0132_quirk(spec)) {
+        case QUIRK_SBZ:
+                dsp_out_remap_data = &stream_remap_data[1];
+                break;
+
+        case QUIRK_ZXR:
+                dsp_out_remap_data = &stream_remap_data[2];
+                break;
+
+        default:
+                dsp_out_remap_data = NULL;
+                break;
+        }
+
+        if (dsp_out_remap_data)
+                chipio_remap_stream(codec, dsp_out_remap_data);
 
         codec_dbg(codec, "Startup Data exited, mutex released.\n");
         mutex_unlock(&spec->chipio_mutex);
-}
-
-/*
- * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
- * done after the DSP is loaded.
- */
-static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec)
-{
-        struct ca0132_spec *spec = codec->spec;
-        unsigned int tmp, i;
-
-        /*
-         * Gotta run these twice, or else mic works inconsistently. Not clear
-         * why this is, but multiple tests have confirmed it.
-         */
-        for (i = 0; i < 2; i++) {
-                switch (ca0132_quirk(spec)) {
-                case QUIRK_SBZ:
-                case QUIRK_AE5:
-                case QUIRK_AE7:
-                        tmp = 0x00000003;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        tmp = 0x00000000;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
-                        tmp = 0x00000001;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
-                        tmp = 0x00000004;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        tmp = 0x00000005;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        tmp = 0x00000000;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        break;
-                case QUIRK_R3D:
-                case QUIRK_R3DI:
-                        tmp = 0x00000000;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
-                        tmp = 0x00000001;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
-                        tmp = 0x00000004;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        tmp = 0x00000005;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        tmp = 0x00000000;
-                        dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
-                        break;
-                default:
-                        break;
-                }
-                msleep(100);
-        }
 }
 
@@ -7802 +8024 @@
 
         chipio_8051_write_direct(codec, 0x93, 0x10);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
+        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
 
         writeb(0xff, spec->mem_base + 0x304);
@@ -7842 +8061 @@
         chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x22);
+        chipio_8051_write_exram(codec, 0xfa92, 0x22);
 }
 
 static void ae5_post_dsp_pll_setup(struct hda_codec *codec)
 {
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8);
-
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc);
-
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb);
-
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
-
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d);
+        chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
+        chipio_8051_write_pll_pmu(codec, 0x45, 0xcc);
+        chipio_8051_write_pll_pmu(codec, 0x40, 0xcb);
+        chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
+        chipio_8051_write_pll_pmu(codec, 0x51, 0x8d);
 }
 
@@ -7887 +8082 @@
 
         chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
-
-        chipio_set_stream_channels(codec, 0x0C, 6);
-        chipio_set_stream_control(codec, 0x0C, 1);
 
         chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0);
@@ -7900 +8092 @@
         chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
+        chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
 
         ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80);
@@ -7942 +8131 @@
 }
 
-static const unsigned int ae7_port_set_data[] = {
-        0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
-        0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
-};
-
 static void ae7_post_dsp_setup_ports(struct hda_codec *codec)
 {
         struct ca0132_spec *spec = codec->spec;
-        unsigned int i, count, addr;
 
         mutex_lock(&spec->chipio_mutex);
 
-        chipio_set_stream_channels(codec, 0x0c, 6);
-        chipio_set_stream_control(codec, 0x0c, 1);
-
-        count = ARRAY_SIZE(ae7_port_set_data);
-        addr = 0x190030;
-        for (i = 0; i < count; i++) {
-                chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]);
-
-                /* Addresses are incremented by 4-bytes. */
-                addr += 0x04;
-        }
-
-        /*
-         * Port setting always ends with a write of 0x1 to address 0x19042c.
-         */
-        chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
+        /* Seems to share the same port remapping as the SBZ. */
+        chipio_remap_stream(codec, &stream_remap_data[1]);
 
         ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
@@ -7993 +8162 @@
 
         chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
-        chipio_set_stream_channels(codec, 0x0c, 6);
-        chipio_set_stream_control(codec, 0x0c, 1);
 
         chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
@@ -8018 +8185 @@
         unsigned int i;
 
-        for (i = 0; i < ARRAY_SIZE(addr); i++) {
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                    VENDOR_CHIPIO_8051_ADDRESS_LOW, addr[i]);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                    VENDOR_CHIPIO_PLL_PMU_WRITE, data[i]);
-        }
+        for (i = 0; i < ARRAY_SIZE(addr); i++)
+                chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]);
 }
 
@@ -8039 +8202 @@
         mutex_lock(&spec->chipio_mutex);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
+        chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
 
         chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
@@ -8115 +8275 @@
         chipio_8051_write_direct(codec, 0x93, 0x10);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
+        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
 
         ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
@@ -8130 +8287 @@
         snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x22);
+        chipio_8051_write_exram(codec, 0xfa92, 0x22);
 
         ae7_post_dsp_pll_setup(codec);
         ae7_post_dsp_asi_stream_setup(codec);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
+        chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
 
         ae7_post_dsp_asi_setup_ports(codec);
@@ -8206 +8355 @@
                 return;
 
-        ca0132_alt_dsp_scp_startup(codec);
         ca0132_alt_init_analog_mics(codec);
+        ca0132_alt_start_dsp_audio_streams(codec);
 
         /*remove DSP headroom*/
@@ -8256 +8405 @@
                 return;
 
-        ca0132_alt_dsp_scp_startup(codec);
         ca0132_alt_init_analog_mics(codec);
+        ca0132_alt_start_dsp_audio_streams(codec);
         sbz_connect_streams(codec);
         sbz_chipio_startup_data(codec);
-
-        chipio_set_stream_control(codec, 0x03, 1);
-        chipio_set_stream_control(codec, 0x04, 1);
 
         /*
@@ -8298 +8444 @@
 
         ca0132_alt_init_speaker_tuning(codec);
-
-        ca0132_alt_create_dummy_stream(codec);
 }
 
@@ -8315 +8459 @@
                 return;
 
-        ca0132_alt_dsp_scp_startup(codec);
         ca0132_alt_init_analog_mics(codec);
-        chipio_set_stream_control(codec, 0x03, 1);
-        chipio_set_stream_control(codec, 0x04, 1);
+        ca0132_alt_start_dsp_audio_streams(codec);
 
         /* New, unknown SCP req's */
@@ -8367 +8509 @@
 
         ca0132_alt_init_speaker_tuning(codec);
-
-        ca0132_alt_create_dummy_stream(codec);
 }
 
@@ -8384 +8524 @@
                 return;
 
-        ca0132_alt_dsp_scp_startup(codec);
         ca0132_alt_init_analog_mics(codec);
+        ca0132_alt_start_dsp_audio_streams(codec);
         ae7_post_dsp_setup_ports(codec);
 
@@ -8452 +8592 @@
 
         ca0132_alt_init_speaker_tuning(codec);
-
-        ca0132_alt_create_dummy_stream(codec);
 }
 
@@ -8644 +8782 @@
 }
 
-static void ca0132_init_unsol(struct hda_codec *codec)
+static void ca0132_setup_unsol(struct hda_codec *codec)
 {
         struct ca0132_spec *spec = codec->spec;
@@ -8742 +8880 @@
         mutex_init(&spec->chipio_mutex);
 
+        /*
+         * The Windows driver always does this upon startup, which seems to
+         * clear out any previous configuration. This should help issues where
+         * a boot into Windows prior to a boot into Linux breaks things. Also,
+         * Windows always sends the reset twice.
+         */
+        if (ca0132_use_alt_functions(spec)) {
+                chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
+                chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2);
+
+                snd_hda_codec_write(codec, codec->core.afg, 0,
+                            AC_VERB_SET_CODEC_RESET, 0);
+                snd_hda_codec_write(codec, codec->core.afg, 0,
+                            AC_VERB_SET_CODEC_RESET, 0);
+        }
+
         spec->cur_out_type = SPEAKER_OUT;
         if (!ca0132_use_alt_functions(spec))
@@ -9114 +9268 @@
         chipio_write(codec, 0x18b0a4, 0x000000c2);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B);
+        chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
 
         snd_hda_codec_write(codec, 0x11, 0,
@@ -9129 +9278 @@
         chipio_write(codec, 0x18b0a4, 0x000000c2);
 
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B);
-
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_DATA_WRITE, 0x40);
+        chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
+        chipio_8051_write_exram(codec, 0x1920, 0x00);
+        chipio_8051_write_exram(codec, 0x1921, 0x40);
 
         snd_hda_codec_write(codec, 0x11, 0,
                         AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04);
+}
+
+/*
+ * The ZxR seems to use alternative DAC's for the surround channels, which
+ * require PLL PMU setup for the clock rate, I'm guessing. Without setting
+ * this up, we get no audio out of the surround jacks.
+ */
+static void zxr_pre_dsp_setup(struct hda_codec *codec)
+{
+        static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 };
+        static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d };
+        unsigned int i;
+
+        chipio_write(codec, 0x189000, 0x0001f100);
+        msleep(50);
+        chipio_write(codec, 0x18900c, 0x0001f100);
+        msleep(50);
+
+        /*
+         * This writes a RET instruction at the entry point of the function at
+         * 0xfa92 in exram. This function seems to have something to do with
+         * ASI. Might be some way to prevent the card from reconfiguring the
+         * ASI stuff itself.
+         */
+        chipio_8051_write_exram(codec, 0xfa92, 0x22);
+
+        chipio_8051_write_pll_pmu(codec, 0x51, 0x98);
+
+        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82);
+        chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3);
+
+        chipio_write(codec, 0x18902c, 0x00000000);
+        msleep(50);
+        chipio_write(codec, 0x18902c, 0x00000003);
+        msleep(50);
+
+        for (i = 0; i < ARRAY_SIZE(addr); i++)
+                chipio_8051_write_pll_pmu(codec, addr[i], data[i]);
 }
 
@@ -9313 +9488 @@
         unsigned char tmp[3];
 
-        if (ca0132_quirk(spec) == QUIRK_AE7) {
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                    VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                    VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8);
-        }
+        if (ca0132_quirk(spec) == QUIRK_AE7)
+                chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
 
         chipio_8051_write_direct(codec, 0x93, 0x10);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
-        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                            VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
+        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
 
         if (ca0132_quirk(spec) == QUIRK_AE7) {
@@ -9363 +9531 @@
         if (ca0132_quirk(spec) == QUIRK_AE5)
                 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
-
-        chipio_write(codec, 0x18b0a4, 0x000000c2);
-
-        snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
-        snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
 }
 
@@ -9405 +9568 @@
         case QUIRK_AE5:
                 ca0132_gpio_init(codec);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88);
+                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
                 chipio_write(codec, 0x18b030, 0x00000020);
                 snd_hda_sequence_write(codec, spec->chip_init_verbs);
@@ -9416 +9576 @@
         case QUIRK_AE7:
                 ca0132_gpio_init(codec);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49);
-                snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
-                                VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88);
+                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
                 snd_hda_sequence_write(codec, spec->chip_init_verbs);
                 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
@@ -9428 +9585 @@
                 break;
         case QUIRK_ZXR:
+                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
                 snd_hda_sequence_write(codec, spec->chip_init_verbs);
                 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
+                zxr_pre_dsp_setup(codec);
                 break;
         default:
@@ -9477 +9636 @@
                 ae5_register_set(codec);
 
-        ca0132_init_unsol(codec);
         ca0132_init_params(codec);
         ca0132_init_flags(codec);
@@ -10042 +10200 @@
                 goto error;
 
+        ca0132_setup_unsol(codec);
+
         return 0;
 

GPL/trunk/alsa-kernel/pci/hda/patch_cirrus.c

@@ -10 +10 @@
 #include <linux/module.h>
 #include <sound/core.h>
+#include <linux/mutex.h>
+#include <linux/pci.h>
 #include <sound/tlv.h>
 #include <sound/hda_codec.h>
@@ -24 +26 @@
  */
 
+#define CS42L42_HP_CH     (2U)
+#define CS42L42_HS_MIC_CH (1U)
+
 struct cs_spec {
         struct hda_gen_spec gen;
@@ -42 +47 @@
         int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
                             struct snd_ctl_elem_value *ucontrol);
+
+        unsigned int cs42l42_hp_jack_in:1;
+        unsigned int cs42l42_mic_jack_in:1;
+        unsigned int cs42l42_volume_init:1;
+        char cs42l42_hp_volume[CS42L42_HP_CH];
+        char cs42l42_hs_mic_volume[CS42L42_HS_MIC_CH];
+
+        struct mutex cs8409_i2c_mux;
+
+        /* verb exec op override */
+        int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
+                                 unsigned int flags, unsigned int *res);
 };
 
@@ -115 +132 @@
  * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  * 1 SPDIF OUT => SPDIF Trasmitter(sense)
-*/
+ */
 #define CS4210_DAC_NID          0x02
 #define CS4210_ADC_NID          0x03
@@ -134 +151 @@
 {
         struct cs_spec *spec = codec->spec;
+
         snd_hda_codec_write(codec, spec->vendor_nid, 0,
                             AC_VERB_SET_COEF_INDEX, idx);
@@ -144 +162 @@
 {
         struct cs_spec *spec = codec->spec;
+
         snd_hda_codec_write(codec, spec->vendor_nid, 0,
                             AC_VERB_SET_COEF_INDEX, idx);
@@ -180 +199 @@
 {
         unsigned int val;
+
         val = snd_hda_codec_get_pincfg(codec, nid);
         return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
@@ -198 +218 @@
                                          * No effect if SPDIF_OUT2 is
                                          * selected in IDX_SPDIF_CTL.
-                                        */
+                                         */
 
                 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
@@ -272 +292 @@
         {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
         {0x11, AC_VERB_SET_PROC_STATE, 0x00},
-
-#if 0 /* Don't to set to D3 as we are in power-up sequence */
-        {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
-        {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
-        /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
-#endif
-
         {0} /* terminator */
 };
@@ -366 +379 @@
         if (spec->gen.dyn_adc_switch) {
                 unsigned int done = 0;
+
                 for (i = 0; i < spec->gen.input_mux.num_items; i++) {
                         int idx = spec->gen.dyn_adc_idx[i];
+
                         if (done & (1 << idx))
                                 continue;
@@ -501 +516 @@
         if (action == HDA_FIXUP_ACT_PRE_PROBE) {
                 struct cs_spec *spec = codec->spec;
+
                 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
                 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
@@ -513 +529 @@
         if (action == HDA_FIXUP_ACT_PRE_PROBE) {
                 struct cs_spec *spec = codec->spec;
+
                 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
                 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
@@ -659 +676 @@
         if (action == HDA_FIXUP_ACT_PRE_PROBE) {
                 struct cs_spec *spec = codec->spec;
+
                 spec->gpio_eapd_hp = 0;
                 spec->gpio_eapd_speaker = 1;
@@ -813 +831 @@
  * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  * 1 SPDIF OUT => SPDIF Trasmitter(sense)
-*/
+ */
 
 /* CS4210 board names */
@@ -856 +874 @@
 {
         struct cs_spec *spec = codec->spec;
+
         if (action == HDA_FIXUP_ACT_PRE_PROBE)
                 spec->sense_b = 1;
@@ -881 +900 @@
         {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
         /*
-            Disable Coefficient Index Auto-Increment(DAI)=1,
-            PDREF=0
-        */
+         *  Disable Coefficient Index Auto-Increment(DAI)=1,
+         *  PDREF=0
+         */
         {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
 
@@ -970 +989 @@
         coef &= ~0x0003;
         coef |= (vol & 0x0003);
-        if (original_coef == coef)
-                return 0;
-        else {
+        if (original_coef != coef) {
                 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
                 return 1;
         }
+
+        return 0;
 }
 
@@ -1014 +1033 @@
 
                 /*
-                    GPIO or SENSE_B forced - disconnect the DMIC pin.
-                */
+                 *  GPIO or SENSE_B forced - disconnect the DMIC pin.
+                 */
                 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
                 def_conf &= ~AC_DEFCFG_PORT_CONN;
@@ -1054 +1073 @@
         for (i = 0; i < cfg->dig_outs; i++) {
                 hda_nid_t nid = cfg->dig_out_pins[i];
+
                 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
                         spec->spdif_detect = 1;
@@ -1132 +1152 @@
 #ifdef CONFIG_PM
 /*
-        Manage PDREF, when transitioning to D3hot
-        (DAC,ADC) -> D3, PDREF=1, AFG->D3
-*/
+ *      Manage PDREF, when transitioning to D3hot
+ *      (DAC,ADC) -> D3, PDREF=1, AFG->D3
+ */
 static int cs421x_suspend(struct hda_codec *codec)
 {
@@ -1185 +1205 @@
 
         /*
-            Update the GPIO/DMIC/SENSE_B pinmux before the configuration
-            is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
-            is disabled.
-        */
+         *  Update the GPIO/DMIC/SENSE_B pinmux before the configuration
+         *   is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
+         *   is disabled.
+         */
         cs4210_pinmux_init(codec);
 
@@ -1226 +1246 @@
 }
 
+/* Cirrus Logic CS8409 HDA bridge with
+ * companion codec CS42L42
+ */
+#define CS8409_VENDOR_NID 0x47
+
+#define CS8409_CS42L42_HP_PIN_NID       0x24
+#define CS8409_CS42L42_SPK_PIN_NID      0x2c
+#define CS8409_CS42L42_AMIC_PIN_NID     0x34
+#define CS8409_CS42L42_DMIC_PIN_NID     0x44
+#define CS8409_CS42L42_DMIC_ADC_PIN_NID 0x22
+
+#define CS42L42_HSDET_AUTO_DONE 0x02
+#define CS42L42_HSTYPE_MASK             0x03
+
+#define CS42L42_JACK_INSERTED   0x0C
+#define CS42L42_JACK_REMOVED    0x00
+
+#define GPIO3_INT (1 << 3)
+#define GPIO4_INT (1 << 4)
+#define GPIO5_INT (1 << 5)
+
+#define CS42L42_I2C_ADDR        (0x48 << 1)
+
+#define CIR_I2C_ADDR    0x0059
+#define CIR_I2C_DATA    0x005A
+#define CIR_I2C_CTRL    0x005B
+#define CIR_I2C_STATUS  0x005C
+#define CIR_I2C_QWRITE  0x005D
+#define CIR_I2C_QREAD   0x005E
+
+#define CS8409_CS42L42_HP_VOL_REAL_MIN   (-63)
+#define CS8409_CS42L42_HP_VOL_REAL_MAX   (0)
+#define CS8409_CS42L42_AMIC_VOL_REAL_MIN (-97)
+#define CS8409_CS42L42_AMIC_VOL_REAL_MAX (12)
+#define CS8409_CS42L42_REG_HS_VOLUME_CHA (0x2301)
+#define CS8409_CS42L42_REG_HS_VOLUME_CHB (0x2303)
+#define CS8409_CS42L42_REG_AMIC_VOLUME   (0x1D03)
+
+struct cs8409_i2c_param {
+        unsigned int addr;
+        unsigned int reg;
+};
+
+struct cs8409_cir_param {
+        unsigned int nid;
+        unsigned int cir;
+        unsigned int coeff;
+};
+
+enum {
+        CS8409_BULLSEYE,
+        CS8409_WARLOCK,
+        CS8409_CYBORG,
+        CS8409_FIXUPS,
+};
+
+static void cs8409_cs42l42_fixups(struct hda_codec *codec,
+                                    const struct hda_fixup *fix, int action);
+static int cs8409_cs42l42_exec_verb(struct hdac_device *dev,
+                unsigned int cmd, unsigned int flags, unsigned int *res);
+
+/* Dell Inspiron models with cs8409/cs42l42 */
+static const struct hda_model_fixup cs8409_models[] = {
+        { .id = CS8409_BULLSEYE, .name = "bullseye" },
+        { .id = CS8409_WARLOCK, .name = "warlock" },
+        { .id = CS8409_CYBORG, .name = "cyborg" },
+        {0}
+};
+
+/* Dell Inspiron platforms
+ * with cs8409 bridge and cs42l42 codec
+ */
+static const struct snd_pci_quirk cs8409_fixup_tbl[] = {
+        SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE),
+        SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK),
+        SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG),
+        SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG),
+        {0} /* terminator */
+};
+
+static const struct hda_verb cs8409_cs42l42_init_verbs[] = {
+        { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */
+        { 0x47, AC_VERB_SET_PROC_STATE, 0x0001 },     /* Enable VPW processing  */
+        { 0x47, AC_VERB_SET_COEF_INDEX, 0x0002 },     /* Configure GPIO 6,7 */
+        { 0x47, AC_VERB_SET_PROC_COEF,  0x0080 },     /* I2C mode */
+        { 0x47, AC_VERB_SET_COEF_INDEX, 0x005b },     /* Set I2C bus speed */
+        { 0x47, AC_VERB_SET_PROC_COEF,  0x0200 },     /* 100kHz I2C_STO = 2 */
+        {0} /* terminator */
+};
+
+static const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
+        { 0x24, 0x042120f0 }, /* ASP-1-TX */
+        { 0x34, 0x04a12050 }, /* ASP-1-RX */
+        { 0x2c, 0x901000f0 }, /* ASP-2-TX */
+        { 0x44, 0x90a00090 }, /* DMIC-1 */
+        {0} /* terminator */
+};
+
+static const struct hda_fixup cs8409_fixups[] = {
+        [CS8409_BULLSEYE] = {
+                .type = HDA_FIXUP_PINS,
+                .v.pins = cs8409_cs42l42_pincfgs,
+                .chained = true,
+                .chain_id = CS8409_FIXUPS,
+        },
+        [CS8409_WARLOCK] = {
+                .type = HDA_FIXUP_PINS,
+                .v.pins = cs8409_cs42l42_pincfgs,
+                .chained = true,
+                .chain_id = CS8409_FIXUPS,
+        },
+        [CS8409_CYBORG] = {
+                .type = HDA_FIXUP_PINS,
+                .v.pins = cs8409_cs42l42_pincfgs,
+                .chained = true,
+                .chain_id = CS8409_FIXUPS,
+        },
+        [CS8409_FIXUPS] = {
+                .type = HDA_FIXUP_FUNC,
+                .v.func = cs8409_cs42l42_fixups,
+        },
+};
+
+/* Vendor specific HW configuration for CS42L42 */
+static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
+        { 0x1010, 0xB0 },
+        { 0x1D01, 0x00 },
+        { 0x1D02, 0x06 },
+        { 0x1D03, 0x00 },
+        { 0x1107, 0x01 },
+        { 0x1009, 0x02 },
+        { 0x1007, 0x03 },
+        { 0x1201, 0x00 },
+        { 0x1208, 0x13 },
+        { 0x1205, 0xFF },
+        { 0x1206, 0x00 },
+        { 0x1207, 0x20 },
+        { 0x1202, 0x0D },
+        { 0x2A02, 0x02 },
+        { 0x2A03, 0x00 },
+        { 0x2A04, 0x00 },
+        { 0x2A05, 0x02 },
+        { 0x2A06, 0x00 },
+        { 0x2A07, 0x20 },
+        { 0x2A08, 0x02 },
+        { 0x2A09, 0x00 },
+        { 0x2A0A, 0x80 },
+        { 0x2A0B, 0x02 },
+        { 0x2A0C, 0x00 },
+        { 0x2A0D, 0xA0 },
+        { 0x2A01, 0x0C },
+        { 0x2902, 0x01 },
+        { 0x2903, 0x02 },
+        { 0x2904, 0x00 },
+        { 0x2905, 0x00 },
+        { 0x2901, 0x01 },
+        { 0x1101, 0x0A },
+        { 0x1102, 0x84 },
+        { 0x2301, 0x00 },
+        { 0x2303, 0x00 },
+        { 0x2302, 0x3f },
+        { 0x2001, 0x03 },
+        { 0x1B75, 0xB6 },
+        { 0x1B73, 0xC2 },
+        { 0x1129, 0x01 },
+        { 0x1121, 0xF3 },
+        { 0x1103, 0x20 },
+        { 0x1105, 0x00 },
+        { 0x1112, 0xC0 },
+        { 0x1113, 0x80 },
+        { 0x1C03, 0xC0 },
+        { 0x1105, 0x00 },
+        { 0x1112, 0xC0 },
+        { 0x1101, 0x02 },
+        {0} /* Terminator */
+};
+
+/* Vendor specific hw configuration for CS8409 */
+static const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = {
+        { 0x47, 0x00, 0xb008 }, /* +PLL1/2_EN, +I2C_EN */
+        { 0x47, 0x01, 0x0002 }, /* ASP1/2_EN=0, ASP1_STP=1 */
+        { 0x47, 0x02, 0x0a80 }, /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */
+        { 0x47, 0x19, 0x0800 }, /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */
+        { 0x47, 0x1a, 0x0820 }, /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */
+        { 0x47, 0x29, 0x0800 }, /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */
+        { 0x47, 0x2a, 0x2800 }, /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */
+        { 0x47, 0x39, 0x0800 }, /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */
+        { 0x47, 0x3a, 0x0800 }, /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */
+        { 0x47, 0x03, 0x8000 }, /* ASP1: LCHI = 00h */
+        { 0x47, 0x04, 0x28ff }, /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */
+        { 0x47, 0x05, 0x0062 }, /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */
+        { 0x47, 0x06, 0x801f }, /* ASP2: LCHI=1Fh */
+        { 0x47, 0x07, 0x283f }, /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */
+        { 0x47, 0x08, 0x805c }, /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */
+        { 0x47, 0x09, 0x0023 }, /* DMIC1_MO=10b, DMIC1/2_SR=1 */
+        { 0x47, 0x0a, 0x0000 }, /* ASP1/2_BEEP=0 */
+        { 0x47, 0x01, 0x0062 }, /* ASP1/2_EN=1, ASP1_STP=1 */
+        { 0x47, 0x00, 0x9008 }, /* -PLL2_EN */
+        { 0x47, 0x68, 0x0000 }, /* TX2.A: pre-scale att.=0 dB */
+        { 0x47, 0x82, 0xfc03 }, /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */
+        { 0x47, 0xc0, 0x9999 }, /* test mode on */
+        { 0x47, 0xc5, 0x0000 }, /* GPIO hysteresis = 30 us */
+        { 0x47, 0xc0, 0x0000 }, /* test mode off */
+        {0} /* Terminator */
+};
+
+static const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = {
+        { 0x47, 0x65, 0x4000 }, /* EQ_SEL=1, EQ1/2_EN=0 */
+        { 0x47, 0x64, 0x4000 }, /* +EQ_ACC */
+        { 0x47, 0x65, 0x4010 }, /* +EQ2_EN */
+        { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */
+        { 0x47, 0x64, 0xc0c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */
+        { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */
+        { 0x47, 0x64, 0xc1c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */
+        { 0x47, 0x63, 0xf370 }, /* EQ_DATA_HI=0xf370 */
+        { 0x47, 0x64, 0xc271 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */
+        { 0x47, 0x63, 0x1ef8 }, /* EQ_DATA_HI=0x1ef8 */
+        { 0x47, 0x64, 0xc348 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */
+        { 0x47, 0x63, 0xc110 }, /* EQ_DATA_HI=0xc110 */
+        { 0x47, 0x64, 0xc45a }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */
+        { 0x47, 0x63, 0x1f29 }, /* EQ_DATA_HI=0x1f29 */
+        { 0x47, 0x64, 0xc574 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */
+        { 0x47, 0x63, 0x1d7a }, /* EQ_DATA_HI=0x1d7a */
+        { 0x47, 0x64, 0xc653 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */
+        { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */
+        { 0x47, 0x64, 0xc714 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */
+        { 0x47, 0x63, 0x1ca3 }, /* EQ_DATA_HI=0x1ca3 */
+        { 0x47, 0x64, 0xc8c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */
+        { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */
+        { 0x47, 0x64, 0xc914 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */
+        { 0x47, 0x64, 0x0000 }, /* -EQ_ACC, -EQ_WRT */
+        {0} /* Terminator */
+};
+
+/**
+ * cs8409_enable_i2c_clock - Enable I2C clocks
+ * @codec: the codec instance
+ * @enable: Enable or disable I2C clocks
+ *
+ * Enable or Disable I2C clocks.
+ */
+static void cs8409_enable_i2c_clock(struct hda_codec *codec, unsigned int enable)
+{
+        unsigned int retval;
+        unsigned int newval;
+
+        retval = cs_vendor_coef_get(codec, 0x0);
+        newval = (enable) ? (retval | 0x8) : (retval & 0xfffffff7);
+        cs_vendor_coef_set(codec, 0x0, newval);
+}
+
+/**
+ * cs8409_i2c_wait_complete - Wait for I2C transaction
+ * @codec: the codec instance
+ *
+ * Wait for I2C transaction to complete.
+ * Return -1 if transaction wait times out.
+ */
+static int cs8409_i2c_wait_complete(struct hda_codec *codec)
+{
+        int repeat = 5;
+        unsigned int retval;
+
+        do {
+                retval = cs_vendor_coef_get(codec, CIR_I2C_STATUS);
+                if ((retval & 0x18) != 0x18) {
+                        usleep_range(2000, 4000);
+                        --repeat;
+                } else
+                        return 0;
+
+        } while (repeat);
+
+        return -1;
+}
+
+/**
+ * cs8409_i2c_read - CS8409 I2C Read.
+ * @codec: the codec instance
+ * @i2c_address: I2C Address
+ * @i2c_reg: Register to read
+ * @paged: Is a paged transaction
+ *
+ * CS8409 I2C Read.
+ * Returns negative on error, otherwise returns read value in bits 0-7.
+ */
+static int cs8409_i2c_read(struct hda_codec *codec,
+                unsigned int i2c_address,
+                unsigned int i2c_reg,
+                unsigned int paged)
+{
+        unsigned int i2c_reg_data;
+        unsigned int read_data;
+
+        cs8409_enable_i2c_clock(codec, 1);
+        cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address);
+
+        if (paged) {
+                cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8);
+                if (cs8409_i2c_wait_complete(codec) < 0) {
+                        codec_err(codec,
+                                "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
+                                __func__, i2c_address, i2c_reg);
+                        return -EIO;
+                }
+        }
+
+        i2c_reg_data = (i2c_reg << 8) & 0x0ffff;
+        cs_vendor_coef_set(codec, CIR_I2C_QREAD, i2c_reg_data);
+        if (cs8409_i2c_wait_complete(codec) < 0) {
+                codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
+                        __func__, i2c_address, i2c_reg);
+                return -EIO;
+        }
+
+        /* Register in bits 15-8 and the data in 7-0 */
+        read_data = cs_vendor_coef_get(codec, CIR_I2C_QREAD);
+
+        cs8409_enable_i2c_clock(codec, 0);
+
+        return read_data & 0x0ff;
+}
+
+/**
+ * cs8409_i2c_write - CS8409 I2C Write.
+ * @codec: the codec instance
+ * @i2c_address: I2C Address
+ * @i2c_reg: Register to write to
+ * @i2c_data: Data to write
+ * @paged: Is a paged transaction
+ *
+ * CS8409 I2C Write.
+ * Returns negative on error, otherwise returns 0.
+ */
+static int cs8409_i2c_write(struct hda_codec *codec,
+                unsigned int i2c_address, unsigned int i2c_reg,
+                unsigned int i2c_data,
+                unsigned int paged)
+{
+        unsigned int i2c_reg_data;
+
+        cs8409_enable_i2c_clock(codec, 1);
+        cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address);
+
+        if (paged) {
+                cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8);
+                if (cs8409_i2c_wait_complete(codec) < 0) {
+                        codec_err(codec,
+                                "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
+                                __func__, i2c_address, i2c_reg);
+                        return -EIO;
+                }
+        }
+
+        i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff);
+        cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg_data);
+
+        if (cs8409_i2c_wait_complete(codec) < 0) {
+                codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
+                        __func__, i2c_address, i2c_reg);
+                return -EIO;
+        }
+
+        cs8409_enable_i2c_clock(codec, 0);
+
+        return 0;
+}
+
+static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol,
+                                  struct snd_ctl_elem_info *uinfo)
+{
+        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
+        u16 nid = get_amp_nid(kcontrol);
+        u8 chs = get_amp_channels(kcontrol);
+
+        codec_dbg(codec, "%s() nid: %d\n", __func__, nid);
+        switch (nid) {
+        case CS8409_CS42L42_HP_PIN_NID:
+                uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+                uinfo->count = chs == 3 ? 2 : 1;
+                uinfo->value.integer.min = CS8409_CS42L42_HP_VOL_REAL_MIN;
+                uinfo->value.integer.max = CS8409_CS42L42_HP_VOL_REAL_MAX;
+                break;
+        case CS8409_CS42L42_AMIC_PIN_NID:
+                uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+                uinfo->count = chs == 3 ? 2 : 1;
+                uinfo->value.integer.min = CS8409_CS42L42_AMIC_VOL_REAL_MIN;
+                uinfo->value.integer.max = CS8409_CS42L42_AMIC_VOL_REAL_MAX;
+                break;
+        default:
+                break;
+        }
+        return 0;
+}
+
+static void cs8409_cs42l42_update_volume(struct hda_codec *codec)
+{
+        struct cs_spec *spec = codec->spec;
+        int data;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+        data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_HS_VOLUME_CHA, 1);
+        if (data >= 0)
+                spec->cs42l42_hp_volume[0] = -data;
+        else
+                spec->cs42l42_hp_volume[0] = CS8409_CS42L42_HP_VOL_REAL_MIN;
+        data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_HS_VOLUME_CHB, 1);
+        if (data >= 0)
+                spec->cs42l42_hp_volume[1] = -data;
+        else
+                spec->cs42l42_hp_volume[1] = CS8409_CS42L42_HP_VOL_REAL_MIN;
+        data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_AMIC_VOLUME, 1);
+        if (data >= 0)
+                spec->cs42l42_hs_mic_volume[0] = -data;
+        else
+                spec->cs42l42_hs_mic_volume[0] = CS8409_CS42L42_AMIC_VOL_REAL_MIN;
+        mutex_unlock(&spec->cs8409_i2c_mux);
+        spec->cs42l42_volume_init = 1;
+}
+
+static int cs8409_cs42l42_volume_get(struct snd_kcontrol *kcontrol,
+                                 struct snd_ctl_elem_value *ucontrol)
+{
+        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
+        struct cs_spec *spec = codec->spec;
+        hda_nid_t nid = get_amp_nid(kcontrol);
+        int chs = get_amp_channels(kcontrol);
+        long *valp = ucontrol->value.integer.value;
+
+        if (!spec->cs42l42_volume_init) {
+                snd_hda_power_up(codec);
+                cs8409_cs42l42_update_volume(codec);
+                snd_hda_power_down(codec);
+        }
+        switch (nid) {
+        case CS8409_CS42L42_HP_PIN_NID:
+                if (chs & BIT(0))
+                        *valp++ = spec->cs42l42_hp_volume[0];
+                if (chs & BIT(1))
+                        *valp++ = spec->cs42l42_hp_volume[1];
+                break;
+        case CS8409_CS42L42_AMIC_PIN_NID:
+                if (chs & BIT(0))
+                        *valp++ = spec->cs42l42_hs_mic_volume[0];
+                break;
+        default:
+                break;
+        }
+        return 0;
+}
+
+static int cs8409_cs42l42_volume_put(struct snd_kcontrol *kcontrol,
+                                 struct snd_ctl_elem_value *ucontrol)
+{
+        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
+        struct cs_spec *spec = codec->spec;
+        hda_nid_t nid = get_amp_nid(kcontrol);
+        int chs = get_amp_channels(kcontrol);
+        long *valp = ucontrol->value.integer.value;
+        int change = 0;
+        char vol;
+
+        snd_hda_power_up(codec);
+        switch (nid) {
+        case CS8409_CS42L42_HP_PIN_NID:
+                mutex_lock(&spec->cs8409_i2c_mux);
+                if (chs & BIT(0)) {
+                        vol = -(*valp);
+                        change = cs8409_i2c_write(codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_HS_VOLUME_CHA, vol, 1);
+                        valp++;
+                }
+                if (chs & BIT(1)) {
+                        vol = -(*valp);
+                        change |= cs8409_i2c_write(codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_HS_VOLUME_CHB, vol, 1);
+                }
+                mutex_unlock(&spec->cs8409_i2c_mux);
+                break;
+        case CS8409_CS42L42_AMIC_PIN_NID:
+                mutex_lock(&spec->cs8409_i2c_mux);
+                if (chs & BIT(0)) {
+                        change = cs8409_i2c_write(
+                                codec, CS42L42_I2C_ADDR,
+                                CS8409_CS42L42_REG_AMIC_VOLUME, (char)*valp, 1);
+                        valp++;
+                }
+                mutex_unlock(&spec->cs8409_i2c_mux);
+                break;
+        default:
+                break;
+        }
+        cs8409_cs42l42_update_volume(codec);
+        snd_hda_power_down(codec);
+        return change;
+}
+
+static const DECLARE_TLV_DB_SCALE(
+        cs8409_cs42l42_hp_db_scale,
+        CS8409_CS42L42_HP_VOL_REAL_MIN * 100, 100, 1);
+
+static const DECLARE_TLV_DB_SCALE(
+        cs8409_cs42l42_amic_db_scale,
+        CS8409_CS42L42_AMIC_VOL_REAL_MIN * 100, 100, 1);
+
+static const struct snd_kcontrol_new cs8409_cs42l42_hp_volume_mixer = {
+        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+        .index = 0,
+        .name = "Headphone Playback Volume",
+        .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG),
+        .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE
+                         | SNDRV_CTL_ELEM_ACCESS_TLV_READ),
+        .info = cs8409_cs42l42_volume_info,
+        .get = cs8409_cs42l42_volume_get,
+        .put = cs8409_cs42l42_volume_put,
+        .tlv = { .p = cs8409_cs42l42_hp_db_scale },
+        .private_value = HDA_COMPOSE_AMP_VAL(
+                CS8409_CS42L42_HP_PIN_NID, 3, 0, HDA_OUTPUT)
+                | HDA_AMP_VAL_MIN_MUTE
+};
+
+static const struct snd_kcontrol_new cs8409_cs42l42_amic_volume_mixer = {
+        .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+        .index = 0,
+        .name = "Mic Capture Volume",
+        .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG),
+        .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE
+                         | SNDRV_CTL_ELEM_ACCESS_TLV_READ),
+        .info = cs8409_cs42l42_volume_info,
+        .get = cs8409_cs42l42_volume_get,
+        .put = cs8409_cs42l42_volume_put,
+        .tlv = { .p = cs8409_cs42l42_amic_db_scale },
+        .private_value = HDA_COMPOSE_AMP_VAL(
+                CS8409_CS42L42_AMIC_PIN_NID, 1, 0, HDA_INPUT)
+                | HDA_AMP_VAL_MIN_MUTE
+};
+
+/* Assert/release RTS# line to CS42L42 */
+static void cs8409_cs42l42_reset(struct hda_codec *codec)
+{
+        struct cs_spec *spec = codec->spec;
+
+        /* Assert RTS# line */
+        snd_hda_codec_write(codec,
+                        codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, 0);
+        /* wait ~10ms */
+        usleep_range(10000, 15000);
+        /* Release RTS# line */
+        snd_hda_codec_write(codec,
+                        codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, GPIO5_INT);
+        /* wait ~10ms */
+        usleep_range(10000, 15000);
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+
+        /* Clear interrupts, by reading interrupt status registers */
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1);
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1309, 1);
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130A, 1);
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130F, 1);
+
+        mutex_unlock(&spec->cs8409_i2c_mux);
+
+}
+
+/* Configure CS42L42 slave codec for jack autodetect */
+static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec)
+{
+        struct cs_spec *spec = codec->spec;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+
+        /* Set TIP_SENSE_EN for analog front-end of tip sense. */
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b70, 0x0020, 1);
+        /* Clear WAKE# */
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b71, 0x0001, 1);
+        /* Wait ~2.5ms */
+        usleep_range(2500, 3000);
+        /* Set mode WAKE# output follows the combination logic directly */
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b71, 0x0020, 1);
+        /* Clear interrupts status */
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1);
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1);
+        /* Enable interrupt */
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0x03, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b79, 0x00, 1);
+
+        mutex_unlock(&spec->cs8409_i2c_mux);
+}
+
+/* Enable and run CS42L42 slave codec jack auto detect */
+static void cs8409_cs42l42_run_jack_detect(struct hda_codec *codec)
+{
+        struct cs_spec *spec = codec->spec;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+
+        /* Clear interrupts */
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1);
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b77, 1);
+
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1102, 0x87, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1f06, 0x86, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b74, 0x07, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0x01, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1120, 0x80, 1);
+        /* Wait ~110ms*/
+        usleep_range(110000, 200000);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x111f, 0x77, 1);
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1120, 0xc0, 1);
+        /* Wait ~10ms */
+        usleep_range(10000, 25000);
+
+        mutex_unlock(&spec->cs8409_i2c_mux);
+
+}
+
+static void cs8409_cs42l42_reg_setup(struct hda_codec *codec)
+{
+        const struct cs8409_i2c_param *seq = cs42l42_init_reg_seq;
+        struct cs_spec *spec = codec->spec;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+
+        for (; seq->addr; seq++)
+                cs8409_i2c_write(codec, CS42L42_I2C_ADDR, seq->addr, seq->reg, 1);
+
+        mutex_unlock(&spec->cs8409_i2c_mux);
+
+}
+
+/*
+ * In the case of CS8409 we do not have unsolicited events from NID's 0x24
+ * and 0x34 where hs mic and hp are connected. Companion codec CS42L42 will
+ * generate interrupt via gpio 4 to notify jack events. We have to overwrite
+ * generic snd_hda_jack_unsol_event(), read CS42L42 jack detect status registers
+ * and then notify status via generic snd_hda_jack_unsol_event() call.
+ */
+static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
+{
+        struct cs_spec *spec = codec->spec;
+        int status_changed = 0;
+        int reg_cdc_status;
+        int reg_hs_status;
+        int reg_ts_status;
+        int type;
+        struct hda_jack_tbl *jk;
+
+        /* jack_unsol_event() will be called every time gpio line changing state.
+         * In this case gpio4 line goes up as a result of reading interrupt status
+         * registers in previous cs8409_jack_unsol_event() call.
+         * We don't need to handle this event, ignoring...
+         */
+        if ((res & (1 << 4)))
+                return;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+
+        /* Read jack detect status registers */
+        reg_cdc_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1);
+        reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124, 1);
+        reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1);
+
+        /* Clear interrupts, by reading interrupt status registers */
+        cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1);
+
+        mutex_unlock(&spec->cs8409_i2c_mux);
+
+        /* If status values are < 0, read error has occurred. */
+        if (reg_cdc_status < 0 || reg_hs_status < 0 || reg_ts_status < 0)
+                return;
+
+        /* HSDET_AUTO_DONE */
+        if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) {
+
+                type = ((reg_hs_status & CS42L42_HSTYPE_MASK) + 1);
+                /* CS42L42 reports optical jack as type 4
+                 * We don't handle optical jack
+                 */
+                if (type != 4) {
+                        if (!spec->cs42l42_hp_jack_in) {
+                                status_changed = 1;
+                                spec->cs42l42_hp_jack_in = 1;
+                        }
+                        /* type = 3 has no mic */
+                        if ((!spec->cs42l42_mic_jack_in) && (type != 3)) {
+                                status_changed = 1;
+                                spec->cs42l42_mic_jack_in = 1;
+                        }
+                } else {
+                        if (spec->cs42l42_hp_jack_in || spec->cs42l42_mic_jack_in) {
+                                status_changed = 1;
+                                spec->cs42l42_hp_jack_in = 0;
+                                spec->cs42l42_mic_jack_in = 0;
+                        }
+                }
+
+        } else {
+                /* TIP_SENSE INSERT/REMOVE */
+                switch (reg_ts_status) {
+                case CS42L42_JACK_INSERTED:
+                        cs8409_cs42l42_run_jack_detect(codec);
+                        break;
+
+                case CS42L42_JACK_REMOVED:
+                        if (spec->cs42l42_hp_jack_in || spec->cs42l42_mic_jack_in) {
+                                status_changed = 1;
+                                spec->cs42l42_hp_jack_in = 0;
+                                spec->cs42l42_mic_jack_in = 0;
+                        }
+                        break;
+
+                default:
+                        /* jack in transition */
+                        status_changed = 0;
+                        break;
+                }
+        }
+
+        if (status_changed) {
+
+                snd_hda_set_pin_ctl(codec, CS8409_CS42L42_SPK_PIN_NID,
+                                spec->cs42l42_hp_jack_in ? 0 : PIN_OUT);
+
+                /* Report jack*/
+                jk = snd_hda_jack_tbl_get_mst(codec, CS8409_CS42L42_HP_PIN_NID, 0);
+                if (jk) {
+                        snd_hda_jack_unsol_event(codec,
+                                (jk->tag << AC_UNSOL_RES_TAG_SHIFT) & AC_UNSOL_RES_TAG);
+                }
+                /* Report jack*/
+                jk = snd_hda_jack_tbl_get_mst(codec, CS8409_CS42L42_AMIC_PIN_NID, 0);
+                if (jk) {
+                        snd_hda_jack_unsol_event(codec,
+                                (jk->tag << AC_UNSOL_RES_TAG_SHIFT) & AC_UNSOL_RES_TAG);
+                }
+        }
+}
+
+#ifdef CONFIG_PM
+/* Manage PDREF, when transition to D3hot */
+static int cs8409_suspend(struct hda_codec *codec)
+{
+        struct cs_spec *spec = codec->spec;
+
+        mutex_lock(&spec->cs8409_i2c_mux);
+        /* Power down CS42L42 ASP/EQ/MIX/HP */
+        cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe, 1);
+        mutex_unlock(&spec->cs8409_i2c_mux);
+        /* Assert CS42L42 RTS# line */
+        snd_hda_codec_write(codec,
+                        codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, 0);
+
+        snd_hda_shutup_pins(codec);
+
+        return 0;
+}
+#endif
+
+/* Enable/Disable Unsolicited Response for gpio(s) 3,4 */
+static void cs8409_enable_ur(struct hda_codec *codec, int flag)
+{
+        /* GPIO4 INT# and GPIO3 WAKE# */
+        snd_hda_codec_write(codec, codec->core.afg,
+                        0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK,
+                        flag ? (GPIO3_INT | GPIO4_INT) : 0);
+
+        snd_hda_codec_write(codec, codec->core.afg,
+                        0, AC_VERB_SET_UNSOLICITED_ENABLE,
+                        flag ? AC_UNSOL_ENABLED : 0);
+
+}
+
+/* Vendor specific HW configuration
+ * PLL, ASP, I2C, SPI, GPIOs, DMIC etc...
+ */
+static void cs8409_cs42l42_hw_init(struct hda_codec *codec)
+{
+        const struct cs8409_cir_param *seq = cs8409_cs42l42_hw_cfg;
+        const struct cs8409_cir_param *seq_bullseye = cs8409_cs42l42_bullseye_atn;
+        struct cs_spec *spec = codec->spec;
+
+        if (spec->gpio_mask) {
+                snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
+                                    spec->gpio_mask);
+                snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
+                                    spec->gpio_dir);
+                snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
+                                    spec->gpio_data);
+        }
+
+        for (; seq->nid; seq++)
+                cs_vendor_coef_set(codec, seq->cir, seq->coeff);
+
+        if (codec->fixup_id == CS8409_BULLSEYE)
+                for (; seq_bullseye->nid; seq_bullseye++)
+                        cs_vendor_coef_set(codec, seq_bullseye->cir, seq_bullseye->coeff);
+
+        /* Disable Unsolicited Response during boot */
+        cs8409_enable_ur(codec, 0);
+
+        /* Reset CS42L42 */
+        cs8409_cs42l42_reset(codec);
+
+        /* Initialise CS42L42 companion codec */
+        cs8409_cs42l42_reg_setup(codec);
+
+        if (codec->fixup_id == CS8409_WARLOCK ||
+                        codec->fixup_id == CS8409_CYBORG) {
+                /* FULL_SCALE_VOL = 0 for Warlock / Cyborg */
+                mutex_lock(&spec->cs8409_i2c_mux);
+                cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x2001, 0x01, 1);
+                mutex_unlock(&spec->cs8409_i2c_mux);
+                /* DMIC1_MO=00b, DMIC1/2_SR=1 */
+                cs_vendor_coef_set(codec, 0x09, 0x0003);
+        }
+
+        /* Restore Volumes after Resume */
+        if (spec->cs42l42_volume_init) {
+                mutex_lock(&spec->cs8409_i2c_mux);
+                cs8409_i2c_write(codec, CS42L42_I2C_ADDR,
+                                        CS8409_CS42L42_REG_HS_VOLUME_CHA,
+                                        -spec->cs42l42_hp_volume[0],
+                                        1);
+                cs8409_i2c_write(codec, CS42L42_I2C_ADDR,
+                                        CS8409_CS42L42_REG_HS_VOLUME_CHB,
+                                        -spec->cs42l42_hp_volume[1],
+                                        1);
+                cs8409_i2c_write(codec, CS42L42_I2C_ADDR,
+                                        CS8409_CS42L42_REG_AMIC_VOLUME,
+                                        spec->cs42l42_hs_mic_volume[0],
+                                        1);
+                mutex_unlock(&spec->cs8409_i2c_mux);
+        }
+
+        cs8409_cs42l42_update_volume(codec);
+
+        cs8409_cs42l42_enable_jack_detect(codec);
+
+        /* Enable Unsolicited Response */
+        cs8409_enable_ur(codec, 1);
+}
+
+static int cs8409_cs42l42_init(struct hda_codec *codec)
+{
+        int ret = snd_hda_gen_init(codec);
+
+        if (!ret)
+                snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_INIT);
+
+        return ret;
+}
+
+static const struct hda_codec_ops cs8409_cs42l42_patch_ops = {
+        .build_controls = cs_build_controls,
+        .build_pcms = snd_hda_gen_build_pcms,
+        .init = cs8409_cs42l42_init,
+        .free = cs_free,
+        .unsol_event = cs8409_jack_unsol_event,
+#ifdef CONFIG_PM
+        .suspend = cs8409_suspend,
+#endif
+};
+
+static void cs8409_cs42l42_fixups(struct hda_codec *codec,
+                                    const struct hda_fixup *fix, int action)
+{
+        struct cs_spec *spec = codec->spec;
+        int caps;
+
+        switch (action) {
+        case HDA_FIXUP_ACT_PRE_PROBE:
+                snd_hda_add_verbs(codec, cs8409_cs42l42_init_verbs);
+                /* verb exec op override */
+                spec->exec_verb = codec->core.exec_verb;
+                codec->core.exec_verb = cs8409_cs42l42_exec_verb;
+
+                mutex_init(&spec->cs8409_i2c_mux);
+
+                codec->patch_ops = cs8409_cs42l42_patch_ops;
+
+                spec->gen.suppress_auto_mute = 1;
+                spec->gen.no_primary_hp = 1;
+                spec->gen.suppress_vmaster = 1;
+
+                /* GPIO 5 out, 3,4 in */
+                spec->gpio_dir = GPIO5_INT;
+                spec->gpio_data = 0;
+                spec->gpio_mask = 0x03f;
+
+                spec->cs42l42_hp_jack_in = 0;
+                spec->cs42l42_mic_jack_in = 0;
+
+                /* Basic initial sequence for specific hw configuration */
+                snd_hda_sequence_write(codec, cs8409_cs42l42_init_verbs);
+
+                /* CS8409 is simple HDA bridge and intended to be used with a remote
+                 * companion codec. Most of input/output PIN(s) have only basic
+                 * capabilities. NID(s) 0x24 and 0x34 have only OUTC and INC
+                 * capabilities and no presence detect capable (PDC) and call to
+                 * snd_hda_gen_build_controls() will mark them as non detectable
+                 * phantom jacks. However, in this configuration companion codec
+                 * CS42L42 is connected to these pins and it has jack detect
+                 * capabilities. We have to override pin capabilities,
+                 * otherwise they will not be created as input devices.
+                 */
+                caps = snd_hdac_read_parm(&codec->core, CS8409_CS42L42_HP_PIN_NID,
+                                AC_PAR_PIN_CAP);
+                if (caps >= 0)
+                        snd_hdac_override_parm(&codec->core,
+                                CS8409_CS42L42_HP_PIN_NID, AC_PAR_PIN_CAP,
+                                (caps | (AC_PINCAP_IMP_SENSE | AC_PINCAP_PRES_DETECT)));
+
+                caps = snd_hdac_read_parm(&codec->core, CS8409_CS42L42_AMIC_PIN_NID,
+                                AC_PAR_PIN_CAP);
+                if (caps >= 0)
+                        snd_hdac_override_parm(&codec->core,
+                                CS8409_CS42L42_AMIC_PIN_NID, AC_PAR_PIN_CAP,
+                                (caps | (AC_PINCAP_IMP_SENSE | AC_PINCAP_PRES_DETECT)));
+
+                snd_hda_override_wcaps(codec, CS8409_CS42L42_HP_PIN_NID,
+                        (get_wcaps(codec, CS8409_CS42L42_HP_PIN_NID) | AC_WCAP_UNSOL_CAP));
+
+                snd_hda_override_wcaps(codec, CS8409_CS42L42_AMIC_PIN_NID,
+                        (get_wcaps(codec, CS8409_CS42L42_AMIC_PIN_NID) | AC_WCAP_UNSOL_CAP));
+                break;
+        case HDA_FIXUP_ACT_PROBE:
+
+                /* Set initial DMIC volume to -26 dB */
+                snd_hda_codec_amp_init_stereo(codec, CS8409_CS42L42_DMIC_ADC_PIN_NID,
+                                HDA_INPUT, 0, 0xff, 0x19);
+                snd_hda_gen_add_kctl(&spec->gen,
+                        NULL, &cs8409_cs42l42_hp_volume_mixer);
+                snd_hda_gen_add_kctl(&spec->gen,
+                        NULL, &cs8409_cs42l42_amic_volume_mixer);
+                cs8409_cs42l42_hw_init(codec);
+                snd_hda_codec_set_name(codec, "CS8409/CS42L42");
+                break;
+        case HDA_FIXUP_ACT_INIT:
+                cs8409_cs42l42_hw_init(codec);
+                fallthrough;
+        case HDA_FIXUP_ACT_BUILD:
+                /* Run jack auto detect first time on boot
+                 * after controls have been added, to check if jack has
+                 * been already plugged in.
+                 * Run immediately after init.
+                 */
+                cs8409_cs42l42_run_jack_detect(codec);
+                usleep_range(100000, 150000);
+                break;
+        default:
+                break;
+        }
+}
+
+static int cs8409_cs42l42_exec_verb(struct hdac_device *dev,
+                unsigned int cmd, unsigned int flags, unsigned int *res)
+{
+        struct hda_codec *codec = container_of(dev, struct hda_codec, core);
+        struct cs_spec *spec = codec->spec;
+
+        unsigned int nid = ((cmd >> 20) & 0x07f);
+        unsigned int verb = ((cmd >> 8) & 0x0fff);
+
+        /* CS8409 pins have no AC_PINSENSE_PRESENCE
+         * capabilities. We have to intercept 2 calls for pins 0x24 and 0x34
+         * and return correct pin sense values for read_pin_sense() call from
+         * hda_jack based on CS42L42 jack detect status.
+         */
+        switch (nid) {
+        case CS8409_CS42L42_HP_PIN_NID:
+                if (verb == AC_VERB_GET_PIN_SENSE) {
+                        *res = (spec->cs42l42_hp_jack_in) ? AC_PINSENSE_PRESENCE : 0;
+                        return 0;
+                }
+                break;
+
+        case CS8409_CS42L42_AMIC_PIN_NID:
+                if (verb == AC_VERB_GET_PIN_SENSE) {
+                        *res = (spec->cs42l42_mic_jack_in) ? AC_PINSENSE_PRESENCE : 0;
+                        return 0;
+                }
+                break;
+
+        default:
+                break;
+        }
+
+        return spec->exec_verb(dev, cmd, flags, res);
+}
+
+static int patch_cs8409(struct hda_codec *codec)
+{
+        int err;
+
+        if (!cs_alloc_spec(codec, CS8409_VENDOR_NID))
+                return -ENOMEM;
+
+        snd_hda_pick_fixup(codec,
+                        cs8409_models, cs8409_fixup_tbl, cs8409_fixups);
+
+        codec_dbg(codec, "Picked ID=%d, VID=%08x, DEV=%08x\n",
+                        codec->fixup_id,
+                        codec->bus->pci->subsystem_vendor,
+                        codec->bus->pci->subsystem_device);
+
+        snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
+
+        err = cs_parse_auto_config(codec);
+        if (err < 0) {
+                cs_free(codec);
+                return err;
+        }
+
+        snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
+        return 0;
+}
 
 /*
@@ -1236 +2312 @@
         HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
         HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
+        HDA_CODEC_ENTRY(0x10138409, "CS8409", patch_cs8409),
         {0} /* terminator */
 };

GPL/trunk/alsa-kernel/pci/hda/patch_conexant.c

@@ -591 +591 @@
         if (action == HDA_FIXUP_ACT_PRE_PROBE) {
                 spec->mute_led_eapd = 0x1b;
-                spec->dynamic_eapd = 1;
+                spec->dynamic_eapd = true;
 #ifdef CONFIG_SND_HDA_GENERIC_LEDS
                 snd_hda_gen_add_mute_led_cdev(codec, cx_auto_vmaster_mute_led);

GPL/trunk/alsa-kernel/pci/hda/patch_hdmi.c

@@ -165 +165 @@
         bool dyn_pin_out;
         bool dyn_pcm_assign;
+        bool dyn_pcm_no_legacy;
         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
         /*
@@ -261 +262 @@
         }
 
-        codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
+        codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
         return -EINVAL;
 }
@@ -321 +322 @@
                         return cvt_idx;
 
-        codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
+        codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
         return -EINVAL;
 }
@@ -646 +647 @@
         int i;
 
+        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
                                                             != AC_DIPXMIT_BEST)
                 return false;
 
-        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
         for (i = 0; i < size; i++) {
                 val = snd_hda_codec_read(codec, pin_nid, 0,
@@ -695 +696 @@
                 dp_ai->CA               = ca;
         } else {
-                codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
-                            pin_nid);
+                codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
                 return;
         }
@@ -709 +709 @@
         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
                                         sizeof(ai))) {
-                codec_dbg(codec,
-                          "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
-                            pin_nid,
-                            active_channels, ca);
+                codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
+                          __func__, pin_nid, active_channels, ca);
                 hdmi_stop_infoframe_trans(codec, pin_nid);
                 hdmi_fill_audio_infoframe(codec, pin_nid,
@@ -804 +802 @@
 
         codec_dbg(codec,
-                "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
+                "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
@@ -882 +880 @@
                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
-                codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
+                codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
         }
 }
@@ -1129 +1127 @@
                         if (!per_cvt->assigned) {
                                 codec_dbg(codec,
-                                          "choose cvt %d for pin nid %d\n",
-                                        cvt_idx, nid);
+                                          "choose cvt %d for pin NID 0x%x\n",
+                                          cvt_idx, nid);
                                 snd_hda_codec_write_cache(codec, nid, 0,
                                             AC_VERB_SET_CONNECT_SEL,
@@ -1328 +1326 @@
         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
                 codec_warn(codec,
-                           "HDMI: pin %d wcaps %#x does not support connection list\n",
+                           "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
                            pin_nid, get_wcaps(codec, pin_nid));
                 return -EINVAL;
@@ -1355 +1353 @@
 {
         int i;
+
+        /* on the new machines, try to assign the pcm slot dynamically,
+         * not use the preferred fixed map (legacy way) anymore.
+         */
+        if (spec->dyn_pcm_no_legacy)
+                goto last_try;
 
         /*
@@ -1385 +1389 @@
         }
 
+ last_try:
         /* the last try; check the empty slots in pins */
         for (i = 0; i < spec->num_nids; i++) {
@@ -1643 +1648 @@
 
         codec_dbg(codec,
-                "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
+                "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
 
@@ -1851 +1856 @@
         if (spec->intel_hsw_fixup) {
                 /*
-                 * On Intel platforms, device entries number is
-                 * changed dynamically. If there is a DP MST
-                 * hub connected, the device entries number is 3.
-                 * Otherwise, it is 1.
-                 * Here we manually set dev_num to 3, so that
-                 * we can initialize all the device entries when
-                 * bootup statically.
+                 * On Intel platforms, device entries count returned
+                 * by AC_PAR_DEVLIST_LEN is dynamic, and depends on
+                 * the type of receiver that is connected. Allocate pin
+                 * structures based on worst case.
                  */
-                dev_num = 3;
-                spec->dev_num = 3;
+                dev_num = spec->dev_num;
         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
@@ -1947 +1948 @@
         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
+        SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
         {}
 };
@@ -2815 +2817 @@
         }
 
-        codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
+        codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
         return -1;
 }
@@ -2945 +2947 @@
 /* Intel Haswell and onwards; audio component with eld notifier */
 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
-                                 const int *port_map, int port_num)
+                                 const int *port_map, int port_num, int dev_num)
 {
         struct hdmi_spec *spec;
@@ -2960 +2962 @@
         spec->port_num = port_num;
         spec->intel_hsw_fixup = true;
+        spec->dev_num = dev_num;
 
         intel_haswell_enable_all_pins(codec, true);
@@ -2985 +2988 @@
 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
 {
-        return intel_hsw_common_init(codec, 0x08, NULL, 0);
+        return intel_hsw_common_init(codec, 0x08, NULL, 0, 3);
 }
 
 static int patch_i915_glk_hdmi(struct hda_codec *codec)
 {
-        return intel_hsw_common_init(codec, 0x0b, NULL, 0);
+        return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3);
 }
 
@@ -3001 +3004 @@
         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
 
-        return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
+        return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3);
 }
 
@@ -3011 +3014 @@
          */
         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
-
-        return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
+        int ret;
+
+        ret = intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4);
+        if (!ret) {
+                struct hdmi_spec *spec = codec->spec;
+
+                spec->dyn_pcm_no_legacy = true;
+        }
+
+        return ret;
 }
 

GPL/trunk/alsa-kernel/pci/hda/patch_realtek.c

@@ -299 +299 @@
 {
 #ifdef CONFIG_SND_HDA_GENERIC_LEDS
-        if (action == HDA_FIXUP_ACT_PROBE)
+        if (action == HDA_FIXUP_ACT_PRE_PROBE)
                 snd_hda_gen_add_micmute_led_cdev(codec, NULL);
 #endif
@@ -3776 +3776 @@
                 report |= SND_JACK_BTN_3;
 
-        jack->jack->button_state = report;
+        snd_hda_jack_set_button_state(codec, jack->nid, report);
 }
 
@@ -3839 +3839 @@
 {
         struct alc_spec *spec = codec->spec;
+        hda_nid_t hp_pin;
 
         switch (action) {
@@ -3845 +3846 @@
                 snd_hda_jack_detect_enable_callback(codec, 0x55,
                                                     alc_headset_btn_callback);
-                snd_hda_jack_add_kctl(codec, 0x55, "Headset Jack", false,
-                                      SND_JACK_HEADSET, alc_headset_btn_keymap);
-                break;
-        case HDA_FIXUP_ACT_INIT:
+                break;
+        case HDA_FIXUP_ACT_BUILD:
+                hp_pin = alc_get_hp_pin(spec);
+                if (!hp_pin || snd_hda_jack_bind_keymap(codec, 0x55,
+                                                        alc_headset_btn_keymap,
+                                                        hp_pin))
+                        snd_hda_jack_add_kctl(codec, 0x55, "Headset Jack",
+                                              false, SND_JACK_HEADSET,
+                                              alc_headset_btn_keymap);
+
                 alc_enable_headset_jack_key(codec);
                 break;
@@ -7036 +7043 @@
         }
 }
+#endif /* NOT_USED */
 
 static void alc285_fixup_hp_spectre_x360(struct hda_codec *codec,
@@ -7054 +7062 @@
         }
 }
-#endif /* NOT_USED */
 
 /* for hda_fixup_thinkpad_acpi() */
@@ -7275 +7282 @@
         ALC256_FIXUP_ACER_HEADSET_MIC,
         ALC285_FIXUP_IDEAPAD_S740_COEF,
+        ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST,
         ALC295_FIXUP_ASUS_DACS,
         ALC295_FIXUP_HP_OMEN,
@@ -8457 +8465 @@
                         {0}
                 },
-                .chained = true,
-                .chain_id = ALC289_FIXUP_ASUS_GA401,
         },
         [ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE] = {
@@ -8844 +8850 @@
                         { }
                 },
+                .chained = true,
+                .chain_id = ALC289_FIXUP_ASUS_GA401,
         },
 #endif
@@ -9117 +9125 @@
                 .chain_id = ALC269_FIXUP_THINKPAD_ACPI,
         },
+        [ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST] = {
+                .type = HDA_FIXUP_FUNC,
+                .v.func = alc269_fixup_limit_int_mic_boost,
+                .chained = true,
+                .chain_id = ALC285_FIXUP_HP_MUTE_LED,
+        },
         [ALC295_FIXUP_ASUS_DACS] = {
                 .type = HDA_FIXUP_FUNC,
@@ -9137 +9151 @@
                         { 0x1e, 0x411111f0 },
                         { 0x21, 0x03211020 },
-                        {0}
+                        {}
                 },
                 .chained = true,
                 .chain_id = ALC269_FIXUP_HP_LINE1_MIC1_LED,
         },
+#endif
         [ALC285_FIXUP_HP_SPECTRE_X360] = {
                 .type = HDA_FIXUP_FUNC,
                 .v.func = alc285_fixup_hp_spectre_x360,
         },
-#endif
         [ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP] = {
                 .type = HDA_FIXUP_FUNC,
@@ -9202 +9216 @@
         SND_PCI_QUIRK(0x1025, 0x1291, "Acer Veriton Z4660G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
         SND_PCI_QUIRK(0x1025, 0x129c, "Acer SWIFT SF314-55", ALC256_FIXUP_ACER_HEADSET_MIC),
+        SND_PCI_QUIRK(0x1025, 0x1300, "Acer SWIFT SF314-56", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1025, 0x1308, "Acer Aspire Z24-890", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
         SND_PCI_QUIRK(0x1025, 0x132a, "Acer TravelMate B114-21", ALC233_FIXUP_ACER_HEADSET_MIC),
         SND_PCI_QUIRK(0x1025, 0x1330, "Acer TravelMate X514-51T", ALC255_FIXUP_ACER_HEADSET_MIC),
+        SND_PCI_QUIRK(0x1025, 0x142b, "Acer Swift SF314-42", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1025, 0x1430, "Acer TravelMate B311R-31", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
         SND_PCI_QUIRK(0x1025, 0x1466, "Acer Aspire A515-56", ALC255_FIXUP_ACER_HEADPHONE_AND_MIC),
@@ -9369 +9385 @@
         SND_PCI_QUIRK(0x103c, 0x888d, "HP ZBook Power 15.6 inch G8 Mobile Workstation PC", ALC236_FIXUP_HP_GPIO_LED),
         SND_PCI_QUIRK(0x103c, 0x8896, "HP EliteBook 855 G8 Notebook PC", ALC285_FIXUP_HP_MUTE_LED),
+        SND_PCI_QUIRK(0x103c, 0x8898, "HP EliteBook 845 G8 Notebook PC", ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST),
+        SND_PCI_QUIRK(0x103c, 0x88d0, "HP Pavilion 15-eh1xxx (mainboard 88D0)", ALC287_FIXUP_HP_GPIO_LED),
         SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
         SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
@@ -9552 +9570 @@
         SND_PCI_QUIRK(0x17aa, 0x3176, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
         SND_PCI_QUIRK(0x17aa, 0x3178, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
+        SND_PCI_QUIRK(0x17aa, 0x31af, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340),
         SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940", ALC298_FIXUP_LENOVO_SPK_VOLUME),
         SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF),

GPL/trunk/alsa-kernel/pci/hda/patch_sigmatel.c

@@ -4379 +4379 @@
         spec->gen.automute_hook = stac_update_outputs;
 
+#ifndef TARGET_OS2
+        if (spec->gpio_led)
+                snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
+#endif
         err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
         if (err < 0)
@@ -4420 +4424 @@
 #endif
 
-#ifdef CONFIG_SND_HDA_GENERIC_LEDS
-        if (spec->gpio_led)
-                snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
-#endif
         if (spec->aloopback_ctl &&
             snd_hda_get_bool_hint(codec, "loopback") == 1) {

GPL/trunk/alsa-kernel/pci/hda/thinkpad_helper.c

@@ -19 +19 @@
                                     const struct hda_fixup *fix, int action)
 {
-        if (action == HDA_FIXUP_ACT_PROBE) {
+        if (action == HDA_FIXUP_ACT_PRE_PROBE) {
                 if (!is_thinkpad(codec))
                         return;