Changeset 692


Ignore:
Timestamp:
Aug 14, 2021, 8:10:20 AM (4 years ago)
Author:
Paul Smedley
Message:

Update linux source to 5.11.22

Location:
GPL/branches/uniaud32-next
Files:
49 edited

Legend:

Unmodified
Added
Removed
  • GPL/branches/uniaud32-next/alsa-kernel/core/compress_offload.c

    r629 r692  
    710710        int retval;
    711711
    712         if (stream->runtime->state != SNDRV_PCM_STATE_RUNNING)
     712        switch (stream->runtime->state) {
     713        case SNDRV_PCM_STATE_RUNNING:
     714                retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_PUSH);
     715                if (!retval)
     716                        stream->runtime->state = SNDRV_PCM_STATE_PAUSED;
     717                break;
     718        case SNDRV_PCM_STATE_DRAINING:
     719                if (!stream->device->use_pause_in_draining)
     720                        return -EPERM;
     721                retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_PUSH);
     722                if (!retval)
     723                        stream->pause_in_draining = true;
     724                break;
     725        default:
    713726                return -EPERM;
    714         retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_PUSH);
    715         if (!retval)
    716                 stream->runtime->state = SNDRV_PCM_STATE_PAUSED;
     727        }
    717728        return retval;
    718729}
     
    722733        int retval;
    723734
    724         if (stream->runtime->state != SNDRV_PCM_STATE_PAUSED)
     735        switch (stream->runtime->state) {
     736        case SNDRV_PCM_STATE_PAUSED:
     737                retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_RELEASE);
     738                if (!retval)
     739                        stream->runtime->state = SNDRV_PCM_STATE_RUNNING;
     740                break;
     741        case SNDRV_PCM_STATE_DRAINING:
     742                if (!stream->pause_in_draining)
     743                        return -EPERM;
     744                retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_RELEASE);
     745                if (!retval)
     746                        stream->pause_in_draining = false;
     747                break;
     748        default:
    725749                return -EPERM;
    726         retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_RELEASE);
    727         if (!retval)
    728                 stream->runtime->state = SNDRV_PCM_STATE_RUNNING;
     750        }
    729751        return retval;
    730752}
     
    769791                stream->partial_drain = false;
    770792                stream->metadata_set = false;
     793                stream->pause_in_draining = false;
    771794                snd_compr_drain_notify(stream);
    772795                stream->runtime->total_bytes_available = 0;
  • GPL/branches/uniaud32-next/alsa-kernel/core/init.c

    r685 r692  
    154154 *  @extra_size: allocate this extra size after the main soundcard structure
    155155 *  @card_ret: the pointer to store the created card instance
    156  *
    157  *  Creates and initializes a soundcard structure.
    158156 *
    159157 *  The function allocates snd_card instance via kzalloc with the given
  • GPL/branches/uniaud32-next/alsa-kernel/core/memalloc.c

    r629 r692  
    169169                return -ENXIO;
    170170
     171        size = PAGE_ALIGN(size);
    171172        dmab->dev.type = type;
    172173        dmab->dev.dev = device;
  • GPL/branches/uniaud32-next/alsa-kernel/core/pcm_lib.c

    r664 r692  
    11541154                struct snd_pcm_hw_rule *new;
    11551155                unsigned int new_rules = constrs->rules_all + 16;
    1156                 new = krealloc(constrs->rules, new_rules * sizeof(*c),
    1157                               GFP_KERNEL);
     1156                new = krealloc_array(constrs->rules, new_rules,
     1157                                     sizeof(*c), GFP_KERNEL);
    11581158
    11591159                if (!new) {
  • GPL/branches/uniaud32-next/alsa-kernel/core/pcm_memory.c

    r629 r692  
    9090}
    9191
    92 /*
    93  * release the preallocated buffer if not yet done.
    94  */
    95 static void snd_pcm_lib_preallocate_dma_free(struct snd_pcm_substream *substream)
    96 {
    97         do_free_pages(substream->pcm->card, &substream->dma_buffer);
    98 }
    99 
    10092/**
    10193 * snd_pcm_lib_preallocate_free - release the preallocated buffer of the specified substream.
     
    10698void snd_pcm_lib_preallocate_free(struct snd_pcm_substream *substream)
    10799{
    108         snd_pcm_lib_preallocate_dma_free(substream);
     100        do_free_pages(substream->pcm->card, &substream->dma_buffer);
    109101}
    110102
  • GPL/branches/uniaud32-next/alsa-kernel/core/pcm_native.c

    r691 r692  
    251251                return false;
    252252
    253         if (substream->ops->mmap)
     253        if (substream->ops->mmap ||
     254            (substream->dma_buffer.dev.type != SNDRV_DMA_TYPE_DEV &&
     255             substream->dma_buffer.dev.type != SNDRV_DMA_TYPE_DEV_UC))
    254256                return true;
    255257
    256         switch (substream->dma_buffer.dev.type) {
    257         case SNDRV_DMA_TYPE_UNKNOWN:
    258                 return false;
    259         case SNDRV_DMA_TYPE_CONTINUOUS:
    260         case SNDRV_DMA_TYPE_VMALLOC:
    261                 return true;
    262         default:
    263                 return dma_can_mmap(substream->dma_buffer.dev.dev);
    264         }
     258        return dma_can_mmap(substream->dma_buffer.dev.dev);
    265259}
    266260
     
    393387
    394388                /*
    395                  * The 'deps' array includes maximum three dependencies
    396                  * to SNDRV_PCM_HW_PARAM_XXXs for this rule. The fourth
     389                 * The 'deps' array includes maximum four dependencies
     390                 * to SNDRV_PCM_HW_PARAM_XXXs for this rule. The fifth
    397391                 * member of this array is a sentinel and should be
    398392                 * negative value.
     
    31123106        snd_pcm_stream_lock_irq(substream);
    31133107        /* FIXME: we should consider the boundary for the sync from app */
    3114         if (!(sflags & SNDRV_PCM_SYNC_PTR_APPL)) {
    3115                 err = pcm_lib_apply_appl_ptr(substream,
    3116                                 scontrol.appl_ptr);
    3117                 if (err < 0) {
    3118                         snd_pcm_stream_unlock_irq(substream);
    3119                         return err;
    3120                 }
    3121         } else
     3108        if (!(sflags & SNDRV_PCM_SYNC_PTR_APPL))
     3109                control->appl_ptr = scontrol.appl_ptr;
     3110        else
    31223111                scontrol.appl_ptr = control->appl_ptr % boundary;
    31233112        if (!(sflags & SNDRV_PCM_SYNC_PTR_AVAIL_MIN))
  • GPL/branches/uniaud32-next/alsa-kernel/core/seq/seq_clientmgr.c

    r644 r692  
    280280        snd_seq_queue_client_leave(client->number);
    281281        snd_use_lock_sync(&client->use_lock);
    282         snd_seq_queue_client_termination(client->number);
    283282        if (client->pool)
    284283                snd_seq_pool_delete(&client->pool);
  • GPL/branches/uniaud32-next/alsa-kernel/core/seq/seq_queue.c

    r615 r692  
    538538/*----------------------------------------------------------------*/
    539539
    540 /* notification that client has left the system -
    541  * stop the timer on all queues owned by this client
    542  */
    543 void snd_seq_queue_client_termination(int client)
    544 {
    545         unsigned long flags;
    546         int i;
    547         struct snd_seq_queue *q;
    548         bool matched;
    549 
    550         for (i = 0; i < SNDRV_SEQ_MAX_QUEUES; i++) {
    551                 if ((q = queueptr(i)) == NULL)
    552                         continue;
    553                 spin_lock_irqsave(&q->owner_lock, flags);
    554                 matched = (q->owner == client);
    555                 if (matched)
    556                         q->klocked = 1;
    557                 spin_unlock_irqrestore(&q->owner_lock, flags);
    558                 if (matched) {
    559                         if (q->timer->running)
    560                                 snd_seq_timer_stop(q->timer);
    561                         snd_seq_timer_reset(q->timer);
    562                 }
    563                 queuefree(q);
    564         }
    565 }
    566 
    567540/* final stage notification -
    568541 * remove cells for no longer exist client (for non-owned queue)
  • GPL/branches/uniaud32-next/alsa-kernel/core/seq/seq_queue.h

    r642 r692  
    6060int snd_seq_queue_delete(int client, int queueid);
    6161
    62 /* notification that client has left the system */
    63 void snd_seq_queue_client_termination(int client);
    64 
    6562/* final stage */
    6663void snd_seq_queue_client_leave(int client);
  • GPL/branches/uniaud32-next/alsa-kernel/core/seq/seq_timer.c

    r686 r692  
    298298        }
    299299        spin_lock_irq(&tmr->lock);
    300         if (tmr->timeri)
    301                 err = -EBUSY;
    302         else
    303                 tmr->timeri = t;
     300        tmr->timeri = t;
    304301        spin_unlock_irq(&tmr->lock);
    305         if (err < 0) {
    306                 snd_timer_close(t);
    307                 snd_timer_instance_free(t);
    308                 return err;
    309         }
    310302        return 0;
    311303}
  • GPL/branches/uniaud32-next/alsa-kernel/core/timer.c

    r686 r692  
    522522        if (timer->hw.flags & SNDRV_TIMER_HW_SLAVE)
    523523                return;
    524         event += 10; /* convert to SNDRV_TIMER_EVENT_MXXX */
    525524        list_for_each_entry(ts, &ti->slave_active_head, active_list, struct snd_timer_instance)
    526525                if (ts->ccallback)
    527                         ts->ccallback(ts, event, &tstamp, resolution);
     526                        ts->ccallback(ts, event + 100, &tstamp, resolution);
    528527}
    529528
  • GPL/branches/uniaud32-next/alsa-kernel/drivers/aloop.c

    r684 r692  
    106106        unsigned int pause;
    107107        /* timer specific */
    108         struct loopback_ops *ops;
     108        const struct loopback_ops *ops;
    109109        /* If sound timer is used */
    110110        struct {
     
    10221022}
    10231023
    1024 static struct loopback_ops loopback_jiffies_timer_ops = {
     1024static const struct loopback_ops loopback_jiffies_timer_ops = {
    10251025        .open = loopback_jiffies_timer_open,
    10261026        .start = loopback_jiffies_timer_start,
     
    11731173 * restarted in loopback_prepare() on Xrun recovery
    11741174 */
    1175 static struct loopback_ops loopback_snd_timer_ops = {
     1175static const struct loopback_ops loopback_snd_timer_ops = {
    11761176        .open = loopback_snd_timer_open,
    11771177        .start = loopback_snd_timer_start,
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/compress_driver.h

    r629 r692  
    6868 * @next_track: has userspace signal next track transition, true when set
    6969 * @partial_drain: undergoing partial_drain for stream, true when set
     70 * @pause_in_draining: paused during draining state, true when set
    7071 * @private_data: pointer to DSP private data
    7172 * @dma_buffer: allocated buffer if any
     
    8182        bool next_track;
    8283        bool partial_drain;
     84        bool pause_in_draining;
    8385        void *private_data;
    8486        struct snd_dma_buffer dma_buffer;
     
    143145 * @lock: device lock
    144146 * @device: device id
     147 * @use_pause_in_draining: allow pause in draining, true when set
    145148 */
    146149struct snd_compr {
     
    153156        struct mutex lock;
    154157        int device;
     158        bool use_pause_in_draining;
    155159#ifdef CONFIG_SND_VERBOSE_PROCFS
    156160        /* private: */
     
    166170int snd_compress_new(struct snd_card *card, int device,
    167171                        int type, const char *id, struct snd_compr *compr);
     172
     173/**
     174 * snd_compr_use_pause_in_draining - Allow pause and resume in draining state
     175 * @substream: compress substream to set
     176 *
     177 * Allow pause and resume in draining state.
     178 * Only HW driver supports this transition can call this API.
     179 */
     180static inline void snd_compr_use_pause_in_draining(struct snd_compr_stream *substream)
     181{
     182        substream->device->use_pause_in_draining = true;
     183}
    168184
    169185/* dsp driver callback apis
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/hda_codec.h

    r629 r692  
    345345        snd_hdac_get_connections(&(codec)->core, nid, list, max_conns)
    346346#define snd_hda_get_num_raw_conns(codec, nid) \
    347         snd_hdac_get_connections(&(codec)->core, nid, NULL, 0);
     347        snd_hdac_get_connections(&(codec)->core, nid, NULL, 0)
    348348
    349349int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/intel-dsp-config.h

    r630 r692  
    2222
    2323int snd_intel_dsp_driver_probe(struct pci_dev *pci);
     24int snd_intel_acpi_dsp_driver_probe(struct device *dev, const u8 acpi_hid[ACPI_ID_LEN]);
    2425
    2526#else
     
    3031}
    3132
     33static inline
     34int snd_intel_acpi_dsp_driver_probe(struct device *dev, const u8 acpi_hid[ACPI_ID_LEN])
     35{
     36        return SND_INTEL_DSP_DRIVER_ANY;
     37}
     38
    3239#endif
    3340
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/pcm.h

    r629 r692  
    230230        unsigned int cond;
    231231        int var;
    232         int deps[4];
     232        int deps[5];
    233233
    234234        snd_pcm_hw_rule_func_t func;
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/rt5682.h

    r629 r692  
    4141        unsigned int dmic_clk_rate;
    4242        unsigned int dmic_delay;
     43        bool dmic_clk_driving_high;
    4344
    4445        const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/simple_card_utils.h

    r629 r692  
    5757        struct snd_soc_codec_conf *codec_conf;
    5858        struct gpio_desc *pa_gpio;
     59        const struct snd_soc_ops *ops;
     60        unsigned int dpcm_selectable:1;
     61        unsigned int force_dpcm:1;
    5962};
    6063#define simple_priv_to_card(priv)       (&(priv)->snd_card)
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc-acpi-intel-match.h

    r629 r692  
    3030extern struct snd_soc_acpi_mach snd_soc_acpi_intel_ehl_machines[];
    3131extern struct snd_soc_acpi_mach snd_soc_acpi_intel_jsl_machines[];
     32extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_machines[];
    3233
    3334extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[];
     
    3637extern struct snd_soc_acpi_mach snd_soc_acpi_intel_icl_sdw_machines[];
    3738extern struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[];
     39extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_sdw_machines[];
    3840
    3941/*
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc-acpi.h

    r629 r692  
    172172};
    173173
     174static inline bool snd_soc_acpi_sof_parent(struct device *dev)
     175{
     176        return dev->parent && dev->parent->driver && dev->parent->driver->name &&
     177                !strcmp(dev->parent->driver->name, "sof-audio-acpi");
     178}
     179
    174180#endif
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc-component.h

    r629 r692  
    221221        struct snd_pcm_substream *mark_module;
    222222        struct snd_pcm_substream *mark_open;
     223        struct snd_pcm_substream *mark_hw_params;
     224        struct snd_pcm_substream *mark_trigger;
     225        struct snd_compr_stream  *mark_compr_open;
    223226        void *mark_pm;
    224227
     
    444447                                        struct of_phandle_args *args,
    445448                                        const char **dai_name);
     449int snd_soc_component_compr_open(struct snd_compr_stream *cstream);
     450void snd_soc_component_compr_free(struct snd_compr_stream *cstream,
     451                                  int rollback);
     452int snd_soc_component_compr_trigger(struct snd_compr_stream *cstream, int cmd);
     453int snd_soc_component_compr_set_params(struct snd_compr_stream *cstream,
     454                                       struct snd_compr_params *params);
     455int snd_soc_component_compr_get_params(struct snd_compr_stream *cstream,
     456                                       struct snd_codec *params);
     457int snd_soc_component_compr_get_caps(struct snd_compr_stream *cstream,
     458                                     struct snd_compr_caps *caps);
     459int snd_soc_component_compr_get_codec_caps(struct snd_compr_stream *cstream,
     460                                           struct snd_compr_codec_caps *codec);
     461int snd_soc_component_compr_ack(struct snd_compr_stream *cstream, size_t bytes);
     462int snd_soc_component_compr_pointer(struct snd_compr_stream *cstream,
     463                                    struct snd_compr_tstamp *tstamp);
     464int snd_soc_component_compr_copy(struct snd_compr_stream *cstream,
     465                                 char __user *buf, size_t count);
     466int snd_soc_component_compr_set_metadata(struct snd_compr_stream *cstream,
     467                                         struct snd_compr_metadata *metadata);
     468int snd_soc_component_compr_get_metadata(struct snd_compr_stream *cstream,
     469                                         struct snd_compr_metadata *metadata);
    446470
    447471int snd_soc_pcm_component_pointer(struct snd_pcm_substream *substream);
     
    460484int snd_soc_pcm_component_prepare(struct snd_pcm_substream *substream);
    461485int snd_soc_pcm_component_hw_params(struct snd_pcm_substream *substream,
    462                                     struct snd_pcm_hw_params *params,
    463                                     struct snd_soc_component **last);
     486                                    struct snd_pcm_hw_params *params);
    464487void snd_soc_pcm_component_hw_free(struct snd_pcm_substream *substream,
    465                                    struct snd_soc_component *last);
     488                                   int rollback);
    466489int snd_soc_pcm_component_trigger(struct snd_pcm_substream *substream,
    467                                   int cmd);
     490                                  int cmd, int rollback);
    468491int snd_soc_pcm_component_pm_runtime_get(struct snd_soc_pcm_runtime *rtd,
    469492                                         void *stream);
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc-dai.h

    r629 r692  
    7373
    7474/*
    75  * DAI hardware clock masters.
     75 * DAI hardware clock providers/consumers
    7676 *
    7777 * This is wrt the codec, the inverse is true for the interface
    78  * i.e. if the codec is clk and FRM master then the interface is
    79  * clk and frame secondary.
    80  */
    81 #define SND_SOC_DAIFMT_CBM_CFM          (1 << 12) /* codec clk & FRM master */
    82 #define SND_SOC_DAIFMT_CBS_CFM          (2 << 12) /* codec clk secondary & FRM master */
    83 #define SND_SOC_DAIFMT_CBM_CFS          (3 << 12) /* codec clk master & frame secondary */
    84 #define SND_SOC_DAIFMT_CBS_CFS          (4 << 12) /* codec clk & FRM secondary */
    85 
    86 #define SND_SOC_DAIFMT_FORMAT_MASK      0x000f
    87 #define SND_SOC_DAIFMT_CLOCK_MASK       0x00f0
    88 #define SND_SOC_DAIFMT_INV_MASK         0x0f00
    89 #define SND_SOC_DAIFMT_MASTER_MASK      0xf000
     78 * i.e. if the codec is clk and FRM provider then the interface is
     79 * clk and frame consumer.
     80 */
     81#define SND_SOC_DAIFMT_CBP_CFP          (1 << 12) /* codec clk provider & frame provider */
     82#define SND_SOC_DAIFMT_CBC_CFP          (2 << 12) /* codec clk consumer & frame provider */
     83#define SND_SOC_DAIFMT_CBP_CFC          (3 << 12) /* codec clk provider & frame consumer */
     84#define SND_SOC_DAIFMT_CBC_CFC          (4 << 12) /* codec clk consumer & frame follower */
     85
     86/* previous definitions kept for backwards-compatibility, do not use in new contributions */
     87#define SND_SOC_DAIFMT_CBM_CFM          SND_SOC_DAIFMT_CBP_CFP
     88#define SND_SOC_DAIFMT_CBS_CFM          SND_SOC_DAIFMT_CBC_CFP
     89#define SND_SOC_DAIFMT_CBM_CFS          SND_SOC_DAIFMT_CBP_CFC
     90#define SND_SOC_DAIFMT_CBS_CFS          SND_SOC_DAIFMT_CBC_CFC
     91
     92#define SND_SOC_DAIFMT_FORMAT_MASK              0x000f
     93#define SND_SOC_DAIFMT_CLOCK_MASK               0x00f0
     94#define SND_SOC_DAIFMT_INV_MASK                 0x0f00
     95#define SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK      0xf000
     96
     97#define SND_SOC_DAIFMT_MASTER_MASK      SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK
    9098
    9199/*
     
    150158                          struct snd_pcm_hw_params *params);
    151159void snd_soc_dai_hw_free(struct snd_soc_dai *dai,
    152                          struct snd_pcm_substream *substream);
     160                         struct snd_pcm_substream *substream,
     161                         int rollback);
    153162int snd_soc_dai_startup(struct snd_soc_dai *dai,
    154163                        struct snd_pcm_substream *substream);
     
    181190int snd_soc_pcm_dai_new(struct snd_soc_pcm_runtime *rtd);
    182191int snd_soc_pcm_dai_prepare(struct snd_pcm_substream *substream);
    183 int snd_soc_pcm_dai_trigger(struct snd_pcm_substream *substream, int cmd);
     192int snd_soc_pcm_dai_trigger(struct snd_pcm_substream *substream, int cmd,
     193                            int rollback);
    184194int snd_soc_pcm_dai_bespoke_trigger(struct snd_pcm_substream *substream,
    185195                                    int cmd);
     
    188198                              struct snd_compr_stream *cstream);
    189199void snd_soc_dai_compr_shutdown(struct snd_soc_dai *dai,
    190                                 struct snd_compr_stream *cstream);
     200                                struct snd_compr_stream *cstream,
     201                                int rollback);
    191202int snd_soc_dai_compr_trigger(struct snd_soc_dai *dai,
    192203                              struct snd_compr_stream *cstream, int cmd);
     
    391402        /* function mark */
    392403        struct snd_pcm_substream *mark_startup;
     404        struct snd_pcm_substream *mark_hw_params;
     405        struct snd_pcm_substream *mark_trigger;
     406        struct snd_compr_stream  *mark_compr_startup;
    393407
    394408        /* bit field */
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc-topology.h

    r615 r692  
    3131struct snd_soc_dai;
    3232struct snd_soc_dapm_route;
    33 
    34 /* object scan be loaded and unloaded in groups with identfying indexes */
    35 #define SND_SOC_TPLG_INDEX_ALL  0       /* ID that matches all FW objects */
    3633
    3734/* dynamic object type */
     
    182179/* Dynamic Object loading and removal for component drivers */
    183180int snd_soc_tplg_component_load(struct snd_soc_component *comp,
    184         struct snd_soc_tplg_ops *ops, const struct firmware *fw,
    185         u32 index);
    186 int snd_soc_tplg_component_remove(struct snd_soc_component *comp, u32 index);
    187 
    188 /* Widget removal - widgets also removed wth component API */
    189 void snd_soc_tplg_widget_remove(struct snd_soc_dapm_widget *w);
    190 void snd_soc_tplg_widget_remove_all(struct snd_soc_dapm_context *dapm,
    191         u32 index);
     181        struct snd_soc_tplg_ops *ops, const struct firmware *fw);
     182int snd_soc_tplg_component_remove(struct snd_soc_component *comp);
    192183
    193184/* Binds event handlers to dynamic widgets */
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/soc.h

    r629 r692  
    491491        const struct snd_pcm_hardware *hw);
    492492
    493 /* Jack reporting */
    494 void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
    495 int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
    496                           struct snd_soc_jack_pin *pins);
    497 void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
    498                                     struct notifier_block *nb);
    499 void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
    500                                       struct notifier_block *nb);
    501 int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
    502                           struct snd_soc_jack_zone *zones);
    503 int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
    504 #ifdef CONFIG_GPIOLIB
    505 int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
    506                         struct snd_soc_jack_gpio *gpios);
    507 int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
    508                             struct snd_soc_jack *jack,
    509                             int count, struct snd_soc_jack_gpio *gpios);
    510 void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
    511                         struct snd_soc_jack_gpio *gpios);
    512 #else
    513 static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
    514                                          struct snd_soc_jack_gpio *gpios)
    515 {
    516         return 0;
    517 }
    518 
    519 static inline int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
    520                                           struct snd_soc_jack *jack,
    521                                           int count,
    522                                           struct snd_soc_jack_gpio *gpios)
    523 {
    524         return 0;
    525 }
    526 
    527 static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
    528                                            struct snd_soc_jack_gpio *gpios)
    529 {
    530 }
    531 #endif
    532 
    533493struct snd_ac97 *snd_soc_alloc_ac97_component(struct snd_soc_component *component);
    534494struct snd_ac97 *snd_soc_new_ac97_component(struct snd_soc_component *component,
     
    617577        struct snd_ctl_elem_value *ucontrol);
    618578
    619 /**
    620  * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
    621  *
    622  * @pin:    name of the pin to update
    623  * @mask:   bits to check for in reported jack status
    624  * @invert: if non-zero then pin is enabled when status is not reported
    625  * @list:   internal list entry
    626  */
    627 struct snd_soc_jack_pin {
    628         struct list_head list;
    629         const char *pin;
    630         int mask;
    631         bool invert;
    632 };
    633 
    634 /**
    635  * struct snd_soc_jack_zone - Describes voltage zones of jack detection
    636  *
    637  * @min_mv: start voltage in mv
    638  * @max_mv: end voltage in mv
    639  * @jack_type: type of jack that is expected for this voltage
    640  * @debounce_time: debounce_time for jack, codec driver should wait for this
    641  *              duration before reading the adc for voltages
    642  * @list:   internal list entry
    643  */
    644 struct snd_soc_jack_zone {
    645         unsigned int min_mv;
    646         unsigned int max_mv;
    647         unsigned int jack_type;
    648         unsigned int debounce_time;
    649         struct list_head list;
    650 };
    651 
    652 /**
    653  * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
    654  *
    655  * @gpio:         legacy gpio number
    656  * @idx:          gpio descriptor index within the function of the GPIO
    657  *                consumer device
    658  * @gpiod_dev:    GPIO consumer device
    659  * @name:         gpio name. Also as connection ID for the GPIO consumer
    660  *                device function name lookup
    661  * @report:       value to report when jack detected
    662  * @invert:       report presence in low state
    663  * @debounce_time: debounce time in ms
    664  * @wake:         enable as wake source
    665  * @jack_status_check: callback function which overrides the detection
    666  *                     to provide more complex checks (eg, reading an
    667  *                     ADC).
    668  */
    669 struct snd_soc_jack_gpio {
    670         unsigned int gpio;
    671         unsigned int idx;
    672         struct device *gpiod_dev;
    673         const char *name;
    674         int report;
    675         int invert;
    676         int debounce_time;
    677         bool wake;
    678 
    679         /* private: */
    680         struct snd_soc_jack *jack;
    681         struct delayed_work work;
    682         struct notifier_block pm_notifier;
    683         struct gpio_desc *desc;
    684 
    685         void *data;
    686         /* public: */
    687         int (*jack_status_check)(void *data);
    688 };
    689 
    690 struct snd_soc_jack {
    691         struct mutex mutex;
    692         struct snd_jack *jack;
    693         struct snd_soc_card *card;
    694         struct list_head pins;
    695         int status;
    696         struct blocking_notifier_head notifier;
    697         struct list_head jack_zones;
    698 };
    699 
    700579/* SoC PCM stream information */
    701580struct snd_soc_pcm_stream {
     
    1085964        unsigned int disable_route_checks:1;
    1086965        unsigned int probed:1;
     966        unsigned int component_chaining:1;
    1087967
    1088968        void *drvdata;
     
    11621042        /* function mark */
    11631043        struct snd_pcm_substream *mark_startup;
     1044        struct snd_pcm_substream *mark_hw_params;
     1045        struct snd_pcm_substream *mark_trigger;
     1046        struct snd_compr_stream  *mark_compr_startup;
    11641047
    11651048        /* bit field */
     
    11841067             ((i) < rtd->num_cpus) && ((dai) = asoc_rtd_to_cpu(rtd, i)); \
    11851068             (i)++)
    1186 #define for_each_rtd_cpu_dais_rollback(rtd, i, dai)             \
    1187         for (; (--(i) >= 0) && ((dai) = asoc_rtd_to_cpu(rtd, i));)
    11881069#define for_each_rtd_codec_dais(rtd, i, dai)                            \
    11891070        for ((i) = 0;                                                   \
    11901071             ((i) < rtd->num_codecs) && ((dai) = asoc_rtd_to_codec(rtd, i)); \
    11911072             (i)++)
    1192 #define for_each_rtd_codec_dais_rollback(rtd, i, dai)           \
    1193         for (; (--(i) >= 0) && ((dai) = asoc_rtd_to_codec(rtd, i));)
    11941073#define for_each_rtd_dais(rtd, i, dai)                                  \
    11951074        for ((i) = 0;                                                   \
     
    11971076                     ((dai) = (rtd)->dais[i]);                          \
    11981077             (i)++)
    1199 #define for_each_rtd_dais_rollback(rtd, i, dai)         \
    1200         for (; (--(i) >= 0) && ((dai) = (rtd)->dais[i]);)
    12011078
    12021079void snd_soc_close_delayed_work(struct snd_soc_pcm_runtime *rtd);
     
    14191296#include <sound/soc-component.h>
    14201297#include <sound/soc-card.h>
     1298#include <sound/soc-jack.h>
    14211299
    14221300#endif
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/sof.h

    r629 r692  
    101101};
    102102
    103 int sof_nocodec_setup(struct device *dev,
    104                       const struct snd_sof_dsp_ops *ops);
     103int sof_nocodec_setup(struct device *dev, const struct snd_sof_dsp_ops *ops,
     104                      int (*pcm_dai_link_fixup)(struct snd_soc_pcm_runtime *rtd,
     105                                                struct snd_pcm_hw_params *params));
     106
    105107#endif
  • GPL/branches/uniaud32-next/alsa-kernel/include/sound/version.h

    r691 r692  
    11/* include/version.h */
    2 #define CONFIG_SND_VERSION "5.10.56"
     2#define CONFIG_SND_VERSION "5.11.22"
    33#define CONFIG_SND_DATE ""
  • GPL/branches/uniaud32-next/alsa-kernel/include/uapi/sound/asoc.h

    r615 r692  
    171171
    172172/* DAI topology BCLK parameter
    173  * For the backwards capability, by default codec is bclk master
    174  */
    175 #define SND_SOC_TPLG_BCLK_CM         0 /* codec is bclk master */
    176 #define SND_SOC_TPLG_BCLK_CS         1 /* codec is bclk slave */
     173 * For the backwards capability, by default codec is bclk provider
     174 */
     175#define SND_SOC_TPLG_BCLK_CP         0 /* codec is bclk provider */
     176#define SND_SOC_TPLG_BCLK_CC         1 /* codec is bclk consumer */
     177/* keep previous definitions for compatibility */
     178#define SND_SOC_TPLG_BCLK_CM         SND_SOC_TPLG_BCLK_CP
     179#define SND_SOC_TPLG_BCLK_CS         SND_SOC_TPLG_BCLK_CC
    177180
    178181/* DAI topology FSYNC parameter
    179  * For the backwards capability, by default codec is fsync master
    180  */
    181 #define SND_SOC_TPLG_FSYNC_CM         0 /* codec is fsync master */
    182 #define SND_SOC_TPLG_FSYNC_CS         1 /* codec is fsync slave */
     182 * For the backwards capability, by default codec is fsync provider
     183 */
     184#define SND_SOC_TPLG_FSYNC_CP         0 /* codec is fsync provider */
     185#define SND_SOC_TPLG_FSYNC_CC         1 /* codec is fsync consumer */
     186/* keep previous definitions for compatibility */
     187#define SND_SOC_TPLG_FSYNC_CM         SND_SOC_TPLG_FSYNC_CP
     188#define SND_SOC_TPLG_FSYNC_CS         SND_SOC_TPLG_FSYNC_CC
    183189
    184190/*
     
    337343        __u8 invert_bclk;       /* 1 for inverted BCLK, 0 for normal */
    338344        __u8 invert_fsync;      /* 1 for inverted frame clock, 0 for normal */
    339         __u8 bclk_master;       /* SND_SOC_TPLG_BCLK_ value */
    340         __u8 fsync_master;      /* SND_SOC_TPLG_FSYNC_ value */
     345        __u8 bclk_provider;     /* SND_SOC_TPLG_BCLK_ value */
     346        __u8 fsync_provider;    /* SND_SOC_TPLG_FSYNC_ value */
    341347        __u8 mclk_direction;    /* SND_SOC_TPLG_MCLK_ value */
    342348        __le16 reserved;        /* for 32bit alignment */
  • GPL/branches/uniaud32-next/alsa-kernel/include/uapi/sound/sof/abi.h

    r629 r692  
    2727/* SOF ABI version major, minor and patch numbers */
    2828#define SOF_ABI_MAJOR 3
    29 #define SOF_ABI_MINOR 17
     29#define SOF_ABI_MINOR 18
    3030#define SOF_ABI_PATCH 0
    3131
  • GPL/branches/uniaud32-next/alsa-kernel/isa/cmi8330.c

    r691 r692  
    549549        if (acard->sb->hardware != SB_HW_16) {
    550550                snd_printk(KERN_ERR PFX "SB16 not found during probe\n");
    551                 return -ENODEV;
     551                return err;
    552552        }
    553553
  • GPL/branches/uniaud32-next/alsa-kernel/isa/gus/gus_main.c

    r686 r692  
    7878static void snd_gus_init_control(struct snd_gus_card *gus)
    7979{
    80         if (!gus->ace_flag)
    81                 snd_ctl_add(gus->card, snd_ctl_new1(&snd_gus_joystick_control, gus));
     80        int ret;
     81
     82        if (!gus->ace_flag) {
     83                ret =
     84                        snd_ctl_add(gus->card,
     85                                        snd_ctl_new1(&snd_gus_joystick_control,
     86                                                gus));
     87                if (ret)
     88                        snd_printk(KERN_ERR "gus: snd_ctl_add failed: %d\n",
     89                                        ret);
     90        }
    8291}
    8392
  • GPL/branches/uniaud32-next/alsa-kernel/isa/sb/sb16_csp.c

    r691 r692  
    816816        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV, mixL & 0x7);
    817817        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV + 1, mixR & 0x7);
    818         spin_unlock_irqrestore(&p->chip->mixer_lock, flags);
    819818
    820819        spin_lock(&p->chip->reg_lock);
     
    856855
    857856        /* restore PCM volume */
    858         spin_lock_irqsave(&p->chip->mixer_lock, flags);
    859857        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV, mixL);
    860858        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV + 1, mixR);
     
    882880        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV, mixL & 0x7);
    883881        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV + 1, mixR & 0x7);
    884         spin_unlock_irqrestore(&p->chip->mixer_lock, flags);
    885882
    886883        spin_lock(&p->chip->reg_lock);
     
    897894
    898895        /* restore PCM volume */
    899         spin_lock_irqsave(&p->chip->mixer_lock, flags);
    900896        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV, mixL);
    901897        snd_sbmixer_write(p->chip, SB_DSP4_PCM_DEV + 1, mixR);
     
    10781074       
    10791075        down_write(&card->controls_rwsem);
    1080         if (p->qsound_switch) {
     1076        if (p->qsound_switch)
    10811077                snd_ctl_remove(card, p->qsound_switch);
    1082                 p->qsound_switch = NULL;
    1083         }
    1084         if (p->qsound_space) {
     1078        if (p->qsound_space)
    10851079                snd_ctl_remove(card, p->qsound_space);
    1086                 p->qsound_space = NULL;
    1087         }
    10881080        up_write(&card->controls_rwsem);
    10891081
  • GPL/branches/uniaud32-next/alsa-kernel/isa/sb/sb16_main.c

    r686 r692  
    847847        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
    848848
    849         if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
    850                 snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
    851         else
     849        if (chip->dma16 >= 0 && chip->dma8 != chip->dma16) {
     850                err = snd_ctl_add(card, snd_ctl_new1(
     851                                        &snd_sb16_dma_control, chip));
     852                if (err)
     853                        return err;
     854        } else {
    852855                pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
     856        }
    853857
    854858        snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
  • GPL/branches/uniaud32-next/alsa-kernel/isa/sb/sb8.c

    r685 r692  
    9797        /* block the 0x388 port to avoid PnP conflicts */
    9898        acard->fm_res = request_region(0x388, 4, "SoundBlaster FM");
     99        if (!acard->fm_res) {
     100                err = -EBUSY;
     101                goto _err;
     102        }
    99103
    100104        if (port[dev] != SNDRV_AUTO_PORT) {
  • GPL/branches/uniaud32-next/alsa-kernel/isa/sb/sb8_main.c

    r629 r692  
    507507                        runtime->hw.rate_max = 15000;
    508508                }
     509                break;
    509510        default:
    510511                break;
  • GPL/branches/uniaud32-next/alsa-kernel/pci/emu10k1/emu10k1x.c

    r629 r692  
    898898        if ((err = pci_enable_device(pci)) < 0)
    899899                return err;
    900         if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
    901             pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
     900
     901        if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28)) < 0) {
    902902                dev_err(card->dev, "error to set 28bit mask DMA\n");
    903903                pci_disable_device(pci);
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/hda_codec.c

    r686 r692  
    29892989static int hda_codec_pm_prepare(struct device *dev)
    29902990{
    2991         dev->power.power_state = PMSG_SUSPEND;
    29922991        return pm_runtime_suspended(dev);
    29932992}
     
    29972996        struct hda_codec *codec = dev_to_hda_codec(dev);
    29982997
    2999 #ifndef TARGET_OS2
    3000         /* If no other pm-functions are called between prepare() and complete() */
    3001         if (dev->power.power_state.event == PM_EVENT_SUSPEND)
    3002                 dev->power.power_state = PMSG_RESUME;
    3003 #endif
    30042998        if (pm_runtime_suspended(dev) && (codec->jackpoll_interval ||
    30052999            hda_codec_need_resume(codec) || codec->forced_resume))
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/hda_generic.c

    r685 r692  
    12061206                return "Headphone";
    12071207        case AUTO_PIN_LINE_OUT:
    1208                 /* This deals with the case where one HP or one Speaker or
    1209                  * one HP + one Speaker need to share the DAC with LO
    1210                  */
    1211                 if (!ch) {
    1212                         bool hp_lo_shared = false, spk_lo_shared = false;
    1213 
    1214                         if (cfg->speaker_outs)
    1215                                 spk_lo_shared = !path_has_mixer(codec,
    1216                                                                 spec->speaker_paths[0], ctl_type);
    1217                         if (cfg->hp_outs)
    1218                                 hp_lo_shared = !path_has_mixer(codec, spec->hp_paths[0], ctl_type);
     1208                /* This deals with the case where we have two DACs and
     1209                 * one LO, one HP and one Speaker */
     1210                if (!ch && cfg->speaker_outs && cfg->hp_outs) {
     1211                        bool hp_lo_shared = !path_has_mixer(codec, spec->hp_paths[0], ctl_type);
     1212                        bool spk_lo_shared = !path_has_mixer(codec, spec->speaker_paths[0], ctl_type);
    12191213                        if (hp_lo_shared && spk_lo_shared)
    12201214                                return spec->vmaster_mute.hook ? "PCM" : "Master";
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/hda_intel.c

    r684 r692  
    26662666        /* ATI HDMI */
    26672667        { PCI_DEVICE(0x1002, 0x0002),
    2668           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
     2668          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
     2669          AZX_DCAPS_PM_RUNTIME },
    26692670        { PCI_DEVICE(0x1002, 0x1308),
    26702671          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
     
    27282729          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
    27292730        { PCI_DEVICE(0x1002, 0xaac0),
    2730           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
     2731          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
     2732          AZX_DCAPS_PM_RUNTIME },
    27312733        { PCI_DEVICE(0x1002, 0xaac8),
    2732           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
     2734          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
     2735          AZX_DCAPS_PM_RUNTIME },
    27332736        { PCI_DEVICE(0x1002, 0xaad8),
    27342737          .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/hda_proc.c

    r629 r692  
    683683}
    684684
     685static void print_dpmst_connections(struct snd_info_buffer *buffer, struct hda_codec *codec,
     686                                    hda_nid_t nid, int dev_num)
     687{
     688        int c, conn_len, curr, dev_id_saved;
     689        hda_nid_t *conn;
     690
     691        conn_len = snd_hda_get_num_raw_conns(codec, nid);
     692        if (conn_len <= 0)
     693                return;
     694
     695        conn = kmalloc_array(conn_len, sizeof(hda_nid_t), GFP_KERNEL);
     696        if (!conn)
     697                return;
     698
     699        dev_id_saved = snd_hda_get_dev_select(codec, nid);
     700
     701        snd_hda_set_dev_select(codec, nid, dev_num);
     702        curr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONNECT_SEL, 0);
     703        if (snd_hda_get_raw_connections(codec, nid, conn, conn_len) < 0)
     704                goto out;
     705
     706        for (c = 0; c < conn_len; c++) {
     707                snd_iprintf(buffer, " 0x%02x", conn[c]);
     708                if (c == curr)
     709                        snd_iprintf(buffer, "*");
     710        }
     711
     712out:
     713        kfree(conn);
     714        snd_hda_set_dev_select(codec, nid, dev_id_saved);
     715}
     716
    685717static void print_device_list(struct snd_info_buffer *buffer,
    686718                            struct hda_codec *codec, hda_nid_t nid)
     
    706738
    707739                snd_iprintf(buffer,
    708                         "Dev %02d: PD = %d, ELDV = %d, IA = %d\n", i,
     740                        "Dev %02d: PD = %d, ELDV = %d, IA = %d, Connections [", i,
    709741                        !!(dev_list[i] & AC_DE_PD),
    710742                        !!(dev_list[i] & AC_DE_ELDV),
    711743                        !!(dev_list[i] & AC_DE_IA));
     744
     745                print_dpmst_connections(buffer, codec, nid, i);
     746
     747                snd_iprintf(buffer, " ]\n");
    712748        }
    713749}
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/hda_tegra.c

    r691 r692  
    303303        struct device_node *np = pdev->dev.of_node;
    304304
    305         if (irq_id < 0)
    306                 return irq_id;
    307 
    308305        err = hda_tegra_init_chip(chip, pdev);
    309306        if (err)
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/patch_ca0132.c

    r688 r692  
    790790        { .name = "Fast Roll Off",
    791791          .val = 0x80
     792        }
     793};
     794
     795/*
     796 * Data structures for storing audio router remapping data. These are used to
     797 * remap a currently active streams ports.
     798 */
     799struct chipio_stream_remap_data {
     800        unsigned int stream_id;
     801        unsigned int count;
     802
     803        unsigned int offset[16];
     804        unsigned int value[16];
     805};
     806
     807static const struct chipio_stream_remap_data stream_remap_data[] = {
     808        { .stream_id = 0x14,
     809          .count     = 0x04,
     810          .offset    = { 0x00, 0x04, 0x08, 0x0c },
     811          .value     = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
     812        },
     813        { .stream_id = 0x0c,
     814          .count     = 0x0c,
     815          .offset    = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
     816                         0x20, 0x24, 0x28, 0x2c },
     817          .value     = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
     818                         0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
     819                         0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
     820        },
     821        { .stream_id = 0x0c,
     822          .count     = 0x08,
     823          .offset    = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
     824          .value     = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
     825                         0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
    792826        }
    793827};
     
    18351869}
    18361870
     1871/*
     1872 * Get ChipIO audio stream's status.
     1873 */
     1874static void chipio_get_stream_control(struct hda_codec *codec,
     1875                                int streamid, unsigned int *enable)
     1876{
     1877        chipio_set_control_param_no_mutex(codec,
     1878                        CONTROL_PARAM_STREAM_ID, streamid);
     1879        *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
     1880                           VENDOR_CHIPIO_PARAM_GET,
     1881                           CONTROL_PARAM_STREAM_CONTROL);
     1882}
    18371883
    18381884/*
     
    18741920
    18751921/*
     1922 * Writes to the 8051's exram, which has 16-bits of address space.
     1923 * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
     1924 * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
     1925 * setting the pmem bank selection SFR.
     1926 * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
     1927 * being writable.
     1928 */
     1929static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr)
     1930{
     1931        unsigned int tmp;
     1932
     1933        /* Lower 8-bits. */
     1934        tmp = addr & 0xff;
     1935        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
     1936                            VENDOR_CHIPIO_8051_ADDRESS_LOW, tmp);
     1937
     1938        /* Upper 8-bits. */
     1939        tmp = (addr >> 8) & 0xff;
     1940        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
     1941                            VENDOR_CHIPIO_8051_ADDRESS_HIGH, tmp);
     1942}
     1943
     1944static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data)
     1945{
     1946        /* 8-bits of data. */
     1947        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
     1948                            VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff);
     1949}
     1950
     1951static unsigned int chipio_8051_get_data(struct hda_codec *codec)
     1952{
     1953        return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
     1954                                   VENDOR_CHIPIO_8051_DATA_READ, 0);
     1955}
     1956
     1957/* PLL_PMU writes share the lower address register of the 8051 exram writes. */
     1958static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data)
     1959{
     1960        /* 8-bits of data. */
     1961        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
     1962                            VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff);
     1963}
     1964
     1965static void chipio_8051_write_exram(struct hda_codec *codec,
     1966                unsigned int addr, unsigned int data)
     1967{
     1968        struct ca0132_spec *spec = codec->spec;
     1969
     1970        mutex_lock(&spec->chipio_mutex);
     1971
     1972        chipio_8051_set_address(codec, addr);
     1973        chipio_8051_set_data(codec, data);
     1974
     1975        mutex_unlock(&spec->chipio_mutex);
     1976}
     1977
     1978static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec,
     1979                unsigned int addr, unsigned int data)
     1980{
     1981        chipio_8051_set_address(codec, addr);
     1982        chipio_8051_set_data(codec, data);
     1983}
     1984
     1985/* Readback data from the 8051's exram. No mutex. */
     1986static void chipio_8051_read_exram(struct hda_codec *codec,
     1987                unsigned int addr, unsigned int *data)
     1988{
     1989        chipio_8051_set_address(codec, addr);
     1990        *data = chipio_8051_get_data(codec);
     1991}
     1992
     1993static void chipio_8051_write_pll_pmu(struct hda_codec *codec,
     1994                unsigned int addr, unsigned int data)
     1995{
     1996        struct ca0132_spec *spec = codec->spec;
     1997
     1998        mutex_lock(&spec->chipio_mutex);
     1999
     2000        chipio_8051_set_address(codec, addr & 0xff);
     2001        chipio_8051_set_data_pll(codec, data);
     2002
     2003        mutex_unlock(&spec->chipio_mutex);
     2004}
     2005
     2006static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec,
     2007                unsigned int addr, unsigned int data)
     2008{
     2009        chipio_8051_set_address(codec, addr & 0xff);
     2010        chipio_8051_set_data_pll(codec, data);
     2011}
     2012
     2013/*
    18762014 * Enable clocks.
    18772015 */
     
    18812019
    18822020        mutex_lock(&spec->chipio_mutex);
    1883         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1884                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0);
    1885         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1886                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
    1887         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1888                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 5);
    1889         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1890                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b);
    1891         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1892                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 6);
    1893         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    1894                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
     2021
     2022        chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff);
     2023        chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b);
     2024        chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff);
     2025
    18952026        mutex_unlock(&spec->chipio_mutex);
    18962027}
     
    23192450{
    23202451        return dspio_set_param(codec, mod_id, 0x20, req, &data,
    2321                         sizeof(unsigned int));
    2322 }
    2323 
    2324 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id,
    2325                         int req, const unsigned int data)
    2326 {
    2327         return dspio_set_param(codec, mod_id, 0x00, req, &data,
    23282452                        sizeof(unsigned int));
    23292453}
     
    74857609
    74867610        mutex_lock(&spec->chipio_mutex);
    7487         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7488                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
    7489         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7490                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
    7491         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7492                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
    7493         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7494                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D);
    7495         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7496                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
    7497         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7498                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
     7611
     7612        chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00);
     7613        chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00);
     7614
    74997615        mutex_unlock(&spec->chipio_mutex);
    75007616}
     
    75187634                refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
    75197635        }
     7636}
     7637
     7638
     7639/* If there is an active channel for some reason, find it and free it. */
     7640static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec)
     7641{
     7642        unsigned int i, tmp;
     7643        int status;
     7644
     7645        /* Read active DSPDMAC channel register. */
     7646        status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp);
     7647        if (status >= 0) {
     7648                /* AND against 0xfff to get the active channel bits. */
     7649                tmp = tmp & 0xfff;
     7650
     7651                /* If there are no active channels, nothing to free. */
     7652                if (!tmp)
     7653                        return;
     7654        } else {
     7655                codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n",
     7656                                __func__);
     7657                return;
     7658        }
     7659
     7660        /*
     7661         * Check each DSP DMA channel for activity, and if the channel is
     7662         * active, free it.
     7663         */
     7664        for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) {
     7665                if (dsp_is_dma_active(codec, i)) {
     7666                        status = dspio_free_dma_chan(codec, i);
     7667                        if (status < 0)
     7668                                codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n",
     7669                                                __func__, i);
     7670                }
     7671        }
     7672}
     7673
     7674/*
     7675 * In the case of CT_EXTENSIONS_ENABLE being set to 1, and the DSP being in
     7676 * use, audio is no longer routed directly to the DAC/ADC from the HDA stream.
     7677 * Instead, audio is now routed through the DSP's DMA controllers, which
     7678 * the DSP is tasked with setting up itself. Through debugging, it seems the
     7679 * cause of most of the no-audio on startup issues were due to improperly
     7680 * configured DSP DMA channels.
     7681 *
     7682 * Normally, the DSP configures these the first time an HDA audio stream is
     7683 * started post DSP firmware download. That is why creating a 'dummy' stream
     7684 * worked in fixing the audio in some cases. This works most of the time, but
     7685 * sometimes if a stream is started/stopped before the DSP can setup the DMA
     7686 * configuration registers, it ends up in a broken state. Issues can also
     7687 * arise if streams are started in an unusual order, i.e the audio output dma
     7688 * channel being sandwiched between the mic1 and mic2 dma channels.
     7689 *
     7690 * The solution to this is to make sure that the DSP has no DMA channels
     7691 * in use post DSP firmware download, and then to manually start each default
     7692 * DSP stream that uses the DMA channels. These are 0x0c, the audio output
     7693 * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
     7694 */
     7695static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec)
     7696{
     7697        const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 };
     7698        struct ca0132_spec *spec = codec->spec;
     7699        unsigned int i, tmp;
     7700
     7701        /*
     7702         * Check if any of the default streams are active, and if they are,
     7703         * stop them.
     7704         */
     7705        mutex_lock(&spec->chipio_mutex);
     7706
     7707        for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {
     7708                chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp);
     7709
     7710                if (tmp) {
     7711                        chipio_set_stream_control(codec,
     7712                                        dsp_dma_stream_ids[i], 0);
     7713                }
     7714        }
     7715
     7716        mutex_unlock(&spec->chipio_mutex);
     7717
     7718        /*
     7719         * If all DSP streams are inactive, there should be no active DSP DMA
     7720         * channels. Check and make sure this is the case, and if it isn't,
     7721         * free any active channels.
     7722         */
     7723        ca0132_alt_free_active_dma_channels(codec);
     7724
     7725        mutex_lock(&spec->chipio_mutex);
     7726
     7727        /* Make sure stream 0x0c is six channels. */
     7728        chipio_set_stream_channels(codec, 0x0c, 6);
     7729
     7730        for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {
     7731                chipio_set_stream_control(codec,
     7732                                dsp_dma_stream_ids[i], 1);
     7733
     7734                /* Give the DSP some time to setup the DMA channel. */
     7735                msleep(75);
     7736        }
     7737
     7738        mutex_unlock(&spec->chipio_mutex);
     7739}
     7740
     7741/*
     7742 * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
     7743 * router', where each entry represents a 48khz audio channel, with a format
     7744 * of an 8-bit destination, an 8-bit source, and an unknown 2-bit number
     7745 * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
     7746 * and 3 if it's using Sample Rate Converter ports.
     7747 * An example is:
     7748 * 0x0001f8c0
     7749 * In this case, f8 is the destination, and c0 is the source. The number value
     7750 * is 1.
     7751 * This region of memory is normally managed internally by the 8051, where
     7752 * the region of exram memory from 0x1477-0x1575 has each byte represent an
     7753 * entry within the 0x190000 range, and when a range of entries is in use, the
     7754 * ending value is overwritten with 0xff.
     7755 * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
     7756 * streamID's, where each entry is a starting 0x190000 port offset.
     7757 * 0x159d in exram is the same as 0x1578, except it contains the ending port
     7758 * offset for the corresponding streamID.
     7759 *
     7760 * On certain cards, such as the SBZ/ZxR/AE7, these are originally setup by
     7761 * the 8051, then manually overwritten to remap the ports to work with the
     7762 * new DACs.
     7763 *
     7764 * Currently known portID's:
     7765 * 0x00-0x1f: HDA audio stream input/output ports.
     7766 * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
     7767 *            have the lower-nibble set to 0x1, 0x2, and 0x9.
     7768 * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
     7769 * 0xe0-0xff: DAC/ADC audio input/output ports.
     7770 *
     7771 * Currently known streamID's:
     7772 * 0x03: Mic1 ADC to DSP.
     7773 * 0x04: Mic2 ADC to DSP.
     7774 * 0x05: HDA node 0x02 audio stream to DSP.
     7775 * 0x0f: DSP Mic exit to HDA node 0x07.
     7776 * 0x0c: DSP processed audio to DACs.
     7777 * 0x14: DAC0, front L/R.
     7778 *
     7779 * It is possible to route the HDA audio streams directly to the DAC and
     7780 * bypass the DSP entirely, with the only downside being that since the DSP
     7781 * does volume control, the only volume control you'll get is through PCM on
     7782 * the PC side, in the same way volume is handled for optical out. This may be
     7783 * useful for debugging.
     7784 */
     7785static void chipio_remap_stream(struct hda_codec *codec,
     7786                const struct chipio_stream_remap_data *remap_data)
     7787{
     7788        unsigned int i, stream_offset;
     7789
     7790        /* Get the starting port for the stream to be remapped. */
     7791        chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
     7792                        &stream_offset);
     7793
     7794        /*
     7795         * Check if the stream's port value is 0xff, because the 8051 may not
     7796         * have gotten around to setting up the stream yet. Wait until it's
     7797         * setup to remap it's ports.
     7798         */
     7799        if (stream_offset == 0xff) {
     7800                for (i = 0; i < 5; i++) {
     7801                        msleep(25);
     7802
     7803                        chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,
     7804                                        &stream_offset);
     7805
     7806                        if (stream_offset != 0xff)
     7807                                break;
     7808                }
     7809        }
     7810
     7811        if (stream_offset == 0xff) {
     7812                codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n",
     7813                                __func__, remap_data->stream_id);
     7814                return;
     7815        }
     7816
     7817        /* Offset isn't in bytes, its in 32-bit words, so multiply it by 4. */
     7818        stream_offset *= 0x04;
     7819        stream_offset += 0x190000;
     7820
     7821        for (i = 0; i < remap_data->count; i++) {
     7822                chipio_write_no_mutex(codec,
     7823                                stream_offset + remap_data->offset[i],
     7824                                remap_data->value[i]);
     7825        }
     7826
     7827        /* Update stream map configuration. */
     7828        chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
    75207829}
    75217830
     
    75807889                dspio_set_uint_param(codec, 0x96,
    75817890                                SPEAKER_TUNING_FRONT_LEFT_DELAY + i, values[i]);
    7582 }
    7583 
    7584 /*
    7585  * Creates a dummy stream to bind the output to. This seems to have to be done
    7586  * after changing the main outputs source and destination streams.
    7587  */
    7588 static void ca0132_alt_create_dummy_stream(struct hda_codec *codec)
    7589 {
    7590         struct ca0132_spec *spec = codec->spec;
    7591         unsigned int stream_format;
    7592 
    7593         stream_format = snd_hdac_calc_stream_format(48000, 2,
    7594                         SNDRV_PCM_FORMAT_S32_LE, 32, 0);
    7595 
    7596         snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id,
    7597                                         0, stream_format);
    7598 
    7599         snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
    76007891}
    76017892
     
    76417932        codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");
    76427933
    7643         chipio_set_stream_channels(codec, 0x0C, 6);
    7644         chipio_set_stream_control(codec, 0x0C, 1);
    7645 
    76467934        /* This value is 0x43 for 96khz, and 0x83 for 192khz. */
    76477935        chipio_write_no_mutex(codec, 0x18a020, 0x00000043);
     
    76677955static void sbz_chipio_startup_data(struct hda_codec *codec)
    76687956{
     7957        const struct chipio_stream_remap_data *dsp_out_remap_data;
    76697958        struct ca0132_spec *spec = codec->spec;
    76707959
     
    76727961        codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");
    76737962
    7674         /* These control audio output */
    7675         chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0);
    7676         chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1);
    7677         chipio_write_no_mutex(codec, 0x190068, 0x0001fac6);
    7678         chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7);
    7679         /* Signal to update I think */
    7680         chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
    7681 
    7682         chipio_set_stream_channels(codec, 0x0C, 6);
    7683         chipio_set_stream_control(codec, 0x0C, 1);
    7684         /* No clue what these control */
    7685         if (ca0132_quirk(spec) == QUIRK_SBZ) {
    7686                 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0);
    7687                 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1);
    7688                 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2);
    7689                 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3);
    7690                 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4);
    7691                 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5);
    7692                 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6);
    7693                 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7);
    7694                 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8);
    7695                 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9);
    7696                 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca);
    7697                 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb);
    7698         } else if (ca0132_quirk(spec) == QUIRK_ZXR) {
    7699                 chipio_write_no_mutex(codec, 0x190038, 0x000140c2);
    7700                 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3);
    7701                 chipio_write_no_mutex(codec, 0x190040, 0x000150c4);
    7702                 chipio_write_no_mutex(codec, 0x190044, 0x000151c5);
    7703                 chipio_write_no_mutex(codec, 0x190050, 0x000142c8);
    7704                 chipio_write_no_mutex(codec, 0x190054, 0x000143c9);
    7705                 chipio_write_no_mutex(codec, 0x190058, 0x000152ca);
    7706                 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb);
    7707         }
    7708         chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
     7963        /* Remap DAC0's output ports. */
     7964        chipio_remap_stream(codec, &stream_remap_data[0]);
     7965
     7966        /* Remap DSP audio output stream ports. */
     7967        switch (ca0132_quirk(spec)) {
     7968        case QUIRK_SBZ:
     7969                dsp_out_remap_data = &stream_remap_data[1];
     7970                break;
     7971
     7972        case QUIRK_ZXR:
     7973                dsp_out_remap_data = &stream_remap_data[2];
     7974                break;
     7975
     7976        default:
     7977                dsp_out_remap_data = NULL;
     7978                break;
     7979        }
     7980
     7981        if (dsp_out_remap_data)
     7982                chipio_remap_stream(codec, dsp_out_remap_data);
    77097983
    77107984        codec_dbg(codec, "Startup Data exited, mutex released.\n");
    77117985        mutex_unlock(&spec->chipio_mutex);
    7712 }
    7713 
    7714 /*
    7715  * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
    7716  * done after the DSP is loaded.
    7717  */
    7718 static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec)
    7719 {
    7720         struct ca0132_spec *spec = codec->spec;
    7721         unsigned int tmp, i;
    7722 
    7723         /*
    7724          * Gotta run these twice, or else mic works inconsistently. Not clear
    7725          * why this is, but multiple tests have confirmed it.
    7726          */
    7727         for (i = 0; i < 2; i++) {
    7728                 switch (ca0132_quirk(spec)) {
    7729                 case QUIRK_SBZ:
    7730                 case QUIRK_AE5:
    7731                 case QUIRK_AE7:
    7732                         tmp = 0x00000003;
    7733                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7734                         tmp = 0x00000000;
    7735                         dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
    7736                         tmp = 0x00000001;
    7737                         dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
    7738                         tmp = 0x00000004;
    7739                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7740                         tmp = 0x00000005;
    7741                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7742                         tmp = 0x00000000;
    7743                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7744                         break;
    7745                 case QUIRK_R3D:
    7746                 case QUIRK_R3DI:
    7747                         tmp = 0x00000000;
    7748                         dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
    7749                         tmp = 0x00000001;
    7750                         dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
    7751                         tmp = 0x00000004;
    7752                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7753                         tmp = 0x00000005;
    7754                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7755                         tmp = 0x00000000;
    7756                         dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
    7757                         break;
    7758                 default:
    7759                         break;
    7760                 }
    7761                 msleep(100);
    7762         }
    77637986}
    77647987
     
    77998022
    78008023        chipio_8051_write_direct(codec, 0x93, 0x10);
    7801         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7802                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
    7803         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7804                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
     8024        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
    78058025
    78068026        writeb(0xff, spec->mem_base + 0x304);
     
    78398059        chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
    78408060
    7841         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7842                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92);
    7843         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7844                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa);
    7845         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7846                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x22);
     8061        chipio_8051_write_exram(codec, 0xfa92, 0x22);
    78478062}
    78488063
    78498064static void ae5_post_dsp_pll_setup(struct hda_codec *codec)
    78508065{
    7851         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7852                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41);
    7853         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7854                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8);
    7855 
    7856         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7857                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45);
    7858         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7859                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc);
    7860 
    7861         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7862                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40);
    7863         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7864                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb);
    7865 
    7866         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7867                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
    7868         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7869                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
    7870 
    7871         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7872                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51);
    7873         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7874                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d);
     8066        chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
     8067        chipio_8051_write_pll_pmu(codec, 0x45, 0xcc);
     8068        chipio_8051_write_pll_pmu(codec, 0x40, 0xcb);
     8069        chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
     8070        chipio_8051_write_pll_pmu(codec, 0x51, 0x8d);
    78758071}
    78768072
     
    78848080
    78858081        chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
    7886 
    7887         chipio_set_stream_channels(codec, 0x0C, 6);
    7888         chipio_set_stream_control(codec, 0x0C, 1);
    78898082
    78908083        chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0);
     
    78978090        chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
    78988091
    7899         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7900                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
    7901         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    7902                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
     8092        chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
    79038093
    79048094        ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80);
     
    79398129}
    79408130
    7941 static const unsigned int ae7_port_set_data[] = {
    7942         0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
    7943         0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
    7944 };
    7945 
    79468131static void ae7_post_dsp_setup_ports(struct hda_codec *codec)
    79478132{
    79488133        struct ca0132_spec *spec = codec->spec;
    7949         unsigned int i, count, addr;
    79508134
    79518135        mutex_lock(&spec->chipio_mutex);
    79528136
    7953         chipio_set_stream_channels(codec, 0x0c, 6);
    7954         chipio_set_stream_control(codec, 0x0c, 1);
    7955 
    7956         count = ARRAY_SIZE(ae7_port_set_data);
    7957         addr = 0x190030;
    7958         for (i = 0; i < count; i++) {
    7959                 chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]);
    7960 
    7961                 /* Addresses are incremented by 4-bytes. */
    7962                 addr += 0x04;
    7963         }
    7964 
    7965         /*
    7966          * Port setting always ends with a write of 0x1 to address 0x19042c.
    7967          */
    7968         chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
     8137        /* Seems to share the same port remapping as the SBZ. */
     8138        chipio_remap_stream(codec, &stream_remap_data[1]);
    79698139
    79708140        ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
     
    79908160
    79918161        chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
    7992         chipio_set_stream_channels(codec, 0x0c, 6);
    7993         chipio_set_stream_control(codec, 0x0c, 1);
    79948162
    79958163        chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
     
    80158183        unsigned int i;
    80168184
    8017         for (i = 0; i < ARRAY_SIZE(addr); i++) {
    8018                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8019                                     VENDOR_CHIPIO_8051_ADDRESS_LOW, addr[i]);
    8020                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8021                                     VENDOR_CHIPIO_PLL_PMU_WRITE, data[i]);
    8022         }
     8185        for (i = 0; i < ARRAY_SIZE(addr); i++)
     8186                chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]);
    80238187}
    80248188
     
    80368200        mutex_lock(&spec->chipio_mutex);
    80378201
    8038         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8039                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
    8040         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8041                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
     8202        chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);
    80428203
    80438204        chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
     
    81128273        chipio_8051_write_direct(codec, 0x93, 0x10);
    81138274
    8114         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8115                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
    8116         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8117                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
     8275        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
    81188276
    81198277        ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
     
    81278285        snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00);
    81288286
    8129         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8130                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92);
    8131         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8132                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa);
    8133         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8134                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x22);
     8287        chipio_8051_write_exram(codec, 0xfa92, 0x22);
    81358288
    81368289        ae7_post_dsp_pll_setup(codec);
    81378290        ae7_post_dsp_asi_stream_setup(codec);
    81388291
    8139         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8140                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43);
    8141         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    8142                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7);
     8292        chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);
    81438293
    81448294        ae7_post_dsp_asi_setup_ports(codec);
     
    82038353                return;
    82048354
    8205         ca0132_alt_dsp_scp_startup(codec);
    82068355        ca0132_alt_init_analog_mics(codec);
     8356        ca0132_alt_start_dsp_audio_streams(codec);
    82078357
    82088358        /*remove DSP headroom*/
     
    82538403                return;
    82548404
    8255         ca0132_alt_dsp_scp_startup(codec);
    82568405        ca0132_alt_init_analog_mics(codec);
     8406        ca0132_alt_start_dsp_audio_streams(codec);
    82578407        sbz_connect_streams(codec);
    82588408        sbz_chipio_startup_data(codec);
    8259 
    8260         chipio_set_stream_control(codec, 0x03, 1);
    8261         chipio_set_stream_control(codec, 0x04, 1);
    82628409
    82638410        /*
     
    82958442
    82968443        ca0132_alt_init_speaker_tuning(codec);
    8297 
    8298         ca0132_alt_create_dummy_stream(codec);
    82998444}
    83008445
     
    83128457                return;
    83138458
    8314         ca0132_alt_dsp_scp_startup(codec);
    83158459        ca0132_alt_init_analog_mics(codec);
    8316         chipio_set_stream_control(codec, 0x03, 1);
    8317         chipio_set_stream_control(codec, 0x04, 1);
     8460        ca0132_alt_start_dsp_audio_streams(codec);
    83188461
    83198462        /* New, unknown SCP req's */
     
    83648507
    83658508        ca0132_alt_init_speaker_tuning(codec);
    8366 
    8367         ca0132_alt_create_dummy_stream(codec);
    83688509}
    83698510
     
    83818522                return;
    83828523
    8383         ca0132_alt_dsp_scp_startup(codec);
    83848524        ca0132_alt_init_analog_mics(codec);
     8525        ca0132_alt_start_dsp_audio_streams(codec);
    83858526        ae7_post_dsp_setup_ports(codec);
    83868527
     
    84498590
    84508591        ca0132_alt_init_speaker_tuning(codec);
    8451 
    8452         ca0132_alt_create_dummy_stream(codec);
    84538592}
    84548593
     
    86418780}
    86428781
    8643 static void ca0132_init_unsol(struct hda_codec *codec)
     8782static void ca0132_setup_unsol(struct hda_codec *codec)
    86448783{
    86458784        struct ca0132_spec *spec = codec->spec;
     
    87398878        mutex_init(&spec->chipio_mutex);
    87408879
     8880        /*
     8881         * The Windows driver always does this upon startup, which seems to
     8882         * clear out any previous configuration. This should help issues where
     8883         * a boot into Windows prior to a boot into Linux breaks things. Also,
     8884         * Windows always sends the reset twice.
     8885         */
     8886        if (ca0132_use_alt_functions(spec)) {
     8887                chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
     8888                chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2);
     8889
     8890                snd_hda_codec_write(codec, codec->core.afg, 0,
     8891                            AC_VERB_SET_CODEC_RESET, 0);
     8892                snd_hda_codec_write(codec, codec->core.afg, 0,
     8893                            AC_VERB_SET_CODEC_RESET, 0);
     8894        }
     8895
    87418896        spec->cur_out_type = SPEAKER_OUT;
    87428897        if (!ca0132_use_alt_functions(spec))
     
    91109265        chipio_write(codec, 0x18b0a4, 0x000000c2);
    91119266
    9112         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9113                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E);
    9114         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9115                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C);
    9116         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9117                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B);
     9267        chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
    91189268
    91199269        snd_hda_codec_write(codec, 0x11, 0,
     
    91259275        chipio_write(codec, 0x18b0a4, 0x000000c2);
    91269276
    9127         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9128                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E);
    9129         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9130                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C);
    9131         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9132                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B);
    9133 
    9134         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9135                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
    9136         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9137                             VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
    9138         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9139                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
    9140         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9141                             VENDOR_CHIPIO_8051_DATA_WRITE, 0x40);
     9277        chipio_8051_write_exram(codec, 0x1c1e, 0x5b);
     9278        chipio_8051_write_exram(codec, 0x1920, 0x00);
     9279        chipio_8051_write_exram(codec, 0x1921, 0x40);
    91429280
    91439281        snd_hda_codec_write(codec, 0x11, 0,
    91449282                        AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04);
     9283}
     9284
     9285/*
     9286 * The ZxR seems to use alternative DAC's for the surround channels, which
     9287 * require PLL PMU setup for the clock rate, I'm guessing. Without setting
     9288 * this up, we get no audio out of the surround jacks.
     9289 */
     9290static void zxr_pre_dsp_setup(struct hda_codec *codec)
     9291{
     9292        static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 };
     9293        static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d };
     9294        unsigned int i;
     9295
     9296        chipio_write(codec, 0x189000, 0x0001f100);
     9297        msleep(50);
     9298        chipio_write(codec, 0x18900c, 0x0001f100);
     9299        msleep(50);
     9300
     9301        /*
     9302         * This writes a RET instruction at the entry point of the function at
     9303         * 0xfa92 in exram. This function seems to have something to do with
     9304         * ASI. Might be some way to prevent the card from reconfiguring the
     9305         * ASI stuff itself.
     9306         */
     9307        chipio_8051_write_exram(codec, 0xfa92, 0x22);
     9308
     9309        chipio_8051_write_pll_pmu(codec, 0x51, 0x98);
     9310
     9311        snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82);
     9312        chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3);
     9313
     9314        chipio_write(codec, 0x18902c, 0x00000000);
     9315        msleep(50);
     9316        chipio_write(codec, 0x18902c, 0x00000003);
     9317        msleep(50);
     9318
     9319        for (i = 0; i < ARRAY_SIZE(addr); i++)
     9320                chipio_8051_write_pll_pmu(codec, addr[i], data[i]);
    91459321}
    91469322
     
    93099485        unsigned char tmp[3];
    93109486
    9311         if (ca0132_quirk(spec) == QUIRK_AE7) {
    9312                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9313                                     VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41);
    9314                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9315                                     VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8);
    9316         }
     9487        if (ca0132_quirk(spec) == QUIRK_AE7)
     9488                chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);
    93179489
    93189490        chipio_8051_write_direct(codec, 0x93, 0x10);
    9319         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9320                             VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44);
    9321         snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9322                             VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2);
     9491        chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);
    93239492
    93249493        if (ca0132_quirk(spec) == QUIRK_AE7) {
     
    93599528        if (ca0132_quirk(spec) == QUIRK_AE5)
    93609529                ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
    9361 
    9362         chipio_write(codec, 0x18b0a4, 0x000000c2);
    9363 
    9364         snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
    9365         snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
    93669530}
    93679531
     
    94019565        case QUIRK_AE5:
    94029566                ca0132_gpio_init(codec);
    9403                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9404                                 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49);
    9405                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9406                                 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88);
     9567                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
    94079568                chipio_write(codec, 0x18b030, 0x00000020);
    94089569                snd_hda_sequence_write(codec, spec->chip_init_verbs);
     
    94129573        case QUIRK_AE7:
    94139574                ca0132_gpio_init(codec);
    9414                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9415                                 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49);
    9416                 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
    9417                                 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88);
     9575                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
    94189576                snd_hda_sequence_write(codec, spec->chip_init_verbs);
    94199577                snd_hda_sequence_write(codec, spec->desktop_init_verbs);
     
    94249582                break;
    94259583        case QUIRK_ZXR:
     9584                chipio_8051_write_pll_pmu(codec, 0x49, 0x88);
    94269585                snd_hda_sequence_write(codec, spec->chip_init_verbs);
    94279586                snd_hda_sequence_write(codec, spec->desktop_init_verbs);
     9587                zxr_pre_dsp_setup(codec);
    94289588                break;
    94299589        default:
     
    94739633                ae5_register_set(codec);
    94749634
    9475         ca0132_init_unsol(codec);
    94769635        ca0132_init_params(codec);
    94779636        ca0132_init_flags(codec);
     
    1003810197                goto error;
    1003910198
     10199        ca0132_setup_unsol(codec);
     10200
    1004010201        return 0;
    1004110202
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/patch_hdmi.c

    r691 r692  
    261261        }
    262262
    263         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
     263        codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
    264264        return -EINVAL;
    265265}
     
    321321                        return cvt_idx;
    322322
    323         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
     323        codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
    324324        return -EINVAL;
    325325}
     
    646646        int i;
    647647
     648        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
    648649        if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
    649650                                                            != AC_DIPXMIT_BEST)
    650651                return false;
    651652
    652         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
    653653        for (i = 0; i < size; i++) {
    654654                val = snd_hda_codec_read(codec, pin_nid, 0,
     
    695695                dp_ai->CA               = ca;
    696696        } else {
    697                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
    698                             pin_nid);
     697                codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
    699698                return;
    700699        }
     
    709708        if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
    710709                                        sizeof(ai))) {
    711                 codec_dbg(codec,
    712                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
    713                             pin_nid,
    714                             active_channels, ca);
     710                codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
     711                          __func__, pin_nid, active_channels, ca);
    715712                hdmi_stop_infoframe_trans(codec, pin_nid);
    716713                hdmi_fill_audio_infoframe(codec, pin_nid,
     
    804801
    805802        codec_dbg(codec,
    806                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
     803                "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
    807804                codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
    808805                !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
     
    882879                pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
    883880                pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
    884                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
     881                codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
    885882        }
    886883}
     
    11291126                        if (!per_cvt->assigned) {
    11301127                                codec_dbg(codec,
    1131                                           "choose cvt %d for pin nid %d\n",
    1132                                         cvt_idx, nid);
     1128                                          "choose cvt %d for pin NID 0x%x\n",
     1129                                          cvt_idx, nid);
    11331130                                snd_hda_codec_write_cache(codec, nid, 0,
    11341131                                            AC_VERB_SET_CONNECT_SEL,
     
    13281325        if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
    13291326                codec_warn(codec,
    1330                            "HDMI: pin %d wcaps %#x does not support connection list\n",
     1327                           "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
    13311328                           pin_nid, get_wcaps(codec, pin_nid));
    13321329                return -EINVAL;
     
    16431640
    16441641        codec_dbg(codec,
    1645                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
     1642                "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
    16461643                codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
    16471644
     
    19471944        SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
    19481945        SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
    1949         SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
    19501946        {}
    19511947};
     
    28162812        }
    28172813
    2818         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
     2814        codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
    28192815        return -1;
    28202816}
  • GPL/branches/uniaud32-next/alsa-kernel/pci/hda/patch_realtek.c

    r691 r692  
    393393                fallthrough;
    394394        case 0x10ec0215:
    395         case 0x10ec0230:
    396395        case 0x10ec0233:
    397396        case 0x10ec0235:
     
    404403        case 0x10ec0283:
    405404        case 0x10ec0286:
     405        case 0x10ec0287:
    406406        case 0x10ec0288:
    407407        case 0x10ec0285:
     
    413413        case 0x10ec0275:
    414414                alc_update_coef_idx(codec, 0xe, 0, 1<<0);
    415                 break;
    416         case 0x10ec0287:
    417                 alc_update_coef_idx(codec, 0x10, 1<<9, 0);
    418                 alc_write_coef_idx(codec, 0x8, 0x4ab7);
    419415                break;
    420416        case 0x10ec0293:
     
    31533149};
    31543150
    3155 static const struct snd_hda_pin_quirk alc882_pin_fixup_tbl[] = {
    3156 #ifndef TARGET_OS2
    3157         SND_HDA_PIN_QUIRK(0x10ec1220, 0x1043, "ASUS", ALC1220_FIXUP_CLEVO_P950,
    3158                 {0x14, 0x01014010},
    3159                 {0x15, 0x01011012},
    3160                 {0x16, 0x01016011},
    3161                 {0x18, 0x01a19040},
    3162                 {0x19, 0x02a19050},
    3163                 {0x1a, 0x0181304f},
    3164                 {0x1b, 0x0221401f},
    3165                 {0x1e, 0x01456130}),
    3166         SND_HDA_PIN_QUIRK(0x10ec1220, 0x1462, "MS-7C35", ALC1220_FIXUP_CLEVO_P950,
    3167                 {0x14, 0x01015010},
    3168                 {0x15, 0x01011012},
    3169                 {0x16, 0x01011011},
    3170                 {0x18, 0x01a11040},
    3171                 {0x19, 0x02a19050},
    3172                 {0x1a, 0x0181104f},
    3173                 {0x1b, 0x0221401f},
    3174                 {0x1e, 0x01451130}),
    3175 #endif
    3176         {0}
    3177 };
    3178 
    31793151/*
    31803152 * BIOS auto configuration
     
    32183190        snd_hda_pick_fixup(codec, alc882_fixup_models, alc882_fixup_tbl,
    32193191                       alc882_fixups);
    3220         snd_hda_pick_pin_fixup(codec, alc882_pin_fixup_tbl, alc882_fixups, true);
    32213192        snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
    32223193
     
    37983769                alc_update_coef_idx(codec, 0x44, 0x0045 << 8, 0x0);
    37993770                break;
    3800         case 0x10ec0230:
    38013771        case 0x10ec0236:
    38023772        case 0x10ec0256:
     
    38263796                alc_update_coef_idx(codec, 0x44, 0x007f << 8, 0x0045 << 8);
    38273797                break;
    3828         case 0x10ec0230:
    38293798        case 0x10ec0236:
    38303799        case 0x10ec0256:
     
    54265395                alc_process_coef_fw(codec, coef0255);
    54275396                break;
    5428         case 0x10ec0230:
    54295397        case 0x10ec0236:
    54305398        case 0x10ec0256:
     
    55415509                snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
    55425510                break;
    5543         case 0x10ec0230:
    55445511        case 0x10ec0236:
    55455512        case 0x10ec0256:
     
    56915658                alc_process_coef_fw(codec, coef0255);
    56925659                break;
    5693         case 0x10ec0230:
    56945660        case 0x10ec0236:
    56955661        case 0x10ec0256:
     
    57905756                alc_process_coef_fw(codec, coef0255);
    57915757                break;
    5792         case 0x10ec0230:
    57935758        case 0x10ec0236:
    57945759        case 0x10ec0256:
     
    59045869                alc_process_coef_fw(codec, coef0255);
    59055870                break;
    5906         case 0x10ec0230:
    59075871        case 0x10ec0236:
    59085872        case 0x10ec0256:
     
    60055969                is_ctia = (val & 0x0070) == 0x0070;
    60065970                break;
    6007         case 0x10ec0230:
    60085971        case 0x10ec0236:
    60095972        case 0x10ec0256:
     
    63016264                alc_process_coef_fw(codec, alc255fw);
    63026265                break;
    6303         case 0x10ec0230:
    63046266        case 0x10ec0236:
    63056267        case 0x10ec0256:
     
    64416403}
    64426404
    6443 static void alc295_fixup_asus_dacs(struct hda_codec *codec,
    6444                                    const struct hda_fixup *fix, int action)
    6445 {
    6446         static const hda_nid_t preferred_pairs[] = {
    6447                 0x17, 0x02, 0x21, 0x03, 0
    6448         };
    6449         struct alc_spec *spec = codec->spec;
    6450 
    6451         if (action == HDA_FIXUP_ACT_PRE_PROBE)
    6452                 spec->gen.preferred_dacs = preferred_pairs;
    6453 }
    6454 
    64556405static void alc_shutup_dell_xps13(struct hda_codec *codec)
    64566406{
     
    69036853                alc_update_coef_idx(codec, 0x4a, 0x8000, 0 << 15);
    69046854                break;
    6905         case 0x10ec0230:
    69066855        case 0x10ec0235:
    69076856        case 0x10ec0236:
     
    69716920}
    69726921
    6973 static void alc294_gu502_toggle_output(struct hda_codec *codec,
    6974                                        struct hda_jack_callback *cb)
    6975 {
    6976         /* Windows sets 0x10 to 0x8420 for Node 0x20 which is
    6977          * responsible from changes between speakers and headphones
    6978          */
    6979         if (snd_hda_jack_detect_state(codec, 0x21) == HDA_JACK_PRESENT)
    6980                 alc_write_coef_idx(codec, 0x10, 0x8420);
    6981         else
    6982                 alc_write_coef_idx(codec, 0x10, 0x0a20);
    6983 }
    6984 
    6985 static void alc294_fixup_gu502_hp(struct hda_codec *codec,
    6986                                   const struct hda_fixup *fix, int action)
    6987 {
    6988         if (!is_jack_detectable(codec, 0x21))
    6989                 return;
    6990 
    6991         switch (action) {
    6992         case HDA_FIXUP_ACT_PRE_PROBE:
    6993                 snd_hda_jack_detect_enable_callback(codec, 0x21,
    6994                                 alc294_gu502_toggle_output);
    6995                 break;
    6996         case HDA_FIXUP_ACT_INIT:
    6997                 alc294_gu502_toggle_output(codec, NULL);
    6998                 break;
    6999         }
    7000 }
    7001 
    70026922static void  alc285_fixup_hp_gpio_amp_init(struct hda_codec *codec,
    70036923                              const struct hda_fixup *fix, int action)
     
    70376957}
    70386958#endif /* NOT_USED */
    7039 
    7040 static void alc285_fixup_hp_spectre_x360(struct hda_codec *codec,
    7041                                           const struct hda_fixup *fix, int action)
    7042 {
    7043         static const hda_nid_t conn[] = { 0x02 };
    7044         static const struct hda_pintbl pincfgs[] = {
    7045                 { 0x14, 0x90170110 },  /* rear speaker */
    7046                 {0}
    7047         };
    7048 
    7049         switch (action) {
    7050         case HDA_FIXUP_ACT_PRE_PROBE:
    7051                 snd_hda_apply_pincfgs(codec, pincfgs);
    7052                 /* force front speaker to DAC1 */
    7053                 snd_hda_override_conn_list(codec, 0x17, ARRAY_SIZE(conn), conn);
    7054                 break;
    7055         }
    7056 }
    70576959
    70586960/* for hda_fixup_thinkpad_acpi() */
     
    72367138        ALC294_FIXUP_ASUS_GX502_PINS,
    72377139        ALC294_FIXUP_ASUS_GX502_VERBS,
    7238         ALC294_FIXUP_ASUS_GU502_HP,
    7239         ALC294_FIXUP_ASUS_GU502_PINS,
    7240         ALC294_FIXUP_ASUS_GU502_VERBS,
    72417140        ALC285_FIXUP_HP_GPIO_LED,
    72427141        ALC285_FIXUP_HP_MUTE_LED,
     
    72757174        ALC256_FIXUP_ACER_HEADSET_MIC,
    72767175        ALC285_FIXUP_IDEAPAD_S740_COEF,
    7277         ALC295_FIXUP_ASUS_DACS,
    7278         ALC295_FIXUP_HP_OMEN,
    7279         ALC285_FIXUP_HP_SPECTRE_X360,
    7280         ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP,
    7281         ALC623_FIXUP_LENOVO_THINKSTATION_P340,
    7282         ALC255_FIXUP_ACER_HEADPHONE_AND_MIC,
    72837176};
    72847177
     
    84578350                        {0}
    84588351                },
    8459                 .chained = true,
    8460                 .chain_id = ALC289_FIXUP_ASUS_GA401,
    84618352        },
    84628353        [ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE] = {
     
    88058696                .v.func = alc294_fixup_gx502_hp,
    88068697        },
    8807         [ALC294_FIXUP_ASUS_GU502_PINS] = {
    8808                 .type = HDA_FIXUP_PINS,
    8809                 .v.pins = (const struct hda_pintbl[]) {
    8810                         { 0x19, 0x01a11050 }, /* rear HP mic */
    8811                         { 0x1a, 0x01a11830 }, /* rear external mic */
    8812                         { 0x21, 0x012110f0 }, /* rear HP out */
    8813                         { }
    8814                 },
    8815                 .chained = true,
    8816                 .chain_id = ALC294_FIXUP_ASUS_GU502_VERBS
    8817         },
    8818         [ALC294_FIXUP_ASUS_GU502_VERBS] = {
    8819                 .type = HDA_FIXUP_VERBS,
    8820                 .v.verbs = (const struct hda_verb[]) {
    8821                         /* set 0x15 to HP-OUT ctrl */
    8822                         { 0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, 0xc0 },
    8823                         /* unmute the 0x15 amp */
    8824                         { 0x15, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000 },
    8825                         /* set 0x1b to HP-OUT */
    8826                         { 0x1b, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24 },
    8827                         { }
    8828                 },
    8829                 .chained = true,
    8830                 .chain_id = ALC294_FIXUP_ASUS_GU502_HP
    8831         },
    8832         [ALC294_FIXUP_ASUS_GU502_HP] = {
    8833                 .type = HDA_FIXUP_FUNC,
    8834                 .v.func = alc294_fixup_gu502_hp,
    8835         },
    88368698        [ALC294_FIXUP_ASUS_COEF_1B] = {
    88378699                .type = HDA_FIXUP_VERBS,
     
    91178979                .chain_id = ALC269_FIXUP_THINKPAD_ACPI,
    91188980        },
    9119         [ALC295_FIXUP_ASUS_DACS] = {
    9120                 .type = HDA_FIXUP_FUNC,
    9121                 .v.func = alc295_fixup_asus_dacs,
    9122         },
    9123 #ifdef TARGET_OS2xxx
    9124         [ALC295_FIXUP_HP_OMEN] = {
    9125                 .type = HDA_FIXUP_PINS,
    9126                 .v.pins = (const struct hda_pintbl[]) {
    9127                         { 0x12, 0xb7a60130 },
    9128                         { 0x13, 0x40000000 },
    9129                         { 0x14, 0x411111f0 },
    9130                         { 0x16, 0x411111f0 },
    9131                         { 0x17, 0x90170110 },
    9132                         { 0x18, 0x411111f0 },
    9133                         { 0x19, 0x02a11030 },
    9134                         { 0x1a, 0x411111f0 },
    9135                         { 0x1b, 0x04a19030 },
    9136                         { 0x1d, 0x40600001 },
    9137                         { 0x1e, 0x411111f0 },
    9138                         { 0x21, 0x03211020 },
    9139                         {0}
    9140                 },
    9141                 .chained = true,
    9142                 .chain_id = ALC269_FIXUP_HP_LINE1_MIC1_LED,
    9143         },
    9144         [ALC285_FIXUP_HP_SPECTRE_X360] = {
    9145                 .type = HDA_FIXUP_FUNC,
    9146                 .v.func = alc285_fixup_hp_spectre_x360,
    9147         },
    9148 #endif
    9149         [ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP] = {
    9150                 .type = HDA_FIXUP_FUNC,
    9151                 .v.func = alc285_fixup_ideapad_s740_coef,
    9152                 .chained = true,
    9153                 .chain_id = ALC285_FIXUP_THINKPAD_HEADSET_JACK,
    9154         },
    9155         [ALC623_FIXUP_LENOVO_THINKSTATION_P340] = {
    9156                 .type = HDA_FIXUP_FUNC,
    9157                 .v.func = alc_fixup_no_shutup,
    9158                 .chained = true,
    9159                 .chain_id = ALC283_FIXUP_HEADSET_MIC,
    9160         },
    9161 #ifdef TARGET_OS2xxx
    9162         [ALC255_FIXUP_ACER_HEADPHONE_AND_MIC] = {
    9163                 .type = HDA_FIXUP_PINS,
    9164                 .v.pins = (const struct hda_pintbl[]) {
    9165                         { 0x21, 0x03211030 }, /* Change the Headphone location to Left */
    9166                         { }
    9167                 },
    9168                 .chained = true,
    9169                 .chain_id = ALC255_FIXUP_XIAOMI_HEADSET_MIC
    9170         },
    9171 #endif
    91728981};
    91738982
     
    92069015        SND_PCI_QUIRK(0x1025, 0x1330, "Acer TravelMate X514-51T", ALC255_FIXUP_ACER_HEADSET_MIC),
    92079016        SND_PCI_QUIRK(0x1025, 0x1430, "Acer TravelMate B311R-31", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
    9208         SND_PCI_QUIRK(0x1025, 0x1466, "Acer Aspire A515-56", ALC255_FIXUP_ACER_HEADPHONE_AND_MIC),
    92099017        SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
    92109018        SND_PCI_QUIRK(0x1028, 0x054b, "Dell XPS one 2710", ALC275_FIXUP_DELL_XPS),
     
    93289136        SND_PCI_QUIRK(0x103c, 0x82c0, "HP G3 mini premium", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
    93299137        SND_PCI_QUIRK(0x103c, 0x83b9, "HP Spectre x360", ALC269_FIXUP_HP_MUTE_LED_MIC3),
    9330         SND_PCI_QUIRK(0x103c, 0x841c, "HP Pavilion 15-CK0xx", ALC269_FIXUP_HP_MUTE_LED_MIC3),
    93319138        SND_PCI_QUIRK(0x103c, 0x8497, "HP Envy x360", ALC269_FIXUP_HP_MUTE_LED_MIC3),
    9332         SND_PCI_QUIRK(0x103c, 0x84da, "HP OMEN dc0019-ur", ALC295_FIXUP_HP_OMEN),
    93339139        SND_PCI_QUIRK(0x103c, 0x84e7, "HP Pavilion 15", ALC269_FIXUP_HP_MUTE_LED_MIC3),
    9334         SND_PCI_QUIRK(0x103c, 0x8519, "HP Spectre x360 15-df0xxx", ALC285_FIXUP_HP_SPECTRE_X360),
    9335         SND_PCI_QUIRK(0x103c, 0x861f, "HP Elite Dragonfly G1", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    93369140        SND_PCI_QUIRK(0x103c, 0x869d, "HP", ALC236_FIXUP_HP_MUTE_LED),
    93379141        SND_PCI_QUIRK(0x103c, 0x86c7, "HP Envy AiO 32", ALC274_FIXUP_HP_ENVY_GPIO),
    9338         SND_PCI_QUIRK(0x103c, 0x8716, "HP Elite Dragonfly G2 Notebook PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    9339         SND_PCI_QUIRK(0x103c, 0x8720, "HP EliteBook x360 1040 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    93409142        SND_PCI_QUIRK(0x103c, 0x8724, "HP EliteBook 850 G7", ALC285_FIXUP_HP_GPIO_LED),
    93419143        SND_PCI_QUIRK(0x103c, 0x8729, "HP", ALC285_FIXUP_HP_GPIO_LED),
     
    93519153        SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED),
    93529154        SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
    9353         SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
    9354         SND_PCI_QUIRK(0x103c, 0x87f1, "HP ProBook 630 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
    93559155        SND_PCI_QUIRK(0x103c, 0x87f2, "HP ProBook 640 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
    93569156        SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED),
    93579157        SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
    93589158        SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
    9359         SND_PCI_QUIRK(0x103c, 0x880d, "HP EliteBook 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
    93609159        SND_PCI_QUIRK(0x103c, 0x8846, "HP EliteBook 850 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
    9361         SND_PCI_QUIRK(0x103c, 0x8847, "HP EliteBook x360 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
    9362         SND_PCI_QUIRK(0x103c, 0x884b, "HP EliteBook 840 Aero G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
    93639160        SND_PCI_QUIRK(0x103c, 0x884c, "HP EliteBook 840 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
    9364         SND_PCI_QUIRK(0x103c, 0x8862, "HP ProBook 445 G8 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
    9365         SND_PCI_QUIRK(0x103c, 0x8863, "HP ProBook 445 G8 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
    9366         SND_PCI_QUIRK(0x103c, 0x886d, "HP ZBook Fury 17.3 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    9367         SND_PCI_QUIRK(0x103c, 0x8870, "HP ZBook Fury 15.6 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    9368         SND_PCI_QUIRK(0x103c, 0x8873, "HP ZBook Studio 15.6 Inch G8 Mobile Workstation PC", ALC285_FIXUP_HP_GPIO_AMP_INIT),
    9369         SND_PCI_QUIRK(0x103c, 0x888d, "HP ZBook Power 15.6 inch G8 Mobile Workstation PC", ALC236_FIXUP_HP_GPIO_LED),
    9370         SND_PCI_QUIRK(0x103c, 0x8896, "HP EliteBook 855 G8 Notebook PC", ALC285_FIXUP_HP_MUTE_LED),
    93719161        SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
    93729162        SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
     
    93879177        SND_PCI_QUIRK(0x1043, 0x1517, "Asus Zenbook UX31A", ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A),
    93889178        SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC),
    9389         SND_PCI_QUIRK(0x1043, 0x1740, "ASUS UX430UA", ALC295_FIXUP_ASUS_DACS),
    93909179        SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_DUAL_SPK),
    93919180        SND_PCI_QUIRK(0x1043, 0x1881, "ASUS Zephyrus S/M", ALC294_FIXUP_ASUS_GX502_PINS),
     
    94059194        SND_PCI_QUIRK(0x1043, 0x1d4e, "ASUS TM420", ALC256_FIXUP_ASUS_HPE),
    94069195        SND_PCI_QUIRK(0x1043, 0x1e11, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA502),
    9407         SND_PCI_QUIRK(0x1043, 0x1e51, "ASUS Zephyrus M15", ALC294_FIXUP_ASUS_GU502_PINS),
    94089196        SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401),
    94099197        SND_PCI_QUIRK(0x1043, 0x1f11, "ASUS Zephyrus G14", ALC289_FIXUP_ASUS_GA401),
     
    94629250        SND_PCI_QUIRK(0x1558, 0x50d5, "Clevo NP50D5", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94639251        SND_PCI_QUIRK(0x1558, 0x50f0, "Clevo NH50A[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9464         SND_PCI_QUIRK(0x1558, 0x50f2, "Clevo NH50E[PR]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94659252        SND_PCI_QUIRK(0x1558, 0x50f3, "Clevo NH58DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9466         SND_PCI_QUIRK(0x1558, 0x50f5, "Clevo NH55EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9467         SND_PCI_QUIRK(0x1558, 0x50f6, "Clevo NH55DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94689253        SND_PCI_QUIRK(0x1558, 0x5101, "Clevo S510WU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94699254        SND_PCI_QUIRK(0x1558, 0x5157, "Clevo W517GU1", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
     
    94719256        SND_PCI_QUIRK(0x1558, 0x70a1, "Clevo NB70T[HJK]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94729257        SND_PCI_QUIRK(0x1558, 0x70b3, "Clevo NK70SB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9473         SND_PCI_QUIRK(0x1558, 0x70f2, "Clevo NH79EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9474         SND_PCI_QUIRK(0x1558, 0x70f3, "Clevo NH77DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9475         SND_PCI_QUIRK(0x1558, 0x70f4, "Clevo NH77EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9476         SND_PCI_QUIRK(0x1558, 0x70f6, "Clevo NH77DPQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94779258        SND_PCI_QUIRK(0x1558, 0x8228, "Clevo NR40BU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94789259        SND_PCI_QUIRK(0x1558, 0x8520, "Clevo NH50D[CD]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
     
    94929273        SND_PCI_QUIRK(0x1558, 0x8d50, "Clevo NH55RCQ-M", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94939274        SND_PCI_QUIRK(0x1558, 0x951d, "Clevo N950T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9494         SND_PCI_QUIRK(0x1558, 0x9600, "Clevo N960K[PR]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94959275        SND_PCI_QUIRK(0x1558, 0x961d, "Clevo N960S[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94969276        SND_PCI_QUIRK(0x1558, 0x971d, "Clevo N970T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    94979277        SND_PCI_QUIRK(0x1558, 0xa500, "Clevo NL53RU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9498         SND_PCI_QUIRK(0x1558, 0xa600, "Clevo NL5XNU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9499         SND_PCI_QUIRK(0x1558, 0xb018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9500         SND_PCI_QUIRK(0x1558, 0xb019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9501         SND_PCI_QUIRK(0x1558, 0xb022, "Clevo NH77D[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9502         SND_PCI_QUIRK(0x1558, 0xc018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9503         SND_PCI_QUIRK(0x1558, 0xc019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    9504         SND_PCI_QUIRK(0x1558, 0xc022, "Clevo NH77[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
    95059278        SND_PCI_QUIRK(0x17aa, 0x1036, "Lenovo P520", ALC233_FIXUP_LENOVO_MULTI_CODECS),
    9506         SND_PCI_QUIRK(0x17aa, 0x1048, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340),
     9279        SND_PCI_QUIRK(0x17aa, 0x1048, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
    95079280        SND_PCI_QUIRK(0x17aa, 0x20f2, "Thinkpad SL410/510", ALC269_FIXUP_SKU_IGNORE),
    95089281        SND_PCI_QUIRK(0x17aa, 0x215e, "Thinkpad L512", ALC269_FIXUP_SKU_IGNORE),
     
    95529325        SND_PCI_QUIRK(0x17aa, 0x3176, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
    95539326        SND_PCI_QUIRK(0x17aa, 0x3178, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
    9554         SND_PCI_QUIRK(0x17aa, 0x31af, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340),
    95559327        SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940", ALC298_FIXUP_LENOVO_SPK_VOLUME),
    95569328        SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF),
    9557         SND_PCI_QUIRK(0x17aa, 0x3843, "Yoga 9i", ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP),
    95589329        SND_PCI_QUIRK(0x17aa, 0x3902, "Lenovo E50-80", ALC269_FIXUP_DMIC_THINKPAD_ACPI),
    95599330        SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC),
     
    97699540        {.id = ALC274_FIXUP_HP_MIC, .name = "alc274-hp-mic-detect"},
    97709541        {.id = ALC245_FIXUP_HP_X360_AMP, .name = "alc245-hp-x360-amp"},
    9771         {.id = ALC295_FIXUP_HP_OMEN, .name = "alc295-hp-omen"},
    9772         {.id = ALC285_FIXUP_HP_SPECTRE_X360, .name = "alc285-hp-spectre-x360"},
    9773         {.id = ALC287_FIXUP_IDEAPAD_BASS_SPK_AMP, .name = "alc287-ideapad-bass-spk-amp"},
    9774         {.id = ALC623_FIXUP_LENOVO_THINKSTATION_P340, .name = "alc623-lenovo-thinkstation-p340"},
    9775         {.id = ALC255_FIXUP_ACER_HEADPHONE_AND_MIC, .name = "alc255-acer-headphone-and-mic"},
    97769542        {0}
    97779543};
     
    1036610132                spec->init_hook = alc256_init;
    1036710133                break;
    10368         case 0x10ec0230:
    1036910134        case 0x10ec0236:
    1037010135        case 0x10ec0256:
     
    1188611651        HDA_CODEC_ENTRY(0x10ec0222, "ALC222", patch_alc269),
    1188711652        HDA_CODEC_ENTRY(0x10ec0225, "ALC225", patch_alc269),
    11888         HDA_CODEC_ENTRY(0x10ec0230, "ALC236", patch_alc269),
    1188911653        HDA_CODEC_ENTRY(0x10ec0231, "ALC231", patch_alc269),
    1189011654        HDA_CODEC_ENTRY(0x10ec0233, "ALC233", patch_alc269),
  • GPL/branches/uniaud32-next/alsa-kernel/pci/intel8x0.c

    r687 r692  
    358358        struct ac97_pcm *pcm;
    359359        int pcm_open_flag;
    360         unsigned int prepared:1;
    361360        unsigned int suspended: 1;
    362361};
     
    718717        int status, civ, i, step;
    719718        int ack = 0;
    720 
    721         if (!(ichdev->prepared || chip->in_measurement) || ichdev->suspended)
    722                 return;
    723719
    724720        spin_lock_irqsave(&chip->reg_lock, flags);
     
    912908                snd_ac97_pcm_close(ichdev->pcm);
    913909                ichdev->pcm_open_flag = 0;
    914                 ichdev->prepared = 0;
    915910        }
    916911        err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params),
     
    934929                snd_ac97_pcm_close(ichdev->pcm);
    935930                ichdev->pcm_open_flag = 0;
    936                 ichdev->prepared = 0;
    937931        }
    938932        return 0;
     
    10091003        }
    10101004        snd_intel8x0_setup_periods(chip, ichdev);
    1011         ichdev->prepared = 1;
    10121005        return 0;
    10131006}
  • GPL/branches/uniaud32-next/alsa-kernel/pci/rme32.c

    r629 r692  
    469469                default:
    470470                        return -1;
    471                         break;
    472471                }
    473472        else
  • GPL/branches/uniaud32-next/alsa-kernel/pci/rme9652/hdspm.c

    r685 r692  
    22872287                status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
    22882288                return (status >> 16) & 0xF;
    2289                 break;
    22902289        case AES32:
    22912290                status = hdspm_read(hdspm, HDSPM_statusRegister);
     
    23132312                        status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
    23142313                        return (status >> 20) & 0xF;
    2315                         break;
    23162314                case AES32:
    23172315                        status = hdspm_read(hdspm, HDSPM_statusRegister);
     
    23392337                        status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);
    23402338                        return (status >> 12) & 0xF;
    2341                         break;
    23422339                default:
    23432340                        break;
     
    23592356                timecode = hdspm_read(hdspm, HDSPM_timecodeRegister);
    23602357                return (timecode >> (4*index)) & 0xF;
    2361                 break;
    23622358        default:
    23632359                break;
     
    38463842                }
    38473843                return 0;
    3848                 break;
    38493844
    38503845        case MADI:
     
    38573852                }
    38583853                return 0;
    3859                 break;
    38603854
    38613855        case RayDAT:
     
    38683862                        return 1;
    38693863                return 0;
    3870 
    3871                 break;
    38723864
    38733865        case MADIface:
     
    63226314                        /* TODO: Mac driver sets it when f_s>48kHz */
    63236315                        status.card_specific.madi.frame_format = 0;
     6316                        break;
    63246317
    63256318                default:
  • GPL/branches/uniaud32-next/alsa-kernel/pci/rme9652/rme9652.c

    r685 r692  
    733733        case 0x7:
    734734                return 32000;
    735                 break;
    736735
    737736        case 0x6:
    738737                return 44100;
    739                 break;
    740738
    741739        case 0x5:
    742740                return 48000;
    743                 break;
    744741
    745742        case 0x4:
    746743                return 88200;
    747                 break;
    748744
    749745        case 0x3:
    750746                return 96000;
    751                 break;
    752747
    753748        case 0x0:
    754749                return 64000;
    755                 break;
    756750
    757751        default:
     
    760754                           s->card_name, rate_bits);
    761755                return 0;
    762                 break;
    763756        }
    764757}
  • GPL/branches/uniaud32-next/include/linux/mod_devicetable.h

    r640 r692  
    1212};
    1313
     14#define ACPI_ID_LEN     9
     15
    1416#endif /* _LINUX_MOD_DEVICETABLE_H */
  • GPL/branches/uniaud32-next/include/linux/slab.h

    r662 r692  
    106106}
    107107
     108/**
     109 * krealloc_array - reallocate memory for an array.
     110 * @p: pointer to the memory chunk to reallocate
     111 * @new_n: new number of elements to alloc
     112 * @new_size: new size of a single member of the array
     113 * @flags: the type of memory to allocate (see kmalloc)
     114 */
     115static __must_check inline void *
     116krealloc_array(void *p, size_t new_n, size_t new_size, gfp_t flags)
     117{
     118        size_t bytes;
     119
     120//      if (check_mul_overflow(new_n, new_size, &bytes))
     121//              return NULL;
     122
     123        return krealloc(p, bytes, flags);
     124}
     125
    108126#define kmalloc_node_track_caller(size, flags, node) \
    109127        kmalloc_track_caller(size, flags)
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