Changeset 598 for GPL/trunk/alsa-kernel/pci/cs46xx
- Timestamp:
- Apr 3, 2017, 4:51:56 PM (9 years ago)
- Location:
- GPL/trunk
- Files:
-
- 7 added
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
GPL/trunk
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Property svn:mergeinfo
set to
/GPL/branches/uniaud32-2.1.x merged eligible
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Property svn:mergeinfo
set to
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GPL/trunk/alsa-kernel/pci/cs46xx/cs46xx.c
r464 r598 68 68 MODULE_PARM_DESC(mmap_valid, "Support OSS mmap."); 69 69 70 static struct pci_device_id snd_cs46xx_ids[]= {70 static DEFINE_PCI_DEVICE_TABLE(snd_cs46xx_ids) = { 71 71 { PCI_VDEVICE(CIRRUS, 0x6001), 0, }, /* CS4280 */ 72 72 { PCI_VDEVICE(CIRRUS, 0x6003), 0, }, /* CS4612 */ -
GPL/trunk/alsa-kernel/pci/cs46xx/cs46xx_lib.c
r426 r598 2239 2239 /* set the desired CODEC mode */ 2240 2240 if (ac97->num == CS46XX_PRIMARY_CODEC_INDEX) { 2241 snd_printdd("cs46xx: COD OEC1 mode %04x\n",0x0);2242 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE,0x0);2241 snd_printdd("cs46xx: CODEC1 mode %04x\n", 0x0); 2242 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE, 0x0); 2243 2243 } else if (ac97->num == CS46XX_SECONDARY_CODEC_INDEX) { 2244 snd_printdd("cs46xx: COD OEC2 mode %04x\n",0x3);2245 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE,0x3);2244 snd_printdd("cs46xx: CODEC2 mode %04x\n", 0x3); 2245 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE, 0x3); 2246 2246 } else { 2247 2247 snd_BUG(); /* should never happen ... */ … … 2267 2267 2268 2268 /* test if we can write to the record gain volume register */ 2269 snd_ac97_write _cache(ac97, AC97_REC_GAIN, 0x8a05);2269 snd_ac97_write(ac97, AC97_REC_GAIN, 0x8a05); 2270 2270 if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) 2271 2271 return; … … 2658 2658 */ 2659 2659 2660 static long snd_cs46xx_io_read(struct snd_info_entry *entry, void *file_private_data,2661 struct file *file, char __user *buf,2662 unsigned long count, unsigned long pos)2663 { 2664 long size; 2660 static ssize_t snd_cs46xx_io_read(struct snd_info_entry *entry, 2661 void *file_private_data, 2662 struct file *file, char __user *buf, 2663 size_t count, loff_t pos) 2664 { 2665 2665 struct snd_cs46xx_region *region = entry->private_data; 2666 2666 2667 size = count; 2668 if (pos + (size_t)size > region->size) 2669 size = region->size - pos; 2670 if (size > 0) { 2671 if (copy_to_user_fromio(buf, region->remap_addr + pos, size)) 2672 return -EFAULT; 2673 } 2674 return size; 2667 if (copy_to_user_fromio(buf, region->remap_addr + pos, count)) 2668 return -EFAULT; 2669 return count; 2675 2670 } 2676 2671 … … 3598 3593 static unsigned int saved_regs[] = { 3599 3594 BA0_ACOSV, 3600 BA0_ASER_FADDR,3595 /*BA0_ASER_FADDR,*/ 3601 3596 BA0_ASER_MASTER, 3602 3597 BA1_PVOL, … … 3645 3640 int i; 3646 3641 #endif 3642 unsigned int tmp; 3647 3643 3648 3644 pci_set_power_state(pci, PCI_D0); … … 3685 3681 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); 3686 3682 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); 3683 3684 /* 3685 * Stop capture DMA. 3686 */ 3687 tmp = snd_cs46xx_peek(chip, BA1_CCTL); 3688 chip->capt.ctl = tmp & 0x0000ffff; 3689 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); 3690 3691 mdelay(5); 3687 3692 3688 3693 /* reset playback/capture */ -
GPL/trunk/alsa-kernel/pci/cs46xx/cs46xx_lib.h
r426 r598 36 36 37 37 #ifdef CONFIG_SND_CS46XX_NEW_DSP 38 #define CS46XX_MIN_PERIOD_SIZE 138 #define CS46XX_MIN_PERIOD_SIZE 64 39 39 #define CS46XX_MAX_PERIOD_SIZE 1024*1024 40 40 #else -
GPL/trunk/alsa-kernel/pci/cs46xx/dsp_spos.c
r399 r598 226 226 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); 227 227 228 if (ins == NULL) 228 if (ins == NULL) 229 229 return NULL; 230 230 231 231 /* better to use vmalloc for this big table */ 232 ins->symbol_table.nsymbols = 0;233 232 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) * 234 233 DSP_MAX_SYMBOLS); 235 ins-> symbol_table.highest_frag_index = 0;236 237 if ( ins->symbol_table.symbols == NULL) {234 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); 235 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL); 236 if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) { 238 237 cs46xx_dsp_spos_destroy(chip); 239 238 goto error; 240 239 } 241 240 ins->symbol_table.nsymbols = 0; 241 ins->symbol_table.highest_frag_index = 0; 242 242 ins->code.offset = 0; 243 243 ins->code.size = 0; 244 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);245 246 if (ins->code.data == NULL) {247 cs46xx_dsp_spos_destroy(chip);248 goto error;249 }250 251 244 ins->nscb = 0; 252 245 ins->ntask = 0; 253 254 246 ins->nmodules = 0; 255 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);256 257 if (ins->modules == NULL) {258 cs46xx_dsp_spos_destroy(chip);259 goto error;260 }261 247 262 248 /* default SPDIF input sample rate … … 272 258 /* set left and right validity bits and 273 259 default channel status */ 274 ins->spdif_csuv_default = 275 ins->spdif_csuv_stream = 260 ins->spdif_csuv_default = 261 ins->spdif_csuv_stream = 276 262 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | 277 263 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | … … 282 268 283 269 error: 270 kfree(ins->modules); 271 kfree(ins->code.data); 272 vfree(ins->symbol_table.symbols); 284 273 kfree(ins); 285 274 return NULL; … … 299 288 300 289 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 290 #ifdef CONFIG_PM 291 kfree(ins->scbs[i].data); 292 #endif 301 293 } 302 294 … … 975 967 index = find_free_scb_index (ins); 976 968 969 memset(&ins->scbs[index], 0, sizeof(ins->scbs[index])); 977 970 strcpy(ins->scbs[index].scb_name, name); 978 971 ins->scbs[index].address = dest; 979 972 ins->scbs[index].index = index; 980 ins->scbs[index].proc_info = NULL;981 973 ins->scbs[index].ref_count = 1; 982 ins->scbs[index].deleted = 0;983 spin_lock_init(&ins->scbs[index].lock);984 974 985 975 desc = (ins->scbs + index); … … 1023 1013 } 1024 1014 1015 #define SCB_BYTES (0x10 * 4) 1016 1025 1017 struct dsp_scb_descriptor * 1026 1018 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) 1027 1019 { 1028 1020 struct dsp_scb_descriptor * desc; 1021 1022 #ifdef CONFIG_PM 1023 /* copy the data for resume */ 1024 scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL); 1025 if (!scb_data) 1026 return NULL; 1027 #endif 1029 1028 1030 1029 desc = _map_scb (chip,name,dest); … … 1034 1033 } else { 1035 1034 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n"); 1035 #ifdef CONFIG_PM 1036 kfree(scb_data); 1037 #endif 1036 1038 } 1037 1039 … … 1989 1991 _dsp_create_scb(chip, s->data, s->address); 1990 1992 } 1991 1993 for (i = 0; i < ins->nscb; i++) { 1994 struct dsp_scb_descriptor *s = &ins->scbs[i]; 1995 if (s->deleted) 1996 continue; 1997 if (s->updated) 1998 cs46xx_dsp_spos_update_scb(chip, s); 1999 if (s->volume_set) 2000 cs46xx_dsp_scb_set_volume(chip, s, 2001 s->volume[0], s->volume[1]); 2002 } 2003 if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) { 2004 cs46xx_dsp_enable_spdif_hw(chip); 2005 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2, 2006 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10); 2007 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) 2008 cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV, 2009 ins->spdif_csuv_stream); 2010 } 2011 if (chip->dsp_spos_instance->spdif_status_in) { 2012 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005); 2013 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff); 2014 } 1992 2015 return 0; 1993 2016 } -
GPL/trunk/alsa-kernel/pci/cs46xx/dsp_spos.h
r305 r598 213 213 (scb->sub_list_ptr->address << 0x10) | 214 214 (scb->next_scb_ptr->address)); 215 scb->updated = 1; 215 216 } 216 217 … … 223 224 snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl) << 2, val); 224 225 snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl + 1) << 2, val); 226 scb->volume_set = 1; 227 scb->volume[0] = left; 228 scb->volume[1] = right; 225 229 } 226 230 #endif /* __DSP_SPOS_H__ */ -
GPL/trunk/alsa-kernel/pci/cs46xx/dsp_spos_scb_lib.c
r399 r598 116 116 { 117 117 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 118 unsigned long flags;119 118 120 119 if ( scb->parent_scb_ptr ) { … … 154 153 } 155 154 156 spin_lock_irqsave(&chip->reg_lock, flags);157 158 155 /* update parent first entry in DSP RAM */ 159 156 cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr); … … 163 160 164 161 scb->parent_scb_ptr = NULL; 165 spin_unlock_irqrestore(&chip->reg_lock, flags);166 162 } 167 163 } … … 198 194 #endif 199 195 200 spin_lock_irqsave(& scb->lock, flags);196 spin_lock_irqsave(&chip->reg_lock, flags); 201 197 _dsp_unlink_scb (chip,scb); 202 spin_unlock_irqrestore(& scb->lock, flags);198 spin_unlock_irqrestore(&chip->reg_lock, flags); 203 199 204 200 cs46xx_dsp_proc_free_scb_desc(scb); … … 208 204 209 205 ins->scbs[scb->index].deleted = 1; 206 #ifdef CONFIG_PM 207 kfree(ins->scbs[scb->index].data); 208 ins->scbs[scb->index].data = NULL; 209 #endif 210 210 211 211 if (scb->index < ins->scb_highest_frag_index) … … 1509 1509 return -EIO; 1510 1510 1511 spin_lock(&pcm_channel->src_scb->lock); 1512 1511 spin_lock_irqsave(&chip->reg_lock, flags); 1513 1512 if (pcm_channel->unlinked) { 1514 spin_unlock (&pcm_channel->src_scb->lock);1513 spin_unlock_irqrestore(&chip->reg_lock, flags); 1515 1514 return -EIO; 1516 1515 } 1517 1516 1518 spin_lock_irqsave(&chip->reg_lock, flags);1519 1517 pcm_channel->unlinked = 1; 1518 1519 _dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb); 1520 1520 spin_unlock_irqrestore(&chip->reg_lock, flags); 1521 1521 1522 _dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb);1523 1524 spin_unlock(&pcm_channel->src_scb->lock);1525 1522 return 0; 1526 1523 } … … 1534 1531 unsigned long flags; 1535 1532 1536 spin_lock (&pcm_channel->src_scb->lock);1533 spin_lock_irqsave(&chip->reg_lock, flags); 1537 1534 1538 1535 if (pcm_channel->unlinked == 0) { 1539 spin_unlock (&pcm_channel->src_scb->lock);1536 spin_unlock_irqrestore(&chip->reg_lock, flags); 1540 1537 return -EIO; 1541 1538 } … … 1553 1550 pcm_channel->pcm_reader_scb->parent_scb_ptr = parent_scb; 1554 1551 1555 spin_lock_irqsave(&chip->reg_lock, flags);1556 1557 1552 /* update SCB entry in DSP RAM */ 1558 1553 cs46xx_dsp_spos_update_scb(chip,pcm_channel->pcm_reader_scb); … … 1563 1558 pcm_channel->unlinked = 0; 1564 1559 spin_unlock_irqrestore(&chip->reg_lock, flags); 1565 1566 spin_unlock(&pcm_channel->src_scb->lock);1567 1560 return 0; 1568 1561 } … … 1597 1590 int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src) 1598 1591 { 1592 unsigned long flags; 1593 1599 1594 if (snd_BUG_ON(!src->parent_scb_ptr)) 1600 1595 return -EINVAL; … … 1603 1598 cs46xx_dsp_scb_set_volume (chip,src,0,0); 1604 1599 1600 spin_lock_irqsave(&chip->reg_lock, flags); 1605 1601 _dsp_unlink_scb (chip,src); 1602 spin_unlock_irqrestore(&chip->reg_lock, flags); 1606 1603 1607 1604 return 0;
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