Changeset 546
- Timestamp:
- Mar 3, 2011, 8:59:04 PM (14 years ago)
- Location:
- GPL/branches/uniaud32-2.1.x
- Files:
-
- 8 edited
-
drv32/irq.cpp (modified) (2 diffs)
-
drv32/rmhelp.cpp (modified) (1 diff)
-
drv32/strategy.c (modified) (3 diffs)
-
include/irqos2.h (modified) (2 diffs)
-
include/osspci.h (modified) (1 diff)
-
lib32/irq.c (modified) (8 diffs)
-
lib32/pci.c (modified) (6 diffs)
-
uniaud.inc (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
GPL/branches/uniaud32-2.1.x/drv32/irq.cpp
r519 r546 47 47 48 48 //****************************************************************************** 49 #ifdef ACPI50 //PS+++ fix description51 // Problem is in open high IRQ (acpi.psd /SMP /APIC) at boot time.52 // In my case - this IRQ use SATA and we have flood IRQ. This flood do53 // MASK this IRQ from kernel. Next danis506.add has very slow read from54 // disk.55 // How to fix.56 // At boot time (from DevInit to DevInitComplete) we use low IRQ. In57 // DevInitComplete we close low IRQ and open high IRQ. All values for58 // IRQ we are getting from ACPI call.59 60 //PS+++ Array with saving IRQ number61 #ifdef __cplusplus62 extern "C" {63 #endif64 struct SaveIRQForSlot65 {66 ULONG ulSlotNo;67 BYTE LowIRQ;68 BYTE HighIRQ;69 BYTE Pin;70 } sISRHigh[8]; //FIX me to MAX_DEVICES or same71 72 int SaveIRQCounter = 0; //PS+++ current position in array73 extern ULONG InitCompleteWas; //PS+++ Indication of InitComplete call74 #ifdef __cplusplus75 }76 #endif77 78 #endif //ACPI79 //******************************************************************************80 49 BOOL ALSA_SetIrq(ULONG ulIrq, ULONG ulSlotNo, BOOL fShared) 81 50 { … … 106 75 return FALSE; 107 76 } 108 109 //PS+++ Begin110 #ifdef ACPI111 if (InitCompleteWas == 0)112 {113 dprintf(("RMSetIrq saved %d %d %x was %d", (ULONG)ulIrq, ulSlotNo,(ULONG)sISRHigh[SaveIRQCounter].LowIRQ));114 sISRHigh[SaveIRQCounter].ulSlotNo = ulSlotNo;115 ulIrq = sISRHigh[SaveIRQCounter].LowIRQ;116 SaveIRQCounter++;117 }118 119 #endif120 //PS End121 77 122 78 return TRUE; -
GPL/branches/uniaud32-2.1.x/drv32/rmhelp.cpp
r519 r546 149 149 //****************************************************************************** 150 150 //****************************************************************************** 151 //PS+++ see to irq.cpp 152 #ifdef ACPI 153 #ifdef __cplusplus 154 extern "C" { 155 #endif 156 struct SaveIRQForSlot 157 { 158 ULONG ulSlotNo; 159 BYTE LowIRQ; 160 BYTE HighIRQ; 161 BYTE Pin; 162 }; 163 extern struct SaveIRQForSlot sISRHigh[]; 164 extern int SaveIRQCounter; 165 #ifdef __cplusplus 166 } 167 #endif 168 #endif 169 BOOL RMRequestIRQ(ULONG ulIrq, BOOL fShared) 170 { 171 RESOURCESTRUCT Resource; 172 HRESOURCE hres; 173 APIRET rc; 174 175 Resource.ResourceType = RS_TYPE_IRQ; 176 #ifdef ACPI //PS+++ 177 Resource.IRQResource.PCIIrqPin = (USHORT)(sISRHigh[SaveIRQCounter].Pin & 0xf); 178 if (sISRHigh[SaveIRQCounter].HighIRQ) 179 Resource.IRQResource.IRQLevel = (USHORT)sISRHigh[SaveIRQCounter].HighIRQ & 0xff; 180 else 181 Resource.IRQResource.IRQLevel = (USHORT)ulIrq & 0xff; 182 #else 183 Resource.IRQResource.IRQLevel = (USHORT)ulIrq & 0xff; 184 Resource.IRQResource.PCIIrqPin = 0; 185 #endif 186 Resource.IRQResource.IRQFlags = ( fShared ) ? RS_IRQ_SHARED : RS_IRQ_EXCLUSIVE; 187 188 rc = RMAllocResource(DriverHandle, // Handle to driver. 189 FlatToSel((ULONG)&hres), // OUT: "allocated" resource node handle 151 BOOL RMRequestIRQ(ULONG ulIrq, BOOL fShared, PHRESOURCE phRes) 152 { 153 RESOURCESTRUCT Resource; 154 HRESOURCE hres; 155 APIRET rc; 156 157 Resource.ResourceType = RS_TYPE_IRQ; 158 Resource.IRQResource.IRQLevel = (USHORT)ulIrq & 0xff; 159 Resource.IRQResource.PCIIrqPin = 0; 160 Resource.IRQResource.IRQFlags = ( fShared ) ? RS_IRQ_SHARED : RS_IRQ_EXCLUSIVE; 161 162 rc = RMAllocResource(DriverHandle, // Handle to driver. 163 FlatToSel((ULONG)&hres), // OUT: "allocated" resource node handle 190 164 FlatToSel((ULONG)&Resource)); // Resource to allocate. 191 165 192 if( rc == 0 && ctResHandles < MAX_RESHANDLES ) 193 { 194 arResHandles[ctResHandles++] = hres; return TRUE; 195 } 196 197 dprintf(("RMAllocResource[%d] IRQ rc = %d\n", ctResHandles, rc)); 198 199 return rc == 0; 166 if (rc == 0) { 167 if (ctResHandles < MAX_RESHANDLES ) arResHandles[ctResHandles++] = hres; 168 *phRes = hres; 169 } 170 171 dprintf(("RMAllocResource[%d] IRQ rc = %d\n", ctResHandles, rc)); 172 173 return rc == 0; 174 } 175 176 //****************************************************************************** 177 //****************************************************************************** 178 BOOL RMDeallocateIRQ(HRESOURCE hRes) 179 { 180 ULONG ulI; 181 182 RMDeallocResource(DriverHandle, hRes); 183 184 for (ulI=0; ulI<ctResHandles; ulI++) { 185 if (arResHandles[ulI] == hRes) { 186 arResHandles[ulI] = 0; 187 break; 188 } 189 } 190 191 return 0; 200 192 } 201 193 -
GPL/branches/uniaud32-2.1.x/drv32/strategy.c
r523 r546 39 39 40 40 ULONG DiscardableInit(RPInit __far*); 41 42 41 ULONG deviceOwner = DEV_NO_OWNER; 43 42 ULONG numOS2Opens = 0; … … 76 75 // External initialization complete entry-point 77 76 #ifdef ACPI 78 // See desription in irq.cpp 79 #include "irqos2.h" //PS+++ 80 #ifdef __cplusplus 81 extern "C" { 82 #endif 83 ULONG InitCompleteWas = 0; //PS+++ Indication of InitComplete call 84 struct SaveIRQForSlot 85 { 86 ULONG ulSlotNo; 87 BYTE LowIRQ; 88 BYTE HighIRQ; 89 BYTE Pin; 90 }; 91 extern struct SaveIRQForSlot sISRHigh[]; 92 extern int SaveIRQCounter; 93 #ifdef __cplusplus 94 } 95 #endif 77 #include "irqos2.h" 96 78 #endif //ACPI 97 79 //****************************************************************************** … … 101 83 { 102 84 #ifdef ACPI 103 //PS+++ Begin 104 ULONG i, rc = 0; 105 106 InitCompleteWas = 1; 107 for (i = 0; i < SaveIRQCounter; i++) 108 { 109 dprintf(("Close IRQ%d - Open IRQ%d",(ULONG)sISRHigh[i].LowIRQ,(ULONG)sISRHigh[i].HighIRQ)); 110 if (sISRHigh[i].HighIRQ) 111 { 112 ALSA_FreeIrq(sISRHigh[i].LowIRQ); 113 if (!ALSA_SetIrq(sISRHigh[i].HighIRQ, sISRHigh[i].ulSlotNo, 1)) 114 { 115 return (RPERR_COMMAND | RPDONE); 116 } 117 } 118 } 85 PciAdjustInterrupts(); 119 86 #endif 120 //PS++ End121 87 //dprintf(("StratInitComplete")); 122 88 return(RPDONE); -
GPL/branches/uniaud32-2.1.x/include/irqos2.h
r316 r546 48 48 unsigned flHandlers; 49 49 IRQHANDLER_INFO irqHandlers[MAX_SHAREDIRQS]; 50 ULONG hRes; 50 51 } IRQ_SLOT; 51 52 … … 59 60 60 61 BOOL process_interrupt(ULONG ulSlotNo, ULONG *pulIrq); 61 62 void PciAdjustInterrupts(void); 62 63 ULONG os2gettimemsec(); 63 64 ULONG os2gettimesec(); -
GPL/branches/uniaud32-2.1.x/include/osspci.h
r63 r546 33 33 BOOL RMRequestIO(ULONG ulIOBase, ULONG ulIOLength); 34 34 BOOL RMRequestMem(ULONG ulMemBase, ULONG ulMemLength); 35 BOOL RMRequestIRQ(ULONG ulIrq, BOOL fShared); 35 BOOL RMRequestIRQ(ULONG ulIrq, BOOL fShared, ULONG *phRes); 36 BOOL RMDeallocateIRQ(ULONG hRes); 36 37 VOID RMDone(ULONG DevID); 37 38 -
GPL/branches/uniaud32-2.1.x/lib32/irq.c
r519 r546 45 45 46 46 static IRQ_SLOT arSlots[MAX_IRQ_SLOTS] = { 0 }; 47 static ULONG 47 static ULONG eoiIrq[255] = {0}; 48 48 49 49 … … 52 52 static IRQ_SLOT *FindSlot(unsigned irq) 53 53 { 54 IRQ_SLOT*pSlot;55 56 57 58 if( pSlot->irqNo == irq )return pSlot;59 60 61 54 IRQ_SLOT *pSlot; 55 56 for( pSlot = arSlots; pSlot != &arSlots[MAX_IRQ_SLOTS]; pSlot++ ) 57 { 58 if( pSlot->irqNo == irq ) return pSlot; 59 } 60 61 return NULL; 62 62 } 63 63 … … 67 67 68 68 int request_irq(unsigned irq, irq_handler_t handler, 69 unsigned long x0, const char *x1, void *x2) 70 { 71 IRQ_SLOT *pSlot = FindSlot(irq & 0xff); 72 unsigned u, uSlotNo = (unsigned)-1; 73 if( !pSlot ) 74 { 75 // find empty slot 76 for( uSlotNo = 0; uSlotNo < MAX_IRQ_SLOTS; uSlotNo++ ) 77 { 78 if( arSlots[uSlotNo].flHandlers == 0 ) 79 { 80 pSlot = &arSlots[uSlotNo]; break; 81 } 82 } 83 84 } 85 86 if( pSlot ) 87 { 88 if(RMRequestIRQ(/*hResMgr,*/ irq , (x0 & SA_SHIRQ) != 0) == FALSE) { 89 rprintf(("RMRequestIRQ failed for irq %d", irq)); 90 // return 0; 91 } 92 93 for( u = 0; u < MAX_SHAREDIRQS; u++ ) 94 { 95 if( pSlot->irqHandlers[u].handler == NULL ) 96 { 97 pSlot->irqNo = irq & 0xff; 98 pSlot->irqHandlers[u].handler = handler; 99 pSlot->irqHandlers[u].x0 = x0; 100 pSlot->irqHandlers[u].x1 = (char *)x1; 101 pSlot->irqHandlers[u].x2 = x2; 102 103 if( pSlot->flHandlers != 0 || 104 ALSA_SetIrq( irq & 0xff, uSlotNo, (x0 & SA_SHIRQ) != 0) ) 105 { 106 pSlot->flHandlers |= 1 << u; 107 return 0; 108 } 109 110 break; 111 } 112 } 113 } 114 115 rprintf(("request_irq: Unable to register irq handler for irq %d\n", irq & 0xff )); 116 return 1; 69 unsigned long ulSharedFlag, const char *pchName, void *pUserData) 70 { 71 IRQ_SLOT *pSlot = FindSlot(irq & 0xff); 72 unsigned u, uSlotNo = (unsigned)-1; 73 ULONG hRes; 74 75 dprintf(("request_irq: Enter for irq %d", irq & 0xff )); 76 if ( !pSlot ) { 77 // find empty slot 78 for( uSlotNo = 0; uSlotNo < MAX_IRQ_SLOTS; uSlotNo++ ) { 79 if( arSlots[uSlotNo].flHandlers == 0 ) { 80 pSlot = &arSlots[uSlotNo]; 81 break; 82 } 83 } 84 } 85 86 if ( pSlot ) { 87 hRes = NULL; 88 if (RMRequestIRQ(irq, (ulSharedFlag & SA_SHIRQ) != 0, &hRes) == FALSE) { 89 rprintf(("RMRequestIRQ failed for irq %d", irq)); 90 // return 0; 91 } 92 pSlot->irqNo = irq & 0xff; 93 pSlot->hRes = hRes; 94 95 for ( u = 0; u < MAX_SHAREDIRQS; u++ ) { 96 if ( pSlot->irqHandlers[u].handler == NULL ) { 97 pSlot->irqHandlers[u].handler = handler; 98 pSlot->irqHandlers[u].x0 = ulSharedFlag; 99 pSlot->irqHandlers[u].x1 = (char *)pchName; 100 pSlot->irqHandlers[u].x2 = pUserData; 101 102 if( pSlot->flHandlers != 0 || ALSA_SetIrq( irq & 0xff, uSlotNo, (ulSharedFlag & SA_SHIRQ) != 0) ) { 103 pSlot->flHandlers |= 1 << u; 104 return 0; 105 } 106 107 break; 108 } 109 } 110 } 111 112 rprintf(("request_irq: Unable to register irq handler for irq %d", irq & 0xff )); 113 return 1; 117 114 } 118 115 … … 122 119 void free_irq(unsigned int irq, void *userdata) 123 120 { 124 unsigned u; 125 IRQ_SLOT *pSlot; 126 127 if( (pSlot = FindSlot(irq)) != NULL ) 128 { 129 for( u = 0; u < MAX_SHAREDIRQS; u++ ) 130 { 131 if( pSlot->irqHandlers[u].x2 == userdata ) 132 { 133 pSlot->flHandlers &= ~(1 << u); 134 if( pSlot->flHandlers == 0 ) 135 { 136 ALSA_FreeIrq(pSlot->irqNo); 137 pSlot->irqNo = 0; 138 // pSlot->fEOI = 0; 139 } 140 141 pSlot->irqHandlers[u].handler = NULL; 142 pSlot->irqHandlers[u].x0 = 0; 143 pSlot->irqHandlers[u].x1 = NULL; 144 pSlot->irqHandlers[u].x2 = NULL; 145 146 return; 147 148 } 149 } 150 } 121 unsigned u; 122 IRQ_SLOT *pSlot; 123 124 if( (pSlot = FindSlot(irq&0xff)) != NULL ) { 125 for( u = 0; u < MAX_SHAREDIRQS; u++ ) { 126 if( pSlot->irqHandlers[u].x2 == userdata ) { 127 pSlot->flHandlers &= ~(1 << u); 128 if( pSlot->flHandlers == 0 ) { 129 dprintf(("free_irq: irq %d", irq & 0xff )); 130 ALSA_FreeIrq(pSlot->irqNo); 131 pSlot->irqNo = 0; 132 RMDeallocateIRQ(pSlot->hRes); 133 pSlot->hRes = NULL; 134 // pSlot->fEOI = 0; 135 } 136 137 pSlot->irqHandlers[u].handler = NULL; 138 pSlot->irqHandlers[u].x0 = 0; 139 pSlot->irqHandlers[u].x1 = NULL; 140 pSlot->irqHandlers[u].x2 = NULL; 141 142 return; 143 144 } 145 } 146 } 151 147 } 152 148 … … 156 152 void eoi_irq(unsigned int irq) 157 153 { 158 159 160 161 162 163 164 154 /*(void)irq; */ 155 /* 156 IRQ_SLOT *pSlot = FindSlot(irq); 157 158 if( pSlot ) pSlot->fEOI = 1; 159 */ 160 eoiIrq[irq & 0xff]++; 165 161 } 166 162 … … 170 166 BOOL process_interrupt(ULONG ulSlotNo, ULONG *pulIrq) 171 167 { 172 173 174 168 unsigned u; 169 int rc; 170 IRQ_SLOT *pSlot; 175 171 176 172 //dprintf(("enter int proc %d %d",ulSlotNo, *pulIrq)); 177 173 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 174 if(fSuspended) 175 {//If our device is suspended, then we can't receive interrupts, so it must 176 //be for some other device 177 //Don't pass it to the linux handler as the device doesn't respond as expected 178 //when suspended 179 dprintf(("Slot %d IRQ %d suspended",ulSlotNo, *pulIrq)); 180 return FALSE; 181 } 182 183 if( ulSlotNo < MAX_IRQ_SLOTS ) 184 { 185 pSlot = &arSlots[ulSlotNo]; 186 187 for( u = 0; u < MAX_SHAREDIRQS; u++ ) 188 { 189 if(pSlot && pSlot->irqHandlers[u].handler ) 190 { 191 fInInterrupt = TRUE; 196 192 #if 0 197 198 193 rc = pSlot->irqHandlers[u].handler(pSlot->irqNo, 194 pSlot->irqHandlers[u].x2, 0); 199 195 #else 200 201 196 rc = pSlot->irqHandlers[u].handler(pSlot->irqNo, 197 pSlot->irqHandlers[u].x2); 202 198 #endif 203 199 204 205 206 207 200 // HDA Hardware generates controller interrupts and stream interrupts 201 // the uniaud16 driver only cares about stream interrupts. 202 // azx_interrupt in alsa-kernel/pci/hda/hda_intel.c will return rc 2 if 203 // the interrupt is from the controller. There is no need to call uniaud16 208 204 // for these interrupts 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 //pSlot->fEOI = 0;224 225 226 205 if ( rc == 2 ) { 206 fInInterrupt = FALSE; 207 *pulIrq = pSlot->irqNo; 208 eoiIrq[pSlot->irqNo] = 0; 209 return TRUE; 210 } 211 212 if (rc == 1) eoi_irq(pSlot->irqNo); 213 rc = (eoiIrq[pSlot->irqNo] > 0); 214 fInInterrupt = FALSE; 215 216 if( rc /*== 1 || pSlot->fEOI*/ ) { 217 218 *pulIrq = pSlot->irqNo; 219 // pSlot->fEOI = 0; 220 221 //ok, this interrupt was intended for us; notify the 16 bits MMPM/2 driver 222 OSS32_ProcessIRQ(); 227 223 //dprintf(("exit(1) int proc %d %d",ulSlotNo, *pulIrq)); 228 229 230 231 232 233 224 eoiIrq[pSlot->irqNo] = 0; 225 return TRUE; 226 } 227 } 228 } 229 } 234 230 //dprintf(("exit(0) int proc %d %d",ulSlotNo, *pulIrq)); 235 231 236 232 return FALSE; 237 233 } 238 234 … … 242 238 int in_interrupt() 243 239 { 244 240 return fInInterrupt; 245 241 } 246 242 … … 250 246 void disable_irq(int irq) 251 247 { 252 253 } 254 255 //****************************************************************************** 256 //****************************************************************************** 257 248 dprintf(("disable_irq %d NOT implemented", irq)); 249 } 250 251 //****************************************************************************** 252 //****************************************************************************** 253 -
GPL/branches/uniaud32-2.1.x/lib32/pci.c
r536 r546 135 135 //****************************************************************************** 136 136 //****************************************************************************** 137 #ifdef ACPI138 struct SaveIRQForSlot139 {140 ULONG ulSlotNo;141 BYTE LowIRQ;142 BYTE HighIRQ;143 BYTE Pin;144 };145 extern struct SaveIRQForSlot sISRHigh[];146 extern int SaveIRQCounter;147 #endif148 149 137 //Find the next matching PCI device starting with the device specified by pcidev 150 138 static ULONG pci_query_device(const struct pci_device_id *id_table, struct pci_dev near *pcidev, ULONG ulLast) 151 139 { 152 140 int resNo, addr; 153 u32 devNr, busNr, funcNr, detectedId, cfgaddrreg, temp, temp2;141 u32 devNr, busNr, funcNr, detectedId, cfgaddrreg, ulPciAdr, ulTmp1, ulTmp2; 154 142 #ifdef ACPI 155 143 APIRET rc; 156 ULONG temp1,temp3; //PS++144 ULONG PicIRQ, ApicIRQ; 157 145 #endif 158 146 u8 headerType; … … 168 156 for(;funcNr<8;funcNr++) { 169 157 headerType = 0; 170 temp= PCI_CONFIG_ENABLE | (busNr<<16) | (devNr<<11) | (funcNr<<8);171 outl( temp, PCI_CONFIG_ADDRESS);158 ulPciAdr = PCI_CONFIG_ENABLE | (busNr<<16) | (devNr<<11) | (funcNr<<8); 159 outl(ulPciAdr, PCI_CONFIG_ADDRESS); 172 160 detectedId = inl(PCI_CONFIG_DATA); 173 161 … … 177 165 } 178 166 179 outl( temp+ PCI_CLASS_REVISION, PCI_CONFIG_ADDRESS);180 temp2 = inl(PCI_CONFIG_DATA) >> 8; /* get class */181 182 //dprintf(("det=%x(%x) %x need=%x%x %x", detectedId, headerType, temp2, id_table->device&0xffff, id_table->vendor, id_table->class));167 outl(ulPciAdr + PCI_CLASS_REVISION, PCI_CONFIG_ADDRESS); 168 ulTmp2 = inl(PCI_CONFIG_DATA) >> 8; /* get class */ 169 170 //dprintf(("det=%x(%x) %x need=%x%x %x", detectedId, headerType, ulTmp2, id_table->device&0xffff, id_table->vendor, id_table->class)); 183 171 184 172 if ( id_table->class ) { 185 if ( ( temp2 & id_table->class_mask) != id_table->class ) continue;173 if ( (ulTmp2 & id_table->class_mask) != id_table->class ) continue; 186 174 } else { 187 if ( (id_table->device == PCI_ANY_ID) && (( temp2 >> 8) != PCI_CLASS_MULTIMEDIA_AUDIO) ) continue;175 if ( (id_table->device == PCI_ANY_ID) && ((ulTmp2 >> 8) != PCI_CLASS_MULTIMEDIA_AUDIO) ) continue; 188 176 } 189 177 … … 191 179 if ( (id_table->device != PCI_ANY_ID) && (id_table->device != (detectedId >> 16)) ) continue; 192 180 193 outl( temp| (PCI_HEADER_TYPE & ~3), PCI_CONFIG_ADDRESS);181 outl(ulPciAdr | (PCI_HEADER_TYPE & ~3), PCI_CONFIG_ADDRESS); 194 182 headerType = inb(PCI_CONFIG_DATA + (PCI_HEADER_TYPE & 3)); 195 183 … … 224 212 resNo = 0; 225 213 for( addr = PCI_BASE_ADDRESS_0; addr <= PCI_BASE_ADDRESS_5; addr += 4 ) { 226 pci_read_config_dword(pcidev, addr, & temp);227 if( temp != 0 && temp!= 0xffffffff ) {214 pci_read_config_dword(pcidev, addr, &ulTmp1); 215 if( ulTmp1 != 0 && ulTmp1 != 0xffffffff ) { 228 216 pci_write_config_dword(pcidev, addr, 0xffffffff); 229 pci_read_config_dword(pcidev, addr, & temp2);230 pci_write_config_dword(pcidev, addr, temp);231 232 if( temp& PCI_BASE_ADDRESS_SPACE_IO ) {217 pci_read_config_dword(pcidev, addr, &ulTmp2); 218 pci_write_config_dword(pcidev, addr, ulTmp1); 219 220 if( ulTmp1 & PCI_BASE_ADDRESS_SPACE_IO ) { 233 221 pcidev->resource[resNo].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO; 234 pcidev->resource[resNo].start = temp& PCI_BASE_ADDRESS_IO_MASK;222 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_IO_MASK; 235 223 pcidev->resource[resNo].end = pcidev->resource[resNo].start + 236 ~( temp2 & PCI_BASE_ADDRESS_IO_MASK) + 1;224 ~(ulTmp2 & PCI_BASE_ADDRESS_IO_MASK) + 1; 237 225 } 238 226 else 239 227 { 240 228 pcidev->resource[resNo].flags = IORESOURCE_MEM | IORESOURCE_MEM_WRITEABLE; 241 pcidev->resource[resNo].start = temp& PCI_BASE_ADDRESS_MEM_MASK;229 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_MEM_MASK; 242 230 pcidev->resource[resNo].end = pcidev->resource[resNo].start + 243 ~( temp2 & PCI_BASE_ADDRESS_MEM_MASK) + 1;231 ~(ulTmp2 & PCI_BASE_ADDRESS_MEM_MASK) + 1; 244 232 } 245 233 246 234 resNo++; 247 248 235 } 249 236 } 250 237 251 238 // IRQ and PIN 252 pci_read_config_dword(pcidev, PCI_INTERRUPT_LINE, &temp); 239 pci_read_config_dword(pcidev, PCI_INTERRUPT_LINE, &ulTmp1); 240 rprintf(("pci_query_device: PCI config IRQ=%d", ulTmp1&0xff)); 253 241 #ifdef ACPI 254 sISRHigh[SaveIRQCounter].Pin = (temp >> 8) & 0xf;255 temp2 = temp3 = 0;256 242 rc = ACPIFindPCIDevice( (ULONG)busNr, // Bus 257 243 (ULONG)devNr, // Dev 258 244 (ULONG)(pcidev->devfn >> 8) & 7, // Function 259 & temp1, // PIC IRQ260 & temp3, // APIC IRQ245 &PicIRQ, // PIC IRQ 246 &ApicIRQ, // APIC IRQ 261 247 NULL, // ACPI handle to finding device 262 248 "Uniaud32"); // Name for acpi log 263 249 if (!rc) { 264 250 // Check APIC IRQ, if we have /SMP /APIC, must be set 265 if (temp1) temp = (temp & (~0xff)) | (temp1 & 0xff); 266 // Check PIC IRQ 267 else if (temp3) temp = (temp & (~0xff)) | (temp3 & 0xff); 268 dprintf(("pci_query_device: IRQs ACPI PIC%d APIC%d", temp1, temp3)); 269 sISRHigh[SaveIRQCounter].LowIRQ = temp1; 270 sISRHigh[SaveIRQCounter].HighIRQ = temp3; 251 if (ApicIRQ) ulTmp1 = (ulTmp1 & (~0xff)) | (ApicIRQ & 0xff); 252 else if (PicIRQ) ulTmp1 = (ulTmp1 & (~0xff)) | (PicIRQ & 0xff); 253 rprintf(("pci_query_device: IRQs ACPI PIC=%ld APIC=%ld chosen=%d", PicIRQ, ApicIRQ, ulTmp1&0xff)); 271 254 } 272 255 #endif /* ACPI */ 273 if( (u8) temp && (u8)temp!= 0xff ) {256 if( (u8)ulTmp1 && (u8)ulTmp1 != 0xff ) { 274 257 pcidev->irq_resource[0].flags = IORESOURCE_IRQ; 275 pcidev->irq_resource[0].start = pcidev->irq_resource[0].end = temp& 0xffff;276 pcidev->irq = (u8) temp;258 pcidev->irq_resource[0].start = pcidev->irq_resource[0].end = ulTmp1 & 0xffff; 259 pcidev->irq = (u8)ulTmp1; 277 260 } 278 261 … … 990 973 } 991 974 975 void PciAdjustInterrupts() { 976 int i; 977 struct pci_dev *pcidev; 978 struct pci_driver *driver; 979 ULONG PicIRQ, ApicIRQ, ulTmp1, rc; 980 981 for (i=0; i<MAX_PCI_DEVICES; i++) { 982 if (!pci_devices[i].devfn) continue; 983 pcidev = &pci_devices[i]; 984 rc = ACPIFindPCIDevice( pcidev->bus->number, // Bus 985 PCI_SLOT(pcidev->devfn), // Dev 986 PCI_FUNC(pcidev->devfn), // Function 987 &PicIRQ, // PIC IRQ 988 &ApicIRQ, // APIC IRQ 989 NULL, // ACPI handle to finding device 990 "Uniaud32"); // Name for acpi log 991 if (!rc) { 992 ulTmp1 = 0; 993 // Check APIC IRQ, if we have /SMP /APIC, must be set 994 if (ApicIRQ) ulTmp1 = (ulTmp1 & (~0xff)) | (ApicIRQ & 0xff); 995 else if (PicIRQ) ulTmp1 = (ulTmp1 & (~0xff)) | (PicIRQ & 0xff); 996 rprintf(("PciAdjustInterrupts: IRQs ACPI PIC=%ld APIC=%ld was=%d chosen=%ld", PicIRQ, ApicIRQ, pcidev->irq, ulTmp1)); 997 if( (u8)ulTmp1 && ((u8)ulTmp1 != 0xff) && ((u8)ulTmp1 != pcidev->irq) ) { 998 driver = pcidev->pcidriver; 999 if(driver && driver->suspend) driver->suspend(pcidev, SNDRV_CTL_POWER_D0); 1000 1001 pcidev->irq_resource[0].flags = IORESOURCE_IRQ; 1002 pcidev->irq_resource[0].start = pcidev->irq_resource[0].end = ulTmp1 & 0xffff; 1003 pcidev->irq = (u8)ulTmp1; 1004 1005 if(driver && driver->resume) driver->resume(pcidev); 1006 } 1007 } 1008 } /* for loop */ 1009 } -
GPL/branches/uniaud32-2.1.x/uniaud.inc
r543 r546 7 7 # BUILDVERSION must be 3 parts, and only numbers like 5.44.108 8 8 # It is best that 2'nd number is always 2 digits, eg at least 10 9 BUILDVERSION = 2.1. 19 BUILDVERSION = 2.1.2 10 10 11 11 # Fixpack version … … 13 13 # ex RC3 GA FIXPACK2 beta_47 14 14 # Comment out to avoid a fixpack line in bldlevel 15 FIXPACK = BETA SVNr54 315 FIXPACK = BETA SVNr546 16 16 17 17 # ALSA BUILD VERSION
Note:
See TracChangeset
for help on using the changeset viewer.
