Changeset 376
- Timestamp:
- Sep 26, 2008, 10:09:48 PM (17 years ago)
- Location:
- GPL/branches/uniaud32-2.0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
GPL/branches/uniaud32-2.0/alsa-kernel/pci/hda/hda_intel.c
r372 r376 958 958 struct azx_dev *azx_dev; 959 959 u32 status; 960 int i; 960 #ifdef TARGET_OS2 961 u32 ignore_irq = 0; 962 #endif 963 int i; 961 964 962 965 spin_lock(&chip->reg_lock); … … 977 980 if (azx_dev->irq_ignore) { 978 981 azx_dev->irq_ignore = 0; 979 continue; 982 #ifdef TARGET_OS2 983 ignore_irq |= azx_dev->sd_int_sta_mask; 984 #endif 985 continue; 980 986 } 981 987 /* check whether this IRQ is really acceptable */ … … 1009 1015 #endif 1010 1016 spin_unlock(&chip->reg_lock); 1011 1017 1018 #ifdef TARGET_OS2 1019 if ((status & RIRB_INT_MASK) || ignore_irq) { 1020 return 2; 1021 } 1022 #endif 1023 1012 1024 return IRQ_HANDLED; 1013 1025 } -
GPL/branches/uniaud32-2.0/lib32/irq.c
r352 r376 205 205 pSlot->irqHandlers[u].x2); 206 206 #endif 207 208 // HDA Hardware generates controller interrupts and stream interrupts 209 // the uniaud16 driver only cares about stream interrupts. 210 // azx_process_interrupt will return rc 2 if the interttupt is from the 211 // controller. There is no need to call uniaud16 for these interrupts 212 if ( rc == 2 ) { 213 fInInterrupt = FALSE; 214 *pulIrq = pSlot->irqNo; 215 eoiIrq[pSlot->irqNo] = 0; 216 return TRUE; 217 } 218 207 219 if (rc == 1) eoi_irq(pSlot->irqNo); 208 220 rc = (eoiIrq[pSlot->irqNo] > 0);
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