Changeset 224 for GPL/branches/alsa-resync1/alsa-kernel/pci
- Timestamp:
- Jul 26, 2007, 7:21:09 AM (18 years ago)
- Location:
- GPL/branches/alsa-resync1/alsa-kernel/pci
- Files:
-
- 3 added
- 16 edited
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emu10k1/emuproc.c (modified) (1 diff)
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ice1712/ak4524.c (modified) (16 diffs)
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ice1712/delta.c (modified) (13 diffs)
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ice1712/ews.c (modified) (32 diffs)
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ice1712/ews.h (modified) (2 diffs)
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ice1712/ice1712.c (modified) (75 diffs)
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ice1712/ice1712.h (modified) (8 diffs)
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ice1712/ice1724.c (added)
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ice1712/makefile.os2 (modified) (1 diff)
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ice1712/revo.c (added)
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ice1712/revo.h (added)
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korg1212/korg1212.c (modified) (85 diffs)
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rme96.c (modified) (28 diffs)
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rme9652/hammerfall_mem.c (modified) (4 diffs)
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rme9652/hdsp.c (modified) (18 diffs)
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rme9652/rme9652.c (modified) (21 diffs)
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sonicvibes.c (modified) (10 diffs)
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trident/trident_main.c (modified) (5 diffs)
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ymfpci/ymfpci_main.c (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
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GPL/branches/alsa-resync1/alsa-kernel/pci/emu10k1/emuproc.c
r210 r224 478 478 479 479 480 #ifdef TARGET_OS2481 480 static struct snd_info_entry_ops snd_emu10k1_proc_ops_fx8010 = { 482 0, 0, snd_emu10k1_fx8010_read, 0, 0,0,0,0 481 .read = snd_emu10k1_fx8010_read, 483 482 }; 484 #else 485 static struct snd_info_entry_ops snd_emu10k1_proc_ops_fx8010 = { 486 read: snd_emu10k1_fx8010_read, 487 }; 488 #endif 483 489 484 int __devinit snd_emu10k1_proc_init(struct snd_emu10k1 * emu) 490 485 { -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/ak4524.c
r215 r224 2 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 3 * 4 * AK4524 / AK4528 / AK4529 interface4 * AK4524 / AK4528 / AK4529 / AK4355 / AK4381 interface 5 5 * 6 6 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz> … … 32 32 33 33 /* 34 * write AK4 524register34 * write AK4xxx register 35 35 */ 36 void snd_ice1712_ak 4524_write(ice1712_t *ice, int chip,37 unsigned char addr, unsigned char data)38 { 39 unsigned char tmp, saved[2];36 void snd_ice1712_akm4xxx_write(akm4xxx_t *ak, int chip, 37 unsigned char addr, unsigned char data) 38 { 39 unsigned int tmp; 40 40 int idx; 41 41 unsigned int addrdata; 42 ak4524_t *ak = &ice->ak4524;42 ice1712_t *ice = ak->chip; 43 43 44 44 snd_assert(chip >= 0 && chip < 4, return); 45 45 46 46 if (ak->ops.start) { 47 if (ak->ops.start( ice, saved, chip) < 0)47 if (ak->ops.start(ak, chip) < 0) 48 48 return; 49 49 } else 50 snd_ice1712_save_gpio_status(ice , saved);51 52 tmp = snd_ice1712_ read(ice, ICE1712_IREG_GPIO_DATA);50 snd_ice1712_save_gpio_status(ice); 51 52 tmp = snd_ice1712_gpio_read(ice); 53 53 tmp |= ak->add_flags; 54 54 tmp &= ~ak->mask_flags; … … 56 56 if (ak->cif) { 57 57 tmp |= ak->cs_mask; /* start without chip select */ 58 } else { 59 tmp &= ~ak->cs_mask; /* chip select low */ 60 snd_ice1712_gpio_write(ice, tmp); 61 udelay(1); 62 } 58 63 } else { 59 tmp &= ~ak->cs_mask; /* chip select low */ 60 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 61 udelay(1); 62 } 63 } else { 64 /* doesn't handle cf=1 yet */ 64 65 tmp &= ~ak->cs_mask; 65 66 tmp |= ak->cs_addr; 66 } 67 68 addr &= 0x07; 67 snd_ice1712_gpio_write(ice, tmp); 68 udelay(1); 69 } 70 69 71 /* build I2C address + data byte */ 70 /* assume C1=1, C0=0 */71 addrdata = 0xa000 | (addr<< 8) | data;72 addrdata = (ak->caddr << 6) | 0x20 | (addr & 0x1f); 73 addrdata = (addrdata << 8) | data; 72 74 for (idx = 15; idx >= 0; idx--) { 73 tmp &= ~(ak->data_mask | ak->clk_mask); 75 /* drop clock */ 76 tmp &= ~ak->clk_mask; 77 snd_ice1712_gpio_write(ice, tmp); 78 udelay(1); 79 /* set data */ 74 80 if (addrdata & (1 << idx)) 75 81 tmp |= ak->data_mask; 76 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 77 //udelay(200); 82 else 83 tmp &= ~ak->data_mask; 84 snd_ice1712_gpio_write(ice, tmp); 78 85 udelay(1); 86 /* raise clock */ 79 87 tmp |= ak->clk_mask; 80 snd_ice1712_ write(ice, ICE1712_IREG_GPIO_DATA, tmp);88 snd_ice1712_gpio_write(ice, tmp); 81 89 udelay(1); 82 90 } 83 91 84 if (ak->type == SND_AK4524) { 85 if ((addr != 0x04 && addr != 0x05) || (data & 0x80) == 0) 92 /* save the data */ 93 if (ak->type == SND_AK4524 || ak->type == SND_AK4528) { 94 if ((addr != 0x04 && addr != 0x05) || (data & 0x80) == 0) 95 ak->images[chip][addr] = data; 96 else 97 ak->ipga_gain[chip][addr-4] = data; 98 } else { 99 /* AK4529, or else */ 86 100 ak->images[chip][addr] = data; 87 else 88 ak->ipga_gain[chip][addr-4] = data; 89 } 90 101 } 102 91 103 if (ak->cs_mask == ak->cs_addr) { 92 104 if (ak->cif) { 93 105 /* assert a cs pulse to trigger */ 94 106 tmp &= ~ak->cs_mask; 95 snd_ice1712_ write(ice, ICE1712_IREG_GPIO_DATA, tmp);107 snd_ice1712_gpio_write(ice, tmp); 96 108 udelay(1); 97 109 } … … 101 113 tmp |= ak->cs_none; /* deselect address */ 102 114 } 103 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);104 udelay(1);115 snd_ice1712_gpio_write(ice, tmp); 116 udelay(1); 105 117 106 118 if (ak->ops.stop) 107 ak->ops.stop( ice, saved);119 ak->ops.stop(ak); 108 120 else 109 snd_ice1712_restore_gpio_status(ice, saved); 110 } 111 112 void snd_ice1712_ak4524_reset(ice1712_t *ice, int state) 113 { 114 int chip; 121 snd_ice1712_restore_gpio_status(ice); 122 } 123 124 /* 125 * reset the AKM codecs 126 * @state: 1 = reset codec, 0 = restore the registers 127 * 128 * assert the reset operation and restores the register values to the chips. 129 */ 130 void snd_ice1712_akm4xxx_reset(akm4xxx_t *ak, int state) 131 { 132 unsigned int chip; 115 133 unsigned char reg; 116 ak4524_t *ak = &ice->ak4524;117 134 118 135 switch (ak->type) { 119 136 case SND_AK4524: 120 137 case SND_AK4528: 121 for (chip = 0; chip < ak->num_dacs/2; chip++) {122 snd_ice1712_ak4524_write(ice, chip, 0x01, state ? 0x00 : 0x03);123 if (state)124 continue;138 for (chip = 0; chip < ak->num_dacs/2; chip++) { 139 snd_ice1712_akm4xxx_write(ak, chip, 0x01, state ? 0x00 : 0x03); 140 if (state) 141 continue; 125 142 /* DAC volumes */ 126 143 for (reg = 0x04; reg < (ak->type == SND_AK4528 ? 0x06 : 0x08); reg++) 127 snd_ice1712_ak4524_write(ice, chip, reg, ak->images[chip][reg]);144 snd_ice1712_akm4xxx_write(ak, chip, reg, ak->images[chip][reg]); 128 145 if (ak->type == SND_AK4528) 129 continue;146 continue; 130 147 /* IPGA */ 131 for (reg = 0x04; reg < 0x06; reg++)132 snd_ice1712_ak4524_write(ice, chip, reg, ak->ipga_gain[chip][reg-4]);148 for (reg = 0x04; reg < 0x06; reg++) 149 snd_ice1712_akm4xxx_write(ak, chip, reg, ak->ipga_gain[chip][reg-4]); 133 150 } 134 151 break; … … 136 153 /* FIXME: needed for ak4529? */ 137 154 break; 155 case SND_AK4355: 156 snd_ice1712_akm4xxx_write(ak, 0, 0x01, state ? 0x02 : 0x01); 157 if (state) 158 return; 159 for (reg = 0x00; reg < 0x0a; reg++) 160 if (reg != 0x01) 161 snd_ice1712_akm4xxx_write(ak, 0, reg, ak->images[0][reg]); 162 break; 163 case SND_AK4381: 164 for (chip = 0; chip < ak->num_dacs/2; chip++) { 165 snd_ice1712_akm4xxx_write(ak, chip, 0x00, state ? 0x0c : 0x0f); 166 if (state) 167 continue; 168 for (reg = 0x01; reg < 0x05; reg++) 169 snd_ice1712_akm4xxx_write(ak, chip, reg, ak->images[chip][reg]); 170 } 171 break; 138 172 } 139 173 } 140 174 141 175 /* 142 * initialize all the ak4 524/4528chips176 * initialize all the ak4xxx chips 143 177 */ 144 void __devinit snd_ice1712_ak4524_init(ice1712_t *ice)178 static void __devinit snd_ice1712_akm4xxx_init_chip(akm4xxx_t *ak) 145 179 { 146 180 static unsigned char inits_ak4524[] = { … … 171 205 0x09, 0x01, /* 9: ATS=0, RSTN=1 */ 172 206 0x0a, 0x3f, /* A: all power up, no zero/overflow detection */ 173 0x00, 0x0 8, /* 0: TDM=0, 24bit I2S, SMUTE=0 */207 0x00, 0x0c, /* 0: TDM=0, 24bit I2S, SMUTE=0 */ 174 208 0x01, 0x00, /* 1: ACKS=0, ADC, loop off */ 175 209 0x02, 0xff, /* 2: LOUT1 muted */ … … 184 218 0xff, 0xff 185 219 }; 220 static unsigned char inits_ak4355[] = { 221 0x01, 0x02, /* 1: reset and soft-mute */ 222 0x00, 0x06, /* 0: mode3(i2s), disable auto-clock detect, disable DZF, sharp roll-off, RSTN#=0 */ 223 // 0x02, 0x0e, /* 2: DA's power up, normal speed, RSTN#=0 */ 224 0x02, 0x2e, 225 0x03, 0x01, /* 3: de-emphasis off */ 226 0x04, 0x00, /* 4: LOUT1 volume muted */ 227 0x05, 0x00, /* 5: ROUT1 volume muted */ 228 0x06, 0x00, /* 6: LOUT2 volume muted */ 229 0x07, 0x00, /* 7: ROUT2 volume muted */ 230 0x08, 0x00, /* 8: LOUT3 volume muted */ 231 0x09, 0x00, /* 9: ROUT3 volume muted */ 232 0x0a, 0x00, /* a: DATT speed=0, ignore DZF */ 233 0x01, 0x01, /* 1: un-reset, unmute */ 234 0xff, 0xff 235 }; 236 static unsigned char inits_ak4381[] = { 237 0x00, 0x0c, /* 0: mode3(i2s), disable auto-clock detect */ 238 // 0x01, 0x02, /* 1: de-emphasis off, normal speed, sharp roll-off, DZF off */ 239 0x01, 0x12, 240 0x02, 0x00, /* 2: DZF disabled */ 241 0x03, 0x00, /* 3: LATT 0 */ 242 0x04, 0x00, /* 4: RATT 0 */ 243 0x00, 0x0f, /* 0: power-up, un-reset */ 244 0xff, 0xff 245 }; 246 186 247 int chip, num_chips; 187 248 unsigned char *ptr, reg, data, *inits; 188 ak4524_t *ak = &ice->ak4524;189 249 190 250 switch (ak->type) { … … 198 258 break; 199 259 case SND_AK4529: 200 default:201 260 inits = inits_ak4529; 202 261 num_chips = 1; 203 262 break; 263 case SND_AK4355: 264 inits = inits_ak4355; 265 num_chips = 1; 266 break; 267 case SND_AK4381: 268 inits = inits_ak4381; 269 num_chips = ak->num_dacs / 2; 270 break; 271 default: 272 snd_BUG(); 273 return; 204 274 } 205 275 … … 209 279 reg = *ptr++; 210 280 data = *ptr++; 211 snd_ice1712_ak4524_write(ice, chip, reg, data); 212 } 213 } 281 snd_ice1712_akm4xxx_write(ak, chip, reg, data); 282 } 283 } 284 } 285 286 287 /* 288 * initialize the akm4xxx_t record with the template 289 */ 290 void snd_ice1712_akm4xxx_init(akm4xxx_t *ak, const akm4xxx_t *temp, ice1712_t *ice) 291 { 292 *ak = *temp; 293 ak->chip = ice; 294 snd_ice1712_akm4xxx_init_chip(ak); 214 295 } 215 296 … … 217 298 #define AK_GET_CHIP(val) (((val) >> 8) & 0xff) 218 299 #define AK_GET_ADDR(val) ((val) & 0xff) 219 #define AK_GET_SHIFT(val) (((val) >> 16) & 0xff) 220 #define AK_COMPOSE(chip,addr,shift) (((chip) << 8) | (addr) | ((shift) << 16)) 221 222 static int snd_ice1712_ak4524_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 223 { 300 #define AK_GET_SHIFT(val) (((val) >> 16) & 0x7f) 301 #define AK_GET_INVERT(val) (((val) >> 23) & 1) 302 #define AK_GET_MASK(val) (((val) >> 24) & 0xff) 303 #define AK_COMPOSE(chip,addr,shift,mask) (((chip) << 8) | (addr) | ((shift) << 16) | ((mask) << 24)) 304 #define AK_INVERT (1<<23) 305 306 static int snd_ice1712_akm4xxx_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 307 { 308 unsigned int mask = AK_GET_MASK(kcontrol->private_value); 309 224 310 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 225 311 uinfo->count = 1; 226 312 uinfo->value.integer.min = 0; 227 uinfo->value.integer.max = 127;228 return 0; 229 } 230 231 static int snd_ice1712_ak 4524_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)232 { 233 ice1712_t *ice =snd_kcontrol_chip(kcontrol);313 uinfo->value.integer.max = mask; 314 return 0; 315 } 316 317 static int snd_ice1712_akm4xxx_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 318 { 319 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 234 320 int chip = AK_GET_CHIP(kcontrol->private_value); 235 321 int addr = AK_GET_ADDR(kcontrol->private_value); 236 ucontrol->value.integer.value[0] = ice->ak4524.images[chip][addr]; 237 return 0; 238 } 239 240 static int snd_ice1712_ak4524_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 241 { 242 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 322 int invert = AK_GET_INVERT(kcontrol->private_value); 323 unsigned int mask = AK_GET_MASK(kcontrol->private_value); 324 unsigned char val = ak->images[chip][addr]; 325 326 ucontrol->value.integer.value[0] = invert ? mask - val : val; 327 return 0; 328 } 329 330 static int snd_ice1712_akm4xxx_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 331 { 332 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 243 333 int chip = AK_GET_CHIP(kcontrol->private_value); 244 334 int addr = AK_GET_ADDR(kcontrol->private_value); 245 unsigned char nval = ucontrol->value.integer.value[0]; 246 int change = ice->ak4524.images[chip][addr] != nval; 335 int invert = AK_GET_INVERT(kcontrol->private_value); 336 unsigned int mask = AK_GET_MASK(kcontrol->private_value); 337 unsigned char nval = ucontrol->value.integer.value[0] % (mask+1); 338 int change; 339 340 if (invert) 341 nval = mask - nval; 342 change = ak->images[chip][addr] != nval; 247 343 if (change) 248 snd_ice1712_ak 4524_write(ice, chip, addr, nval);344 snd_ice1712_akm4xxx_write(ak, chip, addr, nval); 249 345 return change; 250 346 } 251 347 252 static int snd_ice1712_ak 4524_ipga_gain_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)348 static int snd_ice1712_akm4xxx_ipga_gain_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 253 349 { 254 350 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; … … 259 355 } 260 356 261 static int snd_ice1712_ak 4524_ipga_gain_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)262 { 263 ice1712_t *ice =snd_kcontrol_chip(kcontrol);357 static int snd_ice1712_akm4xxx_ipga_gain_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 358 { 359 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 264 360 int chip = AK_GET_CHIP(kcontrol->private_value); 265 361 int addr = AK_GET_ADDR(kcontrol->private_value); 266 ucontrol->value.integer.value[0] = ice->ak4524.ipga_gain[chip][addr-4] & 0x7f;267 return 0; 268 } 269 270 static int snd_ice1712_ak 4524_ipga_gain_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)271 { 272 ice1712_t *ice =snd_kcontrol_chip(kcontrol);362 ucontrol->value.integer.value[0] = ak->ipga_gain[chip][addr-4] & 0x7f; 363 return 0; 364 } 365 366 static int snd_ice1712_akm4xxx_ipga_gain_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 367 { 368 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 273 369 int chip = AK_GET_CHIP(kcontrol->private_value); 274 370 int addr = AK_GET_ADDR(kcontrol->private_value); 275 371 unsigned char nval = (ucontrol->value.integer.value[0] % 37) | 0x80; 276 int change = ice->ak4524.ipga_gain[chip][addr] != nval;372 int change = ak->ipga_gain[chip][addr] != nval; 277 373 if (change) 278 snd_ice1712_ak 4524_write(ice, chip, addr, nval);374 snd_ice1712_akm4xxx_write(ak, chip, addr, nval); 279 375 return change; 280 376 } 281 377 282 static int snd_ice1712_ak 4524_deemphasis_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)378 static int snd_ice1712_akm4xxx_deemphasis_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 283 379 { 284 380 static char *texts[4] = { … … 294 390 } 295 391 296 static int snd_ice1712_ak 4524_deemphasis_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)297 { 298 ice1712_t *ice =snd_kcontrol_chip(kcontrol);392 static int snd_ice1712_akm4xxx_deemphasis_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol) 393 { 394 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 299 395 int chip = AK_GET_CHIP(kcontrol->private_value); 300 396 int addr = AK_GET_ADDR(kcontrol->private_value); 301 397 int shift = AK_GET_SHIFT(kcontrol->private_value); 302 ucontrol->value.enumerated.item[0] = ( ice->ak4524.images[chip][addr] >> shift) & 3;303 return 0; 304 } 305 306 static int snd_ice1712_ak 4524_deemphasis_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)307 { 308 ice1712_t *ice =snd_kcontrol_chip(kcontrol);398 ucontrol->value.enumerated.item[0] = (ak->images[chip][addr] >> shift) & 3; 399 return 0; 400 } 401 402 static int snd_ice1712_akm4xxx_deemphasis_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol) 403 { 404 akm4xxx_t *ak = _snd_kcontrol_chip(kcontrol); 309 405 int chip = AK_GET_CHIP(kcontrol->private_value); 310 406 int addr = AK_GET_ADDR(kcontrol->private_value); … … 313 409 int change; 314 410 315 nval = (nval << shift) | ( ice->ak4524.images[chip][addr] & ~(3 << shift));316 change = ice->ak4524.images[chip][addr] != nval;411 nval = (nval << shift) | (ak->images[chip][addr] & ~(3 << shift)); 412 change = ak->images[chip][addr] != nval; 317 413 if (change) 318 snd_ice1712_ak 4524_write(ice, chip, addr, nval);414 snd_ice1712_akm4xxx_write(ak, chip, addr, nval); 319 415 return change; 320 416 } … … 324 420 */ 325 421 326 int __devinit snd_ice1712_ak4524_build_controls(ice1712_t *ice) 327 { 328 int err, idx; 329 ak4524_t *ak = &ice->ak4524; 330 331 for (idx = 0; idx < ak->num_dacs; ++idx) { 422 int __devinit snd_ice1712_akm4xxx_build_controls(ice1712_t *ice) 423 { 424 unsigned int idx; 425 int err; 426 unsigned int akidx; 427 428 for (akidx = 0; akidx < ice->akm_codecs; akidx++) { 429 akm4xxx_t *ak = &ice->akm[akidx]; 430 for (idx = 0; idx < ak->num_dacs; ++idx) { 332 431 snd_kcontrol_t ctl; 333 432 memset(&ctl, 0, sizeof(ctl)); 334 433 strcpy(ctl.id.name, "DAC Volume"); 335 ctl.id.index = idx ;434 ctl.id.index = idx + ak->idx_offset * 2; 336 435 ctl.id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 337 ctl.info = snd_ice1712_ak 4524_volume_info;436 ctl.info = snd_ice1712_akm4xxx_volume_info; 338 437 ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE; 339 ctl.get = snd_ice1712_ak4524_volume_get; 340 ctl.put = snd_ice1712_ak4524_volume_put; 341 switch (ak->type) { 342 case SND_AK4524: 343 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 6, 0); /* register 6 & 7 */ 344 break; 345 case SND_AK4528: 346 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */ 347 break; 348 case SND_AK4529: { 349 int val = idx < 6 ? idx + 2 : (idx - 6) + 0xb; /* registers 2-7 and b,c */ 350 ctl.private_value = AK_COMPOSE(0, val, 0); 351 break; 352 } 353 } 354 ctl.private_data = ice; 438 ctl.get = snd_ice1712_akm4xxx_volume_get; 439 ctl.put = snd_ice1712_akm4xxx_volume_put; 440 switch (ak->type) { 441 case SND_AK4524: 442 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 6, 0, 127); /* register 6 & 7 */ 443 break; 444 case SND_AK4528: 445 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 127); /* register 4 & 5 */ 446 break; 447 case SND_AK4529: { 448 int val = idx < 6 ? idx + 2 : (idx - 6) + 0xb; /* registers 2-7 and b,c */ 449 ctl.private_value = AK_COMPOSE(0, val, 0, 255) | AK_INVERT; 450 break; 451 } 452 case SND_AK4355: 453 ctl.private_value = AK_COMPOSE(0, idx + 4, 0, 255); /* register 4-9, chip #0 only */ 454 break; 455 case SND_AK4381: 456 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 3, 0, 255); /* register 3 & 4 */ 457 break; 458 default: 459 return -EINVAL; 460 } 461 ctl.private_data = ak; 355 462 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 356 463 return err; 357 464 } 358 for (idx = 0; idx < ak->num_adcs && ak->type == SND_AK4524; ++idx) {465 for (idx = 0; idx < ak->num_adcs && ak->type == SND_AK4524; ++idx) { 359 466 snd_kcontrol_t ctl; 360 467 memset(&ctl, 0, sizeof(ctl)); … … 362 469 ctl.id.index = idx; 363 470 ctl.id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 364 ctl.info = snd_ice1712_ak 4524_volume_info;471 ctl.info = snd_ice1712_akm4xxx_volume_info; 365 472 ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE; 366 ctl.get = snd_ice1712_ak 4524_volume_get;367 ctl.put = snd_ice1712_ak 4524_volume_put;368 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */369 ctl.private_data = ice;473 ctl.get = snd_ice1712_akm4xxx_volume_get; 474 ctl.put = snd_ice1712_akm4xxx_volume_put; 475 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 127); /* register 4 & 5 */ 476 ctl.private_data = ak; 370 477 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 371 478 return err; … … 374 481 ctl.id.index = idx; 375 482 ctl.id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 376 ctl.info = snd_ice1712_ak 4524_ipga_gain_info;483 ctl.info = snd_ice1712_akm4xxx_ipga_gain_info; 377 484 ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE; 378 ctl.get = snd_ice1712_ak 4524_ipga_gain_get;379 ctl.put = snd_ice1712_ak 4524_ipga_gain_put;380 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */381 ctl.private_data = ice;485 ctl.get = snd_ice1712_akm4xxx_ipga_gain_get; 486 ctl.put = snd_ice1712_akm4xxx_ipga_gain_put; 487 ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 0); /* register 4 & 5 */ 488 ctl.private_data = ak; 382 489 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 383 490 return err; 384 491 } 385 for (idx = 0; idx < ak->num_dacs/2; idx++) {492 for (idx = 0; idx < ak->num_dacs/2; idx++) { 386 493 snd_kcontrol_t ctl; 387 494 memset(&ctl, 0, sizeof(ctl)); 388 495 strcpy(ctl.id.name, "Deemphasis"); 389 ctl.id.index = idx ;496 ctl.id.index = idx + ak->idx_offset; 390 497 ctl.id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; 391 ctl.info = snd_ice1712_ak 4524_deemphasis_info;498 ctl.info = snd_ice1712_akm4xxx_deemphasis_info; 392 499 ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE; 393 ctl.get = snd_ice1712_ak4524_deemphasis_get; 394 ctl.put = snd_ice1712_ak4524_deemphasis_put; 395 switch (ak->type) { 396 case SND_AK4524: 397 case SND_AK4528: 398 ctl.private_value = AK_COMPOSE(idx, 3, 0); /* register 3 */ 399 break; 400 case SND_AK4529: { 401 int shift = idx == 3 ? 6 : (2 - idx) * 2; 402 ctl.private_value = AK_COMPOSE(0, 8, shift); /* register 8 with shift */ 403 break; 404 } 405 } 406 ctl.private_data = ice; 500 ctl.get = snd_ice1712_akm4xxx_deemphasis_get; 501 ctl.put = snd_ice1712_akm4xxx_deemphasis_put; 502 switch (ak->type) { 503 case SND_AK4524: 504 case SND_AK4528: 505 ctl.private_value = AK_COMPOSE(idx, 3, 0, 0); /* register 3 */ 506 break; 507 case SND_AK4529: { 508 int shift = idx == 3 ? 6 : (2 - idx) * 2; 509 ctl.private_value = AK_COMPOSE(0, 8, shift, 0); /* register 8 with shift */ 510 break; 511 } 512 case SND_AK4355: 513 ctl.private_value = AK_COMPOSE(idx, 3, 0, 0); 514 break; 515 case SND_AK4381: 516 ctl.private_value = AK_COMPOSE(idx, 1, 1, 0); 517 break; 518 } 519 ctl.private_data = ak; 407 520 if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0) 408 521 return err; 409 522 } 410 return 0; 411 } 412 413 523 } 524 return 0; 525 } 526 527 -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/delta.c
r215 r224 190 190 static int delta_spdif_default_put(ice1712_t *ice, snd_ctl_elem_value_t * ucontrol) 191 191 { 192 unsigned long flags;193 192 unsigned int val; 194 193 int change; 195 194 196 195 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 197 spin_lock_irq save(&ice->reg_lock, flags);196 spin_lock_irq(&ice->reg_lock); 198 197 change = ice->spdif.cs8403_bits != val; 199 198 ice->spdif.cs8403_bits = val; 200 199 if (change && ice->playback_pro_substream == NULL) { 201 spin_unlock_irq restore(&ice->reg_lock, flags);200 spin_unlock_irq(&ice->reg_lock); 202 201 snd_ice1712_delta_cs8403_spdif_write(ice, val); 203 202 } else { 204 spin_unlock_irq restore(&ice->reg_lock, flags);203 spin_unlock_irq(&ice->reg_lock); 205 204 } 206 205 return change; … … 214 213 static int delta_spdif_stream_put(ice1712_t *ice, snd_ctl_elem_value_t * ucontrol) 215 214 { 216 unsigned long flags;217 215 unsigned int val; 218 216 int change; 219 217 220 218 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 221 spin_lock_irq save(&ice->reg_lock, flags);219 spin_lock_irq(&ice->reg_lock); 222 220 change = ice->spdif.cs8403_stream_bits != val; 223 221 ice->spdif.cs8403_stream_bits = val; 224 222 if (change && ice->playback_pro_substream != NULL) { 225 spin_unlock_irq restore(&ice->reg_lock, flags);223 spin_unlock_irq(&ice->reg_lock); 226 224 snd_ice1712_delta_cs8403_spdif_write(ice, val); 227 225 } else { 228 spin_unlock_irq restore(&ice->reg_lock, flags);226 spin_unlock_irq(&ice->reg_lock); 229 227 } 230 228 return change; … … 235 233 * AK4524 on Delta 44 and 66 to choose the chip mask 236 234 */ 237 static int delta_ak4524_start( ice1712_t *ice, unsigned char *saved, int chip)238 { 239 snd_ice1712_save_gpio_status( ice, saved);240 ice->ak4524.cs_mask =241 ice->ak4524.cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :242 ICE1712_DELTA_CODEC_CHIP_B;235 static int delta_ak4524_start(akm4xxx_t *ak, int chip) 236 { 237 snd_ice1712_save_gpio_status(ak->chip); 238 ak->cs_mask = 239 ak->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 240 ICE1712_DELTA_CODEC_CHIP_B; 243 241 return 0; 244 242 } … … 247 245 * AK4524 on Delta1010LT to choose the chip address 248 246 */ 249 static int delta1010lt_ak4524_start( ice1712_t *ice, unsigned char *saved, int chip)250 { 251 snd_ice1712_save_gpio_status( ice, saved);252 ice->ak4524.cs_mask = ICE1712_DELTA_1010LT_CS;253 ice->ak4524.cs_addr = chip << 4;247 static int delta1010lt_ak4524_start(akm4xxx_t *ak, int chip) 248 { 249 snd_ice1712_save_gpio_status(ak->chip); 250 ak->cs_mask = ICE1712_DELTA_1010LT_CS; 251 ak->cs_addr = chip << 4; 254 252 return 0; 255 253 } … … 258 256 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 259 257 */ 260 static void delta_ak4524_set_rate_val( ice1712_t *ice, unsigned int rate)258 static void delta_ak4524_set_rate_val(akm4xxx_t *ak, unsigned int rate) 261 259 { 262 260 unsigned char tmp, tmp2; 261 ice1712_t *ice = ak->chip; 263 262 264 263 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ … … 277 276 278 277 /* do it again */ 279 snd_ice1712_ak 4524_reset(ice, 1);278 snd_ice1712_akm4xxx_reset(ak, 1); 280 279 down(&ice->gpio_mutex); 281 280 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; … … 284 283 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 285 284 up(&ice->gpio_mutex); 286 snd_ice1712_ak 4524_reset(ice, 0);285 snd_ice1712_akm4xxx_reset(ak, 0); 287 286 } 288 287 … … 299 298 300 299 /* set up */ 301 static void delta_setup_spdif(ice1712_t *ice, snd_pcm_substream_t * substream)300 static void delta_setup_spdif(ice1712_t *ice, int rate) 302 301 { 303 302 unsigned long flags; … … 309 308 if (tmp & 0x01) /* consumer */ 310 309 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 311 switch ( substream->runtime->rate) {310 switch (rate) { 312 311 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 313 312 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; … … 328 327 */ 329 328 329 static akm4xxx_t akm_audiophile __devinitdata = { 330 .type = SND_AK4528, 331 .num_adcs = 2, 332 .num_dacs = 2, 333 .caddr = 2, 334 .cif = 0, 335 .data_mask = ICE1712_DELTA_AP_DOUT, 336 .clk_mask = ICE1712_DELTA_AP_CCLK, 337 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 338 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 339 .cs_none = 0, 340 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 341 .mask_flags = 0, 342 .ops = { 343 .set_rate_val = delta_ak4524_set_rate_val 344 } 345 }; 346 347 static akm4xxx_t akm_delta410 __devinitdata = { 348 .type = SND_AK4529, 349 .num_adcs = 2, 350 .num_dacs = 8, 351 .caddr = 0, 352 .cif = 0, 353 .data_mask = ICE1712_DELTA_AP_DOUT, 354 .clk_mask = ICE1712_DELTA_AP_CCLK, 355 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 356 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 357 .cs_none = 0, 358 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 359 .mask_flags = 0, 360 .ops = { 361 .set_rate_val = delta_ak4524_set_rate_val 362 } 363 }; 364 365 static akm4xxx_t akm_delta1010lt __devinitdata = { 366 .type = SND_AK4524, 367 .num_adcs = 8, 368 .num_dacs = 8, 369 .caddr = 2, 370 .cif = 0, /* the default level of the CIF pin from AK4524 */ 371 .data_mask = ICE1712_DELTA_1010LT_DOUT, 372 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 373 .cs_mask = 0, 374 .cs_addr = 0, /* set later */ 375 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 376 .add_flags = 0, 377 .mask_flags = 0, 378 .ops = { 379 .start = delta1010lt_ak4524_start, 380 .set_rate_val = delta_ak4524_set_rate_val 381 } 382 }; 383 384 static akm4xxx_t akm_delta44 __devinitdata = { 385 .type = SND_AK4524, 386 .num_adcs = 4, 387 .num_dacs = 4, 388 .caddr = 2, 389 .cif = 0, /* the default level of the CIF pin from AK4524 */ 390 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 391 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 392 .cs_mask = 0, 393 .cs_addr = 0, /* set later */ 394 .cs_none = 0, 395 .add_flags = 0, 396 .mask_flags = 0, 397 .ops = { 398 .start = delta_ak4524_start, 399 .set_rate_val = delta_ak4524_set_rate_val 400 } 401 }; 402 330 403 static int __devinit snd_ice1712_delta_init(ice1712_t *ice) 331 404 { 332 405 int err; 333 ak 4524_t *ak;406 akm4xxx_t *ak; 334 407 335 408 /* determine I2C, DACs and ADCs */ … … 369 442 case ICE1712_SUBDEVICE_DELTA66: 370 443 ice->spdif.ops.open = delta_open_spdif; 371 ice->spdif.ops.setup = delta_setup_spdif;444 ice->spdif.ops.setup_rate = delta_setup_spdif; 372 445 ice->spdif.ops.default_get = delta_spdif_default_get; 373 446 ice->spdif.ops.default_put = delta_spdif_default_put; … … 379 452 } 380 453 454 /* no analog? */ 455 switch (ice->eeprom.subvendor) { 456 case ICE1712_SUBDEVICE_DELTA1010: 457 case ICE1712_SUBDEVICE_DELTADIO2496: 458 return 0; 459 } 460 381 461 /* second stage of initialization, analog parts and others */ 382 ak = &ice->ak4524; 462 ak = ice->akm = kmalloc(sizeof(akm4xxx_t), GFP_KERNEL); 463 if (! ak) 464 return -ENOMEM; 465 ice->akm_codecs = 1; 466 383 467 switch (ice->eeprom.subvendor) { 384 468 case ICE1712_SUBDEVICE_AUDIOPHILE: 469 snd_ice1712_akm4xxx_init(ak, &akm_audiophile, ice); 470 break; 385 471 case ICE1712_SUBDEVICE_DELTA410: 386 ak->num_adcs = ak->num_dacs = 2; 387 ak->type = SND_AK4528; 388 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA410) { 389 ak->num_dacs = 8; 390 ak->type = SND_AK4529; 391 } 392 ak->cif = 0; /* the default level of the CIF pin from AK4528/4529 */ 393 ak->data_mask = ICE1712_DELTA_AP_DOUT; 394 ak->clk_mask = ICE1712_DELTA_AP_CCLK; 395 ak->cs_mask = ak->cs_addr = ICE1712_DELTA_AP_CS_CODEC; /* select AK4528/4529 codec */ 396 ak->cs_none = 0; 397 ak->add_flags = ICE1712_DELTA_AP_CS_DIGITAL; /* assert digital high */ 398 ak->mask_flags = 0; 399 ak->ops.set_rate_val = delta_ak4524_set_rate_val; 400 snd_ice1712_ak4524_init(ice); 472 snd_ice1712_akm4xxx_init(ak, &akm_delta410, ice); 401 473 break; 402 474 case ICE1712_SUBDEVICE_DELTA1010LT: 403 ak->num_adcs = ak->num_dacs = 8; 404 ak->type = SND_AK4524; 405 ak->cif = 0; /* the default level of the CIF pin from AK4524 */ 406 ak->data_mask = ICE1712_DELTA_1010LT_DOUT; 407 ak->clk_mask = ICE1712_DELTA_1010LT_CCLK; 408 ak->cs_mask = ak->cs_addr = 0; /* set later */ 409 ak->cs_none = ICE1712_DELTA_1010LT_CS_NONE; 410 ak->add_flags = 0; 411 ak->mask_flags = 0; 412 ak->ops.start = delta1010lt_ak4524_start; 413 ak->ops.set_rate_val = delta_ak4524_set_rate_val; 414 snd_ice1712_ak4524_init(ice); 475 snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, ice); 415 476 break; 416 477 case ICE1712_SUBDEVICE_DELTA66: 417 478 case ICE1712_SUBDEVICE_DELTA44: 418 ak->num_adcs = ak->num_dacs = 4; 419 ak->type = SND_AK4524; 420 ak->cif = 0; /* the default level of the CIF pin from AK4524 */ 421 ak->data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA; 422 ak->clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK; 423 ak->cs_mask = ak->cs_addr = 0; /* set later */ 424 ak->cs_none = 0; 425 ak->add_flags = 0; 426 ak->mask_flags = 0; 427 ak->ops.start = delta_ak4524_start; 428 ak->ops.set_rate_val = delta_ak4524_set_rate_val; 429 snd_ice1712_ak4524_init(ice); 430 break; 479 snd_ice1712_akm4xxx_init(ak, &akm_delta44, ice); 480 break; 481 default: 482 snd_BUG(); 483 return -EINVAL; 431 484 } 432 485 … … 509 562 case ICE1712_SUBDEVICE_DELTA44: 510 563 case ICE1712_SUBDEVICE_DELTA66: 511 err = snd_ice1712_ak 4524_build_controls(ice);564 err = snd_ice1712_akm4xxx_build_controls(ice); 512 565 if (err < 0) 513 566 return err; -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/ews.c
r215 r224 84 84 unsigned char mask; 85 85 86 snd_ice1712_save_gpio_status(ice , (unsigned char *)&bus->private_value);86 snd_ice1712_save_gpio_status(ice); 87 87 /* set RW high */ 88 88 mask = ICE1712_EWX2496_RW; … … 101 101 { 102 102 ice1712_t *ice = snd_magic_cast(ice1712_t, bus->private_data, return); 103 snd_ice1712_restore_gpio_status(ice , (unsigned char *)&bus->private_value);103 snd_ice1712_restore_gpio_status(ice); 104 104 } 105 105 … … 113 113 if (data) 114 114 mask |= ICE1712_EWX2496_SERIAL_DATA; /* write SDA */ 115 ice->gpio _direction &= ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA);116 ice->gpio _direction |= mask;117 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio _direction);115 ice->gpio.direction &= ~(ICE1712_EWX2496_SERIAL_CLOCK|ICE1712_EWX2496_SERIAL_DATA); 116 ice->gpio.direction |= mask; 117 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio.direction); 118 118 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~mask); 119 119 } … … 156 156 157 157 /* start callback for EWS88MT, needs to select a certain chip mask */ 158 static int ews88mt_ak4524_start(ice1712_t *ice, unsigned char *saved, int chip) 159 { 158 static int ews88mt_ak4524_start(akm4xxx_t *ak, int chip) 159 { 160 ice1712_t *ice = ak->chip; 160 161 unsigned char tmp; 161 162 /* assert AK4524 CS */ 162 163 if (snd_ice1712_ews88mt_chip_select(ice, ~(1 << chip) & 0x0f) < 0) 163 164 return -EINVAL; 164 snd_ice1712_save_gpio_status(ice , saved);165 snd_ice1712_save_gpio_status(ice); 165 166 tmp = ICE1712_EWS88_SERIAL_DATA | 166 167 ICE1712_EWS88_SERIAL_CLOCK | 167 168 ICE1712_EWS88_RW; 168 169 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 169 ice->gpio _direction | tmp);170 ice->gpio.direction | tmp); 170 171 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp); 171 172 return 0; … … 173 174 174 175 /* stop callback for EWS88MT, needs to deselect chip mask */ 175 static void ews88mt_ak4524_stop(ice1712_t *ice, unsigned char *saved) 176 { 177 snd_ice1712_restore_gpio_status(ice, saved); 176 static void ews88mt_ak4524_stop(akm4xxx_t *ak) 177 { 178 ice1712_t *ice = ak->chip; 179 snd_ice1712_restore_gpio_status(ice); 178 180 udelay(1); 179 181 snd_ice1712_ews88mt_chip_select(ice, 0x0f); … … 181 183 182 184 /* start callback for EWX24/96 */ 183 static int ewx2496_ak4524_start(ice1712_t *ice, unsigned char *saved, int chip) 184 { 185 static int ewx2496_ak4524_start(akm4xxx_t *ak, int chip) 186 { 187 ice1712_t *ice = ak->chip; 185 188 unsigned char tmp; 186 snd_ice1712_save_gpio_status(ice , saved);189 snd_ice1712_save_gpio_status(ice); 187 190 tmp = ICE1712_EWX2496_SERIAL_DATA | 188 191 ICE1712_EWX2496_SERIAL_CLOCK | … … 190 193 ICE1712_EWX2496_RW; 191 194 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 192 ice->gpio _direction | tmp);195 ice->gpio.direction | tmp); 193 196 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp); 194 197 return 0; … … 196 199 197 200 /* start callback for DMX 6fire */ 198 static int dmx6fire_ak4524_start(ice1712_t *ice, unsigned char *saved, int chip) 199 { 201 static int dmx6fire_ak4524_start(akm4xxx_t *ak, int chip) 202 { 203 ice1712_t *ice = ak->chip; 200 204 unsigned char tmp; 201 snd_ice1712_save_gpio_status(ice , saved);202 tmp = ice->ak4524.cs_mask = ice->ak4524.cs_addr = (1 << chip) & ICE1712_6FIRE_AK4524_CS_MASK;205 snd_ice1712_save_gpio_status(ice); 206 tmp = ak->cs_mask = ak->cs_addr = (1 << chip) & ICE1712_6FIRE_AK4524_CS_MASK; 203 207 tmp |= ICE1712_6FIRE_SERIAL_DATA | 204 208 ICE1712_6FIRE_SERIAL_CLOCK | 205 209 ICE1712_6FIRE_RW; 206 210 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 207 ice->gpio _direction | tmp);211 ice->gpio.direction | tmp); 208 212 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp); 209 213 return 0; … … 222 226 switch (ice->eeprom.subvendor) { 223 227 case ICE1712_SUBDEVICE_EWS88MT: 228 case ICE1712_SUBDEVICE_EWS88MT_NEW: 224 229 snd_runtime_check(snd_i2c_sendbytes(ice->cs8404, &bits, 1) == 1, goto _error); 225 230 break; … … 246 251 static int ews88_spdif_default_put(ice1712_t *ice, snd_ctl_elem_value_t * ucontrol) 247 252 { 248 unsigned long flags;249 253 unsigned int val; 250 254 int change; 251 255 252 256 val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958); 253 spin_lock_irq save(&ice->reg_lock, flags);257 spin_lock_irq(&ice->reg_lock); 254 258 change = ice->spdif.cs8403_bits != val; 255 259 ice->spdif.cs8403_bits = val; 256 260 if (change && ice->playback_pro_substream == NULL) { 257 spin_unlock_irq restore(&ice->reg_lock, flags);261 spin_unlock_irq(&ice->reg_lock); 258 262 snd_ice1712_ews_cs8404_spdif_write(ice, val); 259 263 } else { 260 spin_unlock_irq restore(&ice->reg_lock, flags);264 spin_unlock_irq(&ice->reg_lock); 261 265 } 262 266 return change; … … 270 274 static int ews88_spdif_stream_put(ice1712_t *ice, snd_ctl_elem_value_t * ucontrol) 271 275 { 272 unsigned long flags;273 276 unsigned int val; 274 277 int change; 275 278 276 279 val = snd_cs8404_encode_spdif_bits(&ucontrol->value.iec958); 277 spin_lock_irq save(&ice->reg_lock, flags);280 spin_lock_irq(&ice->reg_lock); 278 281 change = ice->spdif.cs8403_stream_bits != val; 279 282 ice->spdif.cs8403_stream_bits = val; 280 283 if (change && ice->playback_pro_substream != NULL) { 281 spin_unlock_irq restore(&ice->reg_lock, flags);284 spin_unlock_irq(&ice->reg_lock); 282 285 snd_ice1712_ews_cs8404_spdif_write(ice, val); 283 286 } else { 284 spin_unlock_irq restore(&ice->reg_lock, flags);287 spin_unlock_irq(&ice->reg_lock); 285 288 } 286 289 return change; … … 295 298 296 299 /* set up SPDIF for EWS88MT / EWS88D */ 297 static void ews88_setup_spdif(ice1712_t *ice, snd_pcm_substream_t * substream)300 static void ews88_setup_spdif(ice1712_t *ice, int rate) 298 301 { 299 302 unsigned long flags; … … 305 308 if (tmp & 0x10) /* consumer */ 306 309 tmp &= (tmp & 0x01) ? ~0x06 : ~0x60; 307 switch ( substream->runtime->rate) {310 switch (rate) { 308 311 case 32000: tmp |= (tmp & 0x01) ? 0x02 : 0x00; break; 309 312 case 44100: tmp |= (tmp & 0x01) ? 0x06 : 0x40; break; … … 321 324 322 325 /* 326 */ 327 static akm4xxx_t akm_ews88mt __devinitdata = { 328 .num_adcs = 8, 329 .num_dacs = 8, 330 .type = SND_AK4524, 331 .caddr = 2, 332 .cif = 1, /* CIF high */ 333 .data_mask = ICE1712_EWS88_SERIAL_DATA, 334 .clk_mask = ICE1712_EWS88_SERIAL_CLOCK, 335 .cs_mask = 0, 336 .cs_addr = 0, 337 .cs_none = 0, /* no chip select on gpio */ 338 .add_flags = ICE1712_EWS88_RW, /* set rw bit high */ 339 .mask_flags = 0, 340 .ops = { 341 .start = ews88mt_ak4524_start, 342 .stop = ews88mt_ak4524_stop 343 } 344 }; 345 346 static akm4xxx_t akm_ewx2496 __devinitdata = { 347 .num_adcs = 2, 348 .num_dacs = 2, 349 .type = SND_AK4524, 350 .caddr = 2, 351 .cif = 1, /* CIF high */ 352 .data_mask = ICE1712_EWS88_SERIAL_DATA, 353 .clk_mask = ICE1712_EWS88_SERIAL_CLOCK, 354 .cs_mask = ICE1712_EWX2496_AK4524_CS, 355 .cs_addr = ICE1712_EWX2496_AK4524_CS, 356 .cs_none = 0, 357 .add_flags = ICE1712_EWS88_RW, /* set rw bit high */ 358 .mask_flags = 0, 359 .ops = { 360 .start = ewx2496_ak4524_start 361 } 362 }; 363 364 static akm4xxx_t akm_6fire __devinitdata = { 365 .num_adcs = 6, 366 .num_dacs = 6, 367 .type = SND_AK4524, 368 .caddr = 2, 369 .cif = 1, /* CIF high */ 370 .data_mask = ICE1712_6FIRE_SERIAL_DATA, 371 .clk_mask = ICE1712_6FIRE_SERIAL_CLOCK, 372 .cs_mask = 0, 373 .cs_addr = 0, /* set later */ 374 .cs_none = 0, 375 .add_flags = ICE1712_6FIRE_RW, /* set rw bit high */ 376 .mask_flags = 0, 377 .ops = { 378 .start = dmx6fire_ak4524_start 379 } 380 }; 381 382 383 /* 323 384 * initialize the chip 324 385 */ … … 327 388 { 328 389 int err; 329 ak 4524_t *ak;390 akm4xxx_t *ak; 330 391 331 392 /* set the analog DACs */ … … 335 396 break; 336 397 case ICE1712_SUBDEVICE_EWS88MT: 398 case ICE1712_SUBDEVICE_EWS88MT_NEW: 337 399 ice->num_total_dacs = 8; 338 400 break; … … 361 423 break; 362 424 case ICE1712_SUBDEVICE_EWS88MT: 425 case ICE1712_SUBDEVICE_EWS88MT_NEW: 363 426 if ((err = snd_i2c_device_create(ice->i2c, "CS8404", ICE1712_EWS88MT_CS8404_ADDR, &ice->cs8404)) < 0) 364 427 return err; … … 383 446 return err; 384 447 break; 385 #if 0 // XXX not working...386 448 case ICE1712_SUBDEVICE_DMX6FIRE: 387 449 if ((err = snd_ice1712_init_cs8427(ice, ICE1712_6FIRE_CS8427_ADDR)) < 0) 388 450 return err; 389 #endif 451 break; 390 452 case ICE1712_SUBDEVICE_EWS88MT: 453 case ICE1712_SUBDEVICE_EWS88MT_NEW: 391 454 case ICE1712_SUBDEVICE_EWS88D: 392 455 /* set up CS8404 */ 393 456 ice->spdif.ops.open = ews88_open_spdif; 394 ice->spdif.ops.setup = ews88_setup_spdif;457 ice->spdif.ops.setup_rate = ews88_setup_spdif; 395 458 ice->spdif.ops.default_get = ews88_spdif_default_get; 396 459 ice->spdif.ops.default_put = ews88_spdif_default_put; … … 402 465 } 403 466 467 /* no analog? */ 468 switch (ice->eeprom.subvendor) { 469 case ICE1712_SUBDEVICE_EWS88D: 470 return 0; 471 } 472 404 473 /* analog section */ 405 ak = &ice->ak4524; 474 ak = ice->akm = kmalloc(sizeof(akm4xxx_t), GFP_KERNEL); 475 if (! ak) 476 return -ENOMEM; 477 ice->akm_codecs = 1; 478 406 479 switch (ice->eeprom.subvendor) { 407 480 case ICE1712_SUBDEVICE_EWS88MT: 408 ak->num_adcs = ak->num_dacs = 8; 409 ak->type = SND_AK4524; 410 ak->cif = 1; /* CIF high */ 411 ak->data_mask = ICE1712_EWS88_SERIAL_DATA; 412 ak->clk_mask = ICE1712_EWS88_SERIAL_CLOCK; 413 ak->cs_mask = ak->cs_addr = ak->cs_none = 0; /* no chip select on gpio */ 414 ak->add_flags = ICE1712_EWS88_RW; /* set rw bit high */ 415 ak->mask_flags = 0; 416 ak->ops.start = ews88mt_ak4524_start; 417 ak->ops.stop = ews88mt_ak4524_stop; 418 snd_ice1712_ak4524_init(ice); 481 case ICE1712_SUBDEVICE_EWS88MT_NEW: 482 snd_ice1712_akm4xxx_init(ak, &akm_ews88mt, ice); 419 483 break; 420 484 case ICE1712_SUBDEVICE_EWX2496: 421 ak->num_adcs = ak->num_dacs = 2; 422 ak->type = SND_AK4524; 423 ak->cif = 1; /* CIF high */ 424 ak->data_mask = ICE1712_EWS88_SERIAL_DATA; 425 ak->clk_mask = ICE1712_EWS88_SERIAL_CLOCK; 426 ak->cs_mask = ak->cs_addr = ICE1712_EWX2496_AK4524_CS; 427 ak->cs_none = 0; 428 ak->add_flags = ICE1712_EWS88_RW; /* set rw bit high */ 429 ak->mask_flags = 0; 430 ak->ops.start = ewx2496_ak4524_start; 431 snd_ice1712_ak4524_init(ice); 485 snd_ice1712_akm4xxx_init(ak, &akm_ewx2496, ice); 432 486 break; 433 487 case ICE1712_SUBDEVICE_DMX6FIRE: 434 ak->num_adcs = ak->num_dacs = 6; 435 ak->type = SND_AK4524; 436 ak->cif = 1; /* CIF high */ 437 ak->data_mask = ICE1712_6FIRE_SERIAL_DATA; 438 ak->clk_mask = ICE1712_6FIRE_SERIAL_CLOCK; 439 ak->cs_mask = ak->cs_addr = 0; /* set later */ 440 ak->cs_none = 0; 441 ak->add_flags = ICE1712_6FIRE_RW; /* set rw bit high */ 442 ak->mask_flags = 0; 443 ak->ops.start = dmx6fire_ak4524_start; 444 snd_ice1712_ak4524_init(ice); 488 snd_ice1712_akm4xxx_init(ak, &akm_6fire, ice); 445 489 break; 446 490 } … … 472 516 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 473 517 unsigned char mask = kcontrol->private_value & 0xff; 474 unsigned char saved[2];475 518 476 snd_ice1712_save_gpio_status(ice , saved);519 snd_ice1712_save_gpio_status(ice); 477 520 ucontrol->value.enumerated.item[0] = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0; 478 snd_ice1712_restore_gpio_status(ice , saved);521 snd_ice1712_restore_gpio_status(ice); 479 522 return 0; 480 523 } … … 484 527 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 485 528 unsigned char mask = kcontrol->private_value & 0xff; 486 unsigned char saved[2];487 529 int val, nval; 488 530 … … 490 532 return -EPERM; 491 533 nval = ucontrol->value.enumerated.item[0] ? mask : 0; 492 snd_ice1712_save_gpio_status(ice , saved);534 snd_ice1712_save_gpio_status(ice); 493 535 val = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 494 536 nval |= val & ~mask; 495 537 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, nval); 496 snd_ice1712_restore_gpio_status(ice , saved);538 snd_ice1712_restore_gpio_status(ice); 497 539 return val != nval; 498 540 } … … 851 893 static int __devinit snd_ice1712_ews_add_controls(ice1712_t *ice) 852 894 { 853 int err, idx; 895 unsigned int idx; 896 int err; 854 897 snd_kcontrol_t *kctl; 855 898 … … 863 906 case ICE1712_SUBDEVICE_EWX2496: 864 907 case ICE1712_SUBDEVICE_EWS88MT: 908 case ICE1712_SUBDEVICE_EWS88MT_NEW: 865 909 case ICE1712_SUBDEVICE_DMX6FIRE: 866 err = snd_ice1712_ak 4524_build_controls(ice);910 err = snd_ice1712_akm4xxx_build_controls(ice); 867 911 if (err < 0) 868 912 return err; … … 873 917 switch (ice->eeprom.subvendor) { 874 918 case ICE1712_SUBDEVICE_EWX2496: 875 for (idx = 0; idx < sizeof(snd_ice1712_ewx2496_controls)/sizeof(snd_ice1712_ewx2496_controls[0]); idx++) {919 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ewx2496_controls); idx++) { 876 920 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ewx2496_controls[idx], ice)); 877 921 if (err < 0) … … 880 924 break; 881 925 case ICE1712_SUBDEVICE_EWS88MT: 926 case ICE1712_SUBDEVICE_EWS88MT_NEW: 882 927 for (idx = 0; idx < 8; idx++) { 883 928 kctl = snd_ctl_new1(&snd_ice1712_ews88mt_input_sense, ice); … … 892 937 break; 893 938 case ICE1712_SUBDEVICE_EWS88D: 894 for (idx = 0; idx < sizeof(snd_ice1712_ews88d_controls)/sizeof(snd_ice1712_ews88d_controls[0]); idx++) {939 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_ews88d_controls); idx++) { 895 940 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_ews88d_controls[idx], ice)); 896 941 if (err < 0) … … 899 944 break; 900 945 case ICE1712_SUBDEVICE_DMX6FIRE: 901 for (idx = 0; idx < sizeof(snd_ice1712_6fire_controls)/sizeof(snd_ice1712_6fire_controls[0]); idx++) {946 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_6fire_controls); idx++) { 902 947 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_6fire_controls[idx], ice)); 903 948 if (err < 0) … … 914 959 { 915 960 ICE1712_SUBDEVICE_EWX2496, 916 "TerraTec EWX 24/96",961 "TerraTec EWX24/96", 917 962 snd_ice1712_ews_init, 918 963 snd_ice1712_ews_add_controls, … … 920 965 { 921 966 ICE1712_SUBDEVICE_EWS88MT, 922 "TerraTec EWS 88MT", 967 "TerraTec EWS88MT", 968 snd_ice1712_ews_init, 969 snd_ice1712_ews_add_controls, 970 }, 971 { 972 ICE1712_SUBDEVICE_EWS88MT_NEW, 973 "TerraTec EWS88MT", 923 974 snd_ice1712_ews_init, 924 975 snd_ice1712_ews_add_controls, … … 926 977 { 927 978 ICE1712_SUBDEVICE_EWS88D, 928 "TerraTec EWS 88D",979 "TerraTec EWS88D", 929 980 snd_ice1712_ews_init, 930 981 snd_ice1712_ews_add_controls, … … 932 983 { 933 984 ICE1712_SUBDEVICE_DMX6FIRE, 934 "TerraTec DMX 6Fire",985 "TerraTec DMX6Fire", 935 986 snd_ice1712_ews_init, 936 987 snd_ice1712_ews_add_controls, -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/ews.h
r212 r224 34 34 #define ICE1712_SUBDEVICE_EWX2496 0x3b153011 35 35 #define ICE1712_SUBDEVICE_EWS88MT 0x3b151511 36 #define ICE1712_SUBDEVICE_EWS88MT_NEW 0x3b152511 36 37 #define ICE1712_SUBDEVICE_EWS88D 0x3b152b11 37 38 #define ICE1712_SUBDEVICE_DMX6FIRE 0x3b153811 … … 77 78 78 79 #define ICE1712_6FIRE_PCF9554_ADDR (0x40>>1) 79 #define ICE1712_6FIRE_CS8427_ADDR (0x22 >>1)80 #define ICE1712_6FIRE_CS8427_ADDR (0x22) 80 81 81 82 #endif /* __SOUND_EWS_H */ -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/ice1712.c
r215 r224 33 33 * is stored in the local file and called from registration 34 34 * function from card_info struct. 35 * 36 * 2002.11.26 James Stafford <jstafford@ampltd.com> 37 * Added support for VT1724 (Envy24HT) 38 * I have left out support for 176.4 and 192 KHz for the moment. 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 40 * 41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 42 * Split vt1724 part to an independent driver. 43 * The GPIO is accessed through the callback functions now. 35 44 */ 36 45 … … 96 105 97 106 static struct pci_device_id snd_ice1712_ids[] __devinitdata = { 98 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 ,}, /* ICE1712 */107 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */ 99 108 { 0, } 100 109 }; … … 113 122 */ 114 123 124 /* check whether the clock mode is spdif-in */ 115 125 static inline int is_spdif_master(ice1712_t *ice) 116 126 { … … 240 250 } 241 251 252 /* 253 * consumer ac97 digital mix 254 */ 242 255 static int snd_ice1712_digmix_route_ac97_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo) 243 256 { … … 252 265 { 253 266 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 254 unsigned long flags;255 267 256 spin_lock_irqsave(&ice->reg_lock, flags);257 268 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 258 spin_unlock_irqrestore(&ice->reg_lock, flags);259 269 return 0; 260 270 } … … 264 274 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 265 275 unsigned char val, nval; 266 unsigned long flags;267 276 268 spin_lock_irq save(&ice->reg_lock, flags);277 spin_lock_irq(&ice->reg_lock); 269 278 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 270 279 nval = val & ~ICE1712_ROUTE_AC97; 271 280 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97; 272 281 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 273 spin_unlock_irq restore(&ice->reg_lock, flags);282 spin_unlock_irq(&ice->reg_lock); 274 283 return val != nval; 275 284 } … … 284 293 285 294 286 287 295 /* 288 * set gpio direction, write mask and data296 * gpio operations 289 297 */ 290 void snd_ice1712_gpio_write_bits(ice1712_t *ice, int mask, int bits) 291 { 292 ice->gpio_direction |= mask; 293 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->gpio_direction); 294 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~mask); 295 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, mask & bits); 296 } 297 298 /* 299 */ 300 void snd_ice1712_save_gpio_status(ice1712_t *ice, unsigned char *tmp) 301 { 302 down(&ice->gpio_mutex); 303 tmp[0] = ice->gpio_direction; 304 tmp[1] = ice->gpio_write_mask; 305 } 306 307 void snd_ice1712_restore_gpio_status(ice1712_t *ice, unsigned char *tmp) 308 { 309 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, tmp[0]); 310 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, tmp[1]); 311 ice->gpio_direction = tmp[0]; 312 ice->gpio_write_mask = tmp[1]; 313 up(&ice->gpio_mutex); 298 static void snd_ice1712_set_gpio_dir(ice1712_t *ice, unsigned int data) 299 { 300 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 301 } 302 303 static void snd_ice1712_set_gpio_mask(ice1712_t *ice, unsigned int data) 304 { 305 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 306 } 307 308 static unsigned int snd_ice1712_get_gpio_data(ice1712_t *ice) 309 { 310 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 311 } 312 313 static void snd_ice1712_set_gpio_data(ice1712_t *ice, unsigned int val) 314 { 315 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 314 316 } 315 317 … … 370 372 } 371 373 372 static void setup_cs8427(ice1712_t *ice, snd_pcm_substream_t * substream)373 { 374 snd_cs8427_iec958_pcm(ice->cs8427, substream->runtime->rate);374 static void setup_cs8427(ice1712_t *ice, int rate) 375 { 376 snd_cs8427_iec958_pcm(ice->cs8427, rate); 375 377 } 376 378 … … 388 390 ice->spdif.ops.open = open_cs8427; 389 391 ice->spdif.ops.close = close_cs8427; 390 ice->spdif.ops.setup = setup_cs8427;392 ice->spdif.ops.setup_rate = setup_cs8427; 391 393 return 0; 392 394 } … … 556 558 static int snd_ice1712_playback_prepare(snd_pcm_substream_t * substream) 557 559 { 558 unsigned long flags;559 560 ice1712_t *ice = snd_pcm_substream_chip(substream); 560 561 snd_pcm_runtime_t *runtime = substream->runtime; … … 571 572 if (rate > 0x000fffff) 572 573 rate = 0x000fffff; 573 spin_lock _irqsave(&ice->reg_lock, flags);574 spin_lock(&ice->reg_lock); 574 575 outb(0, ice->ddma_port + 15); 575 576 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); … … 584 585 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 585 586 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 586 spin_unlock _irqrestore(&ice->reg_lock, flags);587 spin_unlock(&ice->reg_lock); 587 588 return 0; 588 589 } … … 590 591 static int snd_ice1712_playback_ds_prepare(snd_pcm_substream_t * substream) 591 592 { 592 unsigned long flags;593 593 ice1712_t *ice = snd_pcm_substream_chip(substream); 594 594 snd_pcm_runtime_t *runtime = substream->runtime; … … 608 608 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 609 609 chn = substream->number * 2; 610 spin_lock _irqsave(&ice->reg_lock, flags);610 spin_lock(&ice->reg_lock); 611 611 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 612 612 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); … … 620 620 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 621 621 } 622 spin_unlock _irqrestore(&ice->reg_lock, flags);622 spin_unlock(&ice->reg_lock); 623 623 return 0; 624 624 } … … 626 626 static int snd_ice1712_capture_prepare(snd_pcm_substream_t * substream) 627 627 { 628 unsigned long flags;629 628 ice1712_t *ice = snd_pcm_substream_chip(substream); 630 629 snd_pcm_runtime_t *runtime = substream->runtime; … … 639 638 if (runtime->channels == 2) 640 639 tmp &= ~0x02; 641 spin_lock _irqsave(&ice->reg_lock, flags);640 spin_lock(&ice->reg_lock); 642 641 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 643 642 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); … … 645 644 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 646 645 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 647 spin_unlock _irqrestore(&ice->reg_lock, flags);646 spin_unlock(&ice->reg_lock); 648 647 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 649 648 return 0; … … 763 762 snd_pcm_runtime_t *runtime = substream->runtime; 764 763 ice1712_t *ice = snd_pcm_substream_chip(substream); 765 unsigned long flags;766 764 u32 tmp; 767 765 768 766 ice->playback_con_substream_ds[substream->number] = substream; 769 767 runtime->hw = snd_ice1712_playback_ds; 770 spin_lock_irq save(&ice->reg_lock, flags);768 spin_lock_irq(&ice->reg_lock); 771 769 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 772 770 outw(tmp, ICEDS(ice, INTMASK)); 773 spin_unlock_irq restore(&ice->reg_lock, flags);771 spin_unlock_irq(&ice->reg_lock); 774 772 return 0; 775 773 } … … 799 797 { 800 798 ice1712_t *ice = snd_pcm_substream_chip(substream); 801 unsigned long flags;802 799 u32 tmp; 803 800 804 spin_lock_irq save(&ice->reg_lock, flags);801 spin_lock_irq(&ice->reg_lock); 805 802 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 806 803 outw(tmp, ICEDS(ice, INTMASK)); 807 spin_unlock_irq restore(&ice->reg_lock, flags);804 spin_unlock_irq(&ice->reg_lock); 808 805 ice->playback_con_substream_ds[substream->number] = NULL; 809 806 return 0; … … 967 964 unsigned int old; 968 965 snd_pcm_substream_t *s = substream; 966 969 967 do { 970 968 if (s == ice->playback_pro_substream) { … … 995 993 /* 996 994 */ 997 static void snd_ice1712_set_pro_rate(ice1712_t *ice, unsigned int rate, int do_not_lock)995 static void snd_ice1712_set_pro_rate(ice1712_t *ice, unsigned int rate, int force) 998 996 { 999 997 unsigned long flags; 1000 998 unsigned char val; 1001 int old_lock_value;999 unsigned int i; 1002 1000 1003 1001 spin_lock_irqsave(&ice->reg_lock, flags); 1004 old_lock_value = PRO_RATE_LOCKED;1005 if (do_not_lock)1006 PRO_RATE_LOCKED = 0;1007 1002 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1008 1003 ICE1712_PLAYBACK_PAUSE| … … 1011 1006 return; 1012 1007 } 1013 if (!is_pro_rate_locked(ice)) 1014 goto __unlock; 1008 if (!force && is_pro_rate_locked(ice)) { 1009 spin_unlock_irqrestore(&ice->reg_lock, flags); 1010 return; 1011 } 1015 1012 1016 1013 switch (rate) { … … 1034 1031 } 1035 1032 outb(val, ICEMT(ice, RATE)); 1036 PRO_RATE_LOCKED = old_lock_value; 1037 1038 __unlock: 1033 1039 1034 spin_unlock_irqrestore(&ice->reg_lock, flags); 1040 1035 1041 if (ice->ak4524.ops.set_rate_val) 1042 ice->ak4524.ops.set_rate_val(ice, rate); 1036 for (i = 0; i < ice->akm_codecs; i++) { 1037 if (ice->akm[i].ops.set_rate_val) 1038 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1039 } 1043 1040 } 1044 1041 1045 1042 static int snd_ice1712_playback_pro_prepare(snd_pcm_substream_t * substream) 1046 1043 { 1047 unsigned long flags;1048 1044 ice1712_t *ice = snd_pcm_substream_chip(substream); 1049 1045 1050 1046 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1051 snd_ice1712_set_pro_rate(ice, substream->runtime->rate, 0); 1052 spin_lock_irqsave(&ice->reg_lock, flags); 1047 spin_lock(&ice->reg_lock); 1053 1048 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1054 1049 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1055 1050 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1056 spin_unlock_irqrestore(&ice->reg_lock, flags); 1057 1058 if (ice->spdif.ops.setup) 1059 ice->spdif.ops.setup(ice, substream); 1060 1061 return 0; 1051 spin_unlock(&ice->reg_lock); 1052 1053 return 0; 1054 } 1055 1056 static int snd_ice1712_playback_pro_hw_params(snd_pcm_substream_t * substream, 1057 snd_pcm_hw_params_t * hw_params) 1058 { 1059 ice1712_t *ice = snd_pcm_substream_chip(substream); 1060 1061 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1062 if (ice->spdif.ops.setup_rate) 1063 ice->spdif.ops.setup_rate(ice, params_rate(hw_params)); 1064 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1062 1065 } 1063 1066 1064 1067 static int snd_ice1712_capture_pro_prepare(snd_pcm_substream_t * substream) 1065 1068 { 1066 unsigned long flags;1067 1069 ice1712_t *ice = snd_pcm_substream_chip(substream); 1068 1070 1069 1071 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1070 snd_ice1712_set_pro_rate(ice, substream->runtime->rate, 0); 1071 spin_lock_irqsave(&ice->reg_lock, flags); 1072 spin_lock(&ice->reg_lock); 1072 1073 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1073 1074 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1074 1075 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1075 spin_unlock_irqrestore(&ice->reg_lock, flags); 1076 return 0; 1076 spin_unlock(&ice->reg_lock); 1077 return 0; 1078 } 1079 1080 static int snd_ice1712_capture_pro_hw_params(snd_pcm_substream_t * substream, 1081 snd_pcm_hw_params_t * hw_params) 1082 { 1083 ice1712_t *ice = snd_pcm_substream_chip(substream); 1084 1085 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1086 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1077 1087 } 1078 1088 … … 1203 1213 .close = snd_ice1712_playback_pro_close, 1204 1214 .ioctl = snd_pcm_lib_ioctl, 1205 .hw_params = snd_ice1712_ hw_params,1215 .hw_params = snd_ice1712_playback_pro_hw_params, 1206 1216 .hw_free = snd_ice1712_hw_free, 1207 1217 .prepare = snd_ice1712_playback_pro_prepare, … … 1214 1224 .close = snd_ice1712_capture_pro_close, 1215 1225 .ioctl = snd_pcm_lib_ioctl, 1216 .hw_params = snd_ice1712_ hw_params,1226 .hw_params = snd_ice1712_capture_pro_hw_params, 1217 1227 .hw_free = snd_ice1712_hw_free, 1218 1228 .prepare = snd_ice1712_capture_pro_prepare, … … 1287 1297 { 1288 1298 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1289 unsigned long flags;1290 1299 int index = kcontrol->private_value; 1291 1300 1292 spin_lock_irq save(&ice->reg_lock, flags);1301 spin_lock_irq(&ice->reg_lock); 1293 1302 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1); 1294 1303 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1); 1295 spin_unlock_irq restore(&ice->reg_lock, flags);1304 spin_unlock_irq(&ice->reg_lock); 1296 1305 return 0; 1297 1306 } … … 1299 1308 static int snd_ice1712_pro_mixer_switch_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1300 1309 { 1301 unsigned long flags;1302 1310 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1303 1311 int index = kcontrol->private_value; … … 1306 1314 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1307 1315 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1308 spin_lock_irq save(&ice->reg_lock, flags);1316 spin_lock_irq(&ice->reg_lock); 1309 1317 nval |= ice->pro_volumes[index] & ~0x80008000; 1310 1318 change = nval != ice->pro_volumes[index]; 1311 1319 ice->pro_volumes[index] = nval; 1312 1320 snd_ice1712_update_volume(ice, index); 1313 spin_unlock_irq restore(&ice->reg_lock, flags);1321 spin_unlock_irq(&ice->reg_lock); 1314 1322 return change; 1315 1323 } … … 1327 1335 { 1328 1336 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1329 unsigned long flags;1330 1337 int index = kcontrol->private_value; 1331 1338 1332 spin_lock_irq save(&ice->reg_lock, flags);1339 spin_lock_irq(&ice->reg_lock); 1333 1340 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127; 1334 1341 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127; 1335 spin_unlock_irq restore(&ice->reg_lock, flags);1342 spin_unlock_irq(&ice->reg_lock); 1336 1343 return 0; 1337 1344 } … … 1339 1346 static int snd_ice1712_pro_mixer_volume_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 1340 1347 { 1341 unsigned long flags;1342 1348 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1343 1349 int index = kcontrol->private_value; … … 1346 1352 nval = (ucontrol->value.integer.value[0] & 127) | 1347 1353 ((ucontrol->value.integer.value[1] & 127) << 16); 1348 spin_lock_irq save(&ice->reg_lock, flags);1354 spin_lock_irq(&ice->reg_lock); 1349 1355 nval |= ice->pro_volumes[index] & ~0x007f007f; 1350 1356 change = nval != ice->pro_volumes[index]; 1351 1357 ice->pro_volumes[index] = nval; 1352 1358 snd_ice1712_update_volume(ice, index); 1353 spin_unlock_irq restore(&ice->reg_lock, flags);1359 spin_unlock_irq(&ice->reg_lock); 1354 1360 return change; 1355 1361 } 1356 1362 1357 1363 1358 static int __ init snd_ice1712_build_pro_mixer(ice1712_t *ice)1364 static int __devinit snd_ice1712_build_pro_mixer(ice1712_t *ice) 1359 1365 { 1360 1366 snd_card_t * card = ice->card; … … 1436 1442 int err; 1437 1443 1438 if ( !(ice->eeprom.codec & ICE1712_CFG_NO_CON_AC97)) {1444 if (ice_has_con_ac97(ice)) { 1439 1445 ac97_t ac97; 1440 1446 memset(&ac97, 0, sizeof(ac97)); … … 1451 1457 } 1452 1458 } 1453 /* hmm.. can we have both consumer and pro ac97 mixers? */ 1454 if (! (ice->eeprom. aclink& ICE1712_CFG_PRO_I2S)) {1459 1460 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1455 1461 ac97_t ac97; 1456 1462 memset(&ac97, 0, sizeof(ac97)); … … 1473 1479 */ 1474 1480 1481 static inline unsigned int eeprom_double(ice1712_t *ice, int idx) 1482 { 1483 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1484 } 1485 1475 1486 static void snd_ice1712_proc_read(snd_info_entry_t *entry, 1476 1487 snd_info_buffer_t * buffer) … … 1479 1490 unsigned int idx; 1480 1491 1481 snd_iprintf(buffer, " ICE1712\n\n");1492 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1482 1493 snd_iprintf(buffer, "EEPROM:\n"); 1494 1483 1495 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1484 1496 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1485 1497 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1486 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom. codec);1487 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom. aclink);1488 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom. i2sID);1489 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom. spdif);1498 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1499 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1500 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1501 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1490 1502 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1491 1503 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1492 1504 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1493 snd_iprintf(buffer, " AC'97 main : 0x%x\n", ice->eeprom.ac97main);1494 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", ice->eeprom.ac97pcm);1495 snd_iprintf(buffer, " AC'97 record : 0x%x\n", ice->eeprom.ac97rec);1496 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom. ac97recsrc);1505 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1506 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1507 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1508 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1497 1509 for (idx = 0; idx < 4; idx++) 1498 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.da cID[idx]);1510 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1499 1511 for (idx = 0; idx < 4; idx++) 1500 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.adcID[idx]); 1501 for (idx = 0x1c; idx < ice->eeprom.size && idx < 0x1c + sizeof(ice->eeprom.extra); idx++) 1502 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.extra[idx - 0x1c]); 1512 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1513 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1514 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1515 1516 snd_iprintf(buffer, "\nRegisters:\n"); 1517 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1518 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1519 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1520 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1503 1521 } 1504 1522 … … 1507 1525 snd_info_entry_t *entry; 1508 1526 1509 if ((entry = snd_info_create_card_entry(ice->card, "ice1712", ice->card->proc_root)) != NULL) { 1510 entry->content = SNDRV_INFO_CONTENT_TEXT; 1511 entry->private_data = ice; 1512 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 1513 entry->c.text.read_size = 2048; 1514 entry->c.text.read = snd_ice1712_proc_read; 1515 if (snd_info_register(entry) < 0) { 1516 snd_info_free_entry(entry); 1517 entry = NULL; 1518 } 1519 } 1520 ice->proc_entry = entry; 1521 } 1522 1523 static void snd_ice1712_proc_done(ice1712_t * ice) 1524 { 1525 if (ice->proc_entry) { 1526 snd_info_unregister(ice->proc_entry); 1527 ice->proc_entry = NULL; 1528 } 1527 if (! snd_card_proc_new(ice->card, "ice1712", &entry)) 1528 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read); 1529 1529 } 1530 1530 … … 1536 1536 { 1537 1537 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1538 uinfo->count = 32;1538 uinfo->count = sizeof(ice1712_eeprom_t); 1539 1539 return 0; 1540 1540 } … … 1544 1544 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 1545 1545 1546 memcpy(ucontrol->value.bytes.data, &ice->eeprom, 32);1546 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1547 1547 return 0; 1548 1548 } … … 1585 1585 static snd_kcontrol_new_t snd_ice1712_spdif_default __devinitdata = 1586 1586 { 1587 .iface = SNDRV_CTL_ELEM_IFACE_PCM,1588 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),1587 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1588 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1589 1589 .info = snd_ice1712_spdif_info, 1590 1590 .get = snd_ice1712_spdif_default_get, … … 1636 1636 static snd_kcontrol_new_t snd_ice1712_spdif_maskc __devinitdata = 1637 1637 { 1638 .access = SNDRV_CTL_ELEM_ACCESS_READ,1639 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,1640 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),1638 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1639 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1640 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1641 1641 .info = snd_ice1712_spdif_info, 1642 1642 .get = snd_ice1712_spdif_maskc_get, … … 1645 1645 static snd_kcontrol_new_t snd_ice1712_spdif_maskp __devinitdata = 1646 1646 { 1647 .access = SNDRV_CTL_ELEM_ACCESS_READ,1648 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,1649 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),1647 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1648 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1649 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1650 1650 .info = snd_ice1712_spdif_info, 1651 1651 .get = snd_ice1712_spdif_maskp_get, … … 1672 1672 static snd_kcontrol_new_t snd_ice1712_spdif_stream __devinitdata = 1673 1673 { 1674 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,1675 .iface = SNDRV_CTL_ELEM_IFACE_PCM,1676 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),1674 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1675 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1676 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1677 1677 .info = snd_ice1712_spdif_info, 1678 1678 .get = snd_ice1712_spdif_stream_get, … … 1694 1694 unsigned char mask = kcontrol->private_value & 0xff; 1695 1695 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1696 unsigned char saved[2];1697 1696 1698 snd_ice1712_save_gpio_status(ice , saved);1699 ucontrol->value.integer.value[0] = (snd_ice1712_ read(ice, ICE1712_IREG_GPIO_DATA) & mask ? 1 : 0) ^ invert;1700 snd_ice1712_restore_gpio_status(ice , saved);1697 snd_ice1712_save_gpio_status(ice); 1698 ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1699 snd_ice1712_restore_gpio_status(ice); 1701 1700 return 0; 1702 1701 } … … 1707 1706 unsigned char mask = kcontrol->private_value & 0xff; 1708 1707 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1709 unsigned char saved[2]; 1710 int val, nval; 1708 unsigned int val, nval; 1711 1709 1712 1710 if (kcontrol->private_value & (1 << 31)) 1713 1711 return -EPERM; 1714 1712 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1715 snd_ice1712_save_gpio_status(ice , saved);1716 val = snd_ice1712_ read(ice, ICE1712_IREG_GPIO_DATA);1713 snd_ice1712_save_gpio_status(ice); 1714 val = snd_ice1712_gpio_read(ice); 1717 1715 nval |= val & ~mask; 1718 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, nval); 1719 snd_ice1712_restore_gpio_status(ice, saved); 1716 if (val != nval) 1717 snd_ice1712_gpio_write(ice, nval); 1718 snd_ice1712_restore_gpio_status(ice); 1720 1719 return val != nval; 1721 1720 } … … 1790 1789 } else { 1791 1790 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1791 spin_unlock_irq(&ice->reg_lock); 1792 1792 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1793 spin_lock_irq(&ice->reg_lock); 1793 1794 } 1794 1795 change = inb(ICEMT(ice, RATE)) != oval; 1796 spin_unlock_irq(&ice->reg_lock); 1795 1797 1796 1798 if ((oval & ICE1712_SPDIF_MASTER) != (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) { … … 1800 1802 } 1801 1803 /* notify ak4524 chip as well */ 1802 if (is_spdif_master(ice) && ice->ak4524.ops.set_rate_val) 1803 ice->ak4524.ops.set_rate_val(ice, 0); 1804 if (is_spdif_master(ice)) { 1805 unsigned int i; 1806 for (i = 0; i < ice->akm_codecs; i++) { 1807 if (ice->akm[i].ops.set_rate_val) 1808 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1809 } 1810 } 1804 1811 } 1805 1812 … … 1906 1913 int idx = kcontrol->id.index; 1907 1914 unsigned int val, cval; 1915 1916 spin_lock_irq(&ice->reg_lock); 1908 1917 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 1918 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 1919 spin_unlock_irq(&ice->reg_lock); 1920 1909 1921 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 1910 1922 val &= 3; 1911 cval = inl(ICEMT(ice, ROUTE_CAPTURE));1912 1923 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 1913 1924 if (val == 1 && idx < 2) … … 1939 1950 nval = 0; /* pcm */ 1940 1951 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 1952 spin_lock_irq(&ice->reg_lock); 1941 1953 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 1942 1954 val &= ~(0x03 << shift); … … 1945 1957 if (change) 1946 1958 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 1959 spin_unlock_irq(&ice->reg_lock); 1947 1960 if (nval < 2) /* dig mixer of pcm */ 1948 1961 return change; 1949 1962 1950 1963 /* update CAPTURE */ 1964 spin_lock_irq(&ice->reg_lock); 1951 1965 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 1952 1966 shift = ((idx / 2) * 8) + ((idx % 2) * 4); … … 1964 1978 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 1965 1979 } 1980 spin_unlock_irq(&ice->reg_lock); 1966 1981 return change; 1967 1982 } … … 1994 2009 1995 2010 /* update SPDOUT */ 2011 spin_lock_irq(&ice->reg_lock); 1996 2012 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 1997 2013 if (ucontrol->value.enumerated.item[0] >= 11) … … 2019 2035 if (change) 2020 2036 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2037 spin_unlock_irq(&ice->reg_lock); 2021 2038 return change; 2022 2039 } … … 2051 2068 { 2052 2069 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 2053 unsigned long flags;2054 2070 2055 spin_lock_irqsave(&ice->reg_lock, flags);2056 2071 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2057 spin_unlock_irqrestore(&ice->reg_lock, flags);2058 2072 return 0; 2059 2073 } … … 2061 2075 static int snd_ice1712_pro_volume_rate_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) 2062 2076 { 2063 unsigned long flags;2064 2077 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 2065 2078 int change; 2066 2079 2067 spin_lock_irq save(&ice->reg_lock, flags);2080 spin_lock_irq(&ice->reg_lock); 2068 2081 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2069 2082 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2070 spin_unlock_irq restore(&ice->reg_lock, flags);2083 spin_unlock_irq(&ice->reg_lock); 2071 2084 return change; 2072 2085 } … … 2092 2105 { 2093 2106 ice1712_t *ice = snd_kcontrol_chip(kcontrol); 2094 unsigned long flags;2095 2107 int idx; 2096 2108 2097 spin_lock_irq save(&ice->reg_lock, flags);2109 spin_lock_irq(&ice->reg_lock); 2098 2110 for (idx = 0; idx < 22; idx++) { 2099 2111 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2100 2112 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2101 2113 } 2102 spin_unlock_irq restore(&ice->reg_lock, flags);2114 spin_unlock_irq(&ice->reg_lock); 2103 2115 return 0; 2104 2116 } … … 2131 2143 { 2132 2144 int dev = 0xa0; /* EEPROM device address */ 2133 unsigned int i dx;2145 unsigned int i; 2134 2146 2135 2147 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) == 0) { … … 2142 2154 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2143 2155 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2144 if (ice->eeprom.size < 28) {2156 if (ice->eeprom.size > 32) { 2145 2157 snd_printk("invalid EEPROM (size = %i)\n", ice->eeprom.size); 2146 2158 return -EIO; … … 2149 2161 if (ice->eeprom.version != 1) { 2150 2162 snd_printk("invalid EEPROM version %i\n", ice->eeprom.version); 2151 return -EIO; 2152 } 2153 ice->eeprom.codec = snd_ice1712_read_i2c(ice, dev, 0x06); 2154 ice->eeprom.aclink = snd_ice1712_read_i2c(ice, dev, 0x07); 2155 ice->eeprom.i2sID = snd_ice1712_read_i2c(ice, dev, 0x08); 2156 ice->eeprom.spdif = snd_ice1712_read_i2c(ice, dev, 0x09); 2157 ice->eeprom.gpiomask = snd_ice1712_read_i2c(ice, dev, 0x0a); 2158 ice->eeprom.gpiostate = snd_ice1712_read_i2c(ice, dev, 0x0b); 2159 ice->eeprom.gpiodir = snd_ice1712_read_i2c(ice, dev, 0x0c); 2160 ice->eeprom.ac97main = (snd_ice1712_read_i2c(ice, dev, 0x0d) << 0) | 2161 (snd_ice1712_read_i2c(ice, dev, 0x0e) << 8); 2162 ice->eeprom.ac97pcm = (snd_ice1712_read_i2c(ice, dev, 0x0f) << 0) | 2163 (snd_ice1712_read_i2c(ice, dev, 0x10) << 8); 2164 ice->eeprom.ac97rec = (snd_ice1712_read_i2c(ice, dev, 0x11) << 0) | 2165 (snd_ice1712_read_i2c(ice, dev, 0x12) << 8); 2166 ice->eeprom.ac97recsrc = snd_ice1712_read_i2c(ice, dev, 0x13) << 0; 2167 for (idx = 0; idx < 4; idx++) { 2168 ice->eeprom.dacID[idx] = snd_ice1712_read_i2c(ice, dev, 0x14 + idx); 2169 ice->eeprom.adcID[idx] = snd_ice1712_read_i2c(ice, dev, 0x18 + idx); 2170 } 2171 for (idx = 0x1c; idx < ice->eeprom.size && idx < 0x1c + sizeof(ice->eeprom.extra); idx++) 2172 ice->eeprom.extra[idx - 0x1c] = snd_ice1712_read_i2c(ice, dev, idx); 2163 /* return -EIO; */ 2164 } 2165 for (i = 0; i < ice->eeprom.size; i++) 2166 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2167 2168 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2169 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2170 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2171 2173 2172 return 0; 2174 2173 } … … 2182 2181 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2183 2182 udelay(200); 2184 pci_write_config_byte(ice->pci, 0x60, ice->eeprom. codec);2185 pci_write_config_byte(ice->pci, 0x61, ice->eeprom. aclink);2186 pci_write_config_byte(ice->pci, 0x62, ice->eeprom. i2sID);2187 pci_write_config_byte(ice->pci, 0x63, ice->eeprom. spdif);2183 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2184 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2185 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2186 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2188 2187 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2189 ice->gpio _write_mask = ice->eeprom.gpiomask;2190 ice->gpio _direction = ice->eeprom.gpiodir;2188 ice->gpio.write_mask = ice->eeprom.gpiomask; 2189 ice->gpio.direction = ice->eeprom.gpiodir; 2191 2190 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask); 2192 2191 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir); 2193 2192 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate); 2194 2193 } else { 2195 ice->gpio _write_mask = 0xc0;2196 ice->gpio _direction = 0xff;2194 ice->gpio.write_mask = 0xc0; 2195 ice->gpio.direction = 0xff; 2197 2196 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2198 2197 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); … … 2200 2199 } 2201 2200 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2202 if (!(ice->eeprom. codec& ICE1712_CFG_NO_CON_AC97)) {2201 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2203 2202 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2204 2203 udelay(100); … … 2210 2209 return 0; 2211 2210 } 2212 2213 2211 2214 2212 int __devinit snd_ice1712_spdif_build_controls(ice1712_t *ice) … … 2251 2249 if (err < 0) 2252 2250 return err; 2251 2253 2252 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2254 2253 if (err < 0) … … 2257 2256 if (err < 0) 2258 2257 return err; 2258 2259 2259 for (idx = 0; idx < ice->num_total_dacs; idx++) { 2260 2260 kctl = snd_ctl_new1(&snd_ice1712_mixer_pro_analog_route, ice); … … 2266 2266 return err; 2267 2267 } 2268 2268 2269 for (idx = 0; idx < 2; idx++) { 2269 2270 kctl = snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice); … … 2275 2276 return err; 2276 2277 } 2278 2277 2279 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2278 2280 if (err < 0) … … 2281 2283 if (err < 0) 2282 2284 return err; 2285 2283 2286 return 0; 2284 2287 } … … 2293 2296 /* --- */ 2294 2297 __hw_end: 2295 snd_ice1712_proc_done(ice);2296 2298 if (ice->irq >= 0) { 2297 2299 synchronize_irq(ice->irq); … … 2314 2316 kfree_nocheck(ice->res_profi_port); 2315 2317 } 2318 if (ice->akm) 2319 kfree(ice->akm); 2316 2320 snd_magic_kfree(ice); 2317 2321 return 0; … … 2353 2357 spin_lock_init(&ice->reg_lock); 2354 2358 init_MUTEX(&ice->gpio_mutex); 2359 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2360 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2361 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2362 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2363 2355 2364 ice->spdif.cs8403_bits = 2356 2365 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ … … 2395 2404 return -EIO; 2396 2405 } 2406 2397 2407 ice->irq = pci->irq; 2398 2408 … … 2407 2417 2408 2418 /* unmask used interrupts */ 2409 outb((ice->eeprom. codec& ICE1712_CFG_2xMPU401) == 0 ? ICE1712_IRQ_MPU2 : 0 |2410 (ice->eeprom. codec& ICE1712_CFG_NO_CON_AC97) ? ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0,2419 outb((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? ICE1712_IRQ_MPU2 : 0 | 2420 (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0, 2411 2421 ICEREG(ice, IRQMASK)); 2412 2422 outb(0x00, ICEMT(ice, IRQ)); … … 2488 2498 } 2489 2499 2490 if ( !(ice->eeprom.codec & ICE1712_CFG_NO_CON_AC97))2500 if (ice_has_con_ac97(ice)) 2491 2501 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) { 2492 2502 snd_card_free(card); … … 2511 2521 } 2512 2522 2513 if ( !(ice->eeprom.codec & ICE1712_CFG_NO_CON_AC97))2523 if (ice_has_con_ac97(ice)) 2514 2524 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) { 2515 2525 snd_card_free(card); … … 2526 2536 } 2527 2537 2528 if (ice->eeprom.codec& ICE1712_CFG_2xMPU401)2538 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) 2529 2539 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2530 2540 ICEREG(ice, MPU2_CTRL), 1, -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/ice1712.h
r215 r224 215 215 216 216 typedef struct _snd_ice1712 ice1712_t; 217 typedef struct snd_ak4 524 ak4524_t;217 typedef struct snd_ak4xxx akm4xxx_t; 218 218 219 219 typedef struct { 220 220 unsigned int subvendor; /* PCI[2c-2f] */ 221 221 unsigned char size; /* size of EEPROM image in bytes */ 222 unsigned char version; /* must be 1 */ 223 unsigned char codec; /* codec configuration PCI[60] */ 224 unsigned char aclink; /* ACLink configuration PCI[61] */ 225 unsigned char i2sID; /* PCI[62] */ 226 unsigned char spdif; /* S/PDIF configuration PCI[63] */ 227 unsigned char gpiomask; /* GPIO initial mask, 0 = write, 1 = don't */ 228 unsigned char gpiostate; /* GPIO initial state */ 229 unsigned char gpiodir; /* GPIO direction state */ 230 unsigned short ac97main; 231 unsigned short ac97pcm; 232 unsigned short ac97rec; 233 unsigned char ac97recsrc; 234 unsigned char dacID[4]; /* I2S IDs for DACs */ 235 unsigned char adcID[4]; /* I2S IDs for ADCs */ 236 unsigned char extra[4]; 222 unsigned char version; /* must be 1 (or 2 for vt1724) */ 223 unsigned char data[32]; 224 unsigned int gpiomask; 225 unsigned int gpiostate; 226 unsigned int gpiodir; 237 227 } ice1712_eeprom_t; 238 228 239 struct snd_ak4524 { 240 int num_adcs; /* AK4524 or AK4528 ADCs */ 241 int num_dacs; /* AK4524 or AK4528 DACs */ 242 unsigned char images[4][16]; 243 unsigned char ipga_gain[4][2]; 244 /* */ 229 enum { 230 ICE_EEP1_CODEC = 0, /* 06 */ 231 ICE_EEP1_ACLINK, /* 07 */ 232 ICE_EEP1_I2SID, /* 08 */ 233 ICE_EEP1_SPDIF, /* 09 */ 234 ICE_EEP1_GPIO_MASK, /* 0a */ 235 ICE_EEP1_GPIO_STATE, /* 0b */ 236 ICE_EEP1_GPIO_DIR, /* 0c */ 237 ICE_EEP1_AC97_MAIN_LO, /* 0d */ 238 ICE_EEP1_AC97_MAIN_HI, /* 0e */ 239 ICE_EEP1_AC97_PCM_LO, /* 0f */ 240 ICE_EEP1_AC97_PCM_HI, /* 10 */ 241 ICE_EEP1_AC97_REC_LO, /* 11 */ 242 ICE_EEP1_AC97_REC_HI, /* 12 */ 243 ICE_EEP1_AC97_RECSRC, /* 13 */ 244 ICE_EEP1_DAC_ID, /* 14 */ 245 ICE_EEP1_DAC_ID1, 246 ICE_EEP1_DAC_ID2, 247 ICE_EEP1_DAC_ID3, 248 ICE_EEP1_ADC_ID, /* 18 */ 249 ICE_EEP1_ADC_ID1, 250 ICE_EEP1_ADC_ID2, 251 ICE_EEP1_ADC_ID3 252 }; 253 254 #define ice_has_con_ac97(ice) (!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) 255 256 257 struct snd_ak4xxx { 258 unsigned int num_adcs; /* AK4524 or AK4528 ADCs */ 259 unsigned int num_dacs; /* AK4524 or AK4528 DACs */ 260 unsigned char images[4][16]; /* saved register image */ 261 unsigned char ipga_gain[4][2]; /* saved register image for IPGA (AK4528) */ 262 ice1712_t *chip; 263 /* template should fill the following fields */ 264 unsigned int idx_offset; /* control index offset */ 245 265 enum { 246 SND_AK4524, SND_AK4528, SND_AK4529 266 SND_AK4524, SND_AK4528, SND_AK4529, SND_AK4355, SND_AK4381 247 267 } type; 248 unsigned int cif: 1; 249 unsigned char data_mask; 250 unsigned char clk_mask; 251 unsigned char cs_mask; 252 unsigned char cs_addr; 253 unsigned char cs_none; 254 unsigned char add_flags; 255 unsigned char mask_flags; 256 struct snd_ak4524_ops { 257 int (*start)(ice1712_t *, unsigned char *, int); 258 void (*stop)(ice1712_t *, unsigned char *); 259 void (*set_rate_val)(ice1712_t *, unsigned int); 268 unsigned int cif: 1; /* CIF mode */ 269 unsigned char caddr; /* C0 and C1 bits */ 270 unsigned int data_mask; /* DATA gpio bit */ 271 unsigned int clk_mask; /* CLK gpio bit */ 272 unsigned int cs_mask; /* bit mask for select/deselect address */ 273 unsigned int cs_addr; /* bits to select address */ 274 unsigned int cs_none; /* bits to deselect address */ 275 unsigned int add_flags; /* additional bits at init */ 276 unsigned int mask_flags; /* total mask bits */ 277 struct snd_akm4xxx_ops { 278 int (*start)(akm4xxx_t *ak, int chip); 279 void (*stop)(akm4xxx_t *ak); 280 void (*set_rate_val)(akm4xxx_t *ak, unsigned int rate); 260 281 } ops; 261 282 }; … … 268 289 struct snd_ice1712_spdif_ops { 269 290 void (*open)(ice1712_t *, snd_pcm_substream_t *); 270 void (*setup )(ice1712_t *, snd_pcm_substream_t *);291 void (*setup_rate)(ice1712_t *, int rate); 271 292 void (*close)(ice1712_t *, snd_pcm_substream_t *); 272 293 void (*default_get)(ice1712_t *, snd_ctl_elem_value_t * ucontrol); … … 293 314 unsigned long profi_port; 294 315 struct resource *res_profi_port; 295 296 unsigned int config; /* system configuration */297 316 298 317 struct pci_dev *pci; … … 316 335 317 336 spinlock_t reg_lock; 318 struct semaphore gpio_mutex;319 337 snd_info_entry_t *proc_entry; 320 338 … … 322 340 323 341 unsigned int pro_volumes[20]; 324 int omni: 1; /* Delta Omni I/O */ 325 int num_total_dacs; /* total DACs */ 342 unsigned int omni: 1; /* Delta Omni I/O */ 343 unsigned int vt1724: 1; 344 unsigned int num_total_dacs; /* total DACs */ 326 345 unsigned char hoontech_boxbits[4]; 327 346 unsigned int hoontech_config; 328 347 unsigned short hoontech_boxconfig[4]; 329 330 struct snd_ak4524 ak4524; 348 unsigned int cur_rate; /* current rate */ 349 350 unsigned int akm_codecs; 351 akm4xxx_t *akm; 331 352 struct snd_ice1712_spdif spdif; 332 353 … … 336 357 snd_i2c_device_t *i2cdevs[2]; /* additional i2c devices */ 337 358 338 unsigned char gpio_direction, gpio_write_mask; 359 struct ice1712_gpio { 360 unsigned int direction; /* current direction bits */ 361 unsigned int write_mask; /* current mask bits */ 362 unsigned int saved[2]; /* for ewx_i2c */ 363 /* operators */ 364 void (*set_mask)(ice1712_t *ice, unsigned int data); 365 void (*set_dir)(ice1712_t *ice, unsigned int data); 366 void (*set_data)(ice1712_t *ice, unsigned int data); 367 unsigned int (*get_data)(ice1712_t *ice); 368 } gpio; 369 struct semaphore gpio_mutex; 339 370 }; 340 371 … … 342 373 343 374 375 /* 376 * gpio access functions 377 */ 378 static inline void snd_ice1712_gpio_set_dir(ice1712_t *ice, unsigned int bits) 379 { 380 ice->gpio.set_dir(ice, bits); 381 } 382 383 static inline void snd_ice1712_gpio_set_mask(ice1712_t *ice, unsigned int bits) 384 { 385 ice->gpio.set_mask(ice, bits); 386 } 387 388 static inline void snd_ice1712_gpio_write(ice1712_t *ice, unsigned int val) 389 { 390 ice->gpio.set_data(ice, val); 391 } 392 393 static inline unsigned int snd_ice1712_gpio_read(ice1712_t *ice) 394 { 395 return ice->gpio.get_data(ice); 396 } 397 398 /* 399 * save and restore gpio status 400 * The access to gpio will be protected by mutex, so don't forget to 401 * restore! 402 */ 403 static inline void snd_ice1712_save_gpio_status(ice1712_t *ice) 404 { 405 down(&ice->gpio_mutex); 406 ice->gpio.saved[0] = ice->gpio.direction; 407 ice->gpio.saved[1] = ice->gpio.write_mask; 408 } 409 410 static inline void snd_ice1712_restore_gpio_status(ice1712_t *ice) 411 { 412 ice->gpio.set_dir(ice, ice->gpio.saved[0]); 413 ice->gpio.set_mask(ice, ice->gpio.saved[1]); 414 ice->gpio.direction = ice->gpio.saved[0]; 415 ice->gpio.write_mask = ice->gpio.saved[1]; 416 up(&ice->gpio_mutex); 417 } 418 419 /* for bit controls */ 344 420 #define ICE1712_GPIO(xiface, xname, xindex, mask, invert, xaccess) \ 345 421 { .iface = xiface, .name = xname, .access = xaccess, .info = snd_ice1712_gpio_info, \ … … 351 427 int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); 352 428 353 void snd_ice1712_gpio_write_bits(ice1712_t *ice, int mask, int bits); 354 void snd_ice1712_save_gpio_status(ice1712_t *ice, unsigned char *tmp); 355 void snd_ice1712_restore_gpio_status(ice1712_t *ice, unsigned char *tmp); 356 429 /* 430 * set gpio direction, write mask and data 431 */ 432 static inline void snd_ice1712_gpio_write_bits(ice1712_t *ice, unsigned int mask, unsigned int bits) 433 { 434 ice->gpio.direction |= mask; 435 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 436 snd_ice1712_gpio_set_mask(ice, ~mask); 437 snd_ice1712_gpio_write(ice, mask & bits); 438 } 357 439 358 440 int snd_ice1712_spdif_build_controls(ice1712_t *ice); 359 441 360 void snd_ice1712_ak 4524_write(ice1712_t *ice, int chip, unsigned char addr, unsigned char data);361 void snd_ice1712_ak 4524_reset(ice1712_t *ice, int state);362 void snd_ice1712_ak 4524_init(ice1712_t *ice);363 int snd_ice1712_ak 4524_build_controls(ice1712_t *ice);442 void snd_ice1712_akm4xxx_write(akm4xxx_t *ice, int chip, unsigned char addr, unsigned char data); 443 void snd_ice1712_akm4xxx_reset(akm4xxx_t *ice, int state); 444 void snd_ice1712_akm4xxx_init(akm4xxx_t *ak, const akm4xxx_t *template, ice1712_t *ice); 445 int snd_ice1712_akm4xxx_build_controls(ice1712_t *ice); 364 446 365 447 int snd_ice1712_init_cs8427(ice1712_t *ice, int addr); -
GPL/branches/alsa-resync1/alsa-kernel/pci/ice1712/makefile.os2
r212 r224 14 14 #=================================================================== 15 15 FILE1 = ak4524.obj delta.obj ews.obj hoontech.obj ice1712.obj 16 FILE2 = 16 FILE2 = ice1724.obj revo.obj 17 17 FILE3 = 18 18 FILE4 = -
GPL/branches/alsa-resync1/alsa-kernel/pci/korg1212/korg1212.c
r212 r224 21 21 22 22 #include <sound/driver.h> 23 #include <asm/io.h>24 23 #include <linux/delay.h> 25 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 26 #include <linux/pci.h> 27 27 #include <linux/slab.h> 28 #include <linux/wait.h> 29 28 30 #include <sound/core.h> 29 31 #include <sound/info.h> … … 34 36 #include <sound/initval.h> 35 37 38 #include <asm/io.h> 39 36 40 // ---------------------------------------------------------------------------- 37 41 // Debug Stuff … … 39 43 #define K1212_DEBUG_LEVEL 0 40 44 #define K1212_DEBUG_PRINTK printk 45 //#define K1212_DEBUG_PRINTK(x...) printk("<0>" x) 41 46 42 47 // ---------------------------------------------------------------------------- … … 175 180 #define kPlayBufferFrames 1024 176 181 177 #define K1212_CHANNELS 16 182 #define K1212_ANALOG_CHANNELS 2 183 #define K1212_SPDIF_CHANNELS 2 184 #define K1212_ADAT_CHANNELS 8 185 #define K1212_CHANNELS (K1212_ADAT_CHANNELS + K1212_ANALOG_CHANNELS) 186 #define K1212_MIN_CHANNELS 1 187 #define K1212_MAX_CHANNELS K1212_CHANNELS 178 188 #define K1212_FRAME_SIZE (sizeof(KorgAudioFrame)) 179 189 #define K1212_MAX_SAMPLES (kPlayBufferFrames*kNumBuffers) 180 #define K1212_PERIODS (K1212_BUF_SIZE/K1212_BLOCK_SIZE) 181 #define K1212_PERIOD_BYTES (K1212_BLOCK_SIZE) 182 #define K1212_BLOCK_SIZE (K1212_FRAME_SIZE*kPlayBufferFrames) 183 #define K1212_BUF_SIZE (K1212_BLOCK_SIZE*kNumBuffers) 190 #define K1212_PERIODS (kNumBuffers) 191 #define K1212_PERIOD_BYTES (K1212_FRAME_SIZE*kPlayBufferFrames) 192 #define K1212_BUF_SIZE (K1212_PERIOD_BYTES*kNumBuffers) 193 #define K1212_ANALOG_BUF_SIZE (K1212_ANALOG_CHANNELS * 2 * kPlayBufferFrames * kNumBuffers) 194 #define K1212_SPDIF_BUF_SIZE (K1212_SPDIF_CHANNELS * 3 * kPlayBufferFrames * kNumBuffers) 195 #define K1212_ADAT_BUF_SIZE (K1212_ADAT_CHANNELS * 2 * kPlayBufferFrames * kNumBuffers) 196 #define K1212_MAX_BUF_SIZE (K1212_ANALOG_BUF_SIZE + K1212_ADAT_BUF_SIZE) 184 197 185 198 #define k1212MinADCSens 0x7f … … 311 324 312 325 struct _snd_korg1212 { 326 snd_card_t *card; 313 327 struct pci_dev *pci; 314 snd_card_t *card; 315 snd_pcm_t *pcm16; 328 snd_pcm_t *pcm; 316 329 int irq; 317 330 … … 359 372 u32 * idRegPtr; // address of the device and vendor ID registers 360 373 361 362 374 size_t periodsize; 363 size_t currentBuffer; 375 int channels; 376 int currentBuffer; 364 377 365 378 snd_pcm_substream_t *playback_substream; 366 379 snd_pcm_substream_t *capture_substream; 367 snd_info_entry_t * proc_entry;368 380 369 381 CardState cardState; … … 381 393 u16 leftADCInSens; // ADC left channel input sensitivity 382 394 u16 rightADCInSens; // ADC right channel input sensitivity 395 396 int opencnt; // Open/Close count 397 int setcnt; // SetupForPlay count 398 int playcnt; // TriggerPlay count 399 383 400 }; 384 401 … … 404 421 405 422 static struct pci_device_id snd_korg1212_ids[] __devinitdata = { 406 { 0x10b5, 0x906d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 407 { 0, } 423 { 424 .vendor = 0x10b5, 425 .device = 0x906d, 426 .subvendor = PCI_ANY_ID, 427 .subdevice = PCI_ANY_ID, 428 }, 429 { 0, }, 408 430 }; 409 431 … … 456 478 }; 457 479 458 snd_korg1212rc rc; 459 480 static snd_korg1212rc rc; 460 481 461 482 MODULE_DEVICE_TABLE(pci, snd_korg1212_ids); … … 514 535 #endif /* not used */ 515 536 516 void TickDelay(int time)517 {518 udelay(time);519 }520 521 537 #define SetBitInWord(theWord,bitPosition) (*theWord) |= (0x0001 << bitPosition) 522 538 #define SetBitInDWord(theWord,bitPosition) (*theWord) |= (0x00000001 << bitPosition) … … 529 545 u32 retryCount; 530 546 u16 mailBox3Lo; 531 532 if (korg1212->outDoorbellPtr) { 547 snd_korg1212rc rc = K1212_CMDRET_Success; 548 549 if (!korg1212->outDoorbellPtr) { 550 #if K1212_DEBUG_LEVEL > 1 551 K1212_DEBUG_PRINTK("K1212_DEBUG: CardUninitialized\n"); 552 #endif 553 return K1212_CMDRET_CardUninitialized; 554 } 555 533 556 #if K1212_DEBUG_LEVEL > 0 534 557 K1212_DEBUG_PRINTK("K1212_DEBUG: Card <- 0x%08x 0x%08x [%s]\n", doorbellVal, mailBox0Val, stateName[korg1212->cardState]); 535 558 #endif 536 559 for (retryCount = 0; retryCount < MAX_COMMAND_RETRIES; retryCount++) { 537 538 560 writel(mailBox3Val, korg1212->mailbox3Ptr); 539 561 writel(mailBox2Val, korg1212->mailbox2Ptr); … … 545 567 // the reboot command will not give an acknowledgement. 546 568 // -------------------------------------------------------------- 547 switch (doorbellVal) { 548 case K1212_DB_RebootCard: 549 case K1212_DB_BootFromDSPPage4: 550 case K1212_DB_StartDSPDownload: 551 return K1212_CMDRET_Success; 552 default: 569 if ( doorbellVal == K1212_DB_RebootCard || 570 doorbellVal == K1212_DB_BootFromDSPPage4 || 571 doorbellVal == K1212_DB_StartDSPDownload ) { 572 rc = K1212_CMDRET_Success; 553 573 break; 554 574 } … … 559 579 // low byte is equal to the doorbell value, then it ack'd. 560 580 // -------------------------------------------------------------- 561 TickDelay(COMMAND_ACK_DELAY);581 udelay(COMMAND_ACK_DELAY); 562 582 mailBox3Lo = readl(korg1212->mailbox3Ptr); 563 583 if (mailBox3Lo & COMMAND_ACK_MASK) { 564 584 if ((mailBox3Lo & DOORBELL_VAL_MASK) == (doorbellVal & DOORBELL_VAL_MASK)) { 565 korg1212->cmdRetryCount += retryCount; 566 return K1212_CMDRET_Success; 567 } 585 #if K1212_DEBUG_LEVEL > 1 586 K1212_DEBUG_PRINTK("K1212_DEBUG: Card <- Success\n"); 587 #endif 588 rc = K1212_CMDRET_Success; 589 break; 568 590 } 569 591 } 570 korg1212->cmdRetryCount += retryCount; 571 return K1212_CMDRET_NoAckFromCard; 572 } else { 573 return K1212_CMDRET_CardUninitialized; 574 } 592 } 593 korg1212->cmdRetryCount += retryCount; 594 595 if (retryCount >= MAX_COMMAND_RETRIES) { 596 #if K1212_DEBUG_LEVEL > 1 597 K1212_DEBUG_PRINTK("K1212_DEBUG: Card <- NoAckFromCard\n"); 598 #endif 599 rc = K1212_CMDRET_NoAckFromCard; 600 } 601 602 return rc; 575 603 } 576 604 577 605 static void snd_korg1212_WaitForCardStopAck(korg1212_t *korg1212) 578 606 { 579 u nsigned long endtime = jiffies + 20* HZ;580 581 #if K1212_DEBUG_LEVEL > 0 582 K1212_DEBUG_PRINTK("K1212_DEBUG: WaitForCardStopAck [%s]\n", stateName[korg1212->cardState]);607 u32 endtime = jiffies + 2 * HZ; 608 609 #if K1212_DEBUG_LEVEL > 0 610 K1212_DEBUG_PRINTK("K1212_DEBUG: WaitForCardStopAck.in [%s] %lu %lu\n", stateName[korg1212->cardState], jiffies, korg1212->inIRQ); 583 611 #endif 584 612 … … 587 615 588 616 do { 589 if (readl(&korg1212->sharedBufferPtr->cardCommand) == 0) 617 if (readl(&korg1212->sharedBufferPtr->cardCommand) == 0) { 618 #if K1212_DEBUG_LEVEL > 0 619 K1212_DEBUG_PRINTK("K1212_DEBUG: WaitForCardStopAck.out [%s] %lu %lu\n", stateName[korg1212->cardState], jiffies, korg1212->inIRQ); 620 #endif 590 621 return; 622 } 591 623 if (!korg1212->inIRQ) 592 624 schedule(); 593 } while (jiffies < endtime); 594 625 } while (time_before(jiffies, endtime)); 626 627 #if K1212_DEBUG_LEVEL > 0 628 K1212_DEBUG_PRINTK("K1212_DEBUG: WaitForCardStopAck.out TO [%s] %lu %lu\n", stateName[korg1212->cardState], jiffies, korg1212->inIRQ); 629 #endif 595 630 writel(0, &korg1212->sharedBufferPtr->cardCommand); 596 631 } … … 598 633 static void snd_korg1212_TurnOnIdleMonitor(korg1212_t *korg1212) 599 634 { 600 TickDelay(INTERCOMMAND_DELAY);635 udelay(INTERCOMMAND_DELAY); 601 636 korg1212->idleMonitorOn = 1; 602 637 rc = snd_korg1212_Send1212Command(korg1212, K1212_DB_SelectPlayMode, … … 634 669 { 635 670 #if K1212_DEBUG_LEVEL > 0 636 K1212_DEBUG_PRINTK("K1212_DEBUG: OpenCard [%s]\n", stateName[korg1212->cardState]); 637 #endif 671 K1212_DEBUG_PRINTK("K1212_DEBUG: OpenCard [%s] %d\n", stateName[korg1212->cardState], korg1212->opencnt); 672 #endif 673 if (korg1212->opencnt++ == 0) 638 674 snd_korg1212_setCardState(korg1212, K1212_STATE_OPEN); 639 675 return 1; … … 643 679 { 644 680 #if K1212_DEBUG_LEVEL > 0 645 K1212_DEBUG_PRINTK("K1212_DEBUG: CloseCard [%s]\n", stateName[korg1212->cardState]); 646 #endif 681 K1212_DEBUG_PRINTK("K1212_DEBUG: CloseCard [%s] %d\n", stateName[korg1212->cardState], korg1212->opencnt); 682 #endif 683 684 if (--(korg1212->opencnt)) 685 return 0; 647 686 648 687 if (korg1212->cardState == K1212_STATE_SETUP) { … … 669 708 { 670 709 #if K1212_DEBUG_LEVEL > 0 671 K1212_DEBUG_PRINTK("K1212_DEBUG: SetupForPlay [%s]\n", stateName[korg1212->cardState]); 672 #endif 710 K1212_DEBUG_PRINTK("K1212_DEBUG: SetupForPlay [%s] %d\n", stateName[korg1212->cardState], korg1212->setcnt); 711 #endif 712 713 if (korg1212->setcnt++) 714 return 0; 673 715 674 716 snd_korg1212_setCardState(korg1212, K1212_STATE_SETUP); … … 680 722 #endif 681 723 if (rc != K1212_CMDRET_Success) { 682 return 0;683 }684 724 return 1; 685 725 } 726 return 0; 727 } 686 728 687 729 static int snd_korg1212_TriggerPlay(korg1212_t * korg1212) 688 730 { 689 731 #if K1212_DEBUG_LEVEL > 0 690 K1212_DEBUG_PRINTK("K1212_DEBUG: TriggerPlay [%s]\n", stateName[korg1212->cardState]); 691 #endif 732 K1212_DEBUG_PRINTK("K1212_DEBUG: TriggerPlay [%s] %d\n", stateName[korg1212->cardState], korg1212->playcnt); 733 #endif 734 735 if (korg1212->playcnt++) 736 return 0; 692 737 693 738 snd_korg1212_setCardState(korg1212, K1212_STATE_PLAYING); … … 699 744 700 745 if (rc != K1212_CMDRET_Success) { 701 return 0;702 }703 746 return 1; 704 747 } 748 return 0; 749 } 705 750 706 751 static int snd_korg1212_StopPlay(korg1212_t * korg1212) 707 752 { 708 753 #if K1212_DEBUG_LEVEL > 0 709 K1212_DEBUG_PRINTK("K1212_DEBUG: StopPlay [%s]\n", stateName[korg1212->cardState]); 710 #endif 754 K1212_DEBUG_PRINTK("K1212_DEBUG: StopPlay [%s] %d\n", stateName[korg1212->cardState], korg1212->playcnt); 755 #endif 756 757 if (--(korg1212->playcnt)) 758 return 0; 759 760 korg1212->setcnt = 0; 711 761 712 762 if (korg1212->cardState != K1212_STATE_ERRORSTOP) { … … 715 765 } 716 766 snd_korg1212_setCardState(korg1212, K1212_STATE_OPEN); 717 return 1;767 return 0; 718 768 } 719 769 … … 795 845 korg1212->clkRate = rate; 796 846 797 TickDelay(INTERCOMMAND_DELAY);847 udelay(INTERCOMMAND_DELAY); 798 848 rc = snd_korg1212_Send1212Command(korg1212, K1212_DB_SetClockSourceRate, 799 849 ClockSourceSelector[korg1212->clkSrcRate], … … 862 912 // ---------------------------------------------------------------------------- 863 913 writel(0, korg1212->mailbox3Ptr); 864 TickDelay(LOADSHIFT_DELAY);914 udelay(LOADSHIFT_DELAY); 865 915 866 916 // ---------------------------------------------------------------------------- … … 903 953 ClearBitInWord(&controlValue, SET_SENS_DATA_BITPOS); 904 954 writew(controlValue, korg1212->sensRegPtr); // load/shift goes low 905 TickDelay(LOADSHIFT_DELAY);955 udelay(LOADSHIFT_DELAY); 906 956 907 957 for (bitPosition = 15; bitPosition >= 0; bitPosition--) { // for all the bits … … 922 972 ClearBitInWord(&controlValue, SET_SENS_CLOCK_BITPOS); 923 973 writew(controlValue, korg1212->sensRegPtr); // clock goes low 924 TickDelay(SENSCLKPULSE_WIDTH);974 udelay(SENSCLKPULSE_WIDTH); 925 975 SetBitInWord(&controlValue, SET_SENS_CLOCK_BITPOS); 926 976 writew(controlValue, korg1212->sensRegPtr); // clock goes high 927 TickDelay(SENSCLKPULSE_WIDTH);977 udelay(SENSCLKPULSE_WIDTH); 928 978 } 929 979 … … 936 986 SetBitInWord(&controlValue, SET_SENS_LOADSHIFT_BITPOS); 937 987 writew(controlValue, korg1212->sensRegPtr); // load shift goes high - clk low 938 TickDelay(SENSCLKPULSE_WIDTH);988 udelay(SENSCLKPULSE_WIDTH); 939 989 940 990 if (clkIs48K) … … 942 992 943 993 writew(controlValue, korg1212->sensRegPtr); // set/clear data bit 944 TickDelay(ONE_RTC_TICK);994 udelay(ONE_RTC_TICK); 945 995 SetBitInWord(&controlValue, SET_SENS_CLOCK_BITPOS); 946 996 writew(controlValue, korg1212->sensRegPtr); // clock goes high 947 TickDelay(SENSCLKPULSE_WIDTH);997 udelay(SENSCLKPULSE_WIDTH); 948 998 ClearBitInWord(&controlValue, SET_SENS_CLOCK_BITPOS); 949 999 writew(controlValue, korg1212->sensRegPtr); // clock goes low 950 TickDelay(SENSCLKPULSE_WIDTH);1000 udelay(SENSCLKPULSE_WIDTH); 951 1001 } 952 1002 … … 956 1006 // ---------------------------------------------------------------------------- 957 1007 for (count = 0; count < 10; count++) 958 TickDelay(SENSCLKPULSE_WIDTH);1008 udelay(SENSCLKPULSE_WIDTH); 959 1009 960 1010 if (monModeSet) { … … 1004 1054 #endif 1005 1055 1006 TickDelay(INTERCOMMAND_DELAY);1056 udelay(INTERCOMMAND_DELAY); 1007 1057 1008 1058 rc = snd_korg1212_Send1212Command(korg1212, … … 1022 1072 // Initialize the routing and volume tables, then update the card's state. 1023 1073 // -------------------------------------------------------------------------------- 1024 TickDelay(INTERCOMMAND_DELAY);1074 udelay(INTERCOMMAND_DELAY); 1025 1075 1026 1076 for (channel = 0; channel < kAudioChannels; channel++) { … … 1032 1082 snd_korg1212_WriteADCSensitivity(korg1212); 1033 1083 1034 TickDelay(INTERCOMMAND_DELAY);1084 udelay(INTERCOMMAND_DELAY); 1035 1085 rc = snd_korg1212_Send1212Command(korg1212, K1212_DB_SetClockSourceRate, 1036 1086 ClockSourceSelector[korg1212->clkSrcRate], … … 1048 1098 wake_up_interruptible(&korg1212->wait); 1049 1099 } 1050 1051 1100 1052 1101 static void snd_korg1212_interrupt(int irq, void *dev_id, struct pt_regs *regs) … … 1085 1134 // ------------------------------------------------------------------------ 1086 1135 case K1212_ISRCODE_DMAERROR: 1087 #if K1212_DEBUG_LEVEL > 01136 #if K1212_DEBUG_LEVEL > 1 1088 1137 K1212_DEBUG_PRINTK("K1212_DEBUG: IRQ DMAE count - %ld, %x, [%s].\n", korg1212->irqcount, doorbellValue, stateName[korg1212->cardState]); 1089 1138 #endif 1090 1139 writel(0, &korg1212->sharedBufferPtr->cardCommand); 1140 snd_korg1212_setCardState(korg1212, K1212_STATE_ERRORSTOP); 1091 1141 break; 1092 1142 … … 1096 1146 // ------------------------------------------------------------------------ 1097 1147 case K1212_ISRCODE_CARDSTOPPED: 1098 #if K1212_DEBUG_LEVEL > 01148 #if K1212_DEBUG_LEVEL > 1 1099 1149 K1212_DEBUG_PRINTK("K1212_DEBUG: IRQ CSTP count - %ld, %x, [%s].\n", korg1212->irqcount, doorbellValue, stateName[korg1212->cardState]); 1100 1150 #endif … … 1103 1153 1104 1154 default: 1105 #if K1212_DEBUG_LEVEL > 11155 #if K1212_DEBUG_LEVEL > 3 1106 1156 K1212_DEBUG_PRINTK("K1212_DEBUG: IRQ DFLT count - %ld, %x, cpos=%d [%s].\n", korg1212->irqcount, doorbellValue, 1107 1157 korg1212->currentBuffer, stateName[korg1212->cardState]); … … 1163 1213 static snd_pcm_hardware_t snd_korg1212_playback_info = 1164 1214 { 1165 .info = (SNDRV_PCM_INFO_MMAP |1215 .info = (SNDRV_PCM_INFO_MMAP | 1166 1216 SNDRV_PCM_INFO_MMAP_VALID | 1167 1217 SNDRV_PCM_INFO_INTERLEAVED), … … 1171 1221 .rate_min = 44100, 1172 1222 .rate_max = 48000, 1173 .channels_min = K1212_ CHANNELS,1174 .channels_max = K1212_ CHANNELS,1175 .buffer_bytes_max = K1212_ BUF_SIZE,1176 .period_bytes_min = K1212_ PERIOD_BYTES,1177 .period_bytes_max = K1212_ PERIOD_BYTES,1223 .channels_min = K1212_MIN_CHANNELS, 1224 .channels_max = K1212_MAX_CHANNELS, 1225 .buffer_bytes_max = K1212_MAX_BUF_SIZE, 1226 .period_bytes_min = K1212_MIN_CHANNELS * 2 * kPlayBufferFrames, 1227 .period_bytes_max = K1212_MAX_CHANNELS * 2 * kPlayBufferFrames, 1178 1228 .periods_min = K1212_PERIODS, 1179 1229 .periods_max = K1212_PERIODS, … … 1183 1233 static snd_pcm_hardware_t snd_korg1212_capture_info = 1184 1234 { 1185 .info = (SNDRV_PCM_INFO_MMAP |1235 .info = (SNDRV_PCM_INFO_MMAP | 1186 1236 SNDRV_PCM_INFO_MMAP_VALID | 1187 1237 SNDRV_PCM_INFO_INTERLEAVED), … … 1191 1241 .rate_min = 44100, 1192 1242 .rate_max = 48000, 1193 .channels_min = K1212_ CHANNELS,1194 .channels_max = K1212_ CHANNELS,1195 .buffer_bytes_max = K1212_ BUF_SIZE,1196 .period_bytes_min = K1212_ PERIOD_BYTES,1197 .period_bytes_max = K1212_ PERIOD_BYTES,1243 .channels_min = K1212_MIN_CHANNELS, 1244 .channels_max = K1212_MAX_CHANNELS, 1245 .buffer_bytes_max = K1212_MAX_BUF_SIZE, 1246 .period_bytes_min = K1212_MIN_CHANNELS * 2 * kPlayBufferFrames, 1247 .period_bytes_max = K1212_MAX_CHANNELS * 2 * kPlayBufferFrames, 1198 1248 .periods_min = K1212_PERIODS, 1199 1249 .periods_max = K1212_PERIODS, … … 1201 1251 }; 1202 1252 1253 static int snd_korg1212_silence(korg1212_t *korg1212, int pos, int count, int offset, int size) 1254 { 1255 KorgAudioFrame * dst = korg1212->playDataBufsPtr[0].bufferData + pos; 1256 int i; 1257 1258 #if K1212_DEBUG_LEVEL > 2 1259 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_silence pos=%d offset=%d size=%d count=%d\n", pos, offset, size, count); 1260 #endif 1261 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1262 1263 for (i=0; i < count; i++) { 1264 #if K1212_DEBUG_LEVEL > 0 1265 if ( (void *) dst < (void *) korg1212->playDataBufsPtr || 1266 (void *) dst > (void *) korg1212->playDataBufsPtr[8].bufferData ) { 1267 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_silence KERNEL EFAULT dst=%p iter=%d\n", dst, i); 1268 return -EFAULT; 1269 } 1270 #endif 1271 memset((void*) dst + offset, 0, size); 1272 dst++; 1273 } 1274 1275 return 0; 1276 } 1277 1278 static int snd_korg1212_copy_to(korg1212_t *korg1212, void *dst, int pos, int count, int offset, int size) 1279 { 1280 KorgAudioFrame * src = korg1212->recordDataBufsPtr[0].bufferData + pos; 1281 int i, rc; 1282 1283 #if K1212_DEBUG_LEVEL > 2 1284 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_to pos=%d offset=%d size=%d\n", pos, offset, size); 1285 #endif 1286 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1287 1288 for (i=0; i < count; i++) { 1289 #if K1212_DEBUG_LEVEL > 0 1290 if ( (void *) src < (void *) korg1212->recordDataBufsPtr || 1291 (void *) src > (void *) korg1212->recordDataBufsPtr[8].bufferData ) { 1292 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_to KERNEL EFAULT, src=%p dst=%p iter=%d\n", src, dst, i); 1293 return -EFAULT; 1294 } 1295 #endif 1296 rc = copy_to_user((void*) dst + offset, src, size); 1297 if (rc) { 1298 #if K1212_DEBUG_LEVEL > 0 1299 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_to USER EFAULT src=%p dst=%p iter=%d\n", src, dst, i); 1300 #endif 1301 return -EFAULT; 1302 } 1303 src++; 1304 dst += size; 1305 } 1306 1307 return 0; 1308 } 1309 1310 static int snd_korg1212_copy_from(korg1212_t *korg1212, void *src, int pos, int count, int offset, int size) 1311 { 1312 KorgAudioFrame * dst = korg1212->playDataBufsPtr[0].bufferData + pos; 1313 int i, rc; 1314 1315 #if K1212_DEBUG_LEVEL > 2 1316 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_from pos=%d offset=%d size=%d count=%d\n", pos, offset, size, count); 1317 #endif 1318 1319 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1320 1321 for (i=0; i < count; i++) { 1322 #if K1212_DEBUG_LEVEL > 0 1323 if ( (void *) dst < (void *) korg1212->playDataBufsPtr || 1324 (void *) dst > (void *) korg1212->playDataBufsPtr[8].bufferData ) { 1325 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_from KERNEL EFAULT, src=%p dst=%p iter=%d\n", src, dst, i); 1326 return -EFAULT; 1327 } 1328 #endif 1329 rc = copy_from_user((void*) dst + offset, src, size); 1330 if (rc) { 1331 #if K1212_DEBUG_LEVEL > 0 1332 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_copy_from USER EFAULT src=%p dst=%p iter=%d\n", src, dst, i); 1333 #endif 1334 return -EFAULT; 1335 } 1336 dst++; 1337 src += size; 1338 } 1339 1340 return 0; 1341 } 1342 1203 1343 static void snd_korg1212_free_pcm(snd_pcm_t *pcm) 1204 1344 { … … 1209 1349 #endif 1210 1350 1211 korg1212->pcm16 = NULL; 1212 } 1213 1214 static unsigned int period_bytes[] = { K1212_PERIOD_BYTES }; 1215 1216 #define PERIOD_BYTES sizeof(period_bytes) / sizeof(period_bytes[0]) 1217 1218 static snd_pcm_hw_constraint_list_t hw_constraints_period_bytes = { 1219 .count = PERIOD_BYTES, 1220 .list = period_bytes, 1221 .mask = 0 1222 }; 1351 korg1212->pcm = NULL; 1352 } 1223 1353 1224 1354 static int snd_korg1212_playback_open(snd_pcm_substream_t *substream) … … 1232 1362 #endif 1233 1363 1364 snd_pcm_set_sync(substream); // ??? 1365 1234 1366 spin_lock_irqsave(&korg1212->lock, flags); 1235 1367 1236 snd_korg1212_OpenCard(korg1212); 1237 1238 snd_pcm_set_sync(substream); // ??? 1239 1240 runtime->hw = snd_korg1212_playback_info; 1368 snd_korg1212_OpenCard(korg1212); 1369 1241 1370 runtime->dma_area = (char *) korg1212->playDataBufsPtr; 1242 1371 runtime->dma_bytes = K1212_BUF_SIZE; … … 1244 1373 korg1212->playback_substream = substream; 1245 1374 korg1212->periodsize = K1212_PERIODS; 1375 korg1212->channels = K1212_CHANNELS; 1246 1376 1247 1377 spin_unlock_irqrestore(&korg1212->lock, flags); 1248 1378 1249 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, K1212_BUF_SIZE, K1212_BUF_SIZE); 1250 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); 1379 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, kPlayBufferFrames, kPlayBufferFrames); 1251 1380 return 0; 1252 1381 } 1382 1253 1383 1254 1384 static int snd_korg1212_capture_open(snd_pcm_substream_t *substream) … … 1262 1392 #endif 1263 1393 1394 snd_pcm_set_sync(substream); // ??? 1395 1264 1396 spin_lock_irqsave(&korg1212->lock, flags); 1265 1397 1266 snd_korg1212_OpenCard(korg1212); 1267 1268 snd_pcm_set_sync(substream); // ??? 1398 snd_korg1212_OpenCard(korg1212); 1269 1399 1270 1400 runtime->hw = snd_korg1212_capture_info; … … 1274 1404 korg1212->capture_substream = substream; 1275 1405 korg1212->periodsize = K1212_PERIODS; 1406 korg1212->channels = K1212_CHANNELS; 1276 1407 1277 1408 spin_unlock_irqrestore(&korg1212->lock, flags); 1278 1409 1279 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, K1212_BUF_SIZE, K1212_BUF_SIZE); 1280 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); 1410 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, kPlayBufferFrames, kPlayBufferFrames); 1281 1411 return 0; 1282 1412 } … … 1291 1421 #endif 1292 1422 1423 snd_korg1212_silence(korg1212, 0, K1212_MAX_SAMPLES, 0, korg1212->channels * 2); 1424 1293 1425 spin_lock_irqsave(&korg1212->lock, flags); 1294 1426 … … 1322 1454 } 1323 1455 1324 static int snd_korg1212_channel_info(snd_pcm_substream_t *substream,1325 snd_pcm_channel_info_t *info)1326 {1327 int chn = info->channel;1328 1329 // snd_assert(info->channel < kAudioChannels + 1, return -EINVAL);1330 1331 info->offset = 0;1332 // if (chn < k16BitChannels) {1333 info->first = chn * 16;1334 // } else {1335 // info->first = k16BitChannels * 16 + (chn - k16BitChannels - 1) * 32;1336 // }1337 info->step = sizeof(KorgAudioFrame) * 8;1338 1339 #if K1212_DEBUG_LEVEL > 01340 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_channel_info %d:, offset=%ld, first=%d, step=%d\n", chn, info->offset, info->first, info->step);1341 #endif1342 1343 return 0;1344 }1345 1346 1456 static int snd_korg1212_ioctl(snd_pcm_substream_t *substream, 1347 1457 unsigned int cmd, void *arg) … … 1350 1460 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_ioctl: cmd=%d\n", cmd); 1351 1461 #endif 1462 1352 1463 if (cmd == SNDRV_PCM_IOCTL1_CHANNEL_INFO ) { 1353 1464 snd_pcm_channel_info_t *info = arg; 1354 return snd_korg1212_channel_info(substream, info); 1465 info->offset = 0; 1466 info->first = info->channel * 16; 1467 info->step = 256; 1468 #if K1212_DEBUG_LEVEL > 0 1469 K1212_DEBUG_PRINTK("K1212_DEBUG: channel_info %d:, offset=%ld, first=%d, step=%d\n", info->channel, info->offset, info->first, info->step); 1470 #endif 1471 return 0; 1355 1472 } 1356 1473 … … 1374 1491 return err; 1375 1492 } 1376 1493 /* 1377 1494 if (params_format(params) != SNDRV_PCM_FORMAT_S16_LE) { 1378 1495 spin_unlock_irqrestore(&korg1212->lock, flags); 1379 1496 return -EINVAL; 1380 1497 } 1381 1382 korg1212->periodsize = K1212_BLOCK_SIZE; 1498 */ 1499 korg1212->channels = params_channels(params); 1500 korg1212->periodsize = K1212_PERIOD_BYTES; 1383 1501 1384 1502 spin_unlock_irqrestore(&korg1212->lock, flags); … … 1391 1509 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1392 1510 unsigned long flags; 1511 int rc; 1393 1512 1394 1513 #if K1212_DEBUG_LEVEL > 0 … … 1398 1517 spin_lock_irqsave(&korg1212->lock, flags); 1399 1518 1400 snd_korg1212_SetupForPlay(korg1212); 1401 1402 korg1212->currentBuffer = -1; 1519 rc = snd_korg1212_SetupForPlay(korg1212); 1520 korg1212->currentBuffer = 0; 1403 1521 1404 1522 spin_unlock_irqrestore(&korg1212->lock, flags); 1405 return 0; 1523 1524 return rc ? -EINVAL : 0; 1406 1525 } 1407 1526 … … 1410 1529 { 1411 1530 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1531 int rc; 1412 1532 1413 1533 #if K1212_DEBUG_LEVEL > 0 … … 1417 1537 switch (cmd) { 1418 1538 case SNDRV_PCM_TRIGGER_START: 1419 korg1212->running = 1; 1420 snd_korg1212_TriggerPlay(korg1212); 1539 /* 1540 if (korg1212->running) { 1541 #if K1212_DEBUG_LEVEL > 1 1542 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_trigger: Already running?\n"); 1543 #endif 1421 1544 break; 1545 } 1546 */ 1547 korg1212->running++; 1548 rc = snd_korg1212_TriggerPlay(korg1212); 1549 break; 1422 1550 1423 1551 case SNDRV_PCM_TRIGGER_STOP: 1424 korg1212->running = 0; 1425 snd_korg1212_StopPlay(korg1212); 1552 /* 1553 if (!korg1212->running) { 1554 #if K1212_DEBUG_LEVEL > 1 1555 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_trigger: Already stopped?\n"); 1556 #endif 1557 break; 1558 } 1559 */ 1560 korg1212->running--; 1561 rc = snd_korg1212_StopPlay(korg1212); 1426 1562 break; 1427 1563 1428 1564 default: 1429 return -EINVAL; 1430 } 1431 return 0; 1432 } 1433 1434 static snd_pcm_uframes_t snd_korg1212_pointer(snd_pcm_substream_t *substream) 1565 rc = 1; 1566 break; 1567 } 1568 return rc ? -EINVAL : 0; 1569 } 1570 1571 static snd_pcm_uframes_t snd_korg1212_playback_pointer(snd_pcm_substream_t *substream) 1435 1572 { 1436 1573 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1437 1574 snd_pcm_uframes_t pos; 1438 1575 1439 if (korg1212->currentBuffer < 0)1440 return 0;1441 1442 1576 pos = korg1212->currentBuffer * kPlayBufferFrames; 1443 1577 1444 #if K1212_DEBUG_LEVEL > 1 1445 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_pointer [%s] %ld\n", stateName[korg1212->cardState], pos); 1578 #if K1212_DEBUG_LEVEL > 2 1579 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_playback_pointer [%s] %ld\n", 1580 stateName[korg1212->cardState], pos); 1581 #endif 1582 1583 return pos; 1584 } 1585 1586 static snd_pcm_uframes_t snd_korg1212_capture_pointer(snd_pcm_substream_t *substream) 1587 { 1588 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1589 snd_pcm_uframes_t pos; 1590 1591 pos = korg1212->currentBuffer * kPlayBufferFrames; 1592 1593 #if K1212_DEBUG_LEVEL > 2 1594 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_capture_pointer [%s] %ld\n", 1595 stateName[korg1212->cardState], pos); 1446 1596 #endif 1447 1597 … … 1456 1606 { 1457 1607 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1458 KorgAudioFrame * dst = korg1212->playDataBufsPtr[0].bufferData + pos; 1459 1460 #if K1212_DEBUG_LEVEL > 0 1608 1609 #if K1212_DEBUG_LEVEL > 2 1461 1610 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_playback_copy [%s] %ld %ld\n", stateName[korg1212->cardState], pos, count); 1462 1611 #endif 1463 1612 1464 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1465 1466 return copy_from_user(dst, src, count * K1212_FRAME_SIZE) ? -EFAULT : 0; 1613 return snd_korg1212_copy_from(korg1212, src, pos, count, 0, korg1212->channels * 2); 1614 1615 } 1616 1617 static int snd_korg1212_playback_silence(snd_pcm_substream_t *substream, 1618 int channel, /* not used (interleaved data) */ 1619 snd_pcm_uframes_t pos, 1620 snd_pcm_uframes_t count) 1621 { 1622 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1623 1624 #if K1212_DEBUG_LEVEL > 0 1625 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_playback_silence [%s]\n", stateName[korg1212->cardState]); 1626 #endif 1627 1628 return snd_korg1212_silence(korg1212, pos, count, 0, korg1212->channels * 2); 1467 1629 } 1468 1630 … … 1474 1636 { 1475 1637 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1476 KorgAudioFrame * src = korg1212->recordDataBufsPtr[0].bufferData + pos; 1477 1478 #if K1212_DEBUG_LEVEL > 0 1638 1639 #if K1212_DEBUG_LEVEL > 2 1479 1640 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_capture_copy [%s] %ld %ld\n", stateName[korg1212->cardState], pos, count); 1480 1641 #endif 1481 1642 1482 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1483 1484 return copy_to_user(dst, src, count * K1212_FRAME_SIZE) ? -EFAULT : 0; 1485 } 1486 1487 static int snd_korg1212_playback_silence(snd_pcm_substream_t *substream, 1488 int channel, /* not used (interleaved data) */ 1489 snd_pcm_uframes_t pos, 1490 snd_pcm_uframes_t count) 1491 { 1492 korg1212_t *korg1212 = _snd_pcm_substream_chip(substream); 1493 KorgAudioFrame * dst = korg1212->playDataBufsPtr[0].bufferData + pos; 1494 1495 #if K1212_DEBUG_LEVEL > 0 1496 K1212_DEBUG_PRINTK("K1212_DEBUG: snd_korg1212_playback_silence [%s]\n", stateName[korg1212->cardState]); 1497 #endif 1498 1499 snd_assert(pos + count <= K1212_MAX_SAMPLES, return -EINVAL); 1500 1501 memset(dst, 0, count * K1212_FRAME_SIZE); 1502 1503 return 0; 1643 return snd_korg1212_copy_to(korg1212, dst, pos, count, 0, korg1212->channels * 2); 1504 1644 } 1505 1645 … … 1511 1651 .prepare = snd_korg1212_prepare, 1512 1652 .trigger = snd_korg1212_trigger, 1513 .pointer = snd_korg1212_p ointer,1653 .pointer = snd_korg1212_playback_pointer, 1514 1654 .copy = snd_korg1212_playback_copy, 1515 1655 .silence = snd_korg1212_playback_silence, … … 1523 1663 .prepare = snd_korg1212_prepare, 1524 1664 .trigger = snd_korg1212_trigger, 1525 .pointer = snd_korg1212_ pointer,1665 .pointer = snd_korg1212_capture_pointer, 1526 1666 .copy = snd_korg1212_capture_copy, 1527 1667 }; … … 1548 1688 u->value.integer.value[0] = korg1212->volumePhase[i]; 1549 1689 1550 if (i >= 8) 1690 if (i >= 8) 1551 1691 u->value.integer.value[1] = korg1212->volumePhase[i+1]; 1552 1692 … … 1696 1836 i = kcontrol->private_value; 1697 1837 1698 if (u->value.enumerated.item[0] != korg1212->sharedBufferPtr->volumeData[i]) {1838 if (u->value.enumerated.item[0] != (unsigned) korg1212->sharedBufferPtr->volumeData[i]) { 1699 1839 korg1212->sharedBufferPtr->routeData[i] = u->value.enumerated.item[0]; 1700 1840 change = 1; … … 1702 1842 1703 1843 if (i >= 8) { 1704 if (u->value.enumerated.item[1] != korg1212->sharedBufferPtr->volumeData[i+1]) {1844 if (u->value.enumerated.item[1] != (unsigned) korg1212->sharedBufferPtr->volumeData[i+1]) { 1705 1845 korg1212->sharedBufferPtr->routeData[i+1] = u->value.enumerated.item[1]; 1706 1846 change = 1; … … 1713 1853 } 1714 1854 1715 static int snd_korg1212_control_ analog_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)1855 static int snd_korg1212_control_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 1716 1856 { 1717 1857 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; … … 1722 1862 } 1723 1863 1724 static int snd_korg1212_control_ analog_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *u)1864 static int snd_korg1212_control_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *u) 1725 1865 { 1726 1866 korg1212_t *korg1212 = _snd_kcontrol_chip(kcontrol); … … 1737 1877 } 1738 1878 1739 static int snd_korg1212_control_ analog_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *u)1879 static int snd_korg1212_control_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *u) 1740 1880 { 1741 1881 korg1212_t *korg1212 = _snd_kcontrol_chip(kcontrol); … … 1848 1988 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1849 1989 .name = "ADC Attenuation", 1850 .info = snd_korg1212_control_ analog_info,1851 .get = snd_korg1212_control_ analog_get,1852 .put = snd_korg1212_control_ analog_put,1990 .info = snd_korg1212_control_info, 1991 .get = snd_korg1212_control_get, 1992 .put = snd_korg1212_control_put, 1853 1993 } 1854 1994 }; … … 1868 2008 snd_iprintf(buffer, " (index #%d)\n", korg1212->card->number + 1); 1869 2009 snd_iprintf(buffer, "\nGeneral settings\n"); 1870 snd_iprintf(buffer, " period size: %d bytes\n", K1212_ BLOCK_SIZE);2010 snd_iprintf(buffer, " period size: %d bytes\n", K1212_PERIOD_BYTES); 1871 2011 snd_iprintf(buffer, " clock mode: %s\n", clockSourceName[korg1212->clkSrcRate] ); 1872 2012 snd_iprintf(buffer, " left ADC Sens: %d\n", korg1212->leftADCInSens ); … … 1886 2026 } 1887 2027 1888 static void __ init snd_korg1212_proc_init(korg1212_t *korg1212)2028 static void __devinit snd_korg1212_proc_init(korg1212_t *korg1212) 1889 2029 { 1890 2030 snd_info_entry_t *entry; 1891 2031 1892 if ((entry = snd_info_create_card_entry(korg1212->card, "korg1212", korg1212->card->proc_root)) != NULL) { 1893 entry->content = SNDRV_INFO_CONTENT_TEXT; 1894 entry->private_data = korg1212; 1895 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 1896 entry->c.text.read_size = 256; 1897 entry->c.text.read = snd_korg1212_proc_read; 1898 if (snd_info_register(entry) < 0) { 1899 snd_info_free_entry(entry); 1900 entry = NULL; 1901 } 1902 } 1903 korg1212->proc_entry = entry; 1904 } 1905 1906 static void snd_korg1212_proc_done(korg1212_t * korg1212) 1907 { 1908 if (korg1212->proc_entry) { 1909 snd_info_unregister(korg1212->proc_entry); 1910 korg1212->proc_entry = NULL; 1911 } 1912 } 1913 1914 static int __init snd_korg1212_create(korg1212_t *korg1212) 1915 { 1916 struct pci_dev *pci = korg1212->pci; 2032 if (! snd_card_proc_new(korg1212->card, "korg1212", &entry)) 2033 snd_info_set_text_ops(entry, korg1212, snd_korg1212_proc_read); 2034 } 2035 2036 static int 2037 snd_korg1212_free(korg1212_t *korg1212) 2038 { 2039 snd_korg1212_TurnOffIdleMonitor(korg1212); 2040 2041 if (korg1212->irq >= 0) { 2042 synchronize_irq(korg1212->irq); 2043 snd_korg1212_DisableCardInterrupts(korg1212); 2044 free_irq(korg1212->irq, (void *)korg1212); 2045 korg1212->irq = -1; 2046 } 2047 2048 if (korg1212->iobase != 0) { 2049 iounmap((void *)korg1212->iobase); 2050 korg1212->iobase = 0; 2051 } 2052 2053 if (korg1212->res_iomem != NULL) { 2054 release_resource(korg1212->res_iomem); 2055 kfree_nocheck(korg1212->res_iomem); 2056 korg1212->res_iomem = NULL; 2057 } 2058 2059 if (korg1212->res_ioport != NULL) { 2060 release_resource(korg1212->res_ioport); 2061 kfree_nocheck(korg1212->res_ioport); 2062 korg1212->res_ioport = NULL; 2063 } 2064 2065 if (korg1212->res_iomem2 != NULL) { 2066 release_resource(korg1212->res_iomem2); 2067 kfree_nocheck(korg1212->res_iomem2); 2068 korg1212->res_iomem2 = NULL; 2069 } 2070 2071 // ---------------------------------------------------- 2072 // free up memory resources used for the DSP download. 2073 // ---------------------------------------------------- 2074 if (korg1212->dspMemPtr) { 2075 snd_free_pci_pages(korg1212->pci, korg1212->dspCodeSize, 2076 korg1212->dspMemPtr, (dma_addr_t)korg1212->dspMemPhy); 2077 korg1212->dspMemPhy = 0; 2078 korg1212->dspMemPtr = 0; 2079 korg1212->dspCodeSize = 0; 2080 } 2081 2082 #ifndef K1212_LARGEALLOC 2083 2084 // ------------------------------------------------------ 2085 // free up memory resources used for the Play/Rec Buffers 2086 // ------------------------------------------------------ 2087 if (korg1212->playDataBufsPtr) { 2088 snd_free_pci_pages(korg1212->pci, korg1212->DataBufsSize, 2089 korg1212->playDataBufsPtr, (dma_addr_t)korg1212->PlayDataPhy); 2090 korg1212->PlayDataPhy = 0; 2091 korg1212->playDataBufsPtr = NULL; 2092 } 2093 2094 if (korg1212->recordDataBufsPtr) { 2095 snd_free_pci_pages(korg1212->pci, korg1212->DataBufsSize, 2096 korg1212->recordDataBufsPtr, (dma_addr_t)korg1212->RecDataPhy); 2097 korg1212->RecDataPhy = 0; 2098 korg1212->recordDataBufsPtr = NULL; 2099 } 2100 2101 #endif 2102 2103 // ---------------------------------------------------- 2104 // free up memory resources used for the Shared Buffers 2105 // ---------------------------------------------------- 2106 if (korg1212->sharedBufferPtr) { 2107 snd_free_pci_pages(korg1212->pci, (u32) sizeof(KorgSharedBuffer), 2108 korg1212->sharedBufferPtr, (dma_addr_t)korg1212->sharedBufferPhy); 2109 korg1212->sharedBufferPhy = 0; 2110 korg1212->sharedBufferPtr = NULL; 2111 } 2112 2113 snd_magic_kfree(korg1212); 2114 return 0; 2115 } 2116 2117 static int snd_korg1212_dev_free(snd_device_t *device) 2118 { 2119 korg1212_t *korg1212 = snd_magic_cast(korg1212_t, device->device_data, return -ENXIO); 2120 #if K1212_DEBUG_LEVEL > 0 2121 K1212_DEBUG_PRINTK("K1212_DEBUG: Freeing device\n"); 2122 #endif 2123 return snd_korg1212_free(korg1212); 2124 } 2125 2126 static int __devinit snd_korg1212_create(snd_card_t * card, struct pci_dev *pci, 2127 korg1212_t ** rchip) 2128 2129 { 1917 2130 int err; 1918 int i;2131 unsigned int i; 1919 2132 unsigned ioport_size, iomem_size, iomem2_size; 1920 2133 dma_addr_t phys_addr; 2134 korg1212_t * korg1212; 2135 2136 static snd_device_ops_t ops = { 2137 .dev_free = snd_korg1212_dev_free, 2138 }; 2139 2140 * rchip = NULL; 2141 if ((err = pci_enable_device(pci)) < 0) 2142 return err; 2143 2144 korg1212 = snd_magic_kcalloc(korg1212_t, 0, GFP_KERNEL); 2145 if (korg1212 == NULL) 2146 return -ENOMEM; 2147 2148 korg1212->card = card; 2149 korg1212->pci = pci; 2150 2151 init_waitqueue_head(&korg1212->wait); 2152 spin_lock_init(&korg1212->lock); 1921 2153 1922 2154 korg1212->irq = -1; … … 1925 2157 korg1212->inIRQ = 0; 1926 2158 korg1212->running = 0; 2159 korg1212->opencnt = 0; 2160 korg1212->playcnt = 0; 2161 korg1212->setcnt = 0; 1927 2162 snd_korg1212_setCardState(korg1212, K1212_STATE_UNINITIALIZED); 1928 2163 korg1212->idleMonitorOn = 0; … … 1933 2168 for (i=0; i<kAudioChannels; i++) 1934 2169 korg1212->volumePhase[i] = 0; 1935 1936 if ((err = pci_enable_device(pci)) < 0)1937 return err;1938 2170 1939 2171 korg1212->iomem = pci_resource_start(korg1212->pci, 0); … … 1959 2191 korg1212->res_iomem = request_mem_region(korg1212->iomem, iomem_size, "korg1212"); 1960 2192 if (korg1212->res_iomem == NULL) { 1961 snd_printk( "unable to grab region 0x%lx-0x%lx\n",2193 snd_printk(KERN_ERR "unable to grab region 0x%lx-0x%lx\n", 1962 2194 korg1212->iomem, korg1212->iomem + iomem_size - 1); 1963 2195 return -EBUSY; … … 1966 2198 korg1212->res_ioport = request_region(korg1212->ioport, ioport_size, "korg1212"); 1967 2199 if (korg1212->res_ioport == NULL) { 1968 snd_printk( "unable to grab region 0x%lx-0x%lx\n",2200 snd_printk(KERN_ERR "unable to grab region 0x%lx-0x%lx\n", 1969 2201 korg1212->ioport, korg1212->ioport + ioport_size - 1); 1970 2202 return -EBUSY; … … 1973 2205 korg1212->res_iomem2 = request_mem_region(korg1212->iomem2, iomem2_size, "korg1212"); 1974 2206 if (korg1212->res_iomem2 == NULL) { 1975 snd_printk( "unable to grab region 0x%lx-0x%lx\n",2207 snd_printk(KERN_ERR "unable to grab region 0x%lx-0x%lx\n", 1976 2208 korg1212->iomem2, korg1212->iomem2 + iomem2_size - 1); 1977 2209 return -EBUSY; … … 1979 2211 1980 2212 if ((korg1212->iobase = (unsigned long) ioremap(korg1212->iomem, iomem_size)) == 0) { 1981 snd_printk( "unable to remap memory region 0x%lx-0x%lx\n", korg1212->iobase,2213 snd_printk(KERN_ERR "unable to remap memory region 0x%lx-0x%lx\n", korg1212->iobase, 1982 2214 korg1212->iobase + iomem_size - 1); 1983 2215 return -EBUSY; … … 1989 2221 1990 2222 if (err) { 1991 snd_printk( "unable to grab IRQ %d\n", pci->irq);2223 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1992 2224 return -EBUSY; 1993 2225 } … … 1995 2227 korg1212->irq = pci->irq; 1996 2228 1997 init_waitqueue_head(&korg1212->wait);1998 spin_lock_init(&korg1212->lock);1999 2229 pci_set_master(korg1212->pci); 2000 2230 … … 2040 2270 2041 2271 if (korg1212->sharedBufferPtr == NULL) { 2042 snd_printk( "can not allocate shared buffer memory (%d bytes)\n", sizeof(KorgSharedBuffer));2272 snd_printk(KERN_ERR "can not allocate shared buffer memory (%d bytes)\n", sizeof(KorgSharedBuffer)); 2043 2273 return -ENOMEM; 2044 2274 } … … 2056 2286 2057 2287 if (korg1212->playDataBufsPtr == NULL) { 2058 snd_printk( "can not allocate play data buffer memory (%d bytes)\n", korg1212->DataBufsSize);2288 snd_printk(KERN_ERR "can not allocate play data buffer memory (%d bytes)\n", korg1212->DataBufsSize); 2059 2289 return -ENOMEM; 2060 2290 } … … 2069 2299 2070 2300 if (korg1212->recordDataBufsPtr == NULL) { 2071 snd_printk( "can not allocate record data buffer memory (%d bytes)\n", korg1212->DataBufsSize);2301 snd_printk(KERN_ERR "can not allocate record data buffer memory (%d bytes)\n", korg1212->DataBufsSize); 2072 2302 return -ENOMEM; 2073 2303 } … … 2097 2327 2098 2328 if (korg1212->dspMemPtr == NULL) { 2099 snd_printk( "can not allocate dsp code memory (%d bytes)\n", korg1212->dspCodeSize);2329 snd_printk(KERN_ERR "can not allocate dsp code memory (%d bytes)\n", korg1212->dspCodeSize); 2100 2330 return -ENOMEM; 2101 2331 } … … 2117 2347 mdelay(CARD_BOOT_DELAY_IN_MS); 2118 2348 2119 if (snd_korg1212_downloadDSPCode(korg1212)) 2349 if (snd_korg1212_downloadDSPCode(korg1212)) 2120 2350 return -EBUSY; 2121 2351 … … 2133 2363 korg1212->AdatTimeCodePhy, LowerWordSwap(korg1212->AdatTimeCodePhy)); 2134 2364 2135 if ((err = snd_pcm_new(korg1212->card, "korg1212", 0, 1, 1, &korg1212->pcm 16)) < 0)2365 if ((err = snd_pcm_new(korg1212->card, "korg1212", 0, 1, 1, &korg1212->pcm)) < 0) 2136 2366 return err; 2137 2367 2138 korg1212->pcm16->private_data = korg1212; 2139 korg1212->pcm16->private_free = snd_korg1212_free_pcm; 2140 strcpy(korg1212->pcm16->name, "korg1212"); 2141 2142 snd_pcm_set_ops(korg1212->pcm16, SNDRV_PCM_STREAM_PLAYBACK, &snd_korg1212_playback_ops); 2143 snd_pcm_set_ops(korg1212->pcm16, SNDRV_PCM_STREAM_CAPTURE, &snd_korg1212_capture_ops); 2144 2145 korg1212->pcm16->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2368 korg1212->pcm->private_data = korg1212; 2369 korg1212->pcm->private_free = snd_korg1212_free_pcm; 2370 strcpy(korg1212->pcm->name, "korg1212"); 2371 2372 snd_pcm_set_ops(korg1212->pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_korg1212_playback_ops); 2373 2374 snd_pcm_set_ops(korg1212->pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_korg1212_capture_ops); 2375 2376 korg1212->pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2377 2378 //snd_pcm_lib_preallocate_pages_for_all(korg1212->pcm, 2379 // K1212_MAX_BUF_SIZE, K1212_MAX_BUF_SIZE, GFP_KERNEL); 2146 2380 2147 2381 for (i = 0; i < K1212_CONTROL_ELEMENTS; i++) { … … 2153 2387 snd_korg1212_proc_init(korg1212); 2154 2388 2389 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, korg1212, &ops)) < 0) { 2390 snd_korg1212_free(korg1212); 2391 return err; 2392 } 2393 2394 * rchip = korg1212; 2155 2395 return 0; 2156 2396 2157 }2158 2159 static void2160 snd_korg1212_free(void *private_data)2161 {2162 korg1212_t *korg1212 = (korg1212_t *)private_data;2163 2164 if (korg1212 == NULL) {2165 return;2166 }2167 2168 snd_korg1212_proc_done(korg1212);2169 2170 snd_korg1212_TurnOffIdleMonitor(korg1212);2171 2172 snd_korg1212_DisableCardInterrupts(korg1212);2173 2174 if (korg1212->irq >= 0) {2175 free_irq(korg1212->irq, (void *)korg1212);2176 korg1212->irq = -1;2177 }2178 if (korg1212->iobase != 0) {2179 iounmap((void *)korg1212->iobase);2180 korg1212->iobase = 0;2181 }2182 if (korg1212->res_iomem != NULL) {2183 release_resource(korg1212->res_iomem);2184 kfree_nocheck(korg1212->res_iomem);2185 korg1212->res_iomem = NULL;2186 }2187 if (korg1212->res_ioport != NULL) {2188 release_resource(korg1212->res_ioport);2189 kfree_nocheck(korg1212->res_ioport);2190 korg1212->res_ioport = NULL;2191 }2192 if (korg1212->res_iomem2 != NULL) {2193 release_resource(korg1212->res_iomem2);2194 kfree_nocheck(korg1212->res_iomem2);2195 korg1212->res_iomem2 = NULL;2196 }2197 2198 // ----------------------------------------------------2199 // free up memory resources used for the DSP download.2200 // ----------------------------------------------------2201 if (korg1212->dspMemPtr) {2202 snd_free_pci_pages(korg1212->pci, korg1212->dspCodeSize,2203 korg1212->dspMemPtr, (dma_addr_t)korg1212->dspMemPhy);2204 korg1212->dspMemPhy = 0;2205 korg1212->dspMemPtr = 0;2206 korg1212->dspCodeSize = 0;2207 }2208 2209 #ifndef K1212_LARGEALLOC2210 2211 // ------------------------------------------------------2212 // free up memory resources used for the Play/Rec Buffers2213 // ------------------------------------------------------2214 if (korg1212->playDataBufsPtr) {2215 snd_free_pci_pages(korg1212->pci, korg1212->DataBufsSize,2216 korg1212->playDataBufsPtr, (dma_addr_t)korg1212->PlayDataPhy);2217 korg1212->PlayDataPhy = 0;2218 korg1212->playDataBufsPtr = NULL;2219 }2220 2221 if (korg1212->recordDataBufsPtr) {2222 snd_free_pci_pages(korg1212->pci, korg1212->DataBufsSize,2223 korg1212->recordDataBufsPtr, (dma_addr_t)korg1212->RecDataPhy);2224 korg1212->RecDataPhy = 0;2225 korg1212->recordDataBufsPtr = NULL;2226 }2227 2228 #endif2229 2230 // ----------------------------------------------------2231 // free up memory resources used for the Shared Buffers2232 // ----------------------------------------------------2233 if (korg1212->sharedBufferPtr) {2234 snd_free_pci_pages(korg1212->pci, (u32) sizeof(KorgSharedBuffer),2235 korg1212->sharedBufferPtr, (dma_addr_t)korg1212->sharedBufferPhy);2236 korg1212->sharedBufferPhy = 0;2237 korg1212->sharedBufferPtr = NULL;2238 }2239 2397 } 2240 2398 … … 2242 2400 * Card initialisation 2243 2401 */ 2244 2245 static void snd_korg1212_card_free(snd_card_t *card)2246 {2247 #if K1212_DEBUG_LEVEL > 02248 K1212_DEBUG_PRINTK("K1212_DEBUG: Freeing card\n");2249 #endif2250 snd_korg1212_free(card->private_data);2251 }2252 2402 2253 2403 static int __devinit … … 2267 2417 return -ENOENT; 2268 2418 } 2269 if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,2270 sizeof(korg1212_t)))== NULL)2419 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2420 if (card == NULL) 2271 2421 return -ENOMEM; 2272 2422 2273 card->private_free = snd_korg1212_card_free; 2274 korg1212 = (korg1212_t *)card->private_data; 2275 korg1212->card = card; 2276 korg1212->pci = pci; 2277 2278 if ((err = snd_korg1212_create(korg1212)) < 0) { 2423 if ((err = snd_korg1212_create(card, pci, &korg1212)) < 0) { 2279 2424 snd_card_free(card); 2280 2425 return err; … … 2294 2439 return err; 2295 2440 } 2296 pci_set_drvdata(pci, card);2441 pci_set_drvdata(pci, korg1212); 2297 2442 dev++; 2298 2443 return 0; … … 2301 2446 static void __devexit snd_korg1212_remove(struct pci_dev *pci) 2302 2447 { 2303 snd_card_free(pci_get_drvdata(pci)); 2448 korg1212_t *korg1212 = pci_get_drvdata(pci); 2449 snd_card_free(korg1212->card); 2304 2450 pci_set_drvdata(pci, NULL); 2305 2451 } -
GPL/branches/alsa-resync1/alsa-kernel/pci/rme96.c
r212 r224 25 25 26 26 #include <sound/driver.h> 27 #include <asm/io.h>28 27 #include <linux/delay.h> 29 28 #include <linux/init.h> 29 #include <linux/interrupt.h> 30 30 #include <linux/pci.h> 31 31 #include <linux/slab.h> 32 32 33 #include <sound/core.h> 33 34 #include <sound/info.h> … … 38 39 #define SNDRV_GET_ID 39 40 #include <sound/initval.h> 41 42 #include <asm/io.h> 40 43 41 44 /* note, two last pcis should be equal, it is not a bug */ … … 255 258 snd_pcm_t *adat_pcm; 256 259 struct pci_dev *pci; 257 snd_info_entry_t *proc_entry;258 260 snd_kcontrol_t *spdif_ctl; 259 261 } rme96_t; … … 303 305 snd_rme96_capture_pointer(snd_pcm_substream_t *substream); 304 306 305 static void __ init307 static void __devinit 306 308 snd_rme96_proc_init(rme96_t *rme96); 307 308 static void309 snd_rme96_proc_done(rme96_t *rme96);310 309 311 310 static int … … 313 312 rme96_t *rme96); 314 313 314 static int 315 snd_rme96_getinputtype(rme96_t *rme96); 316 315 317 static inline unsigned int 316 318 snd_rme96_playback_ptr(rme96_t *rme96) … … 325 327 return (readl(rme96->iobase + RME96_IO_GET_REC_POS) 326 328 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->capture_frlog; 329 } 330 331 static int 332 snd_rme96_ratecode(int rate) 333 { 334 switch (rate) { 335 case 32000: return SNDRV_PCM_RATE_32000; 336 case 44100: return SNDRV_PCM_RATE_44100; 337 case 48000: return SNDRV_PCM_RATE_48000; 338 case 64000: return SNDRV_PCM_RATE_64000; 339 case 88200: return SNDRV_PCM_RATE_88200; 340 case 96000: return SNDRV_PCM_RATE_96000; 341 } 342 return 0; 327 343 } 328 344 … … 667 683 668 684 if (!(rme96->wcreg & RME96_WCR_MASTER) && 685 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG && 669 686 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0) 670 687 { … … 972 989 snd_pcm_hw_params_t *params) 973 990 { 974 unsigned long flags; 991 unsigned long flags; 975 992 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 976 int err ;993 int err, rate, dummy; 977 994 978 995 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params))) < 0) 979 996 return err; 980 997 spin_lock_irqsave(&rme96->lock, flags); 981 if ((err = snd_rme96_playback_setrate(rme96, params_rate(params))) < 0) { 998 if (!(rme96->wcreg & RME96_WCR_MASTER) && 999 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG && 1000 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0) 1001 { 1002 /* slave clock */ 1003 if ((int)params_rate(params) != rate) { 1004 spin_unlock_irqrestore(&rme96->lock, flags); 1005 return -EIO; 1006 } 1007 } else if ((err = snd_rme96_playback_setrate(rme96, params_rate(params))) < 0) { 982 1008 spin_unlock_irqrestore(&rme96->lock, flags); 983 1009 return err; … … 1022 1048 unsigned long flags; 1023 1049 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1024 int err, isadat; 1050 snd_pcm_runtime_t *runtime = substream->runtime; 1051 int err, isadat, rate; 1025 1052 1026 1053 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params))) < 0) … … 1038 1065 return err; 1039 1066 } 1040 } else if (params_rate(params) != snd_rme96_capture_getrate(rme96, &isadat)) { 1041 spin_unlock_irqrestore(&rme96->lock, flags); 1042 return -EBUSY; 1067 } else if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) { 1068 if ((int)params_rate(params) != rate) { 1069 spin_unlock_irqrestore(&rme96->lock, flags); 1070 return -EIO; 1071 } 1072 if ((isadat && runtime->hw.channels_min == 2) || 1073 (!isadat && runtime->hw.channels_min == 8)) 1074 { 1075 spin_unlock_irqrestore(&rme96->lock, flags); 1076 return -EIO; 1077 } 1043 1078 } 1044 1079 snd_rme96_setframelog(rme96, params_channels(params), 0); … … 1160 1195 { 1161 1196 unsigned long flags; 1197 int rate, dummy; 1162 1198 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1163 1199 snd_pcm_runtime_t *runtime = substream->runtime; … … 1166 1202 1167 1203 spin_lock_irqsave(&rme96->lock, flags); 1204 if (rme96->playback_substream != NULL) { 1205 spin_unlock_irqrestore(&rme96->lock, flags); 1206 return -EBUSY; 1207 } 1168 1208 rme96->wcreg &= ~RME96_WCR_ADAT; 1169 1209 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); … … 1173 1213 spin_unlock_irqrestore(&rme96->lock, flags); 1174 1214 1175 runtime->hw = snd_rme96_playback_spdif_info; 1215 runtime->hw = snd_rme96_playback_spdif_info; 1216 if (!(rme96->wcreg & RME96_WCR_MASTER) && 1217 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG && 1218 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0) 1219 { 1220 /* slave clock */ 1221 runtime->hw.rates = snd_rme96_ratecode(rate); 1222 runtime->hw.rate_min = rate; 1223 runtime->hw.rate_max = rate; 1224 } 1176 1225 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, RME96_BUFFER_SIZE, RME96_BUFFER_SIZE); 1177 1226 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); … … 1188 1237 { 1189 1238 unsigned long flags; 1190 int isadat;1239 int isadat, rate; 1191 1240 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1192 1241 snd_pcm_runtime_t *runtime = substream->runtime; 1193 1242 1194 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);1195 if (snd_rme96_capture_getrate(rme96, &isadat) < 0) {1196 /* no input */1197 return -EIO;1198 }1199 if (isadat) {1200 /* ADAT input */1201 return -EBUSY;1202 }1203 1243 snd_pcm_set_sync(substream); 1204 1244 1205 spin_lock_irqsave(&rme96->lock, flags); 1245 runtime->hw = snd_rme96_capture_spdif_info; 1246 if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG && 1247 (rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) 1248 { 1249 if (isadat) { 1250 return -EIO; 1251 } 1252 runtime->hw.rates = snd_rme96_ratecode(rate); 1253 runtime->hw.rate_min = rate; 1254 runtime->hw.rate_max = rate; 1255 } 1256 1257 spin_lock_irqsave(&rme96->lock, flags); 1258 if (rme96->capture_substream != NULL) { 1259 spin_unlock_irqrestore(&rme96->lock, flags); 1260 return -EBUSY; 1261 } 1206 1262 rme96->capture_substream = substream; 1207 1263 rme96->capture_ptr = 0; 1208 1264 spin_unlock_irqrestore(&rme96->lock, flags); 1209 1265 1210 runtime->hw = snd_rme96_capture_spdif_info;1211 1212 1266 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, RME96_BUFFER_SIZE, RME96_BUFFER_SIZE); 1213 1267 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); … … 1220 1274 { 1221 1275 unsigned long flags; 1276 int rate, dummy; 1222 1277 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1223 snd_pcm_runtime_t *runtime = substream->runtime; 1278 snd_pcm_runtime_t *runtime = substream->runtime; 1224 1279 1225 1280 snd_pcm_set_sync(substream); 1226 1281 1227 1282 spin_lock_irqsave(&rme96->lock, flags); 1283 if (rme96->playback_substream != NULL) { 1284 spin_unlock_irqrestore(&rme96->lock, flags); 1285 return -EBUSY; 1286 } 1228 1287 rme96->wcreg |= RME96_WCR_ADAT; 1229 1288 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); … … 1234 1293 1235 1294 runtime->hw = snd_rme96_playback_adat_info; 1295 if (!(rme96->wcreg & RME96_WCR_MASTER) && 1296 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG && 1297 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0) 1298 { 1299 /* slave clock */ 1300 runtime->hw.rates = snd_rme96_ratecode(rate); 1301 runtime->hw.rate_min = rate; 1302 runtime->hw.rate_max = rate; 1303 } 1236 1304 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, RME96_BUFFER_SIZE, RME96_BUFFER_SIZE); 1237 1305 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); … … 1243 1311 { 1244 1312 unsigned long flags; 1245 int isadat;1313 int isadat, rate; 1246 1314 rme96_t *rme96 = _snd_pcm_substream_chip(substream); 1247 1315 snd_pcm_runtime_t *runtime = substream->runtime; 1248 1316 1249 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);1250 if (snd_rme96_capture_getrate(rme96, &isadat) < 0) {1251 /* no input */1252 return -EIO;1253 }1254 if (!isadat) {1255 /* S/PDIF input */1256 return -EBUSY;1257 }1258 1317 snd_pcm_set_sync(substream); 1259 1318 1319 runtime->hw = snd_rme96_capture_adat_info; 1320 if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG) { 1321 /* makes no sense to use analog input. Note that analog 1322 expension cards AEB4/8-I are RME96_INPUT_INTERNAL */ 1323 return -EIO; 1324 } 1325 if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) { 1326 if (!isadat) { 1327 return -EIO; 1328 } 1329 runtime->hw.rates = snd_rme96_ratecode(rate); 1330 runtime->hw.rate_min = rate; 1331 runtime->hw.rate_max = rate; 1332 } 1333 1260 1334 spin_lock_irqsave(&rme96->lock, flags); 1335 if (rme96->capture_substream != NULL) { 1336 spin_unlock_irqrestore(&rme96->lock, flags); 1337 return -EBUSY; 1338 } 1261 1339 rme96->capture_substream = substream; 1262 1340 rme96->capture_ptr = 0; 1263 1341 spin_unlock_irqrestore(&rme96->lock, flags); 1264 1342 1265 runtime->hw = snd_rme96_capture_adat_info;1266 1343 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, RME96_BUFFER_SIZE, RME96_BUFFER_SIZE); 1267 1344 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, &hw_constraints_period_bytes); … … 1277 1354 1278 1355 spin_lock_irqsave(&rme96->lock, flags); 1356 if (RME96_ISPLAYING(rme96)) { 1357 snd_rme96_playback_stop(rme96); 1358 } 1279 1359 rme96->playback_substream = NULL; 1280 1360 rme96->playback_periodsize = 0; … … 1296 1376 1297 1377 spin_lock_irqsave(&rme96->lock, flags); 1378 if (RME96_ISRECORDING(rme96)) { 1379 snd_rme96_capture_stop(rme96); 1380 } 1298 1381 rme96->capture_substream = NULL; 1299 1382 rme96->capture_periodsize = 0; … … 1556 1639 rme96->areg &= ~RME96_AR_DAC_EN; 1557 1640 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); 1558 snd_rme96_proc_done(rme96);1559 1641 free_irq(rme96->irq, (void *)rme96); 1560 1642 rme96->irq = -1; … … 1587 1669 } 1588 1670 1589 static int __ init1671 static int __devinit 1590 1672 snd_rme96_create(rme96_t *rme96) 1591 1673 { … … 1783 1865 } else if (rme96->wcreg & RME96_WCR_MASTER) { 1784 1866 snd_iprintf(buffer, " clock mode: master\n"); 1867 } else if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) { 1868 snd_iprintf(buffer, " clock mode: slave (master anyway due to analog input setting)\n"); 1869 } else if (snd_rme96_capture_getrate(rme96, &n) < 0) { 1870 snd_iprintf(buffer, " clock mode: slave (master anyway due to no valid signal)\n"); 1785 1871 } else { 1786 1872 snd_iprintf(buffer, " clock mode: slave\n"); … … 1836 1922 } 1837 1923 1838 static void __ init1924 static void __devinit 1839 1925 snd_rme96_proc_init(rme96_t *rme96) 1840 1926 { 1841 1927 snd_info_entry_t *entry; 1842 1928 1843 if ((entry = snd_info_create_card_entry(rme96->card, "rme96", rme96->card->proc_root)) != NULL) { 1844 entry->content = SNDRV_INFO_CONTENT_TEXT; 1845 entry->private_data = rme96; 1846 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 1847 entry->c.text.read_size = 256; 1848 entry->c.text.read = snd_rme96_proc_read; 1849 if (snd_info_register(entry) < 0) { 1850 snd_info_free_entry(entry); 1851 entry = NULL; 1852 } 1853 } 1854 rme96->proc_entry = entry; 1855 } 1856 1857 static void 1858 snd_rme96_proc_done(rme96_t * rme96) 1859 { 1860 if (rme96->proc_entry) { 1861 snd_info_unregister(rme96->proc_entry); 1862 rme96->proc_entry = NULL; 1863 } 1929 if (! snd_card_proc_new(rme96->card, "rme96", &entry)) 1930 snd_info_set_text_ops(entry, rme96, snd_rme96_proc_read); 1864 1931 } 1865 1932 … … 1953 2020 rme96_t *rme96 = _snd_kcontrol_chip(kcontrol); 1954 2021 unsigned long flags; 1955 int items = 3;2022 unsigned int items = 3; 1956 2023 1957 2024 spin_lock_irqsave(&rme96->lock, flags); … … 2025 2092 2026 2093 spin_lock_irqsave(&rme96->lock, flags); 2027 change = val != snd_rme96_getinputtype(rme96);2094 change = (int)val != snd_rme96_getinputtype(rme96); 2028 2095 snd_rme96_setinputtype(rme96, val); 2029 2096 spin_unlock_irqrestore(&rme96->lock, flags); … … 2066 2133 val = ucontrol->value.enumerated.item[0] % 3; 2067 2134 spin_lock_irqsave(&rme96->lock, flags); 2068 change = val != snd_rme96_getclockmode(rme96);2135 change = (int)val != snd_rme96_getclockmode(rme96); 2069 2136 snd_rme96_setclockmode(rme96, val); 2070 2137 spin_unlock_irqrestore(&rme96->lock, flags); … … 2107 2174 val = ucontrol->value.enumerated.item[0] % 4; 2108 2175 spin_lock_irqsave(&rme96->lock, flags); 2109 change = val != snd_rme96_getattenuation(rme96); 2176 2177 change = (int)val != snd_rme96_getattenuation(rme96); 2110 2178 snd_rme96_setattenuation(rme96, val); 2111 2179 spin_unlock_irqrestore(&rme96->lock, flags); … … 2148 2216 val = ucontrol->value.enumerated.item[0] % 4; 2149 2217 spin_lock_irqsave(&rme96->lock, flags); 2150 change = val != snd_rme96_getmontracks(rme96);2218 change = (int)val != snd_rme96_getmontracks(rme96); 2151 2219 snd_rme96_setmontracks(rme96, val); 2152 2220 spin_unlock_irqrestore(&rme96->lock, flags); -
GPL/branches/alsa-resync1/alsa-kernel/pci/rme9652/hammerfall_mem.c
r215 r224 26 26 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 27 28 hammerfall_mem.c,v 1. 5 2002/11/04 09:11:42perex Exp28 hammerfall_mem.c,v 1.8 2003/02/25 13:35:44 perex Exp 29 29 30 30 … … 156 156 rbuf->flags |= HAMMERFALL_BUF_USED; 157 157 rbuf->pci = pcidev; 158 MOD_INC_USE_COUNT;159 158 *dmaaddr = rbuf->addr; 160 159 return rbuf->buf; … … 173 172 rbuf = &hammerfall_buffers[i]; 174 173 if (rbuf->buf == addr && rbuf->pci == pcidev) { 175 MOD_DEC_USE_COUNT;176 174 rbuf->flags &= ~HAMMERFALL_BUF_USED; 177 175 return; … … 182 180 } 183 181 184 static void __exithammerfall_free_buffers (void)182 static void hammerfall_free_buffers (void) 185 183 186 184 { -
GPL/branches/alsa-resync1/alsa-kernel/pci/rme9652/hdsp.c
r215 r224 68 68 MODULE_LICENSE("GPL"); 69 69 MODULE_CLASSES("{sound}"); 70 MODULE_DEVICES("{{RME,Hammerfall-DSP} ,");70 MODULE_DEVICES("{{RME,Hammerfall-DSP}}"); 71 71 72 72 typedef enum { … … 455 455 456 456 for (i = 0; i < timeout; i++) 457 if (( hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)457 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count) 458 458 return 0; 459 459 … … 839 839 if (!snd_rawmidi_transmit_empty (hmidi->output)) { 840 840 if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) { 841 if (n_pending > sizeof (buf))841 if (n_pending > (int)sizeof (buf)) 842 842 n_pending = sizeof (buf); 843 843 … … 873 873 if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) { 874 874 if (hmidi->input) { 875 if (n_pending > sizeof (buf)) {875 if (n_pending > (int)sizeof (buf)) { 876 876 n_pending = sizeof (buf); 877 877 } … … 1279 1279 val = ucontrol->value.integer.value[0] & 1; 1280 1280 spin_lock_irqsave(&hdsp->lock, flags); 1281 change = val != hdsp_spdif_out(hdsp);1281 change = (int)val != hdsp_spdif_out(hdsp); 1282 1282 hdsp_set_spdif_output(hdsp, val); 1283 1283 spin_unlock_irqrestore(&hdsp->lock, flags); … … 1394 1394 val = ucontrol->value.enumerated.item[0] % max; 1395 1395 spin_lock_irqsave(&hdsp->lock, flags); 1396 change = val != hdsp_sync_pref(hdsp);1396 change = (int)val != hdsp_sync_pref(hdsp); 1397 1397 hdsp_set_sync_pref(hdsp, val); 1398 1398 spin_unlock_irqrestore(&hdsp->lock, flags); … … 1498 1498 val = ucontrol->value.integer.value[0] & 1; 1499 1499 spin_lock_irqsave(&hdsp->lock, flags); 1500 change = val != hdsp_line_out(hdsp);1500 change = (int)val != hdsp_line_out(hdsp); 1501 1501 hdsp_set_line_output(hdsp, val); 1502 1502 spin_unlock_irqrestore(&hdsp->lock, flags); … … 1567 1567 1568 1568 spin_lock_irqsave(&hdsp->lock, flags); 1569 if ((change = gain != hdsp_read_gain(hdsp, addr))) 1569 change = gain != hdsp_read_gain(hdsp, addr); 1570 if (change) 1570 1571 hdsp_write_gain(hdsp, addr, gain); 1571 1572 spin_unlock_irqrestore(&hdsp->lock, flags); … … 1629 1630 1630 1631 spin_lock_irqsave(&hdsp->lock, flags); 1631 if ((change = gain != hdsp_read_gain(hdsp, addr))) 1632 change = gain != hdsp_read_gain(hdsp, addr); 1633 if (change) 1632 1634 hdsp_write_gain(hdsp, addr, gain); 1633 1635 spin_unlock_irqrestore(&hdsp->lock, flags); … … 1801 1803 int snd_hdsp_create_controls(snd_card_t *card, hdsp_t *hdsp) 1802 1804 { 1803 int idx, err, limit; 1805 unsigned int idx, limit; 1806 int err; 1804 1807 snd_kcontrol_t *kctl; 1805 1808 … … 2300 2303 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); 2301 2304 snd_assert(channel_buf != NULL, return -EIO); 2302 copy_from_user(channel_buf + pos * 4, src, count * 4); 2305 if (copy_from_user(channel_buf + pos * 4, src, count * 4)) 2306 return -EFAULT; 2303 2307 return count; 2304 2308 } … … 2314 2318 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); 2315 2319 snd_assert(channel_buf != NULL, return -EIO); 2316 copy_to_user(dst, channel_buf + pos * 4, count * 4); 2320 if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) 2321 return -EFAULT; 2317 2322 return count; 2318 2323 } … … 2388 2393 */ 2389 2394 2390 if ( params_rate(params) != hdsp_system_sample_rate(hdsp)) {2395 if ((int)params_rate(params) != hdsp_system_sample_rate(hdsp)) { 2391 2396 spin_unlock_irq(&hdsp->lock); 2392 2397 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); … … 2564 2569 .channels_min = 10, 2565 2570 .channels_max = HDSP_MAX_CHANNELS, 2566 .buffer_bytes_max = 1024*1024,2567 .period_bytes_min = 1,2568 .period_bytes_max = 1024*1024,2571 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS, 2572 .period_bytes_min = (64 * 4) *10, 2573 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS, 2569 2574 .periods_min = 2, 2570 2575 .periods_max = 2, … … 2589 2594 .channels_min = 10, 2590 2595 .channels_max = HDSP_MAX_CHANNELS, 2591 .buffer_bytes_max = 1024*1024,2592 .period_bytes_min = 1,2593 .period_bytes_max = 1024*1024,2596 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS, 2597 .period_bytes_min = (64 * 4) * 10, 2598 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS, 2594 2599 .periods_min = 2, 2595 2600 .periods_max = 2, … … 2624 2629 if (r->min > 48000) { 2625 2630 snd_interval_t t = { 2626 min:hdsp->ds_channels,2627 max:hdsp->ds_channels,2628 integer:1,2631 .min = hdsp->ds_channels, 2632 .max = hdsp->ds_channels, 2633 .integer = 1, 2629 2634 }; 2630 2635 return snd_interval_refine(c, &t); 2631 2636 } else if (r->max < 64000) { 2632 2637 snd_interval_t t = { 2633 min:hdsp->ss_channels,2634 max:hdsp->ss_channels,2635 integer:1,2638 .min = hdsp->ss_channels, 2639 .max = hdsp->ss_channels, 2640 .integer = 1, 2636 2641 }; 2637 2642 return snd_interval_refine(c, &t); … … 2648 2653 if (c->min >= hdsp->ss_channels) { 2649 2654 snd_interval_t t = { 2650 min:32000,2651 max:48000,2652 integer:1,2655 .min = 32000, 2656 .max = 48000, 2657 .integer = 1, 2653 2658 }; 2654 2659 return snd_interval_refine(r, &t); 2655 2660 } else if (c->max <= hdsp->ds_channels) { 2656 2661 snd_interval_t t = { 2657 min:64000,2658 max:96000,2659 integer:1,2662 .min = 64000, 2663 .max = 96000, 2664 .integer = 1, 2660 2665 }; 2661 2666 return snd_interval_refine(r, &t); … … 2967 2972 switch (rev & 0xff) { 2968 2973 case 0xa: 2974 case 0xb: 2975 case 0x64: 2969 2976 /* hdsp_initialize_firmware() will reset this */ 2970 2977 hdsp->card_name = "RME Hammerfall DSP"; -
GPL/branches/alsa-resync1/alsa-kernel/pci/rme9652/rme9652.c
r212 r224 22 22 23 23 #include <sound/driver.h> 24 #include <asm/io.h>25 24 #include <linux/delay.h> 26 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 27 #include <linux/pci.h> 28 28 #include <linux/slab.h> 29 29 30 #include <sound/core.h> 30 31 #include <sound/control.h> … … 34 35 #define SNDRV_GET_ID 35 36 #include <sound/initval.h> 37 38 #include <asm/current.h> 39 #include <asm/io.h> 36 40 37 41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ … … 260 264 snd_pcm_t *pcm; 261 265 struct pci_dev *pci; 262 snd_info_entry_t *proc_entry;263 266 snd_kcontrol_t *spdif_ctl; 264 267 … … 312 315 313 316 static struct pci_device_id snd_rme9652_ids[] __devinitdata = { 314 {0x10ee, 0x3fc4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,}, /* RME Digi9652 */ 315 {0,} 317 { 318 .vendor = 0x10ee, 319 .device = 0x3fc4, 320 .subvendor = PCI_ANY_ID, 321 .subdevice = PCI_ANY_ID, 322 }, /* RME Digi9652 */ 323 { 0, }, 316 324 }; 317 325 … … 367 375 { 368 376 int status; 369 int offset, frag;377 unsigned int offset, frag; 370 378 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 371 379 snd_pcm_sframes_t delta; … … 382 390 delta = rme9652->prev_hw_offset - offset; 383 391 delta &= 0xffff; 384 if (delta <= rme9652->max_jitter * 4)392 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 385 393 offset = rme9652->prev_hw_offset; 386 394 else … … 1094 1102 val = ucontrol->value.integer.value[0] & 1; 1095 1103 spin_lock_irqsave(&rme9652->lock, flags); 1096 change = val != rme9652_spdif_out(rme9652);1104 change = (int)val != rme9652_spdif_out(rme9652); 1097 1105 rme9652_set_spdif_output(rme9652, val); 1098 1106 spin_unlock_irqrestore(&rme9652->lock, flags); … … 1181 1189 val = ucontrol->value.enumerated.item[0] % 3; 1182 1190 spin_lock_irqsave(&rme9652->lock, flags); 1183 change = val != rme9652_sync_mode(rme9652);1191 change = (int)val != rme9652_sync_mode(rme9652); 1184 1192 rme9652_set_sync_mode(rme9652, val); 1185 1193 spin_unlock_irqrestore(&rme9652->lock, flags); … … 1278 1286 val = ucontrol->value.enumerated.item[0] % max; 1279 1287 spin_lock_irqsave(&rme9652->lock, flags); 1280 change = val != rme9652_sync_pref(rme9652);1288 change = (int)val != rme9652_sync_pref(rme9652); 1281 1289 rme9652_set_sync_pref(rme9652, val); 1282 1290 spin_unlock_irqrestore(&rme9652->lock, flags); … … 1592 1600 int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652) 1593 1601 { 1594 int idx, err; 1602 unsigned int idx; 1603 int err; 1595 1604 snd_kcontrol_t *kctl; 1596 1605 … … 1790 1799 } 1791 1800 1792 static void __ init snd_rme9652_proc_init(rme9652_t *rme9652)1801 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652) 1793 1802 { 1794 1803 snd_info_entry_t *entry; 1795 1804 1796 if ((entry = snd_info_create_card_entry(rme9652->card, "rme9652", rme9652->card->proc_root)) != 1797 NULL) { 1798 entry->content = SNDRV_INFO_CONTENT_TEXT; 1799 entry->private_data = rme9652; 1800 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 1801 entry->c.text.read_size = 256; 1802 entry->c.text.read = snd_rme9652_proc_read; 1803 if (snd_info_register(entry) < 0) { 1804 snd_info_free_entry(entry); 1805 entry = NULL; 1806 } 1807 } 1808 rme9652->proc_entry = entry; 1809 } 1810 1811 static void snd_rme9652_proc_done(rme9652_t *rme9652) 1812 { 1813 if (rme9652->proc_entry) { 1814 snd_info_unregister(rme9652->proc_entry); 1815 rme9652->proc_entry = NULL; 1816 } 1805 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) 1806 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); 1817 1807 } 1818 1808 … … 1846 1836 if (rme9652->irq >= 0) 1847 1837 rme9652_stop(rme9652); 1848 snd_rme9652_proc_done(rme9652);1849 1838 snd_rme9652_free_buffers(rme9652); 1850 1839 … … 1860 1849 } 1861 1850 1862 static int __ init snd_rme9652_initialize_memory(rme9652_t *rme9652)1851 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652) 1863 1852 { 1864 1853 void *pb, *cb; … … 2105 2094 */ 2106 2095 2107 if ( params_rate(params) !=2096 if ((int)params_rate(params) != 2108 2097 rme9652_adat_sample_rate(rme9652)) { 2109 2098 spin_unlock_irq(&rme9652->lock); … … 2276 2265 .channels_min = 10, 2277 2266 .channels_max = 26, 2278 .buffer_bytes_max = 1024*1024,2279 .period_bytes_min = 1,2280 .period_bytes_max = 1024*1024,2267 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2268 .period_bytes_min = (64 * 4) * 10, 2269 .period_bytes_max = (8192 * 4) * 26, 2281 2270 .periods_min = 2, 2282 2271 .periods_max = 2, … … 2299 2288 .channels_min = 10, 2300 2289 .channels_max = 26, 2301 .buffer_bytes_max = 1024*1024,2302 .period_bytes_min = 1,2303 .period_bytes_max = 1024*1024,2290 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2291 .period_bytes_min = (64 * 4) * 10, 2292 .period_bytes_max = (8192 * 4) * 26, 2304 2293 .periods_min = 2, 2305 2294 .periods_max = 2, … … 2338 2327 snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2339 2328 if (r->min > 48000) { 2340 #ifdef TARGET_OS22341 snd_interval_t t = {0};2342 t.min = rme9652->ds_channels;2343 t.max = rme9652->ds_channels;2344 t.integer = 1;2345 #else2346 2329 snd_interval_t t = { 2347 min:rme9652->ds_channels,2348 max:rme9652->ds_channels,2349 integer:1,2330 .min = rme9652->ds_channels, 2331 .max = rme9652->ds_channels, 2332 .integer = 1, 2350 2333 }; 2351 #endif2352 2334 return snd_interval_refine(c, &t); 2353 2335 } else if (r->max < 88200) { 2354 #ifdef TARGET_OS22355 snd_interval_t t = {0};2356 t.min = rme9652->ss_channels;2357 t.max = rme9652->ss_channels;2358 t.integer = 1;2359 #else2360 2336 snd_interval_t t = { 2361 min:rme9652->ss_channels,2362 max:rme9652->ss_channels,2363 integer:1,2337 .min = rme9652->ss_channels, 2338 .max = rme9652->ss_channels, 2339 .integer = 1, 2364 2340 }; 2365 #endif2366 2341 return snd_interval_refine(c, &t); 2367 2342 } … … 2377 2352 if (c->min >= rme9652->ss_channels) { 2378 2353 snd_interval_t t = { 2379 #ifdef TARGET_OS2 2380 44100, 2381 48000, 2382 0, 0, 1, 0, 2383 #else 2384 min: 44100, 2385 max: 48000, 2386 integer: 1, 2387 #endif 2354 .min = 44100, 2355 .max = 48000, 2356 .integer = 1, 2388 2357 }; 2389 2358 return snd_interval_refine(r, &t); 2390 2359 } else if (c->max <= rme9652->ds_channels) { 2391 2360 snd_interval_t t = { 2392 #ifdef TARGET_OS2 2393 88200, 2394 96000, 2395 0, 0, 1, 0, 2396 #else 2397 min: 88200, 2398 max: 96000, 2399 integer: 1, 2400 #endif 2361 .min = 88200, 2362 .max = 96000, 2363 .integer = 1, 2401 2364 }; 2402 2365 return snd_interval_refine(r, &t); … … 2542 2505 }; 2543 2506 2544 static int __ init snd_rme9652_create_pcm(snd_card_t *card,2507 static int __devinit snd_rme9652_create_pcm(snd_card_t *card, 2545 2508 rme9652_t *rme9652) 2546 2509 { … … 2566 2529 } 2567 2530 2568 static int __ init snd_rme9652_create(snd_card_t *card,2531 static int __devinit snd_rme9652_create(snd_card_t *card, 2569 2532 rme9652_t *rme9652, 2570 2533 int precise_ptr) … … 2761 2724 2762 2725 static struct pci_driver driver = { 2763 .name ="RME Digi9652 (Hammerfall)",2726 .name = "RME Digi9652 (Hammerfall)", 2764 2727 .id_table = snd_rme9652_ids, 2765 .probe = snd_rme9652_probe,2766 .remove = __devexit_p(snd_rme9652_remove),2728 .probe = snd_rme9652_probe, 2729 .remove = __devexit_p(snd_rme9652_remove), 2767 2730 }; 2768 2731 -
GPL/branches/alsa-resync1/alsa-kernel/pci/sonicvibes.c
r212 r224 24 24 25 25 #include <sound/driver.h> 26 #include <asm/io.h>27 26 #include <linux/delay.h> 28 27 #include <linux/init.h> 28 #include <linux/interrupt.h> 29 29 #include <linux/pci.h> 30 30 #include <linux/slab.h> 31 #include <linux/gameport.h> 32 31 33 #include <sound/core.h> 32 34 #include <sound/pcm.h> … … 37 39 #define SNDRV_GET_ID 38 40 #include <sound/initval.h> 39 #ifndef LINUX_2_2 40 #include <linux/gameport.h> 41 #endif 41 42 #include <asm/io.h> 42 43 43 44 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); … … 252 253 253 254 spinlock_t reg_lock; 254 snd_info_entry_t *proc_entry;255 255 256 256 unsigned int p_dma_size; … … 260 260 snd_kcontrol_t *master_volume; 261 261 262 #if ndef LINUX_2_2262 #if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE) 263 263 struct gameport gameport; 264 264 #endif … … 272 272 MODULE_DEVICE_TABLE(pci, snd_sonic_ids); 273 273 274 #ifdef TARGET_OS2275 274 static ratden_t sonicvibes_adc_clock = { 276 4000 * 65536,277 48000UL * 65536,278 1,279 65536,275 .num_min = 4000 * 65536, 276 .num_max = 48000UL * 65536, 277 .num_step = 1, 278 .den = 65536, 280 279 }; 281 280 static snd_pcm_hw_constraint_ratdens_t snd_sonicvibes_hw_constraints_adc_clock = { 282 1,283 &sonicvibes_adc_clock,281 .nrats = 1, 282 .rats = &sonicvibes_adc_clock, 284 283 }; 285 #else286 static ratden_t sonicvibes_adc_clock = {287 num_min: 4000 * 65536,288 num_max: 48000UL * 65536,289 num_step: 1,290 den: 65536,291 };292 static snd_pcm_hw_constraint_ratdens_t snd_sonicvibes_hw_constraints_adc_clock = {293 nrats: 1,294 rats: &sonicvibes_adc_clock,295 };296 #endif297 284 298 285 /* … … 1137 1124 snd_card_t *card; 1138 1125 snd_kcontrol_t *kctl; 1139 int idx, err; 1126 unsigned int idx; 1127 int err; 1140 1128 1141 1129 snd_assert(sonic != NULL && sonic->card != NULL, return -EINVAL); … … 1192 1180 snd_info_entry_t *entry; 1193 1181 1194 if ((entry = snd_info_create_card_entry(sonic->card, "sonicvibes", sonic->card->proc_root)) != NULL) { 1195 entry->content = SNDRV_INFO_CONTENT_TEXT; 1196 entry->private_data = sonic; 1197 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 1198 entry->c.text.read_size = 256; 1199 entry->c.text.read = snd_sonicvibes_proc_read; 1200 if (snd_info_register(entry) < 0) { 1201 snd_info_free_entry(entry); 1202 entry = NULL; 1203 } 1204 } 1205 sonic->proc_entry = entry; 1206 } 1207 1208 static void snd_sonicvibes_proc_done(sonicvibes_t * sonic) 1209 { 1210 if (sonic->proc_entry) { 1211 snd_info_unregister(sonic->proc_entry); 1212 sonic->proc_entry = NULL; 1213 } 1182 if (! snd_card_proc_new(sonic->card, "sonicvibes", &entry)) 1183 snd_info_set_text_ops(entry, sonic, snd_sonicvibes_proc_read); 1214 1184 } 1215 1185 … … 1223 1193 static int snd_sonicvibes_free(sonicvibes_t *sonic) 1224 1194 { 1225 #if ndef LINUX_2_21195 #if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE) 1226 1196 if (sonic->gameport.io) 1227 1197 gameport_unregister_port(&sonic->gameport); 1228 1198 #endif 1229 snd_sonicvibes_proc_done(sonic);1230 1199 pci_write_config_dword(sonic->pci, 0x40, sonic->dmaa_port); 1231 1200 pci_write_config_dword(sonic->pci, 0x48, sonic->dmac_port); … … 1455 1424 snd_card_t *card = sonic->card; 1456 1425 snd_rawmidi_str_t *dir; 1457 int idx, err; 1426 unsigned int idx; 1427 int err; 1458 1428 1459 1429 mpu->private_data = sonic; … … 1527 1497 return err; 1528 1498 } 1529 #if ndef LINUX_2_21499 #if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE) 1530 1500 sonic->gameport.io = sonic->game_port; 1531 1501 gameport_register_port(&sonic->gameport); -
GPL/branches/alsa-resync1/alsa-kernel/pci/trident/trident_main.c
r210 r224 29 29 30 30 #include <sound/driver.h> 31 #include <asm/io.h>32 31 #include <linux/delay.h> 33 32 #include <linux/init.h> 33 #include <linux/interrupt.h> 34 34 #include <linux/pci.h> 35 35 #include <linux/slab.h> 36 36 #include <linux/vmalloc.h> 37 #ifndef TARGET_OS2 //TODO: Implement linux/gameport.h 38 #include <linux/gameport.h> 39 #endif /* !TARGET_OS2 */ 40 37 41 #include <sound/core.h> 38 42 #include <sound/info.h> … … 40 44 #include <sound/trident.h> 41 45 #include <sound/asoundef.h> 46 47 #include <asm/io.h> 48 49 #define chip_t trident_t 42 50 43 51 static int snd_trident_pcm_mixer_build(struct snd_trident *trident, struct snd_trident_voice* voice, snd_pcm_substream_t *substream); … … 1015 1023 if (voice->memblk) 1016 1024 voice->LBA = voice->memblk->offset; 1025 else 1026 voice->LBA = runtime->dma_addr; 1027 outl(voice->LBA, TRID_REG(trident, LEGACY_DMAR0)); 1017 1028 1018 1029 // set ESO … … 2419 2430 static snd_kcontrol_new_t snd_trident_spdif_default __devinitdata = 2420 2431 { 2421 .iface = SNDRV_CTL_ELEM_IFACE_PCM,2422 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),2432 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2433 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 2423 2434 .info = snd_trident_spdif_default_info, 2424 2435 .get = snd_trident_spdif_default_get, … … 3995 4006 EXPORT_SYMBOL(snd_trident_write_voice_regs); 3996 4007 EXPORT_SYMBOL(snd_trident_clear_voices); 4008 #ifdef CONFIG_PM 4009 EXPORT_SYMBOL(snd_trident_suspend); 4010 EXPORT_SYMBOL(snd_trident_resume); 4011 #endif 3997 4012 /* trident_memory.c symbols */ 3998 4013 EXPORT_SYMBOL(snd_trident_synth_alloc); -
GPL/branches/alsa-resync1/alsa-kernel/pci/ymfpci/ymfpci_main.c
r210 r224 26 26 27 27 #include <sound/driver.h> 28 #include <asm/io.h>29 28 #include <linux/delay.h> 30 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 31 #include <linux/pci.h> 32 #include <linux/sched.h> 32 33 #include <linux/slab.h> 33 34 #include <linux/vmalloc.h> 35 34 36 #include <sound/core.h> 35 37 #include <sound/control.h> … … 38 40 #include <sound/asoundef.h> 39 41 #include <sound/mpu401.h> 42 43 #include <asm/io.h> 44 40 45 #ifdef TARGET_OS2 41 46 #include <sound/timer.h> … … 1316 1321 { 1317 1322 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1318 .iface = SNDRV_CTL_ELEM_IFACE_PCM,1319 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),1323 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1324 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1320 1325 .info = snd_ymfpci_spdif_mask_info, 1321 1326 .get = snd_ymfpci_spdif_mask_get,
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