source: contrib/API/include/unidef.h

Last change on this file was 742, checked in by Paul Smedley, 3 years ago

Fix typo in unimix
File size: 32.0 KB
Line 
1/*
2 * This file is part of uniaud.dll.
3 *
4 * Copyright (c) 2010 Mensys BV
5 * Copyright (c) 2007 Vlad Stelmahovsky aka Vladest
6 *
7 * This library is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU Lesser General Public License as
9 * published by the Free Software Foundation, either version 3 of
10 * the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License and the GNU General Public License along with this library.
19 * If not, see <http://www.gnu.org/licenses/>.
20 */
21#ifndef __UNIDEF__
22#define __UNIDEF__
23
24#include <sys/time.h>
25#include <sys/types.h>
26#include <limits.h>
27#include "errno.h"
28
29#define TARGET_OS2
30
31#pragma pack (4)
32
33#ifndef __GNUC__
34#define __attribute__(x) /*NOTHING*/
35#endif
36
37#define __BYTE_ORDER __LITTLE_ENDIAN
38#define SNDRV_LITTLE_ENDIAN
39
40/*
41 * errors definitions
42 */
43
44#define UNIAUD_NO_ERROR 0
45#define UNIAUD_ALSA32OPEN_ERROR 10001
46#define UNIAUD_INVALID_PARAMETER 10002
47#define UNIAUD_ERROR_IN_DRIVER 10003
48#define UNIAUD_MEMORY_ERROR 10004
49#define UNIAUD_INVALID_CARD 10005
50#define UNIAUD_ERROR_INVALID_PCM_PARAMS 10006
51#define UNIAUD_PCM_OPEN_ERROR 10007
52#define UNIAUD_PCM_WRITE_ERROR 10008
53#define UNIAUD_NOT_FOUND 10009
54#define UNIAUD_MIXER_ERROR 10010
55#define UNIAUD_ERROR_RESAMPLE_INIT 10011
56
57#define SIZE_DEVICE_NAME 32
58
59#define MAX_CARDS 8
60
61#define MAX_CHANNELS 8
62
63#define PCM_TYPE_WRITE 0
64#define PCM_TYPE_READ 1
65
66typedef struct sndrv_ctl_card_info {
67 int card; /* card number */
68 int pad; /* reserved for future (was type) */
69 unsigned char id[16]; /* ID of card (user selectable) */
70 unsigned char driver[16]; /* Driver name */
71 unsigned char name[32]; /* Short name of soundcard */
72 unsigned char longname[80]; /* name + info text about soundcard */
73 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
74 unsigned char mixername[80]; /* visual mixer identification */
75 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
76 unsigned char reserved[48]; /* reserved for future */
77} UniaudCardInfo;
78
79enum sndrv_ctl_elem_iface {
80 SNDRV_CTL_ELEM_IFACE_CARD = 0, /* global control */
81 SNDRV_CTL_ELEM_IFACE_HWDEP, /* hardware dependent device */
82 SNDRV_CTL_ELEM_IFACE_MIXER, /* virtual mixer device */
83 SNDRV_CTL_ELEM_IFACE_PCM, /* PCM device */
84 SNDRV_CTL_ELEM_IFACE_RAWMIDI, /* RawMidi device */
85 SNDRV_CTL_ELEM_IFACE_TIMER, /* timer device */
86 SNDRV_CTL_ELEM_IFACE_SEQUENCER, /* sequencer client */
87 SNDRV_CTL_ELEM_IFACE_LAST = SNDRV_CTL_ELEM_IFACE_SEQUENCER,
88};
89
90typedef struct sndrv_ctl_elem_id {
91 unsigned int numid; /* numeric identifier, zero = invalid */
92 enum sndrv_ctl_elem_iface iface; /* interface identifier */
93 unsigned int device; /* device/client number */
94 unsigned int subdevice; /* subdevice (substream) number */
95 unsigned char name[44]; /* ASCII name of item */
96 unsigned int index; /* index of item */
97} UniaudControl;
98
99enum sndrv_ctl_elem_type {
100 SNDRV_CTL_ELEM_TYPE_NONE = 0, /* invalid */
101 SNDRV_CTL_ELEM_TYPE_BOOLEAN, /* boolean type */
102 SNDRV_CTL_ELEM_TYPE_INTEGER, /* integer type */
103 SNDRV_CTL_ELEM_TYPE_ENUMERATED, /* enumerated type */
104 SNDRV_CTL_ELEM_TYPE_BYTES, /* byte array */
105 SNDRV_CTL_ELEM_TYPE_IEC958, /* IEC958 (S/PDIF) setup */
106 SNDRV_CTL_ELEM_TYPE_INTEGER64, /* 64-bit integer type */
107 SNDRV_CTL_ELEM_TYPE_LAST = SNDRV_CTL_ELEM_TYPE_INTEGER64,
108};
109
110typedef struct sndrv_ctl_elem_info {
111 UniaudControl id; /* W: element ID */
112 enum sndrv_ctl_elem_type type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
113 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
114 unsigned int count; /* count of values */
115 int owner; /* owner's PID of this control */
116 union {
117 struct {
118 long min; /* R: minimum value */
119 long max; /* R: maximum value */
120 long step; /* R: step (0 variable) */
121 } integer;
122 struct {
123 long long min; /* R: minimum value */
124 long long max; /* R: maximum value */
125 long long step; /* R: step (0 variable) */
126 } integer64;
127 struct {
128 unsigned int items; /* R: number of items */
129 unsigned int item; /* W: item number */
130 char name[64]; /* R: value name */
131 } enumerated;
132 unsigned char reserved[128];
133 } value;
134 union {
135 unsigned short d[4]; /* dimensions */
136 unsigned short *d_ptr; /* indirect */
137 } dimen;
138 unsigned char reserved[64-4*sizeof(unsigned short)];
139} UniaudControlInfo;
140
141struct sndrv_aes_iec958 {
142 unsigned char status[24]; /* AES/IEC958 channel status bits */
143 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
144 unsigned char pad; /* nothing */
145 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
146};
147
148#if 0
149struct timespec {
150 long tv_sec; /* seconds */
151 long tv_usec; /* and microseconds */
152};
153#endif
154
155typedef struct sndrv_ctl_elem_value {
156 UniaudControl id; /* W: element ID */
157 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
158 union {
159 union {
160 long value[128];
161 long *value_ptr;
162 } integer;
163 union {
164 long long value[64];
165 long long *value_ptr;
166 } integer64;
167 union {
168 unsigned int item[128];
169 unsigned int *item_ptr;
170 } enumerated;
171 union {
172 unsigned char data[512];
173 unsigned char *data_ptr;
174 } bytes;
175 struct sndrv_aes_iec958 iec958;
176 } value; /* RO */
177 struct timespec tstamp;
178 unsigned char reserved[128-sizeof(struct timespec)];
179} UniaudControlValue;
180
181
182typedef struct {
183 ULONG nrStreams; //nr of activate wave streams supported
184 ULONG ulMinChannels; //min nr of channels
185 ULONG ulMaxChannels; //max nr of channels
186 ULONG ulChanFlags; //channel flags
187 ULONG ulMinRate; //min sample rate
188 ULONG ulMaxRate; //max sample rate
189 ULONG ulRateFlags; //sample rate flags
190 ULONG ulDataFormats; //supported wave formats
191} WAVE_CAPS, *PWAVE_CAPS, FAR *LPWAVE_CAPS;
192
193typedef struct {
194 ULONG nrDevices; //total nr of audio devices
195 ULONG ulCaps; //device caps
196 char szDeviceName[SIZE_DEVICE_NAME];
197 char szMixerName[SIZE_DEVICE_NAME];
198 WAVE_CAPS waveOutCaps;
199 WAVE_CAPS waveInCaps;
200} OSS32_DEVCAPS, *POSS32_DEVCAPS, FAR *LPOSS32_DEVCAPS;
201
202
203typedef struct sndrv_pcm_hw_params snd_pcm_hw_params_t;
204typedef struct sndrv_pcm_sw_params snd_pcm_sw_params_t;
205//typedef enum sndrv_pcm_hw_param snd_pcm_hw_param_t;
206typedef struct sndrv_mask snd_mask_t;
207typedef struct sndrv_interval snd_interval_t;
208/** Unsigned frames quantity */
209typedef unsigned long snd_pcm_uframes_t;
210typedef long snd_pcm_sframes_t;
211typedef struct sndrv_pcm_status snd_pcm_status_t;
212
213
214enum sndrv_pcm_stream {
215 SNDRV_PCM_STREAM_PLAYBACK = 0,
216 SNDRV_PCM_STREAM_CAPTURE,
217 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
218};
219
220enum sndrv_pcm_access {
221 SNDRV_PCM_ACCESS_MMAP_INTERLEAVED = 0, /* interleaved mmap */
222 SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED, /* noninterleaved mmap */
223 SNDRV_PCM_ACCESS_MMAP_COMPLEX, /* complex mmap */
224 SNDRV_PCM_ACCESS_RW_INTERLEAVED, /* readi/writei */
225 SNDRV_PCM_ACCESS_RW_NONINTERLEAVED, /* readn/writen */
226 SNDRV_PCM_ACCESS_LAST = SNDRV_PCM_ACCESS_RW_NONINTERLEAVED,
227};
228
229enum sndrv_pcm_format {
230 SNDRV_PCM_FORMAT_S8 = 0,
231 SNDRV_PCM_FORMAT_U8,
232 SNDRV_PCM_FORMAT_S16_LE,
233 SNDRV_PCM_FORMAT_S16_BE,
234 SNDRV_PCM_FORMAT_U16_LE,
235 SNDRV_PCM_FORMAT_U16_BE,
236 SNDRV_PCM_FORMAT_S24_LE, /* low three bytes */
237 SNDRV_PCM_FORMAT_S24_BE, /* low three bytes */
238 SNDRV_PCM_FORMAT_U24_LE, /* low three bytes */
239 SNDRV_PCM_FORMAT_U24_BE, /* low three bytes */
240 SNDRV_PCM_FORMAT_S32_LE,
241 SNDRV_PCM_FORMAT_S32_BE,
242 SNDRV_PCM_FORMAT_U32_LE,
243 SNDRV_PCM_FORMAT_U32_BE,
244 SNDRV_PCM_FORMAT_FLOAT_LE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
245 SNDRV_PCM_FORMAT_FLOAT_BE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
246 SNDRV_PCM_FORMAT_FLOAT64_LE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
247 SNDRV_PCM_FORMAT_FLOAT64_BE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
248 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE, /* IEC-958 subframe, Little Endian */
249 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE, /* IEC-958 subframe, Big Endian */
250 SNDRV_PCM_FORMAT_MU_LAW,
251 SNDRV_PCM_FORMAT_A_LAW,
252 SNDRV_PCM_FORMAT_IMA_ADPCM,
253 SNDRV_PCM_FORMAT_MPEG,
254 SNDRV_PCM_FORMAT_GSM,
255 SNDRV_PCM_FORMAT_SPECIAL = 31,
256 SNDRV_PCM_FORMAT_S24_3LE = 32, /* in three bytes */
257 SNDRV_PCM_FORMAT_S24_3BE, /* in three bytes */
258 SNDRV_PCM_FORMAT_U24_3LE, /* in three bytes */
259 SNDRV_PCM_FORMAT_U24_3BE, /* in three bytes */
260 SNDRV_PCM_FORMAT_S20_3LE, /* in three bytes */
261 SNDRV_PCM_FORMAT_S20_3BE, /* in three bytes */
262 SNDRV_PCM_FORMAT_U20_3LE, /* in three bytes */
263 SNDRV_PCM_FORMAT_U20_3BE, /* in three bytes */
264 SNDRV_PCM_FORMAT_S18_3LE, /* in three bytes */
265 SNDRV_PCM_FORMAT_S18_3BE, /* in three bytes */
266 SNDRV_PCM_FORMAT_U18_3LE, /* in three bytes */
267 SNDRV_PCM_FORMAT_U18_3BE, /* in three bytes */
268 SNDRV_PCM_FORMAT_LAST = SNDRV_PCM_FORMAT_U18_3BE,
269
270#ifdef SNDRV_LITTLE_ENDIAN
271 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_LE,
272 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_LE,
273 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_LE,
274 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_LE,
275 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_LE,
276 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_LE,
277 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_LE,
278 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_LE,
279 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE,
280#endif
281#ifdef SNDRV_BIG_ENDIAN
282 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_BE,
283 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_BE,
284 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_BE,
285 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_BE,
286 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_BE,
287 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_BE,
288 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_BE,
289 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_BE,
290 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE,
291#endif
292};
293
294enum sndrv_pcm_subformat {
295 SNDRV_PCM_SUBFORMAT_STD = 0,
296 SNDRV_PCM_SUBFORMAT_LAST = SNDRV_PCM_SUBFORMAT_STD,
297};
298
299#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
300#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
301#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
302#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
303#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
304#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
305#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
306#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
307#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
308#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
309#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
310#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
311#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
312#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
313#define SNDRV_PCM_INFO_NONATOMIC_OPS 0x00800000 /* non-atomic prepare callback */
314
315enum sndrv_pcm_state {
316 SNDRV_PCM_STATE_OPEN = 0, /* stream is open */
317 SNDRV_PCM_STATE_SETUP, /* stream has a setup */
318 SNDRV_PCM_STATE_PREPARED, /* stream is ready to start */
319 SNDRV_PCM_STATE_RUNNING, /* stream is running */
320 SNDRV_PCM_STATE_XRUN, /* stream reached an xrun */
321 SNDRV_PCM_STATE_DRAINING, /* stream is draining */
322 SNDRV_PCM_STATE_PAUSED, /* stream is paused */
323 SNDRV_PCM_STATE_SUSPENDED, /* hardware is suspended */
324 SNDRV_PCM_STATE_DISCONNECTED, /* hardware is disconnected */
325 SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED,
326};
327
328/* for further details see the ACPI and PCI power management specification */
329#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
330#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
331#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
332#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
333#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off,with power */
334#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off,without power */
335
336#define SNDRV_MASK_BITS 64 /* we use so far 64bits only */
337#define SNDRV_MASK_SIZE (SNDRV_MASK_BITS / 32)
338#define SND_MASK_MAX 64
339
340#define MASK_INLINE static inline
341
342#define MASK_MAX SND_MASK_MAX
343#define MASK_SIZE (MASK_MAX / 32)
344
345#define INTERVAL_INLINE static inline
346
347#define MASK_OFS(i) ((i) >> 5)
348#define MASK_BIT(i) (1U << ((i) & 31))
349
350#define SND_PCM_HW_PARAM_ACCESS SNDRV_PCM_HW_PARAM_ACCESS
351#define SND_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_FIRST_MASK
352#define SND_PCM_HW_PARAM_FORMAT SNDRV_PCM_HW_PARAM_FORMAT
353#define SND_PCM_HW_PARAM_SUBFORMAT SNDRV_PCM_HW_PARAM_SUBFORMAT
354#define SND_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_LAST_MASK
355#define SND_PCM_HW_PARAM_SAMPLE_BITS SNDRV_PCM_HW_PARAM_SAMPLE_BITS
356#define SND_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_FIRST_INTERVAL
357#define SND_PCM_HW_PARAM_FRAME_BITS SNDRV_PCM_HW_PARAM_FRAME_BITS
358#define SND_PCM_HW_PARAM_CHANNELS SNDRV_PCM_HW_PARAM_CHANNELS
359#define SND_PCM_HW_PARAM_RATE SNDRV_PCM_HW_PARAM_RATE
360#define SND_PCM_HW_PARAM_PERIOD_TIME SNDRV_PCM_HW_PARAM_PERIOD_TIME
361#define SND_PCM_HW_PARAM_PERIOD_SIZE SNDRV_PCM_HW_PARAM_PERIOD_SIZE
362#define SND_PCM_HW_PARAM_PERIOD_BYTES SNDRV_PCM_HW_PARAM_PERIOD_BYTES
363#define SND_PCM_HW_PARAM_PERIODS SNDRV_PCM_HW_PARAM_PERIODS
364#define SND_PCM_HW_PARAM_BUFFER_TIME SNDRV_PCM_HW_PARAM_BUFFER_TIME
365#define SND_PCM_HW_PARAM_BUFFER_SIZE SNDRV_PCM_HW_PARAM_BUFFER_SIZE
366#define SND_PCM_HW_PARAM_BUFFER_BYTES SNDRV_PCM_HW_PARAM_BUFFER_BYTES
367#define SND_PCM_HW_PARAM_TICK_TIME SNDRV_PCM_HW_PARAM_TICK_TIME
368#define SND_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_LAST_INTERVAL
369#define SND_PCM_HW_PARAMS_RUNTIME SNDRV_PCM_HW_PARAMS_RUNTIME
370#define SND_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_LAST_MASK
371#define SND_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_FIRST_MASK
372#define SND_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_LAST_INTERVAL
373#define SND_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_FIRST_INTERVAL
374
375typedef unsigned long sndrv_pcm_uframes_t;
376typedef long sndrv_pcm_sframes_t;
377
378/** PCM sample format */
379typedef enum _snd_pcm_format {
380 /** Unknown */
381 SND_PCM_FORMAT_UNKNOWN = -1,
382 /** Signed 8 bit */
383 SND_PCM_FORMAT_S8 = 0,
384 /** Unsigned 8 bit */
385 SND_PCM_FORMAT_U8,
386 /** Signed 16 bit Little Endian */
387 SND_PCM_FORMAT_S16_LE,
388 /** Signed 16 bit Big Endian */
389 SND_PCM_FORMAT_S16_BE,
390 /** Unsigned 16 bit Little Endian */
391 SND_PCM_FORMAT_U16_LE,
392 /** Unsigned 16 bit Big Endian */
393 SND_PCM_FORMAT_U16_BE,
394 /** Signed 24 bit Little Endian */
395 SND_PCM_FORMAT_S24_LE,
396 /** Signed 24 bit Big Endian */
397 SND_PCM_FORMAT_S24_BE,
398 /** Unsigned 24 bit Little Endian */
399 SND_PCM_FORMAT_U24_LE,
400 /** Unsigned 24 bit Big Endian */
401 SND_PCM_FORMAT_U24_BE,
402 /** Signed 32 bit Little Endian */
403 SND_PCM_FORMAT_S32_LE,
404 /** Signed 32 bit Big Endian */
405 SND_PCM_FORMAT_S32_BE,
406 /** Unsigned 32 bit Little Endian */
407 SND_PCM_FORMAT_U32_LE,
408 /** Unsigned 32 bit Big Endian */
409 SND_PCM_FORMAT_U32_BE,
410 /** Float 32 bit Little Endian, Range -1.0 to 1.0 */
411 SND_PCM_FORMAT_FLOAT_LE,
412 /** Float 32 bit Big Endian, Range -1.0 to 1.0 */
413 SND_PCM_FORMAT_FLOAT_BE,
414 /** Float 64 bit Little Endian, Range -1.0 to 1.0 */
415 SND_PCM_FORMAT_FLOAT64_LE,
416 /** Float 64 bit Big Endian, Range -1.0 to 1.0 */
417 SND_PCM_FORMAT_FLOAT64_BE,
418 /** IEC-958 Little Endian */
419 SND_PCM_FORMAT_IEC958_SUBFRAME_LE,
420 /** IEC-958 Big Endian */
421 SND_PCM_FORMAT_IEC958_SUBFRAME_BE,
422 /** Mu-Law */
423 SND_PCM_FORMAT_MU_LAW,
424 /** A-Law */
425 SND_PCM_FORMAT_A_LAW,
426 /** Ima-ADPCM */
427 SND_PCM_FORMAT_IMA_ADPCM,
428 /** MPEG */
429 SND_PCM_FORMAT_MPEG,
430 /** GSM */
431 SND_PCM_FORMAT_GSM,
432 /** Special */
433 SND_PCM_FORMAT_SPECIAL = 31,
434 /** Signed 24bit Little Endian in 3bytes format */
435 SND_PCM_FORMAT_S24_3LE = 32,
436 /** Signed 24bit Big Endian in 3bytes format */
437 SND_PCM_FORMAT_S24_3BE,
438 /** Unsigned 24bit Little Endian in 3bytes format */
439 SND_PCM_FORMAT_U24_3LE,
440 /** Unsigned 24bit Big Endian in 3bytes format */
441 SND_PCM_FORMAT_U24_3BE,
442 /** Signed 20bit Little Endian in 3bytes format */
443 SND_PCM_FORMAT_S20_3LE,
444 /** Signed 20bit Big Endian in 3bytes format */
445 SND_PCM_FORMAT_S20_3BE,
446 /** Unsigned 20bit Little Endian in 3bytes format */
447 SND_PCM_FORMAT_U20_3LE,
448 /** Unsigned 20bit Big Endian in 3bytes format */
449 SND_PCM_FORMAT_U20_3BE,
450 /** Signed 18bit Little Endian in 3bytes format */
451 SND_PCM_FORMAT_S18_3LE,
452 /** Signed 18bit Big Endian in 3bytes format */
453 SND_PCM_FORMAT_S18_3BE,
454 /** Unsigned 18bit Little Endian in 3bytes format */
455 SND_PCM_FORMAT_U18_3LE,
456 /** Unsigned 18bit Big Endian in 3bytes format */
457 SND_PCM_FORMAT_U18_3BE,
458 SND_PCM_FORMAT_LAST = SND_PCM_FORMAT_U18_3BE,
459
460#if __BYTE_ORDER == __LITTLE_ENDIAN
461 /** Signed 16 bit CPU endian */
462 SND_PCM_FORMAT_S16 = SND_PCM_FORMAT_S16_LE,
463 /** Unsigned 16 bit CPU endian */
464 SND_PCM_FORMAT_U16 = SND_PCM_FORMAT_U16_LE,
465 /** Signed 24 bit CPU endian */
466 SND_PCM_FORMAT_S24 = SND_PCM_FORMAT_S24_LE,
467 /** Unsigned 24 bit CPU endian */
468 SND_PCM_FORMAT_U24 = SND_PCM_FORMAT_U24_LE,
469 /** Signed 32 bit CPU endian */
470 SND_PCM_FORMAT_S32 = SND_PCM_FORMAT_S32_LE,
471 /** Unsigned 32 bit CPU endian */
472 SND_PCM_FORMAT_U32 = SND_PCM_FORMAT_U32_LE,
473 /** Float 32 bit CPU endian */
474 SND_PCM_FORMAT_FLOAT = SND_PCM_FORMAT_FLOAT_LE,
475 /** Float 64 bit CPU endian */
476 SND_PCM_FORMAT_FLOAT64 = SND_PCM_FORMAT_FLOAT64_LE,
477 /** IEC-958 CPU Endian */
478 SND_PCM_FORMAT_IEC958_SUBFRAME = SND_PCM_FORMAT_IEC958_SUBFRAME_LE
479#elif __BYTE_ORDER == __BIG_ENDIAN
480 /** Signed 16 bit CPU endian */
481 SND_PCM_FORMAT_S16 = SND_PCM_FORMAT_S16_BE,
482 /** Unsigned 16 bit CPU endian */
483 SND_PCM_FORMAT_U16 = SND_PCM_FORMAT_U16_BE,
484 /** Signed 24 bit CPU endian */
485 SND_PCM_FORMAT_S24 = SND_PCM_FORMAT_S24_BE,
486 /** Unsigned 24 bit CPU endian */
487 SND_PCM_FORMAT_U24 = SND_PCM_FORMAT_U24_BE,
488 /** Signed 32 bit CPU endian */
489 SND_PCM_FORMAT_S32 = SND_PCM_FORMAT_S32_BE,
490 /** Unsigned 32 bit CPU endian */
491 SND_PCM_FORMAT_U32 = SND_PCM_FORMAT_U32_BE,
492 /** Float 32 bit CPU endian */
493 SND_PCM_FORMAT_FLOAT = SND_PCM_FORMAT_FLOAT_BE,
494 /** Float 64 bit CPU endian */
495 SND_PCM_FORMAT_FLOAT64 = SND_PCM_FORMAT_FLOAT64_BE,
496 /** IEC-958 CPU Endian */
497 SND_PCM_FORMAT_IEC958_SUBFRAME = SND_PCM_FORMAT_IEC958_SUBFRAME_BE
498#else
499#error "Unknown endian"
500#endif
501} snd_pcm_format_t;
502
503/** PCM state */
504typedef enum _snd_pcm_state {
505 /** Open */
506 SND_PCM_STATE_OPEN = 0,
507 /** Setup installed */
508 SND_PCM_STATE_SETUP,
509 /** Ready to start */
510 SND_PCM_STATE_PREPARED,
511 /** Running */
512 SND_PCM_STATE_RUNNING,
513 /** Stopped: underrun (playback) or overrun (capture) detected */
514 SND_PCM_STATE_XRUN,
515 /** Draining: running (playback) or stopped (capture) */
516 SND_PCM_STATE_DRAINING,
517 /** Paused */
518 SND_PCM_STATE_PAUSED,
519 /** Hardware is suspended */
520 SND_PCM_STATE_SUSPENDED,
521 /** Hardware is disconnected */
522 SND_PCM_STATE_DISCONNECTED,
523 SND_PCM_STATE_LAST = SND_PCM_STATE_DISCONNECTED
524} snd_pcm_state_t;
525
526typedef enum sndrv_pcm_hw_param {
527 SNDRV_PCM_HW_PARAM_ACCESS = 0, /* Access type */
528 SNDRV_PCM_HW_PARAM_FIRST_MASK = SNDRV_PCM_HW_PARAM_ACCESS,
529#ifdef TARGET_OS2
530 SNDRV_PCM_HW_PARAM_RATE_MASK,
531#endif
532 SNDRV_PCM_HW_PARAM_FORMAT, /* Format */
533 SNDRV_PCM_HW_PARAM_SUBFORMAT, /* Subformat */
534 SNDRV_PCM_HW_PARAM_LAST_MASK = SNDRV_PCM_HW_PARAM_SUBFORMAT,
535
536 SNDRV_PCM_HW_PARAM_SAMPLE_BITS = 8, /* Bits per sample */
537 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL = SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
538 SNDRV_PCM_HW_PARAM_FRAME_BITS, /* Bits per frame */
539 SNDRV_PCM_HW_PARAM_CHANNELS, /* Channels */
540 SNDRV_PCM_HW_PARAM_RATE, /* Approx rate */
541 SNDRV_PCM_HW_PARAM_PERIOD_TIME, /* Approx distance between interrupts in us */
542 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, /* Approx frames between interrupts */
543 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, /* Approx bytes between interrupts */
544 SNDRV_PCM_HW_PARAM_PERIODS, /* Approx interrupts per buffer */
545 SNDRV_PCM_HW_PARAM_BUFFER_TIME, /* Approx duration of buffer in us */
546 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, /* Size of buffer in frames */
547 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, /* Size of buffer in bytes */
548 SNDRV_PCM_HW_PARAM_TICK_TIME, /* Approx tick duration in us */
549 SNDRV_PCM_HW_PARAM_LAST_INTERVAL = SNDRV_PCM_HW_PARAM_TICK_TIME
550} snd_pcm_hw_param_t;
551
552#define SNDRV_PCM_HW_PARAMS_RUNTIME (1<<0)
553
554struct sndrv_interval {
555 unsigned int min, max;
556 unsigned int openmin:1,
557 openmax:1,
558 integer:1,
559 empty:1;
560};
561
562#define SNDRV_MASK_MAX 256
563
564struct sndrv_mask {
565 uint32_t bits[(SNDRV_MASK_MAX+31)/32];
566};
567
568struct sndrv_pcm_hw_params {
569 unsigned int flags;
570 struct sndrv_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
571 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
572 struct sndrv_mask mres[5]; /* reserved masks */
573 struct sndrv_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
574 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
575 struct sndrv_interval ires[9]; /* reserved intervals */
576 unsigned int rmask; /* W: requested masks */
577 unsigned int cmask; /* R: changed masks */
578 unsigned int info; /* R: Info flags for returned setup */
579 unsigned int msbits; /* R: used most significant bits */
580 unsigned int rate_num; /* R: rate numerator */
581 unsigned int rate_den; /* R: rate denominator */
582 sndrv_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
583 unsigned char reserved[64]; /* reserved for future */
584};
585
586enum sndrv_pcm_tstamp {
587 SNDRV_PCM_TSTAMP_NONE = 0,
588 SNDRV_PCM_TSTAMP_MMAP,
589 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
590};
591
592struct sndrv_pcm_sw_params {
593 enum sndrv_pcm_tstamp tstamp_mode; /* timestamp mode */
594 unsigned int period_step;
595 unsigned int sleep_min; /* min ticks to sleep */
596 sndrv_pcm_uframes_t avail_min; /* min avail frames for wakeup */
597 sndrv_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
598 sndrv_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
599 sndrv_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
600 sndrv_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
601 sndrv_pcm_uframes_t silence_size; /* silence block size */
602 sndrv_pcm_uframes_t boundary; /* pointers wrap point */
603 unsigned char reserved[64]; /* reserved for future */
604};
605
606struct sndrv_pcm_status {
607 enum sndrv_pcm_state state; /* stream state */
608 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
609 struct timespec tstamp; /* reference timestamp */
610 sndrv_pcm_uframes_t appl_ptr; /* appl ptr */
611 sndrv_pcm_uframes_t hw_ptr; /* hw ptr */
612 sndrv_pcm_sframes_t delay; /* current delay in frames */
613 sndrv_pcm_uframes_t avail; /* number of frames available */
614 sndrv_pcm_uframes_t avail_max; /* max frames available on hw since last status */
615 sndrv_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
616 enum sndrv_pcm_state suspended_state; /* suspended stream state */
617 unsigned char reserved[60]; /* must be filled with zero */
618};
619
620enum sndrv_pcm_class {
621 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
622 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
623 SNDRV_PCM_CLASS_MODEM, /* software modem class */
624 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
625 /* Don't forget to change the following: */
626 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
627};
628
629enum sndrv_pcm_subclass {
630 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
631 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
632 /* Don't forget to change the following: */
633 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
634};
635
636union sndrv_pcm_sync_id {
637 unsigned char id[16];
638 unsigned short id16[8];
639 unsigned int id32[4];
640};
641
642
643struct sndrv_pcm_info {
644 unsigned int device; /* RO/WR (control): device number */
645 unsigned int subdevice; /* RO/WR (control): subdevice number */
646 enum sndrv_pcm_stream stream; /* RO/WR (control): stream number */
647 int card; /* R: card number */
648 unsigned char id[64]; /* ID (user selectable) */
649 unsigned char name[80]; /* name of this device */
650 unsigned char subname[32]; /* subdevice name */
651 enum sndrv_pcm_class dev_class; /* SNDRV_PCM_CLASS_* */
652 enum sndrv_pcm_subclass dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
653 unsigned int subdevices_count;
654 unsigned int subdevices_avail;
655 union sndrv_pcm_sync_id sync; /* hardware synchronization ID */
656 unsigned char reserved[64]; /* reserved for future... */
657};
658
659/****************************************************************************
660 * *
661 * Digital audio interface *
662 * *
663 ****************************************************************************/
664
665/* AES/IEC958 channel status bits */
666#define IEC958_AES0_PROFESSIONAL (1<<0) /* 0 = consumer, 1 = professional */
667#define IEC958_AES0_NONAUDIO (1<<1) /* 0 = audio, 1 = non-audio */
668#define IEC958_AES0_PRO_EMPHASIS (7<<2) /* mask - emphasis */
669#define IEC958_AES0_PRO_EMPHASIS_NOTID (0<<2) /* emphasis not indicated */
670#define IEC958_AES0_PRO_EMPHASIS_NONE (1<<2) /* none emphasis */
671#define IEC958_AES0_PRO_EMPHASIS_5015 (3<<2) /* 50/15us emphasis */
672#define IEC958_AES0_PRO_EMPHASIS_CCITT (7<<2) /* CCITT J.17 emphasis */
673#define IEC958_AES0_PRO_FREQ_UNLOCKED (1<<5) /* source sample frequency: 0 = locked, 1 = unlocked */
674#define IEC958_AES0_PRO_FS (3<<6) /* mask - sample frequency */
675#define IEC958_AES0_PRO_FS_NOTID (0<<6) /* fs not indicated */
676#define IEC958_AES0_PRO_FS_44100 (1<<6) /* 44.1kHz */
677#define IEC958_AES0_PRO_FS_48000 (2<<6) /* 48kHz */
678#define IEC958_AES0_PRO_FS_32000 (3<<6) /* 32kHz */
679#define IEC958_AES0_CON_NOT_COPYRIGHT (1<<2) /* 0 = copyright, 1 = not copyright */
680#define IEC958_AES0_CON_EMPHASIS (7<<3) /* mask - emphasis */
681#define IEC958_AES0_CON_EMPHASIS_NONE (0<<3) /* none emphasis */
682#define IEC958_AES0_CON_EMPHASIS_5015 (1<<3) /* 50/15us emphasis */
683#define IEC958_AES0_CON_MODE (3<<6) /* mask - mode */
684#define IEC958_AES1_PRO_MODE (15<<0) /* mask - channel mode */
685#define IEC958_AES1_PRO_MODE_NOTID (0<<0) /* not indicated */
686#define IEC958_AES1_PRO_MODE_STEREOPHONIC (2<<0) /* stereophonic - ch A is left */
687#define IEC958_AES1_PRO_MODE_SINGLE (4<<0) /* single channel */
688#define IEC958_AES1_PRO_MODE_TWO (8<<0) /* two channels */
689#define IEC958_AES1_PRO_MODE_PRIMARY (12<<0) /* primary/secondary */
690#define IEC958_AES1_PRO_MODE_BYTE3 (15<<0) /* vector to byte 3 */
691#define IEC958_AES1_PRO_USERBITS (15<<4) /* mask - user bits */
692#define IEC958_AES1_PRO_USERBITS_NOTID (0<<4) /* not indicated */
693#define IEC958_AES1_PRO_USERBITS_192 (8<<4) /* 192-bit structure */
694#define IEC958_AES1_PRO_USERBITS_UDEF (12<<4) /* user defined application */
695#define IEC958_AES1_CON_CATEGORY 0x7f
696#define IEC958_AES1_CON_GENERAL 0x00
697#define IEC958_AES1_CON_EXPERIMENTAL 0x40
698#define IEC958_AES1_CON_SOLIDMEM_MASK 0x0f
699#define IEC958_AES1_CON_SOLIDMEM_ID 0x08
700#define IEC958_AES1_CON_BROADCAST1_MASK 0x07
701#define IEC958_AES1_CON_BROADCAST1_ID 0x04
702#define IEC958_AES1_CON_DIGDIGCONV_MASK 0x07
703#define IEC958_AES1_CON_DIGDIGCONV_ID 0x02
704#define IEC958_AES1_CON_ADC_COPYRIGHT_MASK 0x1f
705#define IEC958_AES1_CON_ADC_COPYRIGHT_ID 0x06
706#define IEC958_AES1_CON_ADC_MASK 0x1f
707#define IEC958_AES1_CON_ADC_ID 0x16
708#define IEC958_AES1_CON_BROADCAST2_MASK 0x0f
709#define IEC958_AES1_CON_BROADCAST2_ID 0x0e
710#define IEC958_AES1_CON_LASEROPT_MASK 0x07
711#define IEC958_AES1_CON_LASEROPT_ID 0x01
712#define IEC958_AES1_CON_MUSICAL_MASK 0x07
713#define IEC958_AES1_CON_MUSICAL_ID 0x05
714#define IEC958_AES1_CON_MAGNETIC_MASK 0x07
715#define IEC958_AES1_CON_MAGNETIC_ID 0x03
716#define IEC958_AES1_CON_IEC908_CD (IEC958_AES1_CON_LASEROPT_ID|0x00)
717#define IEC958_AES1_CON_NON_IEC908_CD (IEC958_AES1_CON_LASEROPT_ID|0x08)
718#define IEC958_AES1_CON_PCM_CODER (IEC958_AES1_CON_DIGDIGCONV_ID|0x00)
719#define IEC958_AES1_CON_SAMPLER (IEC958_AES1_CON_DIGDIGCONV_ID|0x20)
720#define IEC958_AES1_CON_MIXER (IEC958_AES1_CON_DIGDIGCONV_ID|0x10)
721#define IEC958_AES1_CON_RATE_CONVERTER (IEC958_AES1_CON_DIGDIGCONV_ID|0x18)
722#define IEC958_AES1_CON_SYNTHESIZER (IEC958_AES1_CON_MUSICAL_ID|0x00)
723#define IEC958_AES1_CON_MICROPHONE (IEC958_AES1_CON_MUSICAL_ID|0x08)
724#define IEC958_AES1_CON_DAT (IEC958_AES1_CON_MAGNETIC_ID|0x00)
725#define IEC958_AES1_CON_VCR (IEC958_AES1_CON_MAGNETIC_ID|0x08)
726#define IEC958_AES1_CON_ORIGINAL (1<<7) /* this bits depends on the category code */
727#define IEC958_AES2_PRO_SBITS (7<<0) /* mask - sample bits */
728#define IEC958_AES2_PRO_SBITS_20 (2<<0) /* 20-bit - coordination */
729#define IEC958_AES2_PRO_SBITS_24 (4<<0) /* 24-bit - main audio */
730#define IEC958_AES2_PRO_SBITS_UDEF (6<<0) /* user defined application */
731#define IEC958_AES2_PRO_WORDLEN (7<<3) /* mask - source word length */
732#define IEC958_AES2_PRO_WORDLEN_NOTID (0<<3) /* not indicated */
733#define IEC958_AES2_PRO_WORDLEN_22_18 (2<<3) /* 22-bit or 18-bit */
734#define IEC958_AES2_PRO_WORDLEN_23_19 (4<<3) /* 23-bit or 19-bit */
735#define IEC958_AES2_PRO_WORDLEN_24_20 (5<<3) /* 24-bit or 20-bit */
736#define IEC958_AES2_PRO_WORDLEN_20_16 (6<<3) /* 20-bit or 16-bit */
737#define IEC958_AES2_CON_SOURCE (15<<0) /* mask - source number */
738#define IEC958_AES2_CON_SOURCE_UNSPEC (0<<0) /* unspecified */
739#define IEC958_AES2_CON_CHANNEL (15<<4) /* mask - channel number */
740#define IEC958_AES2_CON_CHANNEL_UNSPEC (0<<4) /* unspecified */
741#define IEC958_AES3_CON_FS (15<<0) /* mask - sample frequency */
742#define IEC958_AES3_CON_FS_44100 (0<<0) /* 44.1kHz */
743#define IEC958_AES3_CON_FS_48000 (2<<0) /* 48kHz */
744#define IEC958_AES3_CON_FS_32000 (3<<0) /* 32kHz */
745#define IEC958_AES3_CON_CLOCK (3<<4) /* mask - clock accuracy */
746#define IEC958_AES3_CON_CLOCK_1000PPM (0<<4) /* 1000 ppm */
747#define IEC958_AES3_CON_CLOCK_50PPM (1<<4) /* 50 ppm */
748#define IEC958_AES3_CON_CLOCK_VARIABLE (2<<4) /* variable pitch */
749
750/*
751 * stupid hardware vendors !!!
752 * regarding to Dolby docs:
753 *
754 * 0 1 2 3 4 5
755 * LEFT RIGHT CENTER LFE LEFT SURR RIGHT SURR
756 *
757 * for other stupid morons we need to use conversion table
758 * actually, I wonna to talk with their drug dealers
759 *
760 */
761
762typedef struct chan_convert_table_t {
763 int src[MAX_CHANNELS];
764 int dst[MAX_CHANNELS];
765} chan_convert_table_t;
766
767typedef enum card_type_ids {
768 UNIAUD_TYPE_ID_UNKNOWN = 0,
769 UNIAUD_TYPE_ID_EMU10K1,
770 UNIAUD_TYPE_ID_AUDIGY,
771 UNIAUD_TYPE_ID_AUDIGY2,
772 UNIAUD_TYPE_ID_CMI8738,
773 UNIAUD_TYPE_ID_CMI8338,
774 UNIAUD_TYPE_ID_CMI,
775 UNIAUD_TYPE_ID_YMF724,
776 UNIAUD_TYPE_ID_YMF724F,
777 UNIAUD_TYPE_ID_YMF740,
778 UNIAUD_TYPE_ID_YMF740C,
779 UNIAUD_TYPE_ID_YMF744,
780 UNIAUD_TYPE_ID_YMF754,
781 UNIAUD_TYPE_ID_AUDIGYLS,
782 UNIAUD_TYPE_ID_FM801,
783 UNIAUD_TYPE_ID_NFORCE,
784 UNIAUD_TYPE_ID_ICH,
785 UNIAUD_TYPE_ID_ICH4,
786 UNIAUD_TYPE_ID_ICH5,
787 UNIAUD_TYPE_ID_VIA8233A,
788 UNIAUD_TYPE_ID_VIA8237,
789 UNIAUD_TYPE_ID_VIA8233
790} card_type_ids;
791
792#pragma pack ()
793
794#endif
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