| 1 | /* $Id: hwaccess.c,v 1.1 2000/04/23 14:55:43 ktk Exp $ */
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| 2 |
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| 3 |
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| 4 | /*
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| 5 | **********************************************************************
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| 6 | * hwaccess.c -- Hardware access layer
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| 7 | * Copyright 1999, 2000 Creative Labs, Inc.
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| 8 | *
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| 9 | **********************************************************************
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| 10 | *
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| 11 | * Date Author Summary of changes
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| 12 | * ---- ------ ------------------
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| 13 | * October 20, 1999 Bertrand Lee base code release
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| 14 | * December 9, 1999 Jon Taylor rewrote the I/O subsystem
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| 15 | *
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| 16 | **********************************************************************
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| 17 | *
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| 18 | * This program is free software; you can redistribute it and/or
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| 19 | * modify it under the terms of the GNU General Public License as
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| 20 | * published by the Free Software Foundation; either version 2 of
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| 21 | * the License, or (at your option) any later version.
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| 22 | *
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| 23 | * This program is distributed in the hope that it will be useful,
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| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 26 | * GNU General Public License for more details.
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| 27 | *
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| 28 | * You should have received a copy of the GNU General Public
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| 29 | * License along with this program; if not, write to the Free
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| 30 | * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
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| 31 | * USA.
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| 32 | *
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| 33 | **********************************************************************
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| 34 | */
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| 35 |
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| 36 | #include "hwaccess.h"
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| 37 | #include "icardmid.h"
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| 38 |
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| 39 | /*************************************************************************
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| 40 | * Function : srToPitch *
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| 41 | * Input : sampleRate - sampling rate *
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| 42 | * Return : pitch value *
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| 43 | * About : convert sampling rate to pitch *
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| 44 | * Note : for 8010, sampling rate is at 48kHz, this function should *
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| 45 | * be changed. *
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| 46 | *************************************************************************/
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| 47 | u32 srToPitch(u32 sampleRate)
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| 48 | {
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| 49 | int i;
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| 50 |
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| 51 | /* FIXME: These tables should be defined in a headerfile */
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| 52 | static u32 logMagTable[128] = {
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| 53 | 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
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| 54 | 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
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| 55 | 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
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| 56 | 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
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| 57 | 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
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| 58 | 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
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| 59 | 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
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| 60 | 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
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| 61 | 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
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| 62 | 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
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| 63 | 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
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| 64 | 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
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| 65 | 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
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| 66 | 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
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| 67 | 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
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| 68 | 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
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| 69 | };
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| 70 |
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| 71 | static char logSlopeTable[128] = {
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| 72 | 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
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| 73 | 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
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| 74 | 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
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| 75 | 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
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| 76 | 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
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| 77 | 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
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| 78 | 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
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| 79 | 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
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| 80 | 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
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| 81 | 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
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| 82 | 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
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| 83 | 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
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| 84 | 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
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| 85 | 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
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| 86 | 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
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| 87 | 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
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| 88 | };
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| 89 |
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| 90 | if (sampleRate == 0)
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| 91 | return (0); /* Bail out if no leading "1" */
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| 92 |
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| 93 | sampleRate *= 11185; /* Scale 48000 to 0x20002380 */
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| 94 |
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| 95 | for (i = 31; i > 0; i--) {
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| 96 | if (sampleRate & 0x80000000) { /* Detect leading "1" */
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| 97 | return (u32) (((s32) (i - 15) << 20) +
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| 98 | logMagTable[0x7f & (sampleRate >> 24)] +
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| 99 | (0x7f & (sampleRate >> 17)) * logSlopeTable[0x7f & (sampleRate >> 24)]);
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| 100 | }
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| 101 | sampleRate = sampleRate << 1;
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| 102 | }
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| 103 |
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| 104 | DPF(2, "srToPitch: BUG!\n");
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| 105 | return 0; /* Should never reach this point */
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| 106 | }
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| 107 |
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| 108 | /* Returns an attenuation based upon a cumulative volume value */
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| 109 |
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| 110 | /* Algorithm calculates 0x200 - 0x10 log2 (input) */
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| 111 | u8 sumVolumeToAttenuation(u32 value)
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| 112 | {
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| 113 | u16 count = 16;
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| 114 | s16 ans;
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| 115 |
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| 116 | if (value == 0)
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| 117 | return 0xFF;
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| 118 |
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| 119 | /* Find first SET bit. This is the integer part of the value */
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| 120 | while ((value & 0x10000) == 0) {
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| 121 | value <<= 1;
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| 122 | count--;
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| 123 | }
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| 124 |
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| 125 | /* The REST of the data is the fractional part. */
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| 126 | ans = (s16) (0x110 - ((count << 4) + ((value & 0x0FFFFL) >> 12)));
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| 127 | if (ans > 0xFF)
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| 128 | ans = 0xFF;
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| 129 |
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| 130 | return (u8) ans;
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| 131 | }
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| 132 |
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| 133 | /*******************************************
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| 134 | * write/read PCI function 0 registers *
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| 135 | ********************************************/
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| 136 | void sblive_writefn0(struct emu10k1_card *card, u8 reg, u32 data)
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| 137 | {
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| 138 | unsigned long flags;
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| 139 |
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| 140 | spin_lock_irqsave(&card->lock, flags);
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| 141 | outl(data, card->iobase + reg);
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| 142 | spin_unlock_irqrestore(&card->lock, flags);
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| 143 |
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| 144 | return;
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| 145 | }
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| 146 |
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| 147 | void sblive_wrtmskfn0(struct emu10k1_card *card, u8 reg, u32 mask, u32 data)
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| 148 | {
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| 149 | unsigned long flags;
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| 150 |
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| 151 | data &= mask;
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| 152 |
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| 153 | spin_lock_irqsave(&card->lock, flags);
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| 154 | data |= inl(card->iobase + reg) & ~mask;
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| 155 | outl(data, card->iobase + reg);
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| 156 | spin_unlock_irqrestore(&card->lock, flags);
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| 157 |
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| 158 | return;
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| 159 | }
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| 160 |
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| 161 | u32 sblive_readfn0(struct emu10k1_card * card, u8 reg)
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| 162 | {
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| 163 | u32 val;
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| 164 | unsigned long flags;
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| 165 |
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| 166 | spin_lock_irqsave(&card->lock, flags);
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| 167 | val = inl(card->iobase + reg);
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| 168 | spin_unlock_irqrestore(&card->lock, flags);
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| 169 | return val;
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| 170 | }
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| 171 |
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| 172 | u32 sblive_rdmskfn0(struct emu10k1_card * card, u8 reg, u32 mask)
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| 173 | {
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| 174 | u32 val;
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| 175 | unsigned long flags;
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| 176 |
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| 177 | spin_lock_irqsave(&card->lock, flags);
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| 178 | val = inl(card->iobase + reg);
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| 179 | spin_unlock_irqrestore(&card->lock, flags);
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| 180 | return val & mask;
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| 181 | }
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| 182 |
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| 183 | /************************************************************************
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| 184 | * write/read Emu10k1 pointer-offset register set, accessed through *
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| 185 | * the PTR and DATA registers *
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| 186 | *************************************************************************/
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| 187 | void sblive_writeptr(struct emu10k1_card *card, u32 reg, u32 channel, u32 data)
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| 188 | {
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| 189 | u32 regptr;
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| 190 | unsigned long flags;
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| 191 |
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| 192 | regptr = ((reg << 16) & PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
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| 193 |
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| 194 | if (reg & 0xff000000) {
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| 195 | u32 mask;
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| 196 | u8 size, offset;
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| 197 |
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| 198 | size = (reg >> 24) & 0x3f;
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| 199 | offset = (reg >> 16) & 0x1f;
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| 200 | mask = ((1 << size) - 1) << offset;
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| 201 | data = (data << offset) & mask;
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| 202 |
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| 203 | spin_lock_irqsave(&card->lock, flags);
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| 204 | outl(regptr, card->iobase + PTR);
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| 205 | data |= inl(card->iobase + DATA) & ~mask;
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| 206 | outl(data, card->iobase + DATA);
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| 207 | spin_unlock_irqrestore(&card->lock, flags);
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| 208 | } else {
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| 209 | spin_lock_irqsave(&card->lock, flags);
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| 210 | outl(regptr, card->iobase + PTR);
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| 211 | outl(data, card->iobase + DATA);
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| 212 | spin_unlock_irqrestore(&card->lock, flags);
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| 213 | }
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| 214 |
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| 215 | return;
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| 216 | }
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| 217 |
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| 218 | u32 sblive_readptr(struct emu10k1_card * card, u32 reg, u32 channel)
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| 219 | {
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| 220 | u32 regptr, val;
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| 221 | unsigned long flags;
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| 222 |
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| 223 | regptr = ((reg << 16) & PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
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| 224 |
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| 225 | if (reg & 0xff000000) {
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| 226 | u32 mask;
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| 227 | u8 size, offset;
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| 228 |
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| 229 | size = (reg >> 24) & 0x3f;
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| 230 | offset = (reg >> 16) & 0x1f;
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| 231 | mask = ((1 << size) - 1) << offset;
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| 232 |
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| 233 | spin_lock_irqsave(&card->lock, flags);
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| 234 | outl(regptr, card->iobase + PTR);
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| 235 | val = inl(card->iobase + DATA);
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| 236 | spin_unlock_irqrestore(&card->lock, flags);
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| 237 |
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| 238 | return (val & mask) >> offset;
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| 239 | } else {
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| 240 | spin_lock_irqsave(&card->lock, flags);
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| 241 | outl(regptr, card->iobase + PTR);
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| 242 | val = inl(card->iobase + DATA);
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| 243 | spin_unlock_irqrestore(&card->lock, flags);
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| 244 |
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| 245 | return val;
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| 246 | }
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| 247 | }
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| 248 |
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| 249 | void emu10k1_set_stop_on_loop(struct emu10k1_card *card, u32 voicenum)
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| 250 | {
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| 251 | /* Voice interrupt */
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| 252 | if (voicenum >= 32)
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| 253 | sblive_writeptr(card, SOLEH | ((0x0100 | (voicenum - 32)) << 16), 0, 1);
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| 254 | else
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| 255 | sblive_writeptr(card, SOLEL | ((0x0100 | voicenum) << 16), 0, 1);
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| 256 |
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| 257 | return;
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| 258 | }
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| 259 |
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| 260 | void emu10k1_clear_stop_on_loop(struct emu10k1_card *card, u32 voicenum)
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| 261 | {
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| 262 | /* Voice interrupt */
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| 263 | if (voicenum >= 32)
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| 264 | sblive_writeptr(card, SOLEH | ((0x0100 | (voicenum - 32)) << 16), 0, 0);
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| 265 | else
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| 266 | sblive_writeptr(card, SOLEL | ((0x0100 | voicenum) << 16), 0, 0);
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| 267 |
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| 268 | return;
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| 269 | }
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| 270 |
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| 271 | static void sblive_wcwait(struct emu10k1_card *card, u32 wait)
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| 272 | {
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| 273 | volatile unsigned uCount;
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| 274 | u32 newtime = 0, curtime;
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| 275 |
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| 276 | curtime = READ_FN0(card, WC_SAMPLECOUNTER);
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| 277 | while (wait--) {
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| 278 | uCount = 0;
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| 279 | while (uCount++ < TIMEOUT) {
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| 280 | newtime = READ_FN0(card, WC_SAMPLECOUNTER);
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| 281 | if (newtime != curtime)
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| 282 | break;
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| 283 | }
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| 284 |
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| 285 | if (uCount >= TIMEOUT)
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| 286 | break;
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| 287 |
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| 288 | curtime = newtime;
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| 289 | }
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| 290 | }
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| 291 |
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| 292 | int sblive_readac97(struct emu10k1_card *card, u8 index, u16 * data)
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| 293 | {
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| 294 | unsigned long flags;
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| 295 |
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| 296 | spin_lock_irqsave(&card->lock, flags);
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| 297 |
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| 298 | outb(index, card->mixeraddx + 2);
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| 299 | *data = inw(card->mixeraddx);
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| 300 |
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| 301 | spin_unlock_irqrestore(&card->lock, flags);
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| 302 |
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| 303 | return CTSTATUS_SUCCESS;
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| 304 | }
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| 305 |
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| 306 | int sblive_writeac97(struct emu10k1_card *card, u8 index, u16 data)
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| 307 | {
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| 308 | unsigned long flags;
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| 309 |
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| 310 | spin_lock_irqsave(&card->lock, flags);
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| 311 |
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| 312 | outb(index, card->mixeraddx + 2);
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| 313 | outw(data, card->mixeraddx);
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| 314 |
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| 315 | spin_unlock_irqrestore(&card->lock, flags);
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| 316 |
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| 317 | return CTSTATUS_SUCCESS;
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| 318 | }
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| 319 |
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| 320 | int sblive_rmwac97(struct emu10k1_card *card, u8 index, u16 data, u16 mask)
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| 321 | {
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| 322 | u16 temp;
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| 323 | unsigned long flags;
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| 324 |
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| 325 | spin_lock_irqsave(&card->lock, flags);
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| 326 |
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| 327 | outb(index, card->mixeraddx + 2);
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| 328 | temp = inw(card->mixeraddx);
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| 329 | temp &= ~mask;
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| 330 | data &= mask;
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| 331 | temp |= data;
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| 332 | outw(temp, card->mixeraddx);
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| 333 |
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| 334 | spin_unlock_irqrestore(&card->lock, flags);
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| 335 |
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| 336 | return CTSTATUS_SUCCESS;
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| 337 | }
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| 338 |
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| 339 | /*********************************************************
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| 340 | * MPU access functions *
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| 341 | **********************************************************/
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| 342 |
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| 343 | int emu10k1_mpu_write_data(struct emu10k1_card *card, u8 data)
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| 344 | {
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| 345 | unsigned long flags;
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| 346 | int ret;
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| 347 |
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| 348 | spin_lock_irqsave(&card->lock, flags);
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| 349 |
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| 350 | if ((inb(card->iobase + MUSTAT) & MUSTAT_ORDYN) == 0) {
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| 351 | outb(data, card->iobase + MUDATA);
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| 352 | ret = CTSTATUS_SUCCESS;
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| 353 | } else
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| 354 | ret = CTSTATUS_BUSY;
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| 355 |
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| 356 | spin_unlock_irqrestore(&card->lock, flags);
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| 357 |
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| 358 | return ret;
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| 359 | }
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| 360 |
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| 361 | int emu10k1_mpu_read_data(struct emu10k1_card *card, u8 * data)
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| 362 | {
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| 363 | unsigned long flags;
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| 364 | int ret;
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| 365 |
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| 366 | spin_lock_irqsave(&card->lock, flags);
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| 367 |
|
|---|
| 368 | if ((inb(card->iobase + MUSTAT) & MUSTAT_IRDYN) == 0) {
|
|---|
| 369 | *data = inb(card->iobase + MUDATA);
|
|---|
| 370 | ret = CTSTATUS_SUCCESS;
|
|---|
| 371 | } else
|
|---|
| 372 | ret = CTSTATUS_NODATA;
|
|---|
| 373 |
|
|---|
| 374 | spin_unlock_irqrestore(&card->lock, flags);
|
|---|
| 375 |
|
|---|
| 376 | return ret;
|
|---|
| 377 | }
|
|---|
| 378 |
|
|---|
| 379 | int emu10k1_mpu_reset(struct emu10k1_card *card)
|
|---|
| 380 | {
|
|---|
| 381 | u8 status;
|
|---|
| 382 | unsigned long flags;
|
|---|
| 383 |
|
|---|
| 384 | DPF(2, "emu10k1_mpu_reset()\n");
|
|---|
| 385 |
|
|---|
| 386 | if (card->mpuacqcount == 0) {
|
|---|
| 387 | spin_lock_irqsave(&card->lock, flags);
|
|---|
| 388 | outb(MUCMD_RESET, card->iobase + MUCMD);
|
|---|
| 389 | spin_unlock_irqrestore(&card->lock, flags);
|
|---|
| 390 |
|
|---|
| 391 | sblive_wcwait(card, 8);
|
|---|
| 392 |
|
|---|
| 393 | spin_lock_irqsave(&card->lock, flags);
|
|---|
| 394 | outb(MUCMD_RESET, card->iobase + MUCMD);
|
|---|
| 395 | spin_unlock_irqrestore(&card->lock, flags);
|
|---|
| 396 |
|
|---|
| 397 | sblive_wcwait(card, 8);
|
|---|
| 398 |
|
|---|
| 399 | spin_lock_irqsave(&card->lock, flags);
|
|---|
| 400 | outb(MUCMD_ENTERUARTMODE, card->iobase + MUCMD);
|
|---|
| 401 | spin_unlock_irqrestore(&card->lock, flags);
|
|---|
| 402 |
|
|---|
| 403 | sblive_wcwait(card, 8);
|
|---|
| 404 |
|
|---|
| 405 | spin_lock_irqsave(&card->lock, flags);
|
|---|
| 406 | status = inb(card->iobase + MUDATA);
|
|---|
| 407 | spin_unlock_irqrestore(&card->lock, flags);
|
|---|
| 408 |
|
|---|
| 409 | if (status == 0xfe)
|
|---|
| 410 | return CTSTATUS_SUCCESS;
|
|---|
| 411 | else
|
|---|
| 412 | return CTSTATUS_ERROR;
|
|---|
| 413 | }
|
|---|
| 414 |
|
|---|
| 415 | return CTSTATUS_SUCCESS;
|
|---|
| 416 | }
|
|---|
| 417 |
|
|---|
| 418 | int emu10k1_mpu_acquire(struct emu10k1_card *card)
|
|---|
| 419 | {
|
|---|
| 420 | /* FIXME: This should be a macro */
|
|---|
| 421 | ++card->mpuacqcount;
|
|---|
| 422 |
|
|---|
| 423 | return CTSTATUS_SUCCESS;
|
|---|
| 424 | }
|
|---|
| 425 |
|
|---|
| 426 | int emu10k1_mpu_release(struct emu10k1_card *card)
|
|---|
| 427 | {
|
|---|
| 428 | /* FIXME: this should be a macro */
|
|---|
| 429 | --card->mpuacqcount;
|
|---|
| 430 |
|
|---|
| 431 | return CTSTATUS_SUCCESS;
|
|---|
| 432 | }
|
|---|