source: GPL/trunk/alsa-kernel/pci/fm801.c@ 260

Last change on this file since 260 was 135, checked in by stevenhl, 18 years ago

Get rid of spurious warnings
File size: 44.2 KB
Line 
1/*
2 * The driver for the ForteMedia FM801 based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28//#include <linux/moduleparam.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/ac97_codec.h>
32#include <sound/mpu401.h>
33#include <sound/opl3.h>
34#include <sound/initval.h>
35
36#include <asm/io.h>
37
38#if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
39#include <sound/tea575x-tuner.h>
40#define TEA575X_RADIO 1
41#endif
42
43MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
44MODULE_DESCRIPTION("ForteMedia FM801");
45MODULE_LICENSE("GPL");
46MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
47 "{Genius,SoundMaker Live 5.1}}");
48
49static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
50static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
51static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
52/*
53 * Enable TEA575x tuner
54 * 1 = MediaForte 256-PCS
55 * 2 = MediaForte 256-PCPR
56 * 3 = MediaForte 64-PCR
57 * High 16-bits are video (radio) device number + 1
58 */
59static int tea575x_tuner[SNDRV_CARDS] = { 0 };
60
61//module_param_array(index, int, NULL, 0444);
62MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
63//module_param_array(id, charp, NULL, 0444);
64MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
65//module_param_array(enable, bool, NULL, 0444);
66MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
67//module_param_array(tea575x_tuner, bool, NULL, 0444);
68MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
69
70/*
71 * Direct registers
72 */
73
74#define FM801_REG(chip, reg) (chip->port + FM801_##reg)
75
76#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
77#define FM801_FM_VOL 0x02 /* FM Output Volume */
78#define FM801_I2S_VOL 0x04 /* I2S Volume */
79#define FM801_REC_SRC 0x06 /* Record Source */
80#define FM801_PLY_CTRL 0x08 /* Playback Control */
81#define FM801_PLY_COUNT 0x0a /* Playback Count */
82#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
83#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
84#define FM801_CAP_CTRL 0x14 /* Capture Control */
85#define FM801_CAP_COUNT 0x16 /* Capture Count */
86#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
87#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
88#define FM801_CODEC_CTRL 0x22 /* Codec Control */
89#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
90#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
91#define FM801_I2C_CTRL 0x29 /* I2C Control */
92#define FM801_AC97_CMD 0x2a /* AC'97 Command */
93#define FM801_AC97_DATA 0x2c /* AC'97 Data */
94#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
95#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
96#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
97#define FM801_GEN_CTRL 0x54 /* General Control */
98#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
99#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
100#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
101#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
102#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
103#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
104#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
105
106#define FM801_AC97_ADDR_SHIFT 10
107
108/* playback and record control register bits */
109#define FM801_BUF1_LAST (1<<1)
110#define FM801_BUF2_LAST (1<<2)
111#define FM801_START (1<<5)
112#define FM801_PAUSE (1<<6)
113#define FM801_IMMED_STOP (1<<7)
114#define FM801_RATE_SHIFT 8
115#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
116#define FM801_CHANNELS_4 (1<<12) /* playback only */
117#define FM801_CHANNELS_6 (2<<12) /* playback only */
118#define FM801_CHANNELS_6MS (3<<12) /* playback only */
119#define FM801_CHANNELS_MASK (3<<12)
120#define FM801_16BIT (1<<14)
121#define FM801_STEREO (1<<15)
122
123/* IRQ status bits */
124#define FM801_IRQ_PLAYBACK (1<<8)
125#define FM801_IRQ_CAPTURE (1<<9)
126#define FM801_IRQ_VOLUME (1<<14)
127#define FM801_IRQ_MPU (1<<15)
128
129/* GPIO control register */
130#define FM801_GPIO_GP0 (1<<0) /* read/write */
131#define FM801_GPIO_GP1 (1<<1)
132#define FM801_GPIO_GP2 (1<<2)
133#define FM801_GPIO_GP3 (1<<3)
134#define FM801_GPIO_GP(x) (1<<(0+(x)))
135#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
136#define FM801_GPIO_GD1 (1<<9)
137#define FM801_GPIO_GD2 (1<<10)
138#define FM801_GPIO_GD3 (1<<11)
139#define FM801_GPIO_GD(x) (1<<(8+(x)))
140#define FM801_GPIO_GS0 (1<<12) /* function select: */
141#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
142#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
143#define FM801_GPIO_GS3 (1<<15)
144#define FM801_GPIO_GS(x) (1<<(12+(x)))
145
146/*
147
148 */
149
150typedef struct _snd_fm801 fm801_t;
151
152struct _snd_fm801 {
153 int irq;
154
155 unsigned long port; /* I/O port number */
156 unsigned int multichannel: 1, /* multichannel support */
157 secondary: 1; /* secondary codec */
158 unsigned char secondary_addr; /* address of the secondary codec */
159
160 unsigned short ply_ctrl; /* playback control */
161 unsigned short cap_ctrl; /* capture control */
162
163 unsigned long ply_buffer;
164 unsigned int ply_buf;
165 unsigned int ply_count;
166 unsigned int ply_size;
167 unsigned int ply_pos;
168
169 unsigned long cap_buffer;
170 unsigned int cap_buf;
171 unsigned int cap_count;
172 unsigned int cap_size;
173 unsigned int cap_pos;
174
175 ac97_bus_t *ac97_bus;
176 ac97_t *ac97;
177 ac97_t *ac97_sec;
178
179 struct pci_dev *pci;
180 snd_card_t *card;
181 snd_pcm_t *pcm;
182 snd_rawmidi_t *rmidi;
183 snd_pcm_substream_t *playback_substream;
184 snd_pcm_substream_t *capture_substream;
185 unsigned int p_dma_size;
186 unsigned int c_dma_size;
187
188 spinlock_t reg_lock;
189 snd_info_entry_t *proc_entry;
190
191#ifdef TEA575X_RADIO
192 tea575x_t tea;
193#endif
194};
195
196static struct pci_device_id snd_fm801_ids[] = {
197 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
198 { 0, }
199};
200
201MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
202
203/*
204 * common I/O routines
205 */
206
207static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
208 unsigned short mask, unsigned short value)
209{
210 int change;
211 unsigned long flags;
212 unsigned short old, new;
213
214 spin_lock_irqsave(&chip->reg_lock, flags);
215 old = inw(chip->port + reg);
216 new = (old & ~mask) | value;
217 change = old != new;
218 if (change)
219 outw(new, chip->port + reg);
220 spin_unlock_irqrestore(&chip->reg_lock, flags);
221 return change;
222}
223
224static void snd_fm801_codec_write(ac97_t *ac97,
225 unsigned short reg,
226 unsigned short val)
227{
228 fm801_t *chip = ac97->private_data;
229 int idx;
230
231 /*
232 * Wait until the codec interface is not ready..
233 */
234 for (idx = 0; idx < 100; idx++) {
235 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
236 goto ok1;
237 udelay(10);
238 }
239 snd_printk("AC'97 interface is busy (1)\n");
240 return;
241
242 ok1:
243 /* write data and address */
244 outw(val, FM801_REG(chip, AC97_DATA));
245 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
246 /*
247 * Wait until the write command is not completed..
248 */
249 for (idx = 0; idx < 1000; idx++) {
250 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
251 return;
252 udelay(10);
253 }
254 snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
255}
256
257static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
258{
259 fm801_t *chip = ac97->private_data;
260 int idx;
261
262 /*
263 * Wait until the codec interface is not ready..
264 */
265 for (idx = 0; idx < 100; idx++) {
266 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
267 goto ok1;
268 udelay(10);
269 }
270 snd_printk("AC'97 interface is busy (1)\n");
271 return 0;
272
273 ok1:
274 /* read command */
275 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
276 for (idx = 0; idx < 100; idx++) {
277 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
278 goto ok2;
279 udelay(10);
280 }
281 snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
282 return 0;
283
284 ok2:
285 for (idx = 0; idx < 1000; idx++) {
286 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
287 goto ok3;
288 udelay(10);
289 }
290 snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
291 return 0;
292
293 ok3:
294 return inw(FM801_REG(chip, AC97_DATA));
295}
296
297static unsigned int rates[] = {
298 5500, 8000, 9600, 11025,
299 16000, 19200, 22050, 32000,
300 38400, 44100, 48000
301};
302
303static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
304 /* .count = */ ARRAY_SIZE(rates),
305 /* .list = */rates,
306 /* .mask = */0,
307};
308
309static unsigned int channels[] = {
310 2, 4, 6
311};
312
313#define CHANNELS sizeof(channels) / sizeof(channels[0])
314
315static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
316 /* .count = */CHANNELS,
317 /* .list = */channels,
318 /* .mask = */0,
319};
320
321/*
322 * Sample rate routines
323 */
324
325static unsigned short snd_fm801_rate_bits(unsigned int rate)
326{
327 unsigned int idx;
328
329 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
330 if (rates[idx] == rate)
331 return idx;
332 snd_BUG();
333 return ARRAY_SIZE(rates) - 1;
334}
335
336/*
337 * PCM part
338 */
339
340static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
341 int cmd)
342{
343 fm801_t *chip = snd_pcm_substream_chip(substream);
344
345 spin_lock(&chip->reg_lock);
346 switch (cmd) {
347 case SNDRV_PCM_TRIGGER_START:
348 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
349 FM801_BUF2_LAST |
350 FM801_PAUSE);
351 chip->ply_ctrl |= FM801_START |
352 FM801_IMMED_STOP;
353 break;
354 case SNDRV_PCM_TRIGGER_STOP:
355 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
356 break;
357 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
358 chip->ply_ctrl |= FM801_PAUSE;
359 break;
360 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
361 chip->ply_ctrl &= ~FM801_PAUSE;
362 break;
363 default:
364 spin_unlock(&chip->reg_lock);
365 snd_BUG();
366 return -EINVAL;
367 }
368 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
369 spin_unlock(&chip->reg_lock);
370 return 0;
371}
372
373static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
374 int cmd)
375{
376 fm801_t *chip = snd_pcm_substream_chip(substream);
377
378 spin_lock(&chip->reg_lock);
379 switch (cmd) {
380 case SNDRV_PCM_TRIGGER_START:
381 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
382 FM801_BUF2_LAST |
383 FM801_PAUSE);
384 chip->cap_ctrl |= FM801_START |
385 FM801_IMMED_STOP;
386 break;
387 case SNDRV_PCM_TRIGGER_STOP:
388 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
389 break;
390 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
391 chip->cap_ctrl |= FM801_PAUSE;
392 break;
393 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
394 chip->cap_ctrl &= ~FM801_PAUSE;
395 break;
396 default:
397 spin_unlock(&chip->reg_lock);
398 snd_BUG();
399 return -EINVAL;
400 }
401 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
402 spin_unlock(&chip->reg_lock);
403 return 0;
404}
405
406static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
407 snd_pcm_hw_params_t * hw_params)
408{
409 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
410}
411
412static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
413{
414 return snd_pcm_lib_free_pages(substream);
415}
416
417static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
418{
419 fm801_t *chip = snd_pcm_substream_chip(substream);
420 snd_pcm_runtime_t *runtime = substream->runtime;
421
422 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
423 chip->ply_count = snd_pcm_lib_period_bytes(substream);
424 spin_lock_irq(&chip->reg_lock);
425 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
426 FM801_STEREO | FM801_RATE_MASK |
427 FM801_CHANNELS_MASK);
428 if (snd_pcm_format_width(runtime->format) == 16)
429 chip->ply_ctrl |= FM801_16BIT;
430 if (runtime->channels > 1) {
431 chip->ply_ctrl |= FM801_STEREO;
432 if (runtime->channels == 4)
433 chip->ply_ctrl |= FM801_CHANNELS_4;
434 else if (runtime->channels == 6)
435 chip->ply_ctrl |= FM801_CHANNELS_6;
436 }
437 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
438 chip->ply_buf = 0;
439 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
440 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
441 chip->ply_buffer = runtime->dma_addr;
442 chip->ply_pos = 0;
443 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
444 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
445 spin_unlock_irq(&chip->reg_lock);
446 return 0;
447}
448
449static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
450{
451 fm801_t *chip = snd_pcm_substream_chip(substream);
452 snd_pcm_runtime_t *runtime = substream->runtime;
453
454 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
455 chip->cap_count = snd_pcm_lib_period_bytes(substream);
456 spin_lock_irq(&chip->reg_lock);
457 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
458 FM801_STEREO | FM801_RATE_MASK);
459 if (snd_pcm_format_width(runtime->format) == 16)
460 chip->cap_ctrl |= FM801_16BIT;
461 if (runtime->channels > 1)
462 chip->cap_ctrl |= FM801_STEREO;
463 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
464 chip->cap_buf = 0;
465 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
466 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
467 chip->cap_buffer = runtime->dma_addr;
468 chip->cap_pos = 0;
469 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
470 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
471 spin_unlock_irq(&chip->reg_lock);
472 return 0;
473}
474
475static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
476{
477 fm801_t *chip = snd_pcm_substream_chip(substream);
478 size_t ptr;
479
480 if (!(chip->ply_ctrl & FM801_START))
481 return 0;
482 spin_lock(&chip->reg_lock);
483 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
484 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
485 ptr += chip->ply_count;
486 ptr %= chip->ply_size;
487 }
488 spin_unlock(&chip->reg_lock);
489 return bytes_to_frames(substream->runtime, ptr);
490}
491
492static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
493{
494 fm801_t *chip = snd_pcm_substream_chip(substream);
495 size_t ptr;
496
497 if (!(chip->cap_ctrl & FM801_START))
498 return 0;
499 spin_lock(&chip->reg_lock);
500 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
501 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
502 ptr += chip->cap_count;
503 ptr %= chip->cap_size;
504 }
505 spin_unlock(&chip->reg_lock);
506 return bytes_to_frames(substream->runtime, ptr);
507}
508
509static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
510{
511 fm801_t *chip = dev_id;
512 unsigned short status;
513 unsigned int tmp;
514
515 status = inw(FM801_REG(chip, IRQ_STATUS));
516 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
517 if (! status)
518 return IRQ_NONE;
519
520 /* ack first */
521 outw(status, FM801_REG(chip, IRQ_STATUS));
522 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
523 spin_lock(&chip->reg_lock);
524 chip->ply_buf++;
525 chip->ply_pos += chip->ply_count;
526 chip->ply_pos %= chip->ply_size;
527 tmp = chip->ply_pos + chip->ply_count;
528 tmp %= chip->ply_size;
529 outl(chip->ply_buffer + tmp,
530 (chip->ply_buf & 1) ?
531 FM801_REG(chip, PLY_BUF1) :
532 FM801_REG(chip, PLY_BUF2));
533 spin_unlock(&chip->reg_lock);
534 snd_pcm_period_elapsed(chip->playback_substream);
535 }
536 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
537 spin_lock(&chip->reg_lock);
538 chip->cap_buf++;
539 chip->cap_pos += chip->cap_count;
540 chip->cap_pos %= chip->cap_size;
541 tmp = chip->cap_pos + chip->cap_count;
542 tmp %= chip->cap_size;
543 outl(chip->cap_buffer + tmp,
544 (chip->cap_buf & 1) ?
545 FM801_REG(chip, CAP_BUF1) :
546 FM801_REG(chip, CAP_BUF2));
547 spin_unlock(&chip->reg_lock);
548 snd_pcm_period_elapsed(chip->capture_substream);
549 }
550 if (chip->rmidi && (status & FM801_IRQ_MPU))
551 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
552 if (status & FM801_IRQ_VOLUME)
553 ;/* TODO */
554#ifdef TARGET_OS2
555 eoi_irq(irq);
556#endif //TARGET_OS2
557
558 return IRQ_HANDLED;
559}
560
561static snd_pcm_hardware_t snd_fm801_playback =
562{
563 /*.info = */ (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
564 SNDRV_PCM_INFO_BLOCK_TRANSFER |
565 SNDRV_PCM_INFO_PAUSE |
566 SNDRV_PCM_INFO_MMAP_VALID),
567 /*.formats = */ SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
568 /*.rates = */ SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
569 /*.rate_min = */ 5500,
570 /*.rate_max = */ 48000,
571 /*.channels_min = */ 1,
572 /*.channels_max = */ 2,
573 /*.buffer_bytes_max = */ (128*1024),
574 /*.period_bytes_min = */ 64,
575 /*.period_bytes_max = */ (128*1024),
576 /*.periods_min = */ 1,
577 /*.periods_max = */ 1024,
578 /*.fifo_size = */ 0,
579};
580
581static snd_pcm_hardware_t snd_fm801_capture =
582{
583 /*.info = */ (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
584 SNDRV_PCM_INFO_BLOCK_TRANSFER |
585 SNDRV_PCM_INFO_PAUSE |
586 SNDRV_PCM_INFO_MMAP_VALID),
587 /*.formats = */ SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
588 /*.rates = */ SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
589 /*.rate_min = */ 5500,
590 /*.rate_max = */ 48000,
591 /*.channels_min = */ 1,
592 /*.channels_max = */ 2,
593 /*.buffer_bytes_max = */ (128*1024),
594 /*.period_bytes_min = */ 64,
595 /*.period_bytes_max = */ (128*1024),
596 /*.periods_min = */ 1,
597 /*.periods_max = */ 1024,
598 /*.fifo_size = */ 0,
599};
600
601static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
602{
603 fm801_t *chip = snd_pcm_substream_chip(substream);
604 snd_pcm_runtime_t *runtime = substream->runtime;
605 int err;
606
607 chip->playback_substream = substream;
608 runtime->hw = snd_fm801_playback;
609 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
610 if (chip->multichannel) {
611 runtime->hw.channels_max = 6;
612 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
613 }
614 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
615 return err;
616 return 0;
617}
618
619static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
620{
621 fm801_t *chip = snd_pcm_substream_chip(substream);
622 snd_pcm_runtime_t *runtime = substream->runtime;
623 int err;
624
625 chip->capture_substream = substream;
626 runtime->hw = snd_fm801_capture;
627 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
628 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
629 return err;
630 return 0;
631}
632
633static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
634{
635 fm801_t *chip = snd_pcm_substream_chip(substream);
636
637 chip->playback_substream = NULL;
638 return 0;
639}
640
641static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
642{
643 fm801_t *chip = snd_pcm_substream_chip(substream);
644
645 chip->capture_substream = NULL;
646 return 0;
647}
648
649static snd_pcm_ops_t snd_fm801_playback_ops = {
650 /*.open = */ snd_fm801_playback_open,
651 /*.close = */ snd_fm801_playback_close,
652 /*.ioctl = */ snd_pcm_lib_ioctl,
653 /*.hw_params = */ snd_fm801_hw_params,
654 /*.hw_free = */ snd_fm801_hw_free,
655 /*.prepare = */ snd_fm801_playback_prepare,
656 /*.trigger = */ snd_fm801_playback_trigger,
657 /*.pointer = */ snd_fm801_playback_pointer,
658 0,0,0,0
659};
660
661static snd_pcm_ops_t snd_fm801_capture_ops = {
662 /*.open = */ snd_fm801_capture_open,
663 /*.close = */ snd_fm801_capture_close,
664 /*.ioctl = */ snd_pcm_lib_ioctl,
665 /*.hw_params = */ snd_fm801_hw_params,
666 /*.hw_free = */ snd_fm801_hw_free,
667 /*.prepare = */ snd_fm801_capture_prepare,
668 /*.trigger = */ snd_fm801_capture_trigger,
669 /*.pointer = */ snd_fm801_capture_pointer,
670 0,0,0,0
671};
672
673static void snd_fm801_pcm_free(snd_pcm_t *pcm)
674{
675 fm801_t *chip = pcm->private_data;
676 chip->pcm = NULL;
677 snd_pcm_lib_preallocate_free_for_all(pcm);
678}
679
680static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
681{
682 snd_pcm_t *pcm;
683 int err;
684
685 if (rpcm)
686 *rpcm = NULL;
687 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
688 return err;
689
690 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
691 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
692
693 pcm->private_data = chip;
694 pcm->private_free = snd_fm801_pcm_free;
695 pcm->info_flags = 0;
696 strcpy(pcm->name, "FM801");
697 chip->pcm = pcm;
698
699 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
700 snd_dma_pci_data(chip->pci),
701 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
702
703 if (rpcm)
704 *rpcm = pcm;
705 return 0;
706}
707
708/*
709 * TEA5757 radio
710 */
711
712#ifdef TEA575X_RADIO
713
714/* 256PCS GPIO numbers */
715#define TEA_256PCS_DATA 1
716#define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
717#define TEA_256PCS_BUS_CLOCK 3
718
719static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
720{
721 fm801_t *chip = tea->private_data;
722 unsigned short reg;
723 int i = 25;
724
725 spin_lock_irq(&chip->reg_lock);
726 reg = inw(FM801_REG(chip, GPIO_CTRL));
727 /* use GPIO lines and set write enable bit */
728 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
729 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
730 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
731 /* all of lines are in the write direction */
732 /* clear data and clock lines */
733 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
734 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
735 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
736 FM801_GPIO_GP(TEA_256PCS_DATA) |
737 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
738 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
739 outw(reg, FM801_REG(chip, GPIO_CTRL));
740 udelay(1);
741
742 while (i--) {
743 if (val & (1 << i))
744 reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
745 else
746 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
747 outw(reg, FM801_REG(chip, GPIO_CTRL));
748 udelay(1);
749 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
750 outw(reg, FM801_REG(chip, GPIO_CTRL));
751 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
752 outw(reg, FM801_REG(chip, GPIO_CTRL));
753 udelay(1);
754 }
755
756 /* and reset the write enable bit */
757 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
758 FM801_GPIO_GP(TEA_256PCS_DATA);
759 outw(reg, FM801_REG(chip, GPIO_CTRL));
760 spin_unlock_irq(&chip->reg_lock);
761}
762
763static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
764{
765 fm801_t *chip = tea->private_data;
766 unsigned short reg;
767 unsigned int val = 0;
768 int i;
769
770 spin_lock_irq(&chip->reg_lock);
771 reg = inw(FM801_REG(chip, GPIO_CTRL));
772 /* use GPIO lines, set data direction to input */
773 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
774 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
775 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
776 FM801_GPIO_GD(TEA_256PCS_DATA) |
777 FM801_GPIO_GP(TEA_256PCS_DATA) |
778 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
779 /* all of lines are in the write direction, except data */
780 /* clear data, write enable and clock lines */
781 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
782 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
783 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
784
785 for (i = 0; i < 24; i++) {
786 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
787 outw(reg, FM801_REG(chip, GPIO_CTRL));
788 udelay(1);
789 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
790 outw(reg, FM801_REG(chip, GPIO_CTRL));
791 udelay(1);
792 val <<= 1;
793 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
794 val |= 1;
795 }
796
797 spin_unlock_irq(&chip->reg_lock);
798
799 return val;
800}
801
802/* 256PCPR GPIO numbers */
803#define TEA_256PCPR_BUS_CLOCK 0
804#define TEA_256PCPR_DATA 1
805#define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
806
807static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
808{
809 fm801_t *chip = tea->private_data;
810 unsigned short reg;
811 int i = 25;
812
813 spin_lock_irq(&chip->reg_lock);
814 reg = inw(FM801_REG(chip, GPIO_CTRL));
815 /* use GPIO lines and set write enable bit */
816 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
817 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
818 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
819 /* all of lines are in the write direction */
820 /* clear data and clock lines */
821 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
822 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
823 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
824 FM801_GPIO_GP(TEA_256PCPR_DATA) |
825 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
826 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
827 outw(reg, FM801_REG(chip, GPIO_CTRL));
828 udelay(1);
829
830 while (i--) {
831 if (val & (1 << i))
832 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
833 else
834 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
835 outw(reg, FM801_REG(chip, GPIO_CTRL));
836 udelay(1);
837 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
838 outw(reg, FM801_REG(chip, GPIO_CTRL));
839 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
840 outw(reg, FM801_REG(chip, GPIO_CTRL));
841 udelay(1);
842 }
843
844 /* and reset the write enable bit */
845 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
846 FM801_GPIO_GP(TEA_256PCPR_DATA);
847 outw(reg, FM801_REG(chip, GPIO_CTRL));
848 spin_unlock_irq(&chip->reg_lock);
849}
850
851static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
852{
853 fm801_t *chip = tea->private_data;
854 unsigned short reg;
855 unsigned int val = 0;
856 int i;
857
858 spin_lock_irq(&chip->reg_lock);
859 reg = inw(FM801_REG(chip, GPIO_CTRL));
860 /* use GPIO lines, set data direction to input */
861 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
862 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
863 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
864 FM801_GPIO_GD(TEA_256PCPR_DATA) |
865 FM801_GPIO_GP(TEA_256PCPR_DATA) |
866 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
867 /* all of lines are in the write direction, except data */
868 /* clear data, write enable and clock lines */
869 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
870 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
871 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
872
873 for (i = 0; i < 24; i++) {
874 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
875 outw(reg, FM801_REG(chip, GPIO_CTRL));
876 udelay(1);
877 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
878 outw(reg, FM801_REG(chip, GPIO_CTRL));
879 udelay(1);
880 val <<= 1;
881 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
882 val |= 1;
883 }
884
885 spin_unlock_irq(&chip->reg_lock);
886
887 return val;
888}
889
890/* 64PCR GPIO numbers */
891#define TEA_64PCR_BUS_CLOCK 0
892#define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
893#define TEA_64PCR_DATA 2
894
895static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
896{
897 fm801_t *chip = tea->private_data;
898 unsigned short reg;
899 int i = 25;
900
901 spin_lock_irq(&chip->reg_lock);
902 reg = inw(FM801_REG(chip, GPIO_CTRL));
903 /* use GPIO lines and set write enable bit */
904 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
905 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
906 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
907 /* all of lines are in the write direction */
908 /* clear data and clock lines */
909 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
910 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
911 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
912 FM801_GPIO_GP(TEA_64PCR_DATA) |
913 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
914 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
915 outw(reg, FM801_REG(chip, GPIO_CTRL));
916 udelay(1);
917
918 while (i--) {
919 if (val & (1 << i))
920 reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
921 else
922 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
923 outw(reg, FM801_REG(chip, GPIO_CTRL));
924 udelay(1);
925 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
926 outw(reg, FM801_REG(chip, GPIO_CTRL));
927 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
928 outw(reg, FM801_REG(chip, GPIO_CTRL));
929 udelay(1);
930 }
931
932 /* and reset the write enable bit */
933 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
934 FM801_GPIO_GP(TEA_64PCR_DATA);
935 outw(reg, FM801_REG(chip, GPIO_CTRL));
936 spin_unlock_irq(&chip->reg_lock);
937}
938
939static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
940{
941 fm801_t *chip = tea->private_data;
942 unsigned short reg;
943 unsigned int val = 0;
944 int i;
945
946 spin_lock_irq(&chip->reg_lock);
947 reg = inw(FM801_REG(chip, GPIO_CTRL));
948 /* use GPIO lines, set data direction to input */
949 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
950 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
951 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
952 FM801_GPIO_GD(TEA_64PCR_DATA) |
953 FM801_GPIO_GP(TEA_64PCR_DATA) |
954 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
955 /* all of lines are in the write direction, except data */
956 /* clear data, write enable and clock lines */
957 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
958 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
959 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
960
961 for (i = 0; i < 24; i++) {
962 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
963 outw(reg, FM801_REG(chip, GPIO_CTRL));
964 udelay(1);
965 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
966 outw(reg, FM801_REG(chip, GPIO_CTRL));
967 udelay(1);
968 val <<= 1;
969 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
970 val |= 1;
971 }
972
973 spin_unlock_irq(&chip->reg_lock);
974
975 return val;
976}
977
978static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
979 {
980 /* 1 = MediaForte 256-PCS */
981 .write = snd_fm801_tea575x_256pcs_write,
982 .read = snd_fm801_tea575x_256pcs_read,
983 },
984 {
985 /* 2 = MediaForte 256-PCPR */
986 .write = snd_fm801_tea575x_256pcpr_write,
987 .read = snd_fm801_tea575x_256pcpr_read,
988 },
989 {
990 /* 3 = MediaForte 64-PCR */
991 .write = snd_fm801_tea575x_64pcr_write,
992 .read = snd_fm801_tea575x_64pcr_read,
993 }
994};
995#endif
996
997/*
998 * Mixer routines
999 */
1000
1001#define FM801_SINGLE(xname, reg, shift, mask, invert) \
1002{ SNDRV_CTL_ELEM_IFACE_MIXER, 0,0, xname, 0,0,0, snd_fm801_info_single, \
1003 snd_fm801_get_single, snd_fm801_put_single, \
1004 0, reg | (shift << 8) | (mask << 16) | (invert << 24) }
1005
1006static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1007{
1008 int mask = (kcontrol->private_value >> 16) & 0xff;
1009
1010 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1011 uinfo->count = 1;
1012 uinfo->value.integer.min = 0;
1013 uinfo->value.integer.max = mask;
1014 return 0;
1015}
1016
1017static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1018{
1019 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1020 int reg = kcontrol->private_value & 0xff;
1021 int shift = (kcontrol->private_value >> 8) & 0xff;
1022 int mask = (kcontrol->private_value >> 16) & 0xff;
1023 int invert = (kcontrol->private_value >> 24) & 0xff;
1024
1025 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1026 if (invert)
1027 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1028 return 0;
1029}
1030
1031static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1032{
1033 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1034 int reg = kcontrol->private_value & 0xff;
1035 int shift = (kcontrol->private_value >> 8) & 0xff;
1036 int mask = (kcontrol->private_value >> 16) & 0xff;
1037 int invert = (kcontrol->private_value >> 24) & 0xff;
1038 unsigned short val;
1039
1040 val = (ucontrol->value.integer.value[0] & mask);
1041 if (invert)
1042 val = mask - val;
1043 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1044}
1045
1046#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1047{ SNDRV_CTL_ELEM_IFACE_MIXER, 0,0, xname, 0,0,0, snd_fm801_info_double, \
1048 snd_fm801_get_double, snd_fm801_put_double, \
1049 0, reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1050
1051static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1052{
1053 int mask = (kcontrol->private_value >> 16) & 0xff;
1054
1055 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1056 uinfo->count = 2;
1057 uinfo->value.integer.min = 0;
1058 uinfo->value.integer.max = mask;
1059 return 0;
1060}
1061
1062static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1063{
1064 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1065 int reg = kcontrol->private_value & 0xff;
1066 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1067 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1068 int mask = (kcontrol->private_value >> 16) & 0xff;
1069 int invert = (kcontrol->private_value >> 24) & 0xff;
1070
1071 spin_lock_irq(&chip->reg_lock);
1072 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1073 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1074 spin_unlock_irq(&chip->reg_lock);
1075 if (invert) {
1076 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1077 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1078 }
1079 return 0;
1080}
1081
1082static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1083{
1084 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1085 int reg = kcontrol->private_value & 0xff;
1086 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1087 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1088 int mask = (kcontrol->private_value >> 16) & 0xff;
1089 int invert = (kcontrol->private_value >> 24) & 0xff;
1090 unsigned short val1, val2;
1091
1092 val1 = ucontrol->value.integer.value[0] & mask;
1093 val2 = ucontrol->value.integer.value[1] & mask;
1094 if (invert) {
1095 val1 = mask - val1;
1096 val2 = mask - val2;
1097 }
1098 return snd_fm801_update_bits(chip, reg,
1099 (mask << shift_left) | (mask << shift_right),
1100 (val1 << shift_left ) | (val2 << shift_right));
1101}
1102
1103static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1104{
1105 static char *texts[5] = {
1106 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1107 };
1108
1109 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1110 uinfo->count = 1;
1111 uinfo->value.enumerated.items = 5;
1112 if (uinfo->value.enumerated.item > 4)
1113 uinfo->value.enumerated.item = 4;
1114 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1115 return 0;
1116}
1117
1118static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1119{
1120 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1121 unsigned short val;
1122
1123 val = inw(FM801_REG(chip, REC_SRC)) & 7;
1124 if (val > 4)
1125 val = 4;
1126 ucontrol->value.enumerated.item[0] = val;
1127 return 0;
1128}
1129
1130static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1131{
1132 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1133 unsigned short val;
1134
1135 if ((val = ucontrol->value.enumerated.item[0]) > 4)
1136 return -EINVAL;
1137 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1138}
1139
1140#define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1141
1142static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1143FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1144FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1145FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1146FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1147FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1148FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1149{
1150 SNDRV_CTL_ELEM_IFACE_MIXER, 0,0,
1151 "Digital Capture Source",0,0,0,
1152 snd_fm801_info_mux,
1153 snd_fm801_get_mux,
1154 snd_fm801_put_mux,0
1155}
1156};
1157
1158#define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1159
1160static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1161FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1162FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1163FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
1164FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
1165FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
1166FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
1167};
1168
1169static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1170{
1171 fm801_t *chip = bus->private_data;
1172 chip->ac97_bus = NULL;
1173}
1174
1175static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1176{
1177 fm801_t *chip = ac97->private_data;
1178 if (ac97->num == 0) {
1179 chip->ac97 = NULL;
1180 } else {
1181 chip->ac97_sec = NULL;
1182 }
1183}
1184
1185static int __devinit snd_fm801_mixer(fm801_t *chip)
1186{
1187 ac97_template_t ac97;
1188 unsigned int i;
1189 int err;
1190 static ac97_bus_ops_t ops = {
1191 0, 0, snd_fm801_codec_write,
1192 snd_fm801_codec_read, 0,0
1193 };
1194
1195 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1196 return err;
1197 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1198
1199 memset(&ac97, 0, sizeof(ac97));
1200 ac97.private_data = chip;
1201 ac97.private_free = snd_fm801_mixer_free_ac97;
1202 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1203 return err;
1204 if (chip->secondary) {
1205 ac97.num = 1;
1206 ac97.addr = chip->secondary_addr;
1207 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1208 return err;
1209 }
1210 for (i = 0; i < FM801_CONTROLS; i++)
1211 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1212 if (chip->multichannel) {
1213 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1214 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1215 }
1216 return 0;
1217}
1218
1219/*
1220 * initialization routines
1221 */
1222
1223static int snd_fm801_free(fm801_t *chip)
1224{
1225 unsigned short cmdw;
1226
1227 if (chip->irq < 0)
1228 goto __end_hw;
1229
1230 /* interrupt setup - mask everything */
1231 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1232 cmdw |= 0x00c3;
1233 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1234
1235 __end_hw:
1236#ifdef TEA575X_RADIO
1237 snd_tea575x_exit(&chip->tea);
1238#endif
1239 if (chip->irq >= 0)
1240 free_irq(chip->irq, (void *)chip);
1241 pci_release_regions(chip->pci);
1242 pci_disable_device(chip->pci);
1243
1244 kfree(chip);
1245 return 0;
1246}
1247
1248static int snd_fm801_dev_free(snd_device_t *device)
1249{
1250 fm801_t *chip = device->device_data;
1251 return snd_fm801_free(chip);
1252}
1253
1254static int __devinit snd_fm801_create(snd_card_t * card,
1255 struct pci_dev * pci,
1256 int tea575x_tuner,
1257 fm801_t ** rchip)
1258{
1259 fm801_t *chip;
1260 unsigned char rev, id;
1261 unsigned short cmdw;
1262 unsigned long timeout;
1263 int err;
1264 static snd_device_ops_t ops = {
1265 snd_fm801_dev_free, 0,0,0
1266 };
1267
1268 *rchip = NULL;
1269 if ((err = pci_enable_device(pci)) < 0)
1270 return err;
1271 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1272 if (chip == NULL) {
1273 pci_disable_device(pci);
1274 return -ENOMEM;
1275 }
1276 spin_lock_init(&chip->reg_lock);
1277 chip->card = card;
1278 chip->pci = pci;
1279 chip->irq = -1;
1280 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1281 kfree(chip);
1282 pci_disable_device(pci);
1283 return err;
1284 }
1285 chip->port = pci_resource_start(pci, 0);
1286 if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
1287 snd_printk("unable to grab IRQ %d\n", chip->irq);
1288 snd_fm801_free(chip);
1289 return -EBUSY;
1290 }
1291 chip->irq = pci->irq;
1292 pci_set_master(pci);
1293
1294 pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1295 if (rev >= 0xb1) /* FM801-AU */
1296 chip->multichannel = 1;
1297
1298 /* codec cold reset + AC'97 warm reset */
1299 outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
1300 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1301 udelay(100);
1302 outw(0, FM801_REG(chip, CODEC_CTRL));
1303
1304 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
1305
1306 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1307 udelay(5);
1308 do {
1309 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1310 goto __ac97_secondary;
1311 set_current_state(TASK_UNINTERRUPTIBLE);
1312 schedule_timeout(1);
1313 } while (time_after(timeout, jiffies));
1314 snd_printk("Primary AC'97 codec not found\n");
1315 snd_fm801_free(chip);
1316 return -EIO;
1317
1318 __ac97_secondary:
1319 if (!chip->multichannel) /* lookup is not required */
1320 goto __ac97_ok;
1321 for (id = 3; id > 0; id--) { /* my card has the secondary codec */
1322 /* at address #3, so the loop is inverted */
1323
1324 timeout = jiffies + HZ / 20;
1325
1326 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
1327 udelay(5);
1328 do {
1329 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
1330 cmdw = inw(FM801_REG(chip, AC97_DATA));
1331 if (cmdw != 0xffff && cmdw != 0) {
1332 chip->secondary = 1;
1333 chip->secondary_addr = id;
1334 goto __ac97_ok;
1335 }
1336 }
1337 set_current_state(TASK_UNINTERRUPTIBLE);
1338 schedule_timeout(1);
1339 } while (time_after(timeout, jiffies));
1340 }
1341
1342 /* the recovery phase, it seems that probing for non-existing codec might */
1343 /* cause timeout problems */
1344 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
1345
1346 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1347 udelay(5);
1348 do {
1349 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1350 goto __ac97_ok;
1351 set_current_state(TASK_UNINTERRUPTIBLE);
1352 schedule_timeout(1);
1353 } while (time_after(timeout, jiffies));
1354 snd_printk("Primary AC'97 codec not responding\n");
1355 snd_fm801_free(chip);
1356 return -EIO;
1357
1358 __ac97_ok:
1359
1360 /* init volume */
1361 outw(0x0808, FM801_REG(chip, PCM_VOL));
1362 outw(0x9f1f, FM801_REG(chip, FM_VOL));
1363 outw(0x8808, FM801_REG(chip, I2S_VOL));
1364
1365 /* I2S control - I2S mode */
1366 outw(0x0003, FM801_REG(chip, I2S_MODE));
1367
1368 /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1369 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1370 cmdw &= ~0x0083;
1371 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1372
1373 /* interrupt clear */
1374 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1375
1376 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1377 snd_fm801_free(chip);
1378 return err;
1379 }
1380
1381 snd_card_set_dev(card, &pci->dev);
1382
1383#ifdef TEA575X_RADIO
1384 if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1385 chip->tea.dev_nr = tea575x_tuner >> 16;
1386 chip->tea.card = card;
1387 chip->tea.freq_fixup = 10700;
1388 chip->tea.private_data = chip;
1389 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1390 snd_tea575x_init(&chip->tea);
1391 }
1392#endif
1393
1394 *rchip = chip;
1395 return 0;
1396}
1397
1398static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1399 const struct pci_device_id *pci_id)
1400{
1401 static int dev;
1402 snd_card_t *card;
1403 fm801_t *chip;
1404 opl3_t *opl3;
1405 int err;
1406
1407 if (dev >= SNDRV_CARDS)
1408 return -ENODEV;
1409 if (!enable[dev]) {
1410 dev++;
1411 return -ENOENT;
1412 }
1413
1414 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1415 if (card == NULL)
1416 return -ENOMEM;
1417 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1418 snd_card_free(card);
1419 return err;
1420 }
1421
1422 strcpy(card->driver, "FM801");
1423 strcpy(card->shortname, "ForteMedia FM801-");
1424 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1425 sprintf(card->longname, "%s at 0x%lx, irq %i",
1426 card->shortname, chip->port, chip->irq);
1427
1428 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1429 snd_card_free(card);
1430 return err;
1431 }
1432 if ((err = snd_fm801_mixer(chip)) < 0) {
1433 snd_card_free(card);
1434 return err;
1435 }
1436 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1437 FM801_REG(chip, MPU401_DATA),
1438 MPU401_INFO_INTEGRATED,
1439 chip->irq, 0, &chip->rmidi)) < 0) {
1440 snd_card_free(card);
1441 return err;
1442 }
1443 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1444 FM801_REG(chip, OPL3_BANK1),
1445 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1446 snd_card_free(card);
1447 return err;
1448 }
1449 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1450 snd_card_free(card);
1451 return err;
1452 }
1453
1454 if ((err = snd_card_register(card)) < 0) {
1455 snd_card_free(card);
1456 return err;
1457 }
1458 pci_set_drvdata(pci, card);
1459 dev++;
1460 return 0;
1461}
1462
1463static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1464{
1465 snd_card_free(pci_get_drvdata(pci));
1466 pci_set_drvdata(pci, NULL);
1467}
1468
1469static struct pci_driver driver = {
1470 0,0,0,
1471 "FM801",
1472 snd_fm801_ids,
1473 snd_card_fm801_probe,
1474 snd_card_fm801_remove,
1475 0,0
1476};
1477
1478static int __init alsa_card_fm801_init(void)
1479{
1480 return pci_module_init(&driver);
1481}
1482
1483static void __exit alsa_card_fm801_exit(void)
1484{
1485 pci_unregister_driver(&driver);
1486}
1487
1488module_init(alsa_card_fm801_init)
1489module_exit(alsa_card_fm801_exit)
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