| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */
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| 2 | /*
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| 3 | * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
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| 4 | * Driver p16v chips
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| 5 | *
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| 6 | * This code was initially based on code from ALSA's emu10k1x.c which is:
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| 7 | * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
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| 8 | */
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| 9 |
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| 10 | /********************************************************************************************************/
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| 11 | /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers */
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| 12 | /********************************************************************************************************/
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| 13 |
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| 14 | /* The sample rate of the SPDIF outputs is set by modifying a register in the EMU10K2 PTR register A_SPDIF_SAMPLERATE.
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| 15 | * The sample rate is also controlled by the same registers that control the rate of the EMU10K2 sample rate converters.
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| 16 | */
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| 17 |
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| 18 | /* Initially all registers from 0x00 to 0x3f have zero contents. */
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| 19 | #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
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| 20 | /* One list entry: 4 bytes for DMA address,
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| 21 | * 4 bytes for period_size << 16.
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| 22 | * One list entry is 8 bytes long.
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| 23 | * One list entry for each period in the buffer.
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| 24 | */
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| 25 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
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| 26 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
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| 27 | #define PLAYBACK_UNKNOWN3 0x03 /* Not used */
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| 28 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
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| 29 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */
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| 30 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine buffer position currently in DAC */
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| 31 | #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */
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| 32 | #define PLAYBACK_FIFO_POINTER 0x08 /* Playback FIFO pointer and number of valid sound samples in cache */
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| 33 | #define PLAYBACK_UNKNOWN9 0x09 /* Not used */
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| 34 | #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
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| 35 | #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
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| 36 | #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
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| 37 | #define CAPTURE_FIFO_POINTER 0x13 /* Capture FIFO pointer and number of valid sound samples in cache */
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| 38 | #define CAPTURE_P16V_VOLUME1 0x14 /* Low: Capture volume 0xXXXX3030 */
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| 39 | #define CAPTURE_P16V_VOLUME2 0x15 /* High:Has no effect on capture volume */
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| 40 | #define CAPTURE_P16V_SOURCE 0x16 /* P16V source select. Set to 0x0700E4E5 for AC97 CAPTURE */
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| 41 | /* [0:1] Capture input 0 channel select. 0 = Capture output 0.
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| 42 | * 1 = Capture output 1.
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| 43 | * 2 = Capture output 2.
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| 44 | * 3 = Capture output 3.
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| 45 | * [3:2] Capture input 1 channel select. 0 = Capture output 0.
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| 46 | * 1 = Capture output 1.
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| 47 | * 2 = Capture output 2.
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| 48 | * 3 = Capture output 3.
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| 49 | * [5:4] Capture input 2 channel select. 0 = Capture output 0.
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| 50 | * 1 = Capture output 1.
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| 51 | * 2 = Capture output 2.
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| 52 | * 3 = Capture output 3.
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| 53 | * [7:6] Capture input 3 channel select. 0 = Capture output 0.
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| 54 | * 1 = Capture output 1.
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| 55 | * 2 = Capture output 2.
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| 56 | * 3 = Capture output 3.
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| 57 | * [9:8] Playback input 0 channel select. 0 = Play output 0.
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| 58 | * 1 = Play output 1.
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| 59 | * 2 = Play output 2.
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| 60 | * 3 = Play output 3.
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| 61 | * [11:10] Playback input 1 channel select. 0 = Play output 0.
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| 62 | * 1 = Play output 1.
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| 63 | * 2 = Play output 2.
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| 64 | * 3 = Play output 3.
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| 65 | * [13:12] Playback input 2 channel select. 0 = Play output 0.
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| 66 | * 1 = Play output 1.
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| 67 | * 2 = Play output 2.
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| 68 | * 3 = Play output 3.
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| 69 | * [15:14] Playback input 3 channel select. 0 = Play output 0.
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| 70 | * 1 = Play output 1.
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| 71 | * 2 = Play output 2.
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| 72 | * 3 = Play output 3.
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| 73 | * [19:16] Playback mixer output enable. 1 bit per channel.
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| 74 | * [23:20] Capture mixer output enable. 1 bit per channel.
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| 75 | * [26:24] FX engine channel capture 0 = 0x60-0x67.
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| 76 | * 1 = 0x68-0x6f.
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| 77 | * 2 = 0x70-0x77.
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| 78 | * 3 = 0x78-0x7f.
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| 79 | * 4 = 0x80-0x87.
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| 80 | * 5 = 0x88-0x8f.
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| 81 | * 6 = 0x90-0x97.
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| 82 | * 7 = 0x98-0x9f.
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| 83 | * [31:27] Not used.
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| 84 | */
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| 85 |
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| 86 | /* 0x1 = capture on.
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| 87 | * 0x100 = capture off.
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| 88 | * 0x200 = capture off.
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| 89 | * 0x1000 = capture off.
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| 90 | */
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| 91 | #define CAPTURE_RATE_STATUS 0x17 /* Capture sample rate. Read only */
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| 92 | /* [15:0] Not used.
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| 93 | * [18:16] Channel 0 Detected sample rate. 0 - 44.1khz
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| 94 | * 1 - 48 khz
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| 95 | * 2 - 96 khz
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| 96 | * 3 - 192 khz
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| 97 | * 7 - undefined rate.
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| 98 | * [19] Channel 0. 1 - Valid, 0 - Not Valid.
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| 99 | * [22:20] Channel 1 Detected sample rate.
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| 100 | * [23] Channel 1. 1 - Valid, 0 - Not Valid.
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| 101 | * [26:24] Channel 2 Detected sample rate.
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| 102 | * [27] Channel 2. 1 - Valid, 0 - Not Valid.
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| 103 | * [30:28] Channel 3 Detected sample rate.
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| 104 | * [31] Channel 3. 1 - Valid, 0 - Not Valid.
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| 105 | */
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| 106 | /* 0x18 - 0x1f unused */
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| 107 | #define PLAYBACK_LAST_SAMPLE 0x20 /* The sample currently being played. Read only */
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| 108 | /* 0x21 - 0x3f unused */
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| 109 | #define BASIC_INTERRUPT 0x40 /* Used by both playback and capture interrupt handler */
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| 110 | /* Playback (0x1<<channel_id) Don't touch high 16bits. */
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| 111 | /* Capture (0x100<<channel_id). not tested */
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| 112 | /* Start Playback [3:0] (one bit per channel)
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| 113 | * Start Capture [11:8] (one bit per channel)
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| 114 | * Record source select for channel 0 [18:16]
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| 115 | * Record source select for channel 1 [22:20]
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| 116 | * Record source select for channel 2 [26:24]
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| 117 | * Record source select for channel 3 [30:28]
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| 118 | * 0 - SPDIF channel.
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| 119 | * 1 - I2S channel.
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| 120 | * 2 - SRC48 channel.
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| 121 | * 3 - SRCMulti_SPDIF channel.
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| 122 | * 4 - SRCMulti_I2S channel.
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| 123 | * 5 - SPDIF channel.
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| 124 | * 6 - fxengine capture.
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| 125 | * 7 - AC97 capture.
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| 126 | */
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| 127 | /* Default 41110000.
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| 128 | * Writing 0xffffffff hangs the PC.
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| 129 | * Writing 0xffff0000 -> 77770000 so it must be some sort of route.
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| 130 | * bit 0x1 starts DMA playback on channel_id 0
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| 131 | */
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| 132 | /* 0x41,42 take values from 0 - 0xffffffff, but have no effect on playback */
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| 133 | /* 0x43,0x48 do not remember settings */
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| 134 | /* 0x41-45 unused */
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| 135 | #define WATERMARK 0x46 /* Test bit to indicate cache level usage */
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| 136 | /* Values it can have while playing on channel 0.
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| 137 | * 0000f000, 0000f004, 0000f008, 0000f00c.
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| 138 | * Readonly.
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| 139 | */
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| 140 | /* 0x47-0x4f unused */
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| 141 | /* 0x50-0x5f Capture cache data */
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| 142 | #define SRCSel 0x60 /* SRCSel. Default 0x4. Bypass P16V 0x14 */
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| 143 | /* [0] 0 = 10K2 audio, 1 = SRC48 mixer output.
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| 144 | * [2] 0 = 10K2 audio, 1 = SRCMulti SPDIF mixer output.
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| 145 | * [4] 0 = 10K2 audio, 1 = SRCMulti I2S mixer output.
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| 146 | */
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| 147 | /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */
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| 148 | /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */
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| 149 | /* SRC48 and SRCMULTI sample rate select and output select. */
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| 150 | /* 0xffffffff -> 0xC0000015
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| 151 | * 0xXXXXXXX4 = Enable Front Left/Right
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| 152 | * Enable PCMs
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| 153 | */
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| 154 |
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| 155 | /* 0x61 -> 0x6c are Volume controls */
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| 156 | #define PLAYBACK_VOLUME_MIXER1 0x61 /* SRC48 Low to mixer input volume control. */
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| 157 | #define PLAYBACK_VOLUME_MIXER2 0x62 /* SRC48 High to mixer input volume control. */
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| 158 | #define PLAYBACK_VOLUME_MIXER3 0x63 /* SRCMULTI SPDIF Low to mixer input volume control. */
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| 159 | #define PLAYBACK_VOLUME_MIXER4 0x64 /* SRCMULTI SPDIF High to mixer input volume control. */
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| 160 | #define PLAYBACK_VOLUME_MIXER5 0x65 /* SRCMULTI I2S Low to mixer input volume control. */
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| 161 | #define PLAYBACK_VOLUME_MIXER6 0x66 /* SRCMULTI I2S High to mixer input volume control. */
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| 162 | #define PLAYBACK_VOLUME_MIXER7 0x67 /* P16V Low to SRCMULTI SPDIF mixer input volume control. */
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| 163 | #define PLAYBACK_VOLUME_MIXER8 0x68 /* P16V High to SRCMULTI SPDIF mixer input volume control. */
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| 164 | #define PLAYBACK_VOLUME_MIXER9 0x69 /* P16V Low to SRCMULTI I2S mixer input volume control. */
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| 165 | /* 0xXXXX3030 = PCM0 Volume (Front).
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| 166 | * 0x3030XXXX = PCM1 Volume (Center)
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| 167 | */
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| 168 | #define PLAYBACK_VOLUME_MIXER10 0x6a /* P16V High to SRCMULTI I2S mixer input volume control. */
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| 169 | /* 0x3030XXXX = PCM3 Volume (Rear). */
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| 170 | #define PLAYBACK_VOLUME_MIXER11 0x6b /* E10K2 Low to SRC48 mixer input volume control. */
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| 171 | #define PLAYBACK_VOLUME_MIXER12 0x6c /* E10K2 High to SRC48 mixer input volume control. */
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| 172 |
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| 173 | #define SRC48_ENABLE 0x6d /* SRC48 input audio enable */
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| 174 | /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */
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| 175 | /* [23:16] The corresponding P16V channel to SRC48 enabled if == 1.
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| 176 | * [31:24] The corresponding E10K2 channel to SRC48 enabled.
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| 177 | */
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| 178 | #define SRCMULTI_ENABLE 0x6e /* SRCMulti input audio enable. Default 0xffffffff */
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| 179 | /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */
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| 180 | /* [7:0] The corresponding P16V channel to SRCMulti_I2S enabled if == 1.
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| 181 | * [15:8] The corresponding E10K2 channel to SRCMulti I2S enabled.
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| 182 | * [23:16] The corresponding P16V channel to SRCMulti SPDIF enabled.
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| 183 | * [31:24] The corresponding E10K2 channel to SRCMulti SPDIF enabled.
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| 184 | */
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| 185 | /* Bypass P16V 0xff00ff00
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| 186 | * Bitmap. 0 = Off, 1 = On.
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| 187 | * P16V playback outputs:
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| 188 | * 0xXXXXXXX1 = PCM0 Left. (Front)
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| 189 | * 0xXXXXXXX2 = PCM0 Right.
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| 190 | * 0xXXXXXXX4 = PCM1 Left. (Center/LFE)
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| 191 | * 0xXXXXXXX8 = PCM1 Right.
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| 192 | * 0xXXXXXX1X = PCM2 Left. (Unknown)
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| 193 | * 0xXXXXXX2X = PCM2 Right.
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| 194 | * 0xXXXXXX4X = PCM3 Left. (Rear)
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| 195 | * 0xXXXXXX8X = PCM3 Right.
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| 196 | */
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| 197 | #define AUDIO_OUT_ENABLE 0x6f /* Default: 000100FF */
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| 198 | /* [3:0] Does something, but not documented. Probably capture enable.
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| 199 | * [7:4] Playback channels enable. not documented.
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| 200 | * [16] AC97 output enable if == 1
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| 201 | * [30] 0 = SRCMulti_I2S input from fxengine 0x68-0x6f.
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| 202 | * 1 = SRCMulti_I2S input from SRC48 output.
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| 203 | * [31] 0 = SRCMulti_SPDIF input from fxengine 0x60-0x67.
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| 204 | * 1 = SRCMulti_SPDIF input from SRC48 output.
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| 205 | */
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| 206 | /* 0xffffffff -> C00100FF */
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| 207 | /* 0 -> Not playback sound, irq still running */
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| 208 | /* 0xXXXXXX10 = PCM0 Left/Right On. (Front)
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| 209 | * 0xXXXXXX20 = PCM1 Left/Right On. (Center/LFE)
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| 210 | * 0xXXXXXX40 = PCM2 Left/Right On. (Unknown)
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| 211 | * 0xXXXXXX80 = PCM3 Left/Right On. (Rear)
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| 212 | */
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| 213 | #define PLAYBACK_SPDIF_SELECT 0x70 /* Default: 12030F00 */
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| 214 | /* 0xffffffff -> 3FF30FFF */
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| 215 | /* 0x00000001 pauses stream/irq fail. */
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| 216 | /* All other bits do not effect playback */
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| 217 | #define PLAYBACK_SPDIF_SRC_SELECT 0x71 /* Default: 0000E4E4 */
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| 218 | /* 0xffffffff -> F33FFFFF */
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| 219 | /* All bits do not effect playback */
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| 220 | #define PLAYBACK_SPDIF_USER_DATA0 0x72 /* SPDIF out user data 0 */
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| 221 | #define PLAYBACK_SPDIF_USER_DATA1 0x73 /* SPDIF out user data 1 */
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| 222 | /* 0x74-0x75 unknown */
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| 223 | #define CAPTURE_SPDIF_CONTROL 0x76 /* SPDIF in control setting */
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| 224 | #define CAPTURE_SPDIF_STATUS 0x77 /* SPDIF in status */
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| 225 | #define CAPURE_SPDIF_USER_DATA0 0x78 /* SPDIF in user data 0 */
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| 226 | #define CAPURE_SPDIF_USER_DATA1 0x79 /* SPDIF in user data 1 */
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| 227 | #define CAPURE_SPDIF_USER_DATA2 0x7a /* SPDIF in user data 2 */
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| 228 |
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