source: GPL/trunk/alsa-kernel/pci/emu10k1/emu10k1x.c

Last change on this file was 717, checked in by David Azarewicz, 3 years ago

Merge changes from next branch.
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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
4 * Driver EMU10K1X chips
5 *
6 * Parts of this code were adapted from audigyls.c driver which is
7 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8 *
9 * BUGS:
10 * --
11 *
12 * TODO:
13 *
14 * Chips (SB0200 model):
15 * - EMU10K1X-DBQ
16 * - STAC 9708T
17 */
18#ifdef TARGET_OS2
19#define KBUILD_MODNAME "emu10k1"
20#endif
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/pci.h>
24#include <linux/dma-mapping.h>
25#include <linux/slab.h>
26#include <linux/module.h>
27#include <sound/core.h>
28#include <sound/initval.h>
29#include <sound/pcm.h>
30#include <sound/ac97_codec.h>
31#include <sound/info.h>
32#include <sound/rawmidi.h>
33
34MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
35MODULE_DESCRIPTION("EMU10K1X");
36MODULE_LICENSE("GPL");
37
38// module parameters (see "Module Parameters")
39static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
40static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
41static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
42
43module_param_array(index, int, NULL, 0444);
44MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
45module_param_array(id, charp, NULL, 0444);
46MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
47module_param_array(enable, bool, NULL, 0444);
48MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
49
50
51// some definitions were borrowed from emu10k1 driver as they seem to be the same
52/************************************************************************************************/
53/* PCI function 0 registers, address = <val> + PCIBASE0 */
54/************************************************************************************************/
55
56#define PTR 0x00 /* Indexed register set pointer register */
57 /* NOTE: The CHANNELNUM and ADDRESS words can */
58 /* be modified independently of each other. */
59
60#define DATA 0x04 /* Indexed register set data register */
61
62#define IPR 0x08 /* Global interrupt pending register */
63 /* Clear pending interrupts by writing a 1 to */
64 /* the relevant bits and zero to the other bits */
65#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
66#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
67#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
68#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
69#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
70#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
71
72#define INTE 0x0c /* Interrupt enable register */
73#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
74#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
75#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
76#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
77#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
78#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
79
80#define HCFG 0x14 /* Hardware config register */
81
82#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
83 /* NOTE: This should generally never be used. */
84#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
85 /* Should be set to 1 when the EMU10K1 is */
86 /* completely initialized. */
87#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
88
89
90#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
91
92#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
93
94/********************************************************************************************************/
95/* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
96/********************************************************************************************************/
97#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
98 /* One list entry: 4 bytes for DMA address,
99 * 4 bytes for period_size << 16.
100 * One list entry is 8 bytes long.
101 * One list entry for each period in the buffer.
102 */
103#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
104#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
105#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
106#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
107#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
108#define PLAYBACK_UNKNOWN1 0x07
109#define PLAYBACK_UNKNOWN2 0x08
110
111/* Only one capture channel supported */
112#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
113#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
114#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
115#define CAPTURE_UNKNOWN 0x13
116
117/* From 0x20 - 0x3f, last samples played on each channel */
118
119#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
120#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
121#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
122#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
123#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
124
125#define ROUTING 0x41 /* Setup sound routing ? */
126#define ROUTING_FRONT_LEFT 0x00000001
127#define ROUTING_FRONT_RIGHT 0x00000002
128#define ROUTING_REAR_LEFT 0x00000004
129#define ROUTING_REAR_RIGHT 0x00000008
130#define ROUTING_CENTER_LFE 0x00010000
131
132#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
133
134#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
135
136#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
137
138#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
139#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
140#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
141#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
142#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
143#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
144#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
145#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
146#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
147#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
148#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
149#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
150#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
151#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
152#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
153#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
154#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
155#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
156#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
157#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
158#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
159#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
160#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
161
162#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
163
164/* This is the MPU port on the card */
165#define MUDATA 0x47
166#define MUCMD 0x48
167#define MUSTAT MUCMD
168
169/* From 0x50 - 0x5f, last samples captured */
170
171/*
172 * The hardware has 3 channels for playback and 1 for capture.
173 * - channel 0 is the front channel
174 * - channel 1 is the rear channel
175 * - channel 2 is the center/lfe channel
176 * Volume is controlled by the AC97 for the front and rear channels by
177 * the PCM Playback Volume, Sigmatel Surround Playback Volume and
178 * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
179 * the front/rear channel mixing in the REAR OUT jack. When using the
180 * 4-Speaker Stereo, both front and rear channels will be mixed in the
181 * REAR OUT.
182 * The center/lfe channel has no volume control and cannot be muted during
183 * playback.
184 */
185
186struct emu10k1x_voice {
187 struct emu10k1x *emu;
188 int number;
189 int use;
190
191 struct emu10k1x_pcm *epcm;
192};
193
194struct emu10k1x_pcm {
195 struct emu10k1x *emu;
196 struct snd_pcm_substream *substream;
197 struct emu10k1x_voice *voice;
198 unsigned short running;
199};
200
201struct emu10k1x_midi {
202 struct emu10k1x *emu;
203 struct snd_rawmidi *rmidi;
204 struct snd_rawmidi_substream *substream_input;
205 struct snd_rawmidi_substream *substream_output;
206 unsigned int midi_mode;
207 spinlock_t input_lock;
208 spinlock_t output_lock;
209 spinlock_t open_lock;
210 int tx_enable, rx_enable;
211 int port;
212 int ipr_tx, ipr_rx;
213 void (*interrupt)(struct emu10k1x *emu, unsigned int status);
214};
215
216// definition of the chip-specific record
217struct emu10k1x {
218 struct snd_card *card;
219 struct pci_dev *pci;
220
221 unsigned long port;
222 int irq;
223
224 unsigned char revision; /* chip revision */
225 unsigned int serial; /* serial number */
226 unsigned short model; /* subsystem id */
227
228 spinlock_t emu_lock;
229 spinlock_t voice_lock;
230
231 struct snd_ac97 *ac97;
232 struct snd_pcm *pcm;
233
234 struct emu10k1x_voice voices[3];
235 struct emu10k1x_voice capture_voice;
236 u32 spdif_bits[3]; // SPDIF out setup
237
238 struct snd_dma_buffer *dma_buffer;
239
240 struct emu10k1x_midi midi;
241};
242
243/* hardware definition */
244static const struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
245 .info = (SNDRV_PCM_INFO_MMAP |
246 SNDRV_PCM_INFO_INTERLEAVED |
247 SNDRV_PCM_INFO_BLOCK_TRANSFER |
248 SNDRV_PCM_INFO_MMAP_VALID),
249 .formats = SNDRV_PCM_FMTBIT_S16_LE,
250 .rates = SNDRV_PCM_RATE_48000,
251 .rate_min = 48000,
252 .rate_max = 48000,
253 .channels_min = 2,
254 .channels_max = 2,
255 .buffer_bytes_max = (32*1024),
256 .period_bytes_min = 64,
257 .period_bytes_max = (16*1024),
258 .periods_min = 2,
259 .periods_max = 8,
260 .fifo_size = 0,
261};
262
263static const struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
264 .info = (SNDRV_PCM_INFO_MMAP |
265 SNDRV_PCM_INFO_INTERLEAVED |
266 SNDRV_PCM_INFO_BLOCK_TRANSFER |
267 SNDRV_PCM_INFO_MMAP_VALID),
268 .formats = SNDRV_PCM_FMTBIT_S16_LE,
269 .rates = SNDRV_PCM_RATE_48000,
270 .rate_min = 48000,
271 .rate_max = 48000,
272 .channels_min = 2,
273 .channels_max = 2,
274 .buffer_bytes_max = (32*1024),
275 .period_bytes_min = 64,
276 .period_bytes_max = (16*1024),
277 .periods_min = 2,
278 .periods_max = 2,
279 .fifo_size = 0,
280};
281
282static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
283 unsigned int reg,
284 unsigned int chn)
285{
286 unsigned long flags;
287 unsigned int regptr, val;
288
289 regptr = (reg << 16) | chn;
290
291 spin_lock_irqsave(&emu->emu_lock, flags);
292 outl(regptr, emu->port + PTR);
293 val = inl(emu->port + DATA);
294 spin_unlock_irqrestore(&emu->emu_lock, flags);
295 return val;
296}
297
298static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
299 unsigned int reg,
300 unsigned int chn,
301 unsigned int data)
302{
303 unsigned int regptr;
304 unsigned long flags;
305
306 regptr = (reg << 16) | chn;
307
308 spin_lock_irqsave(&emu->emu_lock, flags);
309 outl(regptr, emu->port + PTR);
310 outl(data, emu->port + DATA);
311 spin_unlock_irqrestore(&emu->emu_lock, flags);
312}
313
314static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
315{
316 unsigned long flags;
317 unsigned int intr_enable;
318
319 spin_lock_irqsave(&emu->emu_lock, flags);
320 intr_enable = inl(emu->port + INTE) | intrenb;
321 outl(intr_enable, emu->port + INTE);
322 spin_unlock_irqrestore(&emu->emu_lock, flags);
323}
324
325static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
326{
327 unsigned long flags;
328 unsigned int intr_enable;
329
330 spin_lock_irqsave(&emu->emu_lock, flags);
331 intr_enable = inl(emu->port + INTE) & ~intrenb;
332 outl(intr_enable, emu->port + INTE);
333 spin_unlock_irqrestore(&emu->emu_lock, flags);
334}
335
336static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
337{
338 unsigned long flags;
339
340 spin_lock_irqsave(&emu->emu_lock, flags);
341 outl(value, emu->port + GPIO);
342 spin_unlock_irqrestore(&emu->emu_lock, flags);
343}
344
345static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
346{
347 kfree(runtime->private_data);
348}
349
350static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
351{
352 struct emu10k1x_pcm *epcm;
353
354 epcm = voice->epcm;
355 if (!epcm)
356 return;
357 if (epcm->substream == NULL)
358 return;
359#if 0
360 dev_info(emu->card->dev,
361 "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
362 epcm->substream->ops->pointer(epcm->substream),
363 snd_pcm_lib_period_bytes(epcm->substream),
364 snd_pcm_lib_buffer_bytes(epcm->substream));
365#endif
366 snd_pcm_period_elapsed(epcm->substream);
367}
368
369/* open callback */
370static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
371{
372 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
373 struct emu10k1x_pcm *epcm;
374 struct snd_pcm_runtime *runtime = substream->runtime;
375 int err;
376
377 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
378 if (err < 0)
379 return err;
380 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
381 if (err < 0)
382 return err;
383
384 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
385 if (epcm == NULL)
386 return -ENOMEM;
387 epcm->emu = chip;
388 epcm->substream = substream;
389
390 runtime->private_data = epcm;
391 runtime->private_free = snd_emu10k1x_pcm_free_substream;
392
393 runtime->hw = snd_emu10k1x_playback_hw;
394
395 return 0;
396}
397
398/* close callback */
399static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
400{
401 return 0;
402}
403
404/* hw_params callback */
405static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
406 struct snd_pcm_hw_params *hw_params)
407{
408 struct snd_pcm_runtime *runtime = substream->runtime;
409 struct emu10k1x_pcm *epcm = runtime->private_data;
410
411 if (! epcm->voice) {
412 epcm->voice = &epcm->emu->voices[substream->pcm->device];
413 epcm->voice->use = 1;
414 epcm->voice->epcm = epcm;
415 }
416
417 return 0;
418}
419
420/* hw_free callback */
421static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
422{
423 struct snd_pcm_runtime *runtime = substream->runtime;
424 struct emu10k1x_pcm *epcm;
425
426 if (runtime->private_data == NULL)
427 return 0;
428
429 epcm = runtime->private_data;
430
431 if (epcm->voice) {
432 epcm->voice->use = 0;
433 epcm->voice->epcm = NULL;
434 epcm->voice = NULL;
435 }
436
437 return 0;
438}
439
440/* prepare callback */
441static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
442{
443 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
444 struct snd_pcm_runtime *runtime = substream->runtime;
445 struct emu10k1x_pcm *epcm = runtime->private_data;
446 int voice = epcm->voice->number;
447 u32 *table_base = (u32 *)(emu->dma_buffer->area+1024*voice);
448 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
449 int i;
450
451 for(i = 0; i < runtime->periods; i++) {
452 *table_base++=runtime->dma_addr+(i*period_size_bytes);
453 *table_base++=period_size_bytes<<16;
454 }
455
456 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer->addr+1024*voice);
457 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
458 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
459 snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
460 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
461 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
462 snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
463
464 snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
465
466 return 0;
467}
468
469/* trigger callback */
470static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
471 int cmd)
472{
473 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
474 struct snd_pcm_runtime *runtime = substream->runtime;
475 struct emu10k1x_pcm *epcm = runtime->private_data;
476 int channel = epcm->voice->number;
477 int result = 0;
478
479 /*
480 dev_dbg(emu->card->dev,
481 "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n",
482 (int)emu, cmd, (int)substream->ops->pointer(substream));
483 */
484
485 switch (cmd) {
486 case SNDRV_PCM_TRIGGER_START:
487 if(runtime->periods == 2)
488 snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
489 else
490 snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
491 epcm->running = 1;
492 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
493 break;
494 case SNDRV_PCM_TRIGGER_STOP:
495 epcm->running = 0;
496 snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
497 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
498 break;
499 default:
500 result = -EINVAL;
501 break;
502 }
503 return result;
504}
505
506/* pointer callback */
507static snd_pcm_uframes_t
508snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
509{
510 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
511 struct snd_pcm_runtime *runtime = substream->runtime;
512 struct emu10k1x_pcm *epcm = runtime->private_data;
513 int channel = epcm->voice->number;
514 snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
515
516 if (!epcm->running)
517 return 0;
518
519 ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
520 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
521 ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
522
523 if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
524 return 0;
525
526 if (ptr3 != ptr4)
527 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
528 ptr2 = bytes_to_frames(runtime, ptr1);
529 ptr2 += (ptr4 >> 3) * runtime->period_size;
530 ptr = ptr2;
531
532 if (ptr >= runtime->buffer_size)
533 ptr -= runtime->buffer_size;
534
535 return ptr;
536}
537
538/* operators */
539static const struct snd_pcm_ops snd_emu10k1x_playback_ops = {
540 .open = snd_emu10k1x_playback_open,
541 .close = snd_emu10k1x_playback_close,
542 .hw_params = snd_emu10k1x_pcm_hw_params,
543 .hw_free = snd_emu10k1x_pcm_hw_free,
544 .prepare = snd_emu10k1x_pcm_prepare,
545 .trigger = snd_emu10k1x_pcm_trigger,
546 .pointer = snd_emu10k1x_pcm_pointer,
547};
548
549/* open_capture callback */
550static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
551{
552 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
553 struct emu10k1x_pcm *epcm;
554 struct snd_pcm_runtime *runtime = substream->runtime;
555 int err;
556
557 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
558 if (err < 0)
559 return err;
560 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
561 if (err < 0)
562 return err;
563
564 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
565 if (epcm == NULL)
566 return -ENOMEM;
567
568 epcm->emu = chip;
569 epcm->substream = substream;
570
571 runtime->private_data = epcm;
572 runtime->private_free = snd_emu10k1x_pcm_free_substream;
573
574 runtime->hw = snd_emu10k1x_capture_hw;
575
576 return 0;
577}
578
579/* close callback */
580static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
581{
582 return 0;
583}
584
585/* hw_params callback */
586static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
587 struct snd_pcm_hw_params *hw_params)
588{
589 struct snd_pcm_runtime *runtime = substream->runtime;
590 struct emu10k1x_pcm *epcm = runtime->private_data;
591
592 if (! epcm->voice) {
593 if (epcm->emu->capture_voice.use)
594 return -EBUSY;
595 epcm->voice = &epcm->emu->capture_voice;
596 epcm->voice->epcm = epcm;
597 epcm->voice->use = 1;
598 }
599
600 return 0;
601}
602
603/* hw_free callback */
604static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
605{
606 struct snd_pcm_runtime *runtime = substream->runtime;
607
608 struct emu10k1x_pcm *epcm;
609
610 if (runtime->private_data == NULL)
611 return 0;
612 epcm = runtime->private_data;
613
614 if (epcm->voice) {
615 epcm->voice->use = 0;
616 epcm->voice->epcm = NULL;
617 epcm->voice = NULL;
618 }
619
620 return 0;
621}
622
623/* prepare capture callback */
624static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
625{
626 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
627 struct snd_pcm_runtime *runtime = substream->runtime;
628
629 snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
630 snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
631 snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
632 snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
633
634 return 0;
635}
636
637/* trigger_capture callback */
638static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
639 int cmd)
640{
641 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
642 struct snd_pcm_runtime *runtime = substream->runtime;
643 struct emu10k1x_pcm *epcm = runtime->private_data;
644 int result = 0;
645
646 switch (cmd) {
647 case SNDRV_PCM_TRIGGER_START:
648 snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
649 INTE_CAP_0_HALF_LOOP);
650 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
651 epcm->running = 1;
652 break;
653 case SNDRV_PCM_TRIGGER_STOP:
654 epcm->running = 0;
655 snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
656 INTE_CAP_0_HALF_LOOP);
657 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
658 break;
659 default:
660 result = -EINVAL;
661 break;
662 }
663 return result;
664}
665
666/* pointer_capture callback */
667static snd_pcm_uframes_t
668snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
669{
670 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
671 struct snd_pcm_runtime *runtime = substream->runtime;
672 struct emu10k1x_pcm *epcm = runtime->private_data;
673 snd_pcm_uframes_t ptr;
674
675 if (!epcm->running)
676 return 0;
677
678 ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
679 if (ptr >= runtime->buffer_size)
680 ptr -= runtime->buffer_size;
681
682 return ptr;
683}
684
685static const struct snd_pcm_ops snd_emu10k1x_capture_ops = {
686 .open = snd_emu10k1x_pcm_open_capture,
687 .close = snd_emu10k1x_pcm_close_capture,
688 .hw_params = snd_emu10k1x_pcm_hw_params_capture,
689 .hw_free = snd_emu10k1x_pcm_hw_free_capture,
690 .prepare = snd_emu10k1x_pcm_prepare_capture,
691 .trigger = snd_emu10k1x_pcm_trigger_capture,
692 .pointer = snd_emu10k1x_pcm_pointer_capture,
693};
694
695static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
696 unsigned short reg)
697{
698 struct emu10k1x *emu = ac97->private_data;
699 unsigned long flags;
700 unsigned short val;
701
702 spin_lock_irqsave(&emu->emu_lock, flags);
703 outb(reg, emu->port + AC97ADDRESS);
704 val = inw(emu->port + AC97DATA);
705 spin_unlock_irqrestore(&emu->emu_lock, flags);
706 return val;
707}
708
709static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
710 unsigned short reg, unsigned short val)
711{
712 struct emu10k1x *emu = ac97->private_data;
713 unsigned long flags;
714
715 spin_lock_irqsave(&emu->emu_lock, flags);
716 outb(reg, emu->port + AC97ADDRESS);
717 outw(val, emu->port + AC97DATA);
718 spin_unlock_irqrestore(&emu->emu_lock, flags);
719}
720
721static int snd_emu10k1x_ac97(struct emu10k1x *chip)
722{
723 struct snd_ac97_bus *pbus;
724 struct snd_ac97_template ac97;
725 int err;
726 static const struct snd_ac97_bus_ops ops = {
727 .write = snd_emu10k1x_ac97_write,
728 .read = snd_emu10k1x_ac97_read,
729 };
730
731 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
732 if (err < 0)
733 return err;
734 pbus->no_vra = 1; /* we don't need VRA */
735
736 memset(&ac97, 0, sizeof(ac97));
737 ac97.private_data = chip;
738 ac97.scaps = AC97_SCAP_NO_SPDIF;
739 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
740}
741
742static void snd_emu10k1x_free(struct snd_card *card)
743{
744 struct emu10k1x *chip = card->private_data;
745
746 snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
747 // disable interrupts
748 outl(0, chip->port + INTE);
749 // disable audio
750 outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
751}
752
753static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
754{
755 unsigned int status;
756
757 struct emu10k1x *chip = dev_id;
758 struct emu10k1x_voice *pvoice = chip->voices;
759 int i;
760 int mask;
761
762 status = inl(chip->port + IPR);
763
764 if (! status)
765 return IRQ_NONE;
766
767 // capture interrupt
768 if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
769 struct emu10k1x_voice *cap_voice = &chip->capture_voice;
770 if (cap_voice->use)
771 snd_emu10k1x_pcm_interrupt(chip, cap_voice);
772 else
773 snd_emu10k1x_intr_disable(chip,
774 INTE_CAP_0_LOOP |
775 INTE_CAP_0_HALF_LOOP);
776 }
777
778 mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
779 for (i = 0; i < 3; i++) {
780 if (status & mask) {
781 if (pvoice->use)
782 snd_emu10k1x_pcm_interrupt(chip, pvoice);
783 else
784 snd_emu10k1x_intr_disable(chip, mask);
785 }
786 pvoice++;
787 mask <<= 1;
788 }
789
790 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
791 if (chip->midi.interrupt)
792 chip->midi.interrupt(chip, status);
793 else
794 snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
795 }
796
797 // acknowledge the interrupt if necessary
798 outl(status, chip->port + IPR);
799
800 /* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */
801 return IRQ_HANDLED;
802}
803
804static const struct snd_pcm_chmap_elem surround_map[] = {
805 { .channels = 2,
806 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
807 {0}
808};
809
810static const struct snd_pcm_chmap_elem clfe_map[] = {
811 { .channels = 2,
812 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
813 {0}
814};
815
816static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device)
817{
818 struct snd_pcm *pcm;
819 const struct snd_pcm_chmap_elem *map = NULL;
820 int err;
821 int capture = 0;
822
823 if (device == 0)
824 capture = 1;
825
826 err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm);
827 if (err < 0)
828 return err;
829
830 pcm->private_data = emu;
831
832 switch(device) {
833 case 0:
834 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
835 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
836 break;
837 case 1:
838 case 2:
839 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
840 break;
841 }
842
843 pcm->info_flags = 0;
844 switch(device) {
845 case 0:
846 strcpy(pcm->name, "EMU10K1X Front");
847 map = snd_pcm_std_chmaps;
848 break;
849 case 1:
850 strcpy(pcm->name, "EMU10K1X Rear");
851 map = surround_map;
852 break;
853 case 2:
854 strcpy(pcm->name, "EMU10K1X Center/LFE");
855 map = clfe_map;
856 break;
857 }
858 emu->pcm = pcm;
859
860 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
861 &emu->pci->dev, 32*1024, 32*1024);
862
863 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
864 1 << 2, NULL);
865}
866
867static int snd_emu10k1x_create(struct snd_card *card,
868 struct pci_dev *pci)
869{
870 struct emu10k1x *chip = card->private_data;
871 int err;
872 int ch;
873
874 err = pcim_enable_device(pci);
875 if (err < 0)
876 return err;
877
878 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28)) < 0) {
879 dev_err(card->dev, "error to set 28bit mask DMA\n");
880 return -ENXIO;
881 }
882
883 chip->card = card;
884 chip->pci = pci;
885 chip->irq = -1;
886
887 spin_lock_init(&chip->emu_lock);
888 spin_lock_init(&chip->voice_lock);
889
890 err = pci_request_regions(pci, "EMU10K1X");
891 if (err < 0)
892 return err;
893 chip->port = pci_resource_start(pci, 0);
894
895 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1x_interrupt,
896 IRQF_SHARED, KBUILD_MODNAME, chip)) {
897 dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
898 return -EBUSY;
899 }
900 chip->irq = pci->irq;
901 card->sync_irq = chip->irq;
902 card->private_free = snd_emu10k1x_free;
903
904 chip->dma_buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV,
905 4 * 1024);
906 if (!chip->dma_buffer)
907 return -ENOMEM;
908
909 pci_set_master(pci);
910 /* read revision & serial */
911#ifndef TARGET_OS2
912 chip->revision = pci->revision;
913#else
914 chip->revision = snd_pci_revision(pci);
915#endif
916 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
917 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
918 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model,
919 chip->revision, chip->serial);
920
921 outl(0, chip->port + INTE);
922
923 for(ch = 0; ch < 3; ch++) {
924 chip->voices[ch].emu = chip;
925 chip->voices[ch].number = ch;
926 }
927
928 /*
929 * Init to 0x02109204 :
930 * Clock accuracy = 0 (1000ppm)
931 * Sample Rate = 2 (48kHz)
932 * Audio Channel = 1 (Left of 2)
933 * Source Number = 0 (Unspecified)
934 * Generation Status = 1 (Original for Cat Code 12)
935 * Cat Code = 12 (Digital Signal Mixer)
936 * Mode = 0 (Mode 0)
937 * Emphasis = 0 (None)
938 * CP = 1 (Copyright unasserted)
939 * AN = 0 (Audio data)
940 * P = 0 (Consumer)
941 */
942 snd_emu10k1x_ptr_write(chip, SPCS0, 0,
943 chip->spdif_bits[0] =
944 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
945 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
946 SPCS_GENERATIONSTATUS | 0x00001200 |
947 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
948 snd_emu10k1x_ptr_write(chip, SPCS1, 0,
949 chip->spdif_bits[1] =
950 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
951 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
952 SPCS_GENERATIONSTATUS | 0x00001200 |
953 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
954 snd_emu10k1x_ptr_write(chip, SPCS2, 0,
955 chip->spdif_bits[2] =
956 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
957 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
958 SPCS_GENERATIONSTATUS | 0x00001200 |
959 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
960
961 snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
962 snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
963 snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
964
965 outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
966
967 return 0;
968}
969
970static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
971 struct snd_info_buffer *buffer)
972{
973 struct emu10k1x *emu = entry->private_data;
974 unsigned long value,value1,value2;
975 unsigned long flags;
976 int i;
977
978 snd_iprintf(buffer, "Registers:\n\n");
979 for(i = 0; i < 0x20; i+=4) {
980 spin_lock_irqsave(&emu->emu_lock, flags);
981 value = inl(emu->port + i);
982 spin_unlock_irqrestore(&emu->emu_lock, flags);
983 snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
984 }
985 snd_iprintf(buffer, "\nRegisters\n\n");
986 for(i = 0; i <= 0x48; i++) {
987 value = snd_emu10k1x_ptr_read(emu, i, 0);
988 if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
989 value1 = snd_emu10k1x_ptr_read(emu, i, 1);
990 value2 = snd_emu10k1x_ptr_read(emu, i, 2);
991 snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
992 } else {
993 snd_iprintf(buffer, "%02X: %08lX\n", i, value);
994 }
995 }
996}
997
998static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
999 struct snd_info_buffer *buffer)
1000{
1001 struct emu10k1x *emu = entry->private_data;
1002 char line[64];
1003 unsigned int reg, channel_id , val;
1004
1005 while (!snd_info_get_line(buffer, line, sizeof(line))) {
1006 if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
1007 continue;
1008
1009 if (reg < 0x49 && channel_id <= 2)
1010 snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
1011 }
1012}
1013
1014static int snd_emu10k1x_proc_init(struct emu10k1x *emu)
1015{
1016 snd_card_rw_proc_new(emu->card, "emu10k1x_regs", emu,
1017 snd_emu10k1x_proc_reg_read,
1018 snd_emu10k1x_proc_reg_write);
1019 return 0;
1020}
1021
1022#define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
1023
1024static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1028
1029 ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
1030
1031 return 0;
1032}
1033
1034static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
1035 struct snd_ctl_elem_value *ucontrol)
1036{
1037 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1038 unsigned int val;
1039
1040 val = ucontrol->value.integer.value[0] ;
1041
1042 if (val) {
1043 // enable spdif output
1044 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
1045 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
1046 snd_emu10k1x_gpio_write(emu, 0x1000);
1047 } else {
1048 // disable spdif output
1049 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
1050 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
1051 snd_emu10k1x_gpio_write(emu, 0x1080);
1052 }
1053 return 0;
1054}
1055
1056static const struct snd_kcontrol_new snd_emu10k1x_shared_spdif =
1057{
1058 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1059 .name = "Analog/Digital Output Jack",
1060 .info = snd_emu10k1x_shared_spdif_info,
1061 .get = snd_emu10k1x_shared_spdif_get,
1062 .put = snd_emu10k1x_shared_spdif_put
1063};
1064
1065static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1066{
1067 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1068 uinfo->count = 1;
1069 return 0;
1070}
1071
1072static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1076 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1077
1078 ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
1079 ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
1080 ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
1081 ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
1082 return 0;
1083}
1084
1085static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
1086 struct snd_ctl_elem_value *ucontrol)
1087{
1088 ucontrol->value.iec958.status[0] = 0xff;
1089 ucontrol->value.iec958.status[1] = 0xff;
1090 ucontrol->value.iec958.status[2] = 0xff;
1091 ucontrol->value.iec958.status[3] = 0xff;
1092 return 0;
1093}
1094
1095static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
1096 struct snd_ctl_elem_value *ucontrol)
1097{
1098 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1099 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1100 int change;
1101 unsigned int val;
1102
1103 val = (ucontrol->value.iec958.status[0] << 0) |
1104 (ucontrol->value.iec958.status[1] << 8) |
1105 (ucontrol->value.iec958.status[2] << 16) |
1106 (ucontrol->value.iec958.status[3] << 24);
1107 change = val != emu->spdif_bits[idx];
1108 if (change) {
1109 snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
1110 emu->spdif_bits[idx] = val;
1111 }
1112 return change;
1113}
1114
1115static const struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
1116{
1117 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1118 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1119 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1120 .count = 3,
1121 .info = snd_emu10k1x_spdif_info,
1122 .get = snd_emu10k1x_spdif_get_mask
1123};
1124
1125static const struct snd_kcontrol_new snd_emu10k1x_spdif_control =
1126{
1127 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1128 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1129 .count = 3,
1130 .info = snd_emu10k1x_spdif_info,
1131 .get = snd_emu10k1x_spdif_get,
1132 .put = snd_emu10k1x_spdif_put
1133};
1134
1135static int snd_emu10k1x_mixer(struct emu10k1x *emu)
1136{
1137 int err;
1138 struct snd_kcontrol *kctl;
1139 struct snd_card *card = emu->card;
1140
1141 kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu);
1142 if (!kctl)
1143 return -ENOMEM;
1144 err = snd_ctl_add(card, kctl);
1145 if (err)
1146 return err;
1147 kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu);
1148 if (!kctl)
1149 return -ENOMEM;
1150 err = snd_ctl_add(card, kctl);
1151 if (err)
1152 return err;
1153 kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu);
1154 if (!kctl)
1155 return -ENOMEM;
1156 err = snd_ctl_add(card, kctl);
1157 if (err)
1158 return err;
1159
1160 return 0;
1161}
1162
1163#define EMU10K1X_MIDI_MODE_INPUT (1<<0)
1164#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
1165
1166static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
1167{
1168 return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
1169}
1170
1171static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
1172{
1173 snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
1174}
1175
1176#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
1177#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
1178#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
1179#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
1180
1181#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
1182#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
1183
1184#define MPU401_RESET 0xff
1185#define MPU401_ENTER_UART 0x3f
1186#define MPU401_ACK 0xfe
1187
1188static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
1189{
1190 int timeout = 100000;
1191 for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
1192 mpu401_read_data(emu, mpu);
1193#ifdef CONFIG_SND_DEBUG
1194 if (timeout <= 0)
1195 dev_err(emu->card->dev,
1196 "cmd: clear rx timeout (status = 0x%x)\n",
1197 mpu401_read_stat(emu, mpu));
1198#endif
1199}
1200
1201/*
1202
1203 */
1204
1205static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
1206 struct emu10k1x_midi *midi, unsigned int status)
1207{
1208 unsigned char byte;
1209
1210 if (midi->rmidi == NULL) {
1211 snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
1212 return;
1213 }
1214
1215 spin_lock(&midi->input_lock);
1216 if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
1217 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1218 mpu401_clear_rx(emu, midi);
1219 } else {
1220 byte = mpu401_read_data(emu, midi);
1221 if (midi->substream_input)
1222 snd_rawmidi_receive(midi->substream_input, &byte, 1);
1223 }
1224 }
1225 spin_unlock(&midi->input_lock);
1226
1227 spin_lock(&midi->output_lock);
1228 if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
1229 if (midi->substream_output &&
1230 snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
1231 mpu401_write_data(emu, midi, byte);
1232 } else {
1233 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1234 }
1235 }
1236 spin_unlock(&midi->output_lock);
1237}
1238
1239static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
1240{
1241 do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
1242}
1243
1244static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
1245 struct emu10k1x_midi *midi, unsigned char cmd, int ack)
1246{
1247 unsigned long flags;
1248 int timeout, ok;
1249
1250 spin_lock_irqsave(&midi->input_lock, flags);
1251 mpu401_write_data(emu, midi, 0x00);
1252 /* mpu401_clear_rx(emu, midi); */
1253
1254 mpu401_write_cmd(emu, midi, cmd);
1255 if (ack) {
1256 ok = 0;
1257 timeout = 10000;
1258 while (!ok && timeout-- > 0) {
1259 if (mpu401_input_avail(emu, midi)) {
1260 if (mpu401_read_data(emu, midi) == MPU401_ACK)
1261 ok = 1;
1262 }
1263 }
1264 if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
1265 ok = 1;
1266 } else {
1267 ok = 1;
1268 }
1269 spin_unlock_irqrestore(&midi->input_lock, flags);
1270 if (!ok) {
1271 dev_err(emu->card->dev,
1272 "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
1273 cmd, emu->port,
1274 mpu401_read_stat(emu, midi),
1275 mpu401_read_data(emu, midi));
1276 return 1;
1277 }
1278 return 0;
1279}
1280
1281static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
1282{
1283 struct emu10k1x *emu;
1284 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1285 unsigned long flags;
1286
1287 emu = midi->emu;
1288 if (snd_BUG_ON(!emu))
1289 return -ENXIO;
1290 spin_lock_irqsave(&midi->open_lock, flags);
1291 midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
1292 midi->substream_input = substream;
1293 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1294 spin_unlock_irqrestore(&midi->open_lock, flags);
1295 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1296 goto error_out;
1297 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1298 goto error_out;
1299 } else {
1300 spin_unlock_irqrestore(&midi->open_lock, flags);
1301 }
1302 return 0;
1303
1304error_out:
1305 return -EIO;
1306}
1307
1308static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
1309{
1310 struct emu10k1x *emu;
1311 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1312 unsigned long flags;
1313
1314 emu = midi->emu;
1315 if (snd_BUG_ON(!emu))
1316 return -ENXIO;
1317 spin_lock_irqsave(&midi->open_lock, flags);
1318 midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
1319 midi->substream_output = substream;
1320 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1321 spin_unlock_irqrestore(&midi->open_lock, flags);
1322 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1323 goto error_out;
1324 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1325 goto error_out;
1326 } else {
1327 spin_unlock_irqrestore(&midi->open_lock, flags);
1328 }
1329 return 0;
1330
1331error_out:
1332 return -EIO;
1333}
1334
1335static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
1336{
1337 struct emu10k1x *emu;
1338 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1339 unsigned long flags;
1340 int err = 0;
1341
1342 emu = midi->emu;
1343 if (snd_BUG_ON(!emu))
1344 return -ENXIO;
1345 spin_lock_irqsave(&midi->open_lock, flags);
1346 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1347 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
1348 midi->substream_input = NULL;
1349 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1350 spin_unlock_irqrestore(&midi->open_lock, flags);
1351 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1352 } else {
1353 spin_unlock_irqrestore(&midi->open_lock, flags);
1354 }
1355 return err;
1356}
1357
1358static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
1359{
1360 struct emu10k1x *emu;
1361 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1362 unsigned long flags;
1363 int err = 0;
1364
1365 emu = midi->emu;
1366 if (snd_BUG_ON(!emu))
1367 return -ENXIO;
1368 spin_lock_irqsave(&midi->open_lock, flags);
1369 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1370 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
1371 midi->substream_output = NULL;
1372 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1373 spin_unlock_irqrestore(&midi->open_lock, flags);
1374 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1375 } else {
1376 spin_unlock_irqrestore(&midi->open_lock, flags);
1377 }
1378 return err;
1379}
1380
1381static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1382{
1383 struct emu10k1x *emu;
1384 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1385 emu = midi->emu;
1386 if (snd_BUG_ON(!emu))
1387 return;
1388
1389 if (up)
1390 snd_emu10k1x_intr_enable(emu, midi->rx_enable);
1391 else
1392 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1393}
1394
1395static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1396{
1397 struct emu10k1x *emu;
1398 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1399 unsigned long flags;
1400
1401 emu = midi->emu;
1402 if (snd_BUG_ON(!emu))
1403 return;
1404
1405 if (up) {
1406 int max = 4;
1407 unsigned char byte;
1408
1409 /* try to send some amount of bytes here before interrupts */
1410 spin_lock_irqsave(&midi->output_lock, flags);
1411 while (max > 0) {
1412 if (mpu401_output_ready(emu, midi)) {
1413 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
1414 snd_rawmidi_transmit(substream, &byte, 1) != 1) {
1415 /* no more data */
1416 spin_unlock_irqrestore(&midi->output_lock, flags);
1417 return;
1418 }
1419 mpu401_write_data(emu, midi, byte);
1420 max--;
1421 } else {
1422 break;
1423 }
1424 }
1425 spin_unlock_irqrestore(&midi->output_lock, flags);
1426 snd_emu10k1x_intr_enable(emu, midi->tx_enable);
1427 } else {
1428 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1429 }
1430}
1431
1432/*
1433
1434 */
1435
1436static const struct snd_rawmidi_ops snd_emu10k1x_midi_output =
1437{
1438 .open = snd_emu10k1x_midi_output_open,
1439 .close = snd_emu10k1x_midi_output_close,
1440 .trigger = snd_emu10k1x_midi_output_trigger,
1441};
1442
1443static const struct snd_rawmidi_ops snd_emu10k1x_midi_input =
1444{
1445 .open = snd_emu10k1x_midi_input_open,
1446 .close = snd_emu10k1x_midi_input_close,
1447 .trigger = snd_emu10k1x_midi_input_trigger,
1448};
1449
1450static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
1451{
1452 struct emu10k1x_midi *midi = rmidi->private_data;
1453 midi->interrupt = NULL;
1454 midi->rmidi = NULL;
1455}
1456
1457static int emu10k1x_midi_init(struct emu10k1x *emu,
1458 struct emu10k1x_midi *midi, int device,
1459 char *name)
1460{
1461 struct snd_rawmidi *rmidi;
1462 int err;
1463
1464 err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi);
1465 if (err < 0)
1466 return err;
1467 midi->emu = emu;
1468 spin_lock_init(&midi->open_lock);
1469 spin_lock_init(&midi->input_lock);
1470 spin_lock_init(&midi->output_lock);
1471 strcpy(rmidi->name, name);
1472 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
1473 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
1474 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1475 SNDRV_RAWMIDI_INFO_INPUT |
1476 SNDRV_RAWMIDI_INFO_DUPLEX;
1477 rmidi->private_data = midi;
1478 rmidi->private_free = snd_emu10k1x_midi_free;
1479 midi->rmidi = rmidi;
1480 return 0;
1481}
1482
1483static int snd_emu10k1x_midi(struct emu10k1x *emu)
1484{
1485 struct emu10k1x_midi *midi = &emu->midi;
1486 int err;
1487
1488 err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)");
1489 if (err < 0)
1490 return err;
1491
1492 midi->tx_enable = INTE_MIDITXENABLE;
1493 midi->rx_enable = INTE_MIDIRXENABLE;
1494 midi->port = MUDATA;
1495 midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
1496 midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
1497 midi->interrupt = snd_emu10k1x_midi_interrupt;
1498 return 0;
1499}
1500
1501static int __snd_emu10k1x_probe(struct pci_dev *pci,
1502 const struct pci_device_id *pci_id)
1503{
1504 static int dev;
1505 struct snd_card *card;
1506 struct emu10k1x *chip;
1507 int err;
1508
1509 if (dev >= SNDRV_CARDS)
1510 return -ENODEV;
1511 if (!enable[dev]) {
1512 dev++;
1513 return -ENOENT;
1514 }
1515
1516 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1517 sizeof(*chip), &card);
1518 if (err < 0)
1519 return err;
1520 chip = card->private_data;
1521
1522 err = snd_emu10k1x_create(card, pci);
1523 if (err < 0)
1524 return err;
1525
1526 err = snd_emu10k1x_pcm(chip, 0);
1527 if (err < 0)
1528 return err;
1529 err = snd_emu10k1x_pcm(chip, 1);
1530 if (err < 0)
1531 return err;
1532 err = snd_emu10k1x_pcm(chip, 2);
1533 if (err < 0)
1534 return err;
1535
1536 err = snd_emu10k1x_ac97(chip);
1537 if (err < 0)
1538 return err;
1539
1540 err = snd_emu10k1x_mixer(chip);
1541 if (err < 0)
1542 return err;
1543
1544 err = snd_emu10k1x_midi(chip);
1545 if (err < 0)
1546 return err;
1547
1548 snd_emu10k1x_proc_init(chip);
1549
1550 strcpy(card->driver, "EMU10K1X");
1551 strcpy(card->shortname, "Dell Sound Blaster Live!");
1552 sprintf(card->longname, "%s at 0x%lx irq %i",
1553 card->shortname, chip->port, chip->irq);
1554
1555 err = snd_card_register(card);
1556 if (err < 0)
1557 return err;
1558
1559 pci_set_drvdata(pci, card);
1560 dev++;
1561 return 0;
1562}
1563
1564static int snd_emu10k1x_probe(struct pci_dev *pci,
1565 const struct pci_device_id *pci_id)
1566{
1567 return snd_card_free_on_error(&pci->dev, __snd_emu10k1x_probe(pci, pci_id));
1568}
1569
1570// PCI IDs
1571static const struct pci_device_id snd_emu10k1x_ids[] = {
1572 { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */
1573 { 0, }
1574};
1575MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
1576
1577// pci_driver definition
1578static struct pci_driver emu10k1x_driver = {
1579 .name = KBUILD_MODNAME,
1580 .id_table = snd_emu10k1x_ids,
1581 .probe = snd_emu10k1x_probe,
1582};
1583
1584module_pci_driver(emu10k1x_driver);
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