source: GPL/trunk/alsa-kernel/pci/atiixp.c@ 79

Last change on this file since 79 was 79, checked in by vladest, 19 years ago

ATI fix comitted
File size: 46.3 KB
Line 
1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <asm/io.h>
24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/moduleparam.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
41
42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static int spdif_aclink = 1;
47
48//module_param(index, int, 0444);
49MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
50//module_param(id, charp, 0444);
51MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
52//module_param(ac97_clock, int, 0444);
53MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
54//module_param(ac97_quirk, charp, 0444);
55MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
56//module_param(spdif_aclink, bool, 0444);
57MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
58
59/* just for backward compatibility */
60static int enable;
61//module_param(enable, bool, 0444);
62
63
64/*
65 */
66
67#define ATI_REG_ISR 0x00 /* interrupt source */
68#define ATI_REG_ISR_IN_XRUN (1U<<0)
69#define ATI_REG_ISR_IN_STATUS (1U<<1)
70#define ATI_REG_ISR_OUT_XRUN (1U<<2)
71#define ATI_REG_ISR_OUT_STATUS (1U<<3)
72#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
73#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
74#define ATI_REG_ISR_PHYS_INTR (1U<<8)
75#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
76#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
77#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
78#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
79#define ATI_REG_ISR_NEW_FRAME (1U<<13)
80
81#define ATI_REG_IER 0x04 /* interrupt enable */
82#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
83#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
84#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
85#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
86#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
87#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
88#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
89#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
90#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
91#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
92#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
93#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
94#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
95
96#define ATI_REG_CMD 0x08 /* command */
97#define ATI_REG_CMD_POWERDOWN (1U<<0)
98#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
99#define ATI_REG_CMD_SEND_EN (1U<<2)
100#define ATI_REG_CMD_STATUS_MEM (1U<<3)
101#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
102#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
103#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
104#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
105#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
106#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
107#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
108#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
109#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
110#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
111#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
112#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
114#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
115#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
116#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
117#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
118#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
119#define ATI_REG_CMD_PACKED_DIS (1U<<24)
120#define ATI_REG_CMD_BURST_EN (1U<<25)
121#define ATI_REG_CMD_PANIC_EN (1U<<26)
122#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
123#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
124#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
125#define ATI_REG_CMD_AC_SYNC (1U<<30)
126#define ATI_REG_CMD_AC_RESET (1U<<31)
127
128#define ATI_REG_PHYS_OUT_ADDR 0x0c
129#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
130#define ATI_REG_PHYS_OUT_RW (1U<<2)
131#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
132#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
133#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
134
135#define ATI_REG_PHYS_IN_ADDR 0x10
136#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
137#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
138#define ATI_REG_PHYS_IN_DATA_SHIFT 16
139
140#define ATI_REG_SLOTREQ 0x14
141
142#define ATI_REG_COUNTER 0x18
143#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
144#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
145
146#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
147
148#define ATI_REG_IN_DMA_LINKPTR 0x20
149#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
150#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
151#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
152#define ATI_REG_IN_DMA_DT_SIZE 0x30
153
154#define ATI_REG_OUT_DMA_SLOT 0x34
155#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
156#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
157#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
158#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
159
160#define ATI_REG_OUT_DMA_LINKPTR 0x38
161#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
162#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
163#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
164#define ATI_REG_OUT_DMA_DT_SIZE 0x48
165
166#define ATI_REG_SPDF_CMD 0x4c
167#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
168#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
169#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
170
171#define ATI_REG_SPDF_DMA_LINKPTR 0x50
172#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
173#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
174#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
175#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
176
177#define ATI_REG_MODEM_MIRROR 0x7c
178#define ATI_REG_AUDIO_MIRROR 0x80
179
180#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
181#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
182
183#define ATI_REG_FIFO_FLUSH 0x88
184#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
185#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
186
187/* LINKPTR */
188#define ATI_REG_LINKPTR_EN (1U<<0)
189
190/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
191#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
192#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
193#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
194#define ATI_REG_DMA_STATE (7U<<26)
195
196
197#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
198
199
200struct atiixp;
201
202/*
203 * DMA packate descriptor
204 */
205
206struct atiixp_dma_desc {
207 u32 addr; /* DMA buffer address */
208 u16 status; /* status bits */
209 u16 size; /* size of the packet in dwords */
210 u32 next; /* address of the next packet descriptor */
211};
212
213/*
214 * stream enum
215 */
216enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
217enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
218enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
219
220#define NUM_ATI_CODECS 3
221
222
223/*
224 * constants and callbacks for each DMA type
225 */
226struct atiixp_dma_ops {
227 int type; /* ATI_DMA_XXX */
228 unsigned int llp_offset; /* LINKPTR offset */
229 unsigned int dt_cur; /* DT_CUR offset */
230 /* called from open callback */
231 void (*enable_dma)(struct atiixp *chip, int on);
232 /* called from trigger (START/STOP) */
233 void (*enable_transfer)(struct atiixp *chip, int on);
234 /* called from trigger (STOP only) */
235 void (*flush_dma)(struct atiixp *chip);
236};
237
238/*
239 * DMA stream
240 */
241struct atiixp_dma {
242 const struct atiixp_dma_ops *ops;
243 struct snd_dma_buffer desc_buf;
244 struct snd_pcm_substream *substream; /* assigned PCM substream */
245 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
246 unsigned int period_bytes, periods;
247 int opened;
248 int running;
249 int suspended;
250 int pcm_open_flag;
251 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
252 unsigned int saved_curptr;
253};
254
255/*
256 * ATI IXP chip
257 */
258struct atiixp {
259 struct snd_card *card;
260 struct pci_dev *pci;
261
262 unsigned long addr;
263 void __iomem *remap_addr;
264 int irq;
265
266 struct snd_ac97_bus *ac97_bus;
267 struct snd_ac97 *ac97[NUM_ATI_CODECS];
268
269 spinlock_t reg_lock;
270
271 struct atiixp_dma dmas[NUM_ATI_DMAS];
272 struct ac97_pcm *pcms[NUM_ATI_PCMS];
273 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
274
275 int max_channels; /* max. channels for PCM out */
276
277 unsigned int codec_not_ready_bits; /* for codec detection */
278
279 int spdif_over_aclink; /* passed from the module option */
280 struct semaphore open_mutex; /* playback open mutex */
281};
282
283
284/*
285 */
286static struct pci_device_id snd_atiixp_ids[] = {
287 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
288 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
289 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
290 { 0, }
291};
292
293MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
294
295
296/*
297 * lowlevel functions
298 */
299
300/*
301 * update the bits of the given register.
302 * return 1 if the bits changed.
303 */
304static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
305 unsigned int mask, unsigned int value)
306{
307 void __iomem *addr = (char*)chip->remap_addr + reg;
308 unsigned int data, old_data;
309 old_data = data = readl(addr);
310 data &= ~mask;
311 data |= value;
312 if (old_data == data)
313 return 0;
314 writel(data, addr);
315 return 1;
316}
317
318/*
319 * macros for easy use
320 */
321#define atiixp_write(chip,reg,value) \
322 writel(value, (char*)chip->remap_addr + ATI_REG_##reg)
323#define atiixp_read(chip,reg) \
324 readl((char*)chip->remap_addr + ATI_REG_##reg)
325#define atiixp_update(chip,reg,mask,val) \
326 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
327
328/*
329 * handling DMA packets
330 *
331 * we allocate a linear buffer for the DMA, and split it to each packet.
332 * in a future version, a scatter-gather buffer should be implemented.
333 */
334
335#define ATI_DESC_LIST_SIZE \
336 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
337
338/*
339 * build packets ring for the given buffer size.
340 *
341 * IXP handles the buffer descriptors, which are connected as a linked
342 * list. although we can change the list dynamically, in this version,
343 * a static RING of buffer descriptors is used.
344 *
345 * the ring is built in this function, and is set up to the hardware.
346 */
347static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
348 struct snd_pcm_substream *substream,
349 unsigned int periods,
350 unsigned int period_bytes)
351{
352 unsigned int i;
353 u32 addr, desc_addr;
354 unsigned long flags;
355
356 if (periods > ATI_MAX_DESCRIPTORS)
357 return -ENOMEM;
358
359 if (dma->desc_buf.area == NULL) {
360 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
361 snd_dma_pci_data(chip->pci),
362 ATI_DESC_LIST_SIZE,
363 &dma->desc_buf) < 0)
364 return -ENOMEM;
365 dma->period_bytes = dma->periods = 0; /* clear */
366 }
367
368 /* reset DMA before changing the descriptor table */
369 spin_lock_irqsave(&chip->reg_lock, flags);
370 writel(0, (char*)chip->remap_addr + dma->ops->llp_offset);
371 dma->ops->enable_dma(chip, 0);
372 dma->ops->enable_dma(chip, 1);
373 spin_unlock_irqrestore(&chip->reg_lock, flags);
374
375 if (dma->periods == periods && dma->period_bytes == period_bytes)
376 {
377 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
378 (char*)chip->remap_addr + dma->ops->llp_offset);
379 return 0;
380 }
381
382 /* fill the entries */
383 addr = (u32)substream->runtime->dma_addr;
384 desc_addr = (u32)dma->desc_buf.addr;
385 for (i = 0; i < periods; i++) {
386 struct atiixp_dma_desc *desc;
387 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
388 desc->addr = cpu_to_le32(addr);
389 desc->status = 0;
390 desc->size = period_bytes >> 2; /* in dwords */
391 desc_addr += sizeof(struct atiixp_dma_desc);
392 if (i == periods - 1)
393 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
394 else
395 desc->next = cpu_to_le32(desc_addr);
396 addr += period_bytes;
397 }
398
399 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
400 (char*)chip->remap_addr + dma->ops->llp_offset);
401
402 dma->period_bytes = period_bytes;
403 dma->periods = periods;
404
405 return 0;
406}
407
408/*
409 * remove the ring buffer and release it if assigned
410 */
411static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
412 struct snd_pcm_substream *substream)
413{
414 if (dma->desc_buf.area) {
415 writel(0, (char*)chip->remap_addr + dma->ops->llp_offset);
416 snd_dma_free_pages(&dma->desc_buf);
417 dma->desc_buf.area = NULL;
418 }
419}
420
421/*
422 * AC97 interface
423 */
424static int snd_atiixp_acquire_codec(struct atiixp *chip)
425{
426 int timeout = 1000;
427
428 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
429 if (! timeout--) {
430 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
431 return -EBUSY;
432 }
433 udelay(1);
434 }
435 return 0;
436}
437
438static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
439{
440 unsigned int data;
441 int timeout;
442
443 if (snd_atiixp_acquire_codec(chip) < 0)
444 return 0xffff;
445 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
446 ATI_REG_PHYS_OUT_ADDR_EN |
447 ATI_REG_PHYS_OUT_RW |
448 codec;
449 atiixp_write(chip, PHYS_OUT_ADDR, data);
450 if (snd_atiixp_acquire_codec(chip) < 0)
451 return 0xffff;
452 timeout = 1000;
453 do {
454 data = atiixp_read(chip, PHYS_IN_ADDR);
455 if (data & ATI_REG_PHYS_IN_READ_FLAG)
456 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
457 udelay(1);
458 } while (--timeout);
459 /* time out may happen during reset */
460 if (reg < 0x7c)
461 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
462 return 0xffff;
463}
464
465
466static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
467 unsigned short reg, unsigned short val)
468{
469 unsigned int data;
470
471 if (snd_atiixp_acquire_codec(chip) < 0)
472 return;
473 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
474 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
475 ATI_REG_PHYS_OUT_ADDR_EN | codec;
476 atiixp_write(chip, PHYS_OUT_ADDR, data);
477}
478
479
480static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
481 unsigned short reg)
482{
483 struct atiixp *chip = ac97->private_data;
484 return snd_atiixp_codec_read(chip, ac97->num, reg);
485
486}
487
488static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
489 unsigned short val)
490{
491 struct atiixp *chip = ac97->private_data;
492 snd_atiixp_codec_write(chip, ac97->num, reg, val);
493}
494
495/*
496 * reset AC link
497 */
498static int snd_atiixp_aclink_reset(struct atiixp *chip)
499{
500 int timeout;
501
502 /* reset powerdoewn */
503 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
504 udelay(10);
505
506 /* perform a software reset */
507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
508 atiixp_read(chip, CMD);
509 udelay(10);
510 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
511
512 timeout = 10;
513 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
514 /* do a hard reset */
515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
516 ATI_REG_CMD_AC_SYNC);
517 atiixp_read(chip, CMD);
518 mdelay(1);
519 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
520 if (--timeout) {
521 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
522 break;
523 }
524 }
525
526 /* deassert RESET and assert SYNC to make sure */
527 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
528 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
529
530 return 0;
531}
532
533#ifdef CONFIG_PM
534static int snd_atiixp_aclink_down(struct atiixp *chip)
535{
536 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
537 // return -EBUSY;
538 atiixp_update(chip, CMD,
539 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
540 ATI_REG_CMD_POWERDOWN);
541 return 0;
542}
543#endif
544
545/*
546 * auto-detection of codecs
547 *
548 * the IXP chip can generate interrupts for the non-existing codecs.
549 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
550 * even if all three codecs are connected.
551 */
552
553#define ALL_CODEC_NOT_READY \
554 (ATI_REG_ISR_CODEC0_NOT_READY |\
555 ATI_REG_ISR_CODEC1_NOT_READY |\
556 ATI_REG_ISR_CODEC2_NOT_READY)
557#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
558
559static int snd_atiixp_codec_detect(struct atiixp *chip)
560{
561 int timeout;
562
563 chip->codec_not_ready_bits = 0;
564 atiixp_write(chip, IER, CODEC_CHECK_BITS);
565 /* wait for the interrupts */
566 timeout = 50;
567 while (timeout-- > 0) {
568 mdelay(1);
569 if (chip->codec_not_ready_bits)
570 break;
571 }
572 atiixp_write(chip, IER, 0); /* disable irqs */
573
574 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
575 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
576 return -ENXIO;
577 }
578 return 0;
579}
580
581
582/*
583 * enable DMA and irqs
584 */
585static int snd_atiixp_chip_start(struct atiixp *chip)
586{
587 unsigned int reg;
588
589 /* set up spdif, enable burst mode */
590 reg = atiixp_read(chip, CMD);
591 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
592 reg |= ATI_REG_CMD_BURST_EN;
593 atiixp_write(chip, CMD, reg);
594
595 reg = atiixp_read(chip, SPDF_CMD);
596 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
597 atiixp_write(chip, SPDF_CMD, reg);
598
599 /* clear all interrupt source */
600 atiixp_write(chip, ISR, 0xffffffff);
601 /* enable irqs */
602 atiixp_write(chip, IER,
603 ATI_REG_IER_IO_STATUS_EN |
604 ATI_REG_IER_IN_XRUN_EN |
605 ATI_REG_IER_OUT_XRUN_EN |
606 ATI_REG_IER_SPDF_XRUN_EN |
607 ATI_REG_IER_SPDF_STATUS_EN);
608 return 0;
609}
610
611
612/*
613 * disable DMA and IRQs
614 */
615static int snd_atiixp_chip_stop(struct atiixp *chip)
616{
617 /* clear interrupt source */
618 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
619 /* disable irqs */
620 atiixp_write(chip, IER, 0);
621 return 0;
622}
623
624
625/*
626 * PCM section
627 */
628
629/*
630 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
631 * position. when SG-buffer is implemented, the offset must be calculated
632 * correctly...
633 */
634static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
635{
636 struct atiixp *chip = snd_pcm_substream_chip(substream);
637 struct snd_pcm_runtime *runtime = substream->runtime;
638 struct atiixp_dma *dma = runtime->private_data;
639 unsigned int curptr;
640 int timeout = 1000;
641
642 while (timeout--) {
643 curptr = readl((char*)chip->remap_addr + dma->ops->dt_cur);
644 if (curptr < dma->buf_addr)
645 continue;
646 curptr -= dma->buf_addr;
647 if (curptr >= dma->buf_bytes)
648 continue;
649 return bytes_to_frames(runtime, curptr);
650 }
651 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
652 readl((char*)chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
653 return 0;
654}
655
656/*
657 * XRUN detected, and stop the PCM substream
658 */
659static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
660{
661 if (! dma->substream || ! dma->running)
662 return;
663 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
664 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
665}
666
667/*
668 * the period ack. update the substream.
669 */
670static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
671{
672 if (! dma->substream || ! dma->running)
673 return;
674 snd_pcm_period_elapsed(dma->substream);
675}
676
677/* set BUS_BUSY interrupt bit if any DMA is running */
678/* call with spinlock held */
679static void snd_atiixp_check_bus_busy(struct atiixp *chip)
680{
681 unsigned int bus_busy;
682 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
683 ATI_REG_CMD_RECEIVE_EN |
684 ATI_REG_CMD_SPDF_OUT_EN))
685 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
686 else
687 bus_busy = 0;
688 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
689}
690
691/* common trigger callback
692 * calling the lowlevel callbacks in it
693 */
694static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
695{
696 struct atiixp *chip = snd_pcm_substream_chip(substream);
697 struct atiixp_dma *dma = substream->runtime->private_data;
698 int err = 0;
699
700 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
701
702 spin_lock(&chip->reg_lock);
703 switch (cmd) {
704 case SNDRV_PCM_TRIGGER_START:
705 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
706 case SNDRV_PCM_TRIGGER_RESUME:
707 dma->ops->enable_transfer(chip, 1);
708 dma->running = 1;
709 dma->suspended = 0;
710 break;
711 case SNDRV_PCM_TRIGGER_STOP:
712 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
713 case SNDRV_PCM_TRIGGER_SUSPEND:
714 dma->ops->enable_transfer(chip, 0);
715 dma->running = 0;
716 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
717 break;
718 default:
719 err = -EINVAL;
720 break;
721 }
722 if (! err) {
723 snd_atiixp_check_bus_busy(chip);
724 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
725 dma->ops->flush_dma(chip);
726 snd_atiixp_check_bus_busy(chip);
727 }
728 }
729 spin_unlock(&chip->reg_lock);
730 return err;
731}
732
733
734/*
735 * lowlevel callbacks for each DMA type
736 *
737 * every callback is supposed to be called in chip->reg_lock spinlock
738 */
739
740/* flush FIFO of analog OUT DMA */
741static void atiixp_out_flush_dma(struct atiixp *chip)
742{
743 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
744}
745
746/* enable/disable analog OUT DMA */
747static void atiixp_out_enable_dma(struct atiixp *chip, int on)
748{
749 unsigned int data;
750 data = atiixp_read(chip, CMD);
751 if (on) {
752 if (data & ATI_REG_CMD_OUT_DMA_EN)
753 return;
754 atiixp_out_flush_dma(chip);
755 data |= ATI_REG_CMD_OUT_DMA_EN;
756 } else
757 data &= ~ATI_REG_CMD_OUT_DMA_EN;
758 atiixp_write(chip, CMD, data);
759}
760
761/* start/stop transfer over OUT DMA */
762static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
763{
764 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
765 on ? ATI_REG_CMD_SEND_EN : 0);
766}
767
768/* enable/disable analog IN DMA */
769static void atiixp_in_enable_dma(struct atiixp *chip, int on)
770{
771 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
772 on ? ATI_REG_CMD_IN_DMA_EN : 0);
773}
774
775/* start/stop analog IN DMA */
776static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
777{
778 if (on) {
779 unsigned int data = atiixp_read(chip, CMD);
780 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
781 data |= ATI_REG_CMD_RECEIVE_EN;
782#if 0 /* FIXME: this causes the endless loop */
783 /* wait until slot 3/4 are finished */
784 while ((atiixp_read(chip, COUNTER) &
785 ATI_REG_COUNTER_SLOT) != 5)
786 ;
787#endif
788 atiixp_write(chip, CMD, data);
789 }
790 } else
791 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
792}
793
794/* flush FIFO of analog IN DMA */
795static void atiixp_in_flush_dma(struct atiixp *chip)
796{
797 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
798}
799
800/* enable/disable SPDIF OUT DMA */
801static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
802{
803 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
804 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
805}
806
807/* start/stop SPDIF OUT DMA */
808static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
809{
810 unsigned int data;
811 data = atiixp_read(chip, CMD);
812 if (on)
813 data |= ATI_REG_CMD_SPDF_OUT_EN;
814 else
815 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
816 atiixp_write(chip, CMD, data);
817}
818
819/* flush FIFO of SPDIF OUT DMA */
820static void atiixp_spdif_flush_dma(struct atiixp *chip)
821{
822 int timeout;
823
824 /* DMA off, transfer on */
825 atiixp_spdif_enable_dma(chip, 0);
826 atiixp_spdif_enable_transfer(chip, 1);
827
828 timeout = 100;
829 do {
830 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
831 break;
832 udelay(1);
833 } while (timeout-- > 0);
834
835 atiixp_spdif_enable_transfer(chip, 0);
836}
837
838/* set up slots and formats for SPDIF OUT */
839static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
840{
841 struct atiixp *chip = snd_pcm_substream_chip(substream);
842
843 spin_lock_irq(&chip->reg_lock);
844 if (chip->spdif_over_aclink) {
845 unsigned int data;
846 /* enable slots 10/11 */
847 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
848 ATI_REG_CMD_SPDF_CONFIG_01);
849 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
850 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
851 ATI_REG_OUT_DMA_SLOT_BIT(11);
852 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
853 atiixp_write(chip, OUT_DMA_SLOT, data);
854 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
855 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
856 ATI_REG_CMD_INTERLEAVE_OUT : 0);
857 } else {
858 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
859 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
860 }
861 spin_unlock_irq(&chip->reg_lock);
862 return 0;
863}
864
865/* set up slots and formats for analog OUT */
866static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
867{
868 struct atiixp *chip = snd_pcm_substream_chip(substream);
869 unsigned int data;
870
871 spin_lock_irq(&chip->reg_lock);
872 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
873 switch (substream->runtime->channels) {
874 case 8:
875 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
876 ATI_REG_OUT_DMA_SLOT_BIT(11);
877 /* fallthru */
878 case 6:
879 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
880 ATI_REG_OUT_DMA_SLOT_BIT(8);
881 /* fallthru */
882 case 4:
883 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
884 ATI_REG_OUT_DMA_SLOT_BIT(9);
885 /* fallthru */
886 default:
887 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
888 ATI_REG_OUT_DMA_SLOT_BIT(4);
889 break;
890 }
891
892 /* set output threshold */
893 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
894 atiixp_write(chip, OUT_DMA_SLOT, data);
895
896 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
897 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
898 ATI_REG_CMD_INTERLEAVE_OUT : 0);
899
900 /*
901 * enable 6 channel re-ordering bit if needed
902 */
903 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
904 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
905
906 spin_unlock_irq(&chip->reg_lock);
907 return 0;
908}
909
910/* set up slots and formats for analog IN */
911static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
912{
913 struct atiixp *chip = snd_pcm_substream_chip(substream);
914
915 spin_lock_irq(&chip->reg_lock);
916 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
917 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
918 ATI_REG_CMD_INTERLEAVE_IN : 0);
919 spin_unlock_irq(&chip->reg_lock);
920 return 0;
921}
922
923/*
924 * hw_params - allocate the buffer and set up buffer descriptors
925 */
926static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
927 struct snd_pcm_hw_params *hw_params)
928{
929 struct atiixp *chip = snd_pcm_substream_chip(substream);
930 struct atiixp_dma *dma = substream->runtime->private_data;
931 int err;
932
933 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
934 if (err < 0)
935 return err;
936 dma->buf_addr = substream->runtime->dma_addr;
937 dma->buf_bytes = params_buffer_bytes(hw_params);
938
939 err = atiixp_build_dma_packets(chip, dma, substream,
940 params_periods(hw_params),
941 params_period_bytes(hw_params));
942 if (err < 0)
943 return err;
944
945 if (dma->ac97_pcm_type >= 0) {
946 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
947 /* PCM is bound to AC97 codec(s)
948 * set up the AC97 codecs
949 */
950 if (dma->pcm_open_flag) {
951 snd_ac97_pcm_close(pcm);
952 dma->pcm_open_flag = 0;
953 }
954 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
955 params_channels(hw_params),
956 pcm->r[0].slots);
957 if (err >= 0)
958 dma->pcm_open_flag = 1;
959 }
960
961 return err;
962}
963
964static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
965{
966 struct atiixp *chip = snd_pcm_substream_chip(substream);
967 struct atiixp_dma *dma = substream->runtime->private_data;
968
969 if (dma->pcm_open_flag) {
970 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
971 snd_ac97_pcm_close(pcm);
972 dma->pcm_open_flag = 0;
973 }
974 atiixp_clear_dma_packets(chip, dma, substream);
975 snd_pcm_lib_free_pages(substream);
976 return 0;
977}
978
979
980/*
981 * pcm hardware definition, identical for all DMA types
982 */
983static struct snd_pcm_hardware snd_atiixp_pcm_hw =
984{
985 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
986 SNDRV_PCM_INFO_BLOCK_TRANSFER |
987 SNDRV_PCM_INFO_PAUSE |
988 SNDRV_PCM_INFO_RESUME |
989 SNDRV_PCM_INFO_MMAP_VALID),
990 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
991 .rates = SNDRV_PCM_RATE_48000,
992 .rate_min = 48000,
993 .rate_max = 48000,
994 .channels_min = 2,
995 .channels_max = 2,
996 .buffer_bytes_max = 256 * 1024,
997 .period_bytes_min = 32,
998 .period_bytes_max = 128 * 1024,
999 .periods_min = 2,
1000 .periods_max = ATI_MAX_DESCRIPTORS,
1001};
1002
1003static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1004 struct atiixp_dma *dma, int pcm_type)
1005{
1006 struct atiixp *chip = snd_pcm_substream_chip(substream);
1007 struct snd_pcm_runtime *runtime = substream->runtime;
1008 int err;
1009
1010 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1011
1012 if (dma->opened)
1013 return -EBUSY;
1014 dma->substream = substream;
1015 runtime->hw = snd_atiixp_pcm_hw;
1016 dma->ac97_pcm_type = pcm_type;
1017 if (pcm_type >= 0) {
1018 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1019 snd_pcm_limit_hw_rates(runtime);
1020 } else {
1021 /* direct SPDIF */
1022 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1023 }
1024 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1025 return err;
1026 runtime->private_data = dma;
1027
1028 /* enable DMA bits */
1029 spin_lock_irq(&chip->reg_lock);
1030 dma->ops->enable_dma(chip, 1);
1031 spin_unlock_irq(&chip->reg_lock);
1032 dma->opened = 1;
1033
1034 return 0;
1035}
1036
1037static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1038 struct atiixp_dma *dma)
1039{
1040 struct atiixp *chip = snd_pcm_substream_chip(substream);
1041 /* disable DMA bits */
1042 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1043 spin_lock_irq(&chip->reg_lock);
1044 dma->ops->enable_dma(chip, 0);
1045 spin_unlock_irq(&chip->reg_lock);
1046 dma->substream = NULL;
1047 dma->opened = 0;
1048 return 0;
1049}
1050
1051/*
1052 */
1053static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1054{
1055 struct atiixp *chip = snd_pcm_substream_chip(substream);
1056 int err;
1057
1058 down(&chip->open_mutex);
1059 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1060 up(&chip->open_mutex);
1061 if (err < 0)
1062 return err;
1063 substream->runtime->hw.channels_max = chip->max_channels;
1064 if (chip->max_channels > 2)
1065 /* channels must be even */
1066 snd_pcm_hw_constraint_step(substream->runtime, 0,
1067 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1068 return 0;
1069}
1070
1071static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1072{
1073 struct atiixp *chip = snd_pcm_substream_chip(substream);
1074 int err;
1075 down(&chip->open_mutex);
1076 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1077 up(&chip->open_mutex);
1078 return err;
1079}
1080
1081static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1082{
1083 struct atiixp *chip = snd_pcm_substream_chip(substream);
1084 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1085}
1086
1087static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1088{
1089 struct atiixp *chip = snd_pcm_substream_chip(substream);
1090 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1091}
1092
1093static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1094{
1095 struct atiixp *chip = snd_pcm_substream_chip(substream);
1096 int err;
1097 down(&chip->open_mutex);
1098 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1099 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1100 else
1101 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1102 up(&chip->open_mutex);
1103 return err;
1104}
1105
1106static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1107{
1108 struct atiixp *chip = snd_pcm_substream_chip(substream);
1109 int err;
1110 down(&chip->open_mutex);
1111 if (chip->spdif_over_aclink)
1112 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1113 else
1114 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1115 up(&chip->open_mutex);
1116 return err;
1117}
1118
1119/* AC97 playback */
1120static struct snd_pcm_ops snd_atiixp_playback_ops = {
1121 .open = snd_atiixp_playback_open,
1122 .close = snd_atiixp_playback_close,
1123 .ioctl = snd_pcm_lib_ioctl,
1124 .hw_params = snd_atiixp_pcm_hw_params,
1125 .hw_free = snd_atiixp_pcm_hw_free,
1126 .prepare = snd_atiixp_playback_prepare,
1127 .trigger = snd_atiixp_pcm_trigger,
1128 .pointer = snd_atiixp_pcm_pointer,
1129};
1130
1131/* AC97 capture */
1132static struct snd_pcm_ops snd_atiixp_capture_ops = {
1133 .open = snd_atiixp_capture_open,
1134 .close = snd_atiixp_capture_close,
1135 .ioctl = snd_pcm_lib_ioctl,
1136 .hw_params = snd_atiixp_pcm_hw_params,
1137 .hw_free = snd_atiixp_pcm_hw_free,
1138 .prepare = snd_atiixp_capture_prepare,
1139 .trigger = snd_atiixp_pcm_trigger,
1140 .pointer = snd_atiixp_pcm_pointer,
1141};
1142
1143/* SPDIF playback */
1144static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1145 .open = snd_atiixp_spdif_open,
1146 .close = snd_atiixp_spdif_close,
1147 .ioctl = snd_pcm_lib_ioctl,
1148 .hw_params = snd_atiixp_pcm_hw_params,
1149 .hw_free = snd_atiixp_pcm_hw_free,
1150 .prepare = snd_atiixp_spdif_prepare,
1151 .trigger = snd_atiixp_pcm_trigger,
1152 .pointer = snd_atiixp_pcm_pointer,
1153};
1154
1155static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1156 /* front PCM */
1157 {
1158 .exclusive = 1,
1159 .r = { {
1160 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1161 (1 << AC97_SLOT_PCM_RIGHT) |
1162 (1 << AC97_SLOT_PCM_CENTER) |
1163 (1 << AC97_SLOT_PCM_SLEFT) |
1164 (1 << AC97_SLOT_PCM_SRIGHT) |
1165 (1 << AC97_SLOT_LFE)
1166 }
1167 }
1168 },
1169 /* PCM IN #1 */
1170 {
1171 .stream = 1,
1172 .exclusive = 1,
1173 .r = { {
1174 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1175 (1 << AC97_SLOT_PCM_RIGHT)
1176 }
1177 }
1178 },
1179 /* S/PDIF OUT (optional) */
1180 {
1181 .exclusive = 1,
1182 .spdif = 1,
1183 .r = { {
1184 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1185 (1 << AC97_SLOT_SPDIF_RIGHT2)
1186 }
1187 }
1188 },
1189};
1190
1191static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1192 .type = ATI_DMA_PLAYBACK,
1193 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1194 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1195 .enable_dma = atiixp_out_enable_dma,
1196 .enable_transfer = atiixp_out_enable_transfer,
1197 .flush_dma = atiixp_out_flush_dma,
1198};
1199
1200static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1201 .type = ATI_DMA_CAPTURE,
1202 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1203 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1204 .enable_dma = atiixp_in_enable_dma,
1205 .enable_transfer = atiixp_in_enable_transfer,
1206 .flush_dma = atiixp_in_flush_dma,
1207};
1208
1209static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1210 .type = ATI_DMA_SPDIF,
1211 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1212 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1213 .enable_dma = atiixp_spdif_enable_dma,
1214 .enable_transfer = atiixp_spdif_enable_transfer,
1215 .flush_dma = atiixp_spdif_flush_dma,
1216};
1217
1218
1219static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1220{
1221 struct snd_pcm *pcm;
1222 struct snd_ac97_bus *pbus = chip->ac97_bus;
1223 int err, i, num_pcms;
1224
1225 /* initialize constants */
1226 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1227 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1228 if (! chip->spdif_over_aclink)
1229 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1230
1231 /* assign AC97 pcm */
1232 if (chip->spdif_over_aclink)
1233 num_pcms = 3;
1234 else
1235 num_pcms = 2;
1236 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1237 if (err < 0)
1238 return err;
1239 for (i = 0; i < num_pcms; i++)
1240 chip->pcms[i] = &pbus->pcms[i];
1241
1242 chip->max_channels = 2;
1243 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1244 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1245 chip->max_channels = 6;
1246 else
1247 chip->max_channels = 4;
1248 }
1249
1250 /* PCM #0: analog I/O */
1251 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1252 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1253 if (err < 0)
1254 return err;
1255 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1256 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1257 pcm->private_data = chip;
1258 strcpy(pcm->name, "ATI IXP AC97");
1259 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1260
1261 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1262 snd_dma_pci_data(chip->pci),
1263 64*1024, 128*1024);
1264
1265 /* no SPDIF support on codec? */
1266 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1267 return 0;
1268
1269 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1270 if (chip->pcms[ATI_PCM_SPDIF])
1271 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1272
1273 /* PCM #1: spdif playback */
1274 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1275 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1276 if (err < 0)
1277 return err;
1278 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1279 pcm->private_data = chip;
1280 if (chip->spdif_over_aclink)
1281 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1282 else
1283 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1284 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1285
1286 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1287 snd_dma_pci_data(chip->pci),
1288 64*1024, 128*1024);
1289
1290 /* pre-select AC97 SPDIF slots 10/11 */
1291 for (i = 0; i < NUM_ATI_CODECS; i++) {
1292 if (chip->ac97[i])
1293 snd_ac97_update_bits(chip->ac97[i],
1294 AC97_EXTENDED_STATUS,
1295 0x03 << 4, 0x03 << 4);
1296 }
1297
1298 return 0;
1299}
1300
1301
1302
1303/*
1304 * interrupt handler
1305 */
1306static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1307{
1308 struct atiixp *chip = dev_id;
1309 unsigned int status;
1310
1311 status = atiixp_read(chip, ISR);
1312
1313 if (! status)
1314 return IRQ_NONE;
1315
1316 /* process audio DMA */
1317 if (status & ATI_REG_ISR_OUT_XRUN)
1318 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1319 else if (status & ATI_REG_ISR_OUT_STATUS)
1320 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1321 if (status & ATI_REG_ISR_IN_XRUN)
1322 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1323 else if (status & ATI_REG_ISR_IN_STATUS)
1324 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1325 if (! chip->spdif_over_aclink) {
1326 if (status & ATI_REG_ISR_SPDF_XRUN)
1327 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1328 else if (status & ATI_REG_ISR_SPDF_STATUS)
1329 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1330 }
1331
1332 /* for codec detection */
1333 if (status & CODEC_CHECK_BITS) {
1334 unsigned int detected;
1335 detected = status & CODEC_CHECK_BITS;
1336 spin_lock(&chip->reg_lock);
1337 chip->codec_not_ready_bits |= detected;
1338 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1339 spin_unlock(&chip->reg_lock);
1340 }
1341
1342 /* ack */
1343 atiixp_write(chip, ISR, status);
1344
1345 return IRQ_HANDLED;
1346}
1347
1348
1349/*
1350 * ac97 mixer section
1351 */
1352
1353static struct ac97_quirk ac97_quirks[] __devinitdata = {
1354 {
1355 .subvendor = 0x103c,
1356 .subdevice = 0x006b,
1357 .name = "HP Pavilion ZV5030US",
1358 .type = AC97_TUNE_MUTE_LED
1359 },
1360 {
1361 .subvendor = 0x103c,
1362 .subdevice = 0x308b,
1363 .name = "HP nx6125",
1364 .type = AC97_TUNE_MUTE_LED
1365 },
1366 {0} /* terminator */
1367};
1368
1369static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1370 const char *quirk_override)
1371{
1372 struct snd_ac97_bus *pbus;
1373 struct snd_ac97_template ac97;
1374 int i, err;
1375 int codec_count;
1376 static struct snd_ac97_bus_ops ops = {
1377 .write = snd_atiixp_ac97_write,
1378 .read = snd_atiixp_ac97_read,
1379 };
1380 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1381 ATI_REG_ISR_CODEC0_NOT_READY,
1382 ATI_REG_ISR_CODEC1_NOT_READY,
1383 ATI_REG_ISR_CODEC2_NOT_READY,
1384 };
1385
1386 if (snd_atiixp_codec_detect(chip) < 0)
1387 return -ENXIO;
1388
1389 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1390 return err;
1391 pbus->clock = clock;
1392 chip->ac97_bus = pbus;
1393
1394 codec_count = 0;
1395 for (i = 0; i < NUM_ATI_CODECS; i++) {
1396 if (chip->codec_not_ready_bits & codec_skip[i])
1397 continue;
1398 memset(&ac97, 0, sizeof(ac97));
1399 ac97.private_data = chip;
1400 ac97.pci = chip->pci;
1401 ac97.num = i;
1402 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1403 if (! chip->spdif_over_aclink)
1404 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1405 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1406 chip->ac97[i] = NULL; /* to be sure */
1407 snd_printdd("atiixp: codec %d not available for audio\n", i);
1408 continue;
1409 }
1410 codec_count++;
1411 }
1412
1413 if (! codec_count) {
1414 snd_printk(KERN_ERR "atiixp: no codec available\n");
1415 return -ENODEV;
1416 }
1417
1418 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1419
1420 return 0;
1421}
1422
1423
1424#ifdef CONFIG_PM
1425/*
1426 * power management
1427 */
1428static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1429{
1430 struct snd_card *card = pci_get_drvdata(pci);
1431 struct atiixp *chip = card->private_data;
1432 int i;
1433
1434 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1435 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1436 if (chip->pcmdevs[i]) {
1437 struct atiixp_dma *dma = &chip->dmas[i];
1438 if (dma->substream && dma->running)
1439 dma->saved_curptr = readl((char*)chip->remap_addr +
1440 dma->ops->dt_cur);
1441 snd_pcm_suspend_all(chip->pcmdevs[i]);
1442 }
1443 for (i = 0; i < NUM_ATI_CODECS; i++)
1444 snd_ac97_suspend(chip->ac97[i]);
1445 snd_atiixp_aclink_down(chip);
1446 snd_atiixp_chip_stop(chip);
1447
1448 pci_set_power_state(pci, PCI_D3hot);
1449 pci_disable_device(pci);
1450 pci_save_state(pci);
1451 return 0;
1452}
1453
1454static int snd_atiixp_resume(struct pci_dev *pci)
1455{
1456 struct snd_card *card = pci_get_drvdata(pci);
1457 struct atiixp *chip = card->private_data;
1458 int i;
1459
1460 pci_restore_state(pci);
1461 pci_enable_device(pci);
1462 pci_set_power_state(pci, PCI_D0);
1463 pci_set_master(pci);
1464
1465 snd_atiixp_aclink_reset(chip);
1466 snd_atiixp_chip_start(chip);
1467
1468 for (i = 0; i < NUM_ATI_CODECS; i++)
1469 snd_ac97_resume(chip->ac97[i]);
1470
1471 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1472 if (chip->pcmdevs[i]) {
1473 struct atiixp_dma *dma = &chip->dmas[i];
1474 if (dma->substream && dma->suspended) {
1475 dma->ops->enable_dma(chip, 1);
1476 dma->substream->ops->prepare(dma->substream);
1477 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1478 (char*)chip->remap_addr + dma->ops->llp_offset);
1479 writel(dma->saved_curptr, (char*)chip->remap_addr +
1480 dma->ops->dt_cur);
1481 }
1482 }
1483
1484 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1485 return 0;
1486}
1487#endif /* CONFIG_PM */
1488
1489
1490#ifdef CONFIG_PROC_FS
1491/*
1492 * proc interface for register dump
1493 */
1494
1495static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1496 struct snd_info_buffer *buffer)
1497{
1498 struct atiixp *chip = entry->private_data;
1499 int i;
1500
1501 for (i = 0; i < 256; i += 4)
1502 snd_iprintf(buffer, "%02x: %08x\n", i, readl((char*)chip->remap_addr + i));
1503}
1504
1505static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1506{
1507 struct snd_info_entry *entry;
1508
1509 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1510 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1511}
1512#else /* !CONFIG_PROC_FS */
1513#define snd_atiixp_proc_init(chip)
1514#endif
1515
1516
1517/*
1518 * destructor
1519 */
1520
1521static int snd_atiixp_free(struct atiixp *chip)
1522{
1523 if (chip->irq < 0)
1524 goto __hw_end;
1525 snd_atiixp_chip_stop(chip);
1526 synchronize_irq(chip->irq);
1527 __hw_end:
1528 if (chip->irq >= 0)
1529 free_irq(chip->irq, chip);
1530 if (chip->remap_addr)
1531 iounmap(chip->remap_addr);
1532 pci_release_regions(chip->pci);
1533 pci_disable_device(chip->pci);
1534 kfree(chip);
1535 return 0;
1536}
1537
1538static int snd_atiixp_dev_free(struct snd_device *device)
1539{
1540 struct atiixp *chip = device->device_data;
1541 return snd_atiixp_free(chip);
1542}
1543
1544/*
1545 * constructor for chip instance
1546 */
1547static int __devinit snd_atiixp_create(struct snd_card *card,
1548 struct pci_dev *pci,
1549 struct atiixp **r_chip)
1550{
1551 static struct snd_device_ops ops = {
1552 .dev_free = snd_atiixp_dev_free,
1553 };
1554 struct atiixp *chip;
1555 int err;
1556
1557 if ((err = pci_enable_device(pci)) < 0)
1558 return err;
1559
1560 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1561 if (chip == NULL) {
1562 pci_disable_device(pci);
1563 return -ENOMEM;
1564 }
1565
1566 spin_lock_init(&chip->reg_lock);
1567 init_MUTEX(&chip->open_mutex);
1568 chip->card = card;
1569 chip->pci = pci;
1570 chip->irq = -1;
1571 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1572 pci_disable_device(pci);
1573 kfree(chip);
1574 return err;
1575 }
1576 chip->addr = pci_resource_start(pci, 0);
1577 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1578 if (chip->remap_addr == NULL) {
1579 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1580 snd_atiixp_free(chip);
1581 return -EIO;
1582 }
1583
1584 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ,
1585 card->shortname, chip)) {
1586 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1587 snd_atiixp_free(chip);
1588 return -EBUSY;
1589 }
1590 chip->irq = pci->irq;
1591 pci_set_master(pci);
1592 synchronize_irq(chip->irq);
1593
1594 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1595 snd_atiixp_free(chip);
1596 return err;
1597 }
1598
1599 snd_card_set_dev(card, &pci->dev);
1600
1601 *r_chip = chip;
1602 return 0;
1603}
1604
1605
1606static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1607 const struct pci_device_id *pci_id)
1608{
1609 struct snd_card *card;
1610 struct atiixp *chip;
1611 unsigned char revision;
1612 int err;
1613
1614 card = snd_card_new(index, id, THIS_MODULE, 0);
1615 if (card == NULL)
1616 return -ENOMEM;
1617
1618 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1619
1620 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1621 strcpy(card->shortname, "ATI IXP");
1622 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1623 goto __error;
1624 card->private_data = chip;
1625
1626 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1627 goto __error;
1628
1629 chip->spdif_over_aclink = spdif_aclink;
1630
1631 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1632 goto __error;
1633
1634 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1635 goto __error;
1636
1637 snd_atiixp_proc_init(chip);
1638
1639 snd_atiixp_chip_start(chip);
1640
1641 sprintf(card->longname,
1642 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
1643 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1644 chip->addr, chip->irq);
1645
1646 if ((err = snd_card_register(card)) < 0)
1647 goto __error;
1648
1649 pci_set_drvdata(pci, card);
1650 return 0;
1651
1652 __error:
1653 snd_card_free(card);
1654 return err;
1655}
1656
1657static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1658{
1659 snd_card_free(pci_get_drvdata(pci));
1660 pci_set_drvdata(pci, NULL);
1661}
1662
1663static struct pci_driver driver = {
1664 .name = "ATI IXP AC97 controller",
1665 .id_table = snd_atiixp_ids,
1666 .probe = snd_atiixp_probe,
1667 .remove = __devexit_p(snd_atiixp_remove),
1668#ifdef CONFIG_PM
1669 .suspend = snd_atiixp_suspend,
1670 .resume = snd_atiixp_resume,
1671#endif
1672};
1673
1674
1675static int __init alsa_card_atiixp_init(void)
1676{
1677 return pci_register_driver(&driver);
1678}
1679
1680static void __exit alsa_card_atiixp_exit(void)
1681{
1682 pci_unregister_driver(&driver);
1683}
1684
1685module_init(alsa_card_atiixp_init)
1686module_exit(alsa_card_atiixp_exit)
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