source: GPL/trunk/alsa-kernel/pci/als4000.c

Last change on this file was 777, checked in by David Azarewicz, 6 months ago

Merge from uniaud32-exp branch
File size: 30.1 KB
RevLine 
[679]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
4 * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
5 * Jaroslav Kysela <perex@perex.cz>
6 * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
7 *
8 * Framework borrowed from Massimo Piccioni's card-als100.c.
9 *
10 * NOTES
11 *
12 * Since Avance does not provide any meaningful documentation, and I
13 * bought an ALS4000 based soundcard, I was forced to base this driver
14 * on reverse engineering.
15 *
16 * Note: this is no longer true (thank you!):
17 * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
18 * Page numbers stated anywhere below with the "SPECS_PAGE:" tag
19 * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
20 *
21 * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
22 * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
23 * interface. These subsystems can be mapped into ISA io-port space,
24 * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
25 * services to the subsystems.
26 *
27 * While ALS4000 is very similar to a SoundBlaster, the differences in
28 * DMA and capturing require more changes to the SoundBlaster than
29 * desirable, so I made this separate driver.
30 *
31 * The ALS4000 can do real full duplex playback/capture.
32 *
33 * FMDAC:
34 * - 0x4f -> port 0x14
35 * - port 0x15 |= 1
36 *
37 * Enable/disable 3D sound:
38 * - 0x50 -> port 0x14
39 * - change bit 6 (0x40) of port 0x15
40 *
41 * Set QSound:
42 * - 0xdb -> port 0x14
43 * - set port 0x15:
44 * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
45 *
46 * Set KSound:
47 * - value -> some port 0x0c0d
48 *
49 * ToDo:
50 * - by default, don't enable legacy game and use PCI game I/O
51 * - power management? (card can do voice wakeup according to datasheet!!)
52 */
53
54#include <linux/io.h>
55#include <linux/init.h>
56#include <linux/pci.h>
57#include <linux/gameport.h>
58#include <linux/module.h>
59#include <linux/dma-mapping.h>
60#include <sound/core.h>
61#include <sound/pcm.h>
62#include <sound/rawmidi.h>
63#include <sound/mpu401.h>
64#include <sound/opl3.h>
65#include <sound/sb.h>
66#include <sound/initval.h>
67
68#ifdef TARGET_OS2
69#define KBUILD_MODNAME "als4000"
70#endif
71MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
72MODULE_DESCRIPTION("Avance Logic ALS4000");
73MODULE_LICENSE("GPL");
74
75#if IS_REACHABLE(CONFIG_GAMEPORT)
76#define SUPPORT_JOYSTICK 1
77#endif
78
79static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
81static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
82#ifdef SUPPORT_JOYSTICK
83static int joystick_port[SNDRV_CARDS];
84#endif
85
86module_param_array(index, int, NULL, 0444);
87MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
88module_param_array(id, charp, NULL, 0444);
89MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
90module_param_array(enable, bool, NULL, 0444);
91MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
92#ifdef SUPPORT_JOYSTICK
93module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
94MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
95#endif
96
97struct snd_card_als4000 {
98 /* most frequent access first */
99 unsigned long iobase;
100 struct pci_dev *pci;
101 struct snd_sb *chip;
102#ifdef SUPPORT_JOYSTICK
103 struct gameport *gameport;
104#endif
105};
106
107static const struct pci_device_id snd_als4000_ids[] = {
108 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
109 { 0, }
110};
111
112MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
113
114enum als4k_iobase_t {
115 /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
116 ALS4K_IOD_00_AC97_ACCESS = 0x00,
117 ALS4K_IOW_04_AC97_READ = 0x04,
118 ALS4K_IOB_06_AC97_STATUS = 0x06,
119 ALS4K_IOB_07_IRQSTATUS = 0x07,
120 ALS4K_IOD_08_GCR_DATA = 0x08,
121 ALS4K_IOB_0C_GCR_INDEX = 0x0c,
122 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
123 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
124 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
125 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
126 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
127 ALS4K_IOB_14_MIXER_INDEX = 0x14,
128 ALS4K_IOB_15_MIXER_DATA = 0x15,
129 ALS4K_IOB_16_ESP_RESET = 0x16,
130 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
131 ALS4K_IOB_18_OPL_ADDR0 = 0x18,
132 ALS4K_IOB_19_OPL_ADDR1 = 0x19,
133 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
134 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
135 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
136 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
137 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
138 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
139 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
140 ALS4K_IOB_30_MIDI_DATA = 0x30,
141 ALS4K_IOB_31_MIDI_STATUS = 0x31,
142 ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
143};
144
145enum als4k_iobase_0e_t {
146 ALS4K_IOB_0E_MPU_IRQ = 0x10,
147 ALS4K_IOB_0E_CR1E_IRQ = 0x40,
148 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
149};
150
151enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
152 ALS4K_GCR8C_MISC_CTRL = 0x8c,
153 ALS4K_GCR90_TEST_MODE_REG = 0x90,
154 ALS4K_GCR91_DMA0_ADDR = 0x91,
155 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
156 ALS4K_GCR93_DMA1_ADDR = 0x93,
157 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
158 ALS4K_GCR95_DMA3_ADDR = 0x95,
159 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
160 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
161 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
162 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
163 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
164 ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
165 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
166 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
167 ALS4K_GCRA6_PM_CTRL = 0xa6,
168 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
169 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
170 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
171 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
172};
173
174enum als4k_gcr8c_t {
175 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
176 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
177};
178
179static inline void snd_als4k_iobase_writeb(unsigned long iobase,
180 enum als4k_iobase_t reg,
181 u8 val)
182{
183 outb(val, iobase + reg);
184}
185
186static inline void snd_als4k_iobase_writel(unsigned long iobase,
187 enum als4k_iobase_t reg,
188 u32 val)
189{
190 outl(val, iobase + reg);
191}
192
193static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
194 enum als4k_iobase_t reg)
195{
196 return inb(iobase + reg);
197}
198
199static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
200 enum als4k_iobase_t reg)
201{
202 return inl(iobase + reg);
203}
204
205static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
206 enum als4k_gcr_t reg,
207 u32 val)
208{
209 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
210 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
211}
212
213static inline void snd_als4k_gcr_write(struct snd_sb *sb,
214 enum als4k_gcr_t reg,
215 u32 val)
216{
217 snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
218}
219
220static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
221 enum als4k_gcr_t reg)
222{
223 /* SPECS_PAGE: 37/38 */
224 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
225 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
226}
227
228static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
229{
230 return snd_als4k_gcr_read_addr(sb->alt_port, reg);
231}
232
233enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
234 ALS4K_CR0_SB_CONFIG = 0x00,
235 ALS4K_CR2_MISC_CONTROL = 0x02,
236 ALS4K_CR3_CONFIGURATION = 0x03,
237 ALS4K_CR17_FIFO_STATUS = 0x17,
238 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
239 ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
240 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
241 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
242 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
243 ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
244 ALS4K_CR3A_MISC_CONTROL = 0x3a,
245 ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
246 ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
247 ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
248 ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
249};
250
251enum als4k_cr0_t {
252 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
253 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
254 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
255};
256
257static inline void snd_als4_cr_write(struct snd_sb *chip,
258 enum als4k_cr_t reg,
259 u8 data)
260{
261 /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
262 * NOTE: assumes chip->mixer_lock to be locked externally already!
263 * SPECS_PAGE: 6 */
264 snd_sbmixer_write(chip, reg | 0xc0, data);
265}
266
267static inline u8 snd_als4_cr_read(struct snd_sb *chip,
268 enum als4k_cr_t reg)
269{
270 /* NOTE: assumes chip->mixer_lock to be locked externally already! */
271 return snd_sbmixer_read(chip, reg | 0xc0);
272}
273
274
275
276static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
277{
278 if (!(chip->mode & SB_RATE_LOCK)) {
279 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
280 snd_sbdsp_command(chip, rate>>8);
281 snd_sbdsp_command(chip, rate);
282 }
283}
284
285static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
286 dma_addr_t addr, unsigned size)
287{
288 /* SPECS_PAGE: 40 */
289 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
290 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
291}
292
293static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
294 dma_addr_t addr,
295 unsigned size)
296{
297 /* SPECS_PAGE: 38 */
298 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
299 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
300 (size-1)|0x180000);
301}
302
303#define ALS4000_FORMAT_SIGNED (1<<0)
304#define ALS4000_FORMAT_16BIT (1<<1)
305#define ALS4000_FORMAT_STEREO (1<<2)
306
307static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
308{
309 int result;
310
311 result = 0;
312 if (snd_pcm_format_signed(runtime->format))
313 result |= ALS4000_FORMAT_SIGNED;
314 if (snd_pcm_format_physical_width(runtime->format) == 16)
315 result |= ALS4000_FORMAT_16BIT;
316 if (runtime->channels > 1)
317 result |= ALS4000_FORMAT_STEREO;
318 return result;
319}
320
321/* structure for setting up playback */
322static const struct {
323 unsigned char dsp_cmd, dma_on, dma_off, format;
324} playback_cmd_vals[]={
325/* ALS4000_FORMAT_U8_MONO */
326{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
327/* ALS4000_FORMAT_S8_MONO */
328{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
329/* ALS4000_FORMAT_U16L_MONO */
330{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
331/* ALS4000_FORMAT_S16L_MONO */
332{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
333/* ALS4000_FORMAT_U8_STEREO */
334{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
335/* ALS4000_FORMAT_S8_STEREO */
336{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
337/* ALS4000_FORMAT_U16L_STEREO */
338{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
339/* ALS4000_FORMAT_S16L_STEREO */
340{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
341};
342#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
343
344/* structure for setting up capture */
345enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
346static const unsigned char capture_cmd_vals[]=
347{
348CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */
349CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */
350CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */
351CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */
352CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */
353CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */
354CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */
355CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */
356};
357#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
358
359static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
360{
361 struct snd_sb *chip = snd_pcm_substream_chip(substream);
362 struct snd_pcm_runtime *runtime = substream->runtime;
363 unsigned long size;
364 unsigned count;
365
366 chip->capture_format = snd_als4000_get_format(runtime);
367
368 size = snd_pcm_lib_buffer_bytes(substream);
369 count = snd_pcm_lib_period_bytes(substream);
370
371 if (chip->capture_format & ALS4000_FORMAT_16BIT)
372 count >>= 1;
373 count--;
374
375 spin_lock_irq(&chip->reg_lock);
376 snd_als4000_set_rate(chip, runtime->rate);
377 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
378 spin_unlock_irq(&chip->reg_lock);
379 spin_lock_irq(&chip->mixer_lock);
380 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
381 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
382 spin_unlock_irq(&chip->mixer_lock);
383 return 0;
384}
385
386static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
387{
388 struct snd_sb *chip = snd_pcm_substream_chip(substream);
389 struct snd_pcm_runtime *runtime = substream->runtime;
390 unsigned long size;
391 unsigned count;
392
393 chip->playback_format = snd_als4000_get_format(runtime);
394
395 size = snd_pcm_lib_buffer_bytes(substream);
396 count = snd_pcm_lib_period_bytes(substream);
397
398 if (chip->playback_format & ALS4000_FORMAT_16BIT)
399 count >>= 1;
400 count--;
401
402 /* FIXME: from second playback on, there's a lot more clicks and pops
403 * involved here than on first playback. Fiddling with
404 * tons of different settings didn't help (DMA, speaker on/off,
405 * reordering, ...). Something seems to get enabled on playback
406 * that I haven't found out how to disable again, which then causes
407 * the switching pops to reach the speakers the next time here. */
408 spin_lock_irq(&chip->reg_lock);
409 snd_als4000_set_rate(chip, runtime->rate);
410 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
411
412 /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
413 /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
414 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
415 snd_sbdsp_command(chip, playback_cmd(chip).format);
416 snd_sbdsp_command(chip, count & 0xff);
417 snd_sbdsp_command(chip, count >> 8);
418 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
419 spin_unlock_irq(&chip->reg_lock);
420
421 return 0;
422}
423
424static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
425{
426 struct snd_sb *chip = snd_pcm_substream_chip(substream);
427 int result = 0;
428
429 /* FIXME race condition in here!!!
430 chip->mode non-atomic update gets consistently protected
431 by reg_lock always, _except_ for this place!!
432 Probably need to take reg_lock as outer (or inner??) lock, too.
433 (or serialize both lock operations? probably not, though... - racy?)
434 */
435 spin_lock(&chip->mixer_lock);
436 switch (cmd) {
437 case SNDRV_PCM_TRIGGER_START:
438 case SNDRV_PCM_TRIGGER_RESUME:
439 chip->mode |= SB_RATE_LOCK_CAPTURE;
440 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
441 capture_cmd(chip));
442 break;
443 case SNDRV_PCM_TRIGGER_STOP:
444 case SNDRV_PCM_TRIGGER_SUSPEND:
445 chip->mode &= ~SB_RATE_LOCK_CAPTURE;
446 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
447 capture_cmd(chip));
448 break;
449 default:
450 result = -EINVAL;
451 break;
452 }
453 spin_unlock(&chip->mixer_lock);
454 return result;
455}
456
457static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
458{
459 struct snd_sb *chip = snd_pcm_substream_chip(substream);
460 int result = 0;
461
462 spin_lock(&chip->reg_lock);
463 switch (cmd) {
464 case SNDRV_PCM_TRIGGER_START:
465 case SNDRV_PCM_TRIGGER_RESUME:
466 chip->mode |= SB_RATE_LOCK_PLAYBACK;
467 snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
468 break;
469 case SNDRV_PCM_TRIGGER_STOP:
470 case SNDRV_PCM_TRIGGER_SUSPEND:
471 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
472 chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
473 break;
474 default:
475 result = -EINVAL;
476 break;
477 }
478 spin_unlock(&chip->reg_lock);
479 return result;
480}
481
482static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
483{
484 struct snd_sb *chip = snd_pcm_substream_chip(substream);
485 unsigned int result;
486
487 spin_lock(&chip->reg_lock);
488 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
489 spin_unlock(&chip->reg_lock);
490 result &= 0xffff;
491 return bytes_to_frames( substream->runtime, result );
492}
493
494static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
495{
496 struct snd_sb *chip = snd_pcm_substream_chip(substream);
497 unsigned result;
498
499 spin_lock(&chip->reg_lock);
500 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
501 spin_unlock(&chip->reg_lock);
502 result &= 0xffff;
503 return bytes_to_frames( substream->runtime, result );
504}
505
506/* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
507 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
508 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
509 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
510 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
511 * could be optimized here to query/write one register only...
512 * And even if both registers need to be queried, then there's still the
513 * question of whether it's actually correct to ACK PCI IRQ before reading
514 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
515 * SB IRQ status.
516 * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
517 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
518 * */
519static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
520{
521 struct snd_sb *chip = dev_id;
522 unsigned pci_irqstatus;
523 unsigned sb_irqstatus;
524
525 /* find out which bit of the ALS4000 PCI block produced the interrupt,
526 SPECS_PAGE: 38, 5 */
527 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
528 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
529 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
530 && (chip->playback_substream)) /* playback */
531 snd_pcm_period_elapsed(chip->playback_substream);
532 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
533 && (chip->capture_substream)) /* capturing */
534 snd_pcm_period_elapsed(chip->capture_substream);
535 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
536 && (chip->rmidi)) /* MPU401 interrupt */
537 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
538 /* ACK the PCI block IRQ */
539 snd_als4k_iobase_writeb(chip->alt_port,
540 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
541
542 spin_lock(&chip->mixer_lock);
543 /* SPECS_PAGE: 20 */
544 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
545 spin_unlock(&chip->mixer_lock);
546
547 if (sb_irqstatus & SB_IRQTYPE_8BIT)
548 snd_sb_ack_8bit(chip);
549 if (sb_irqstatus & SB_IRQTYPE_16BIT)
550 snd_sb_ack_16bit(chip);
551 if (sb_irqstatus & SB_IRQTYPE_MPUIN)
552 inb(chip->mpu_port);
553 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
554 snd_als4k_iobase_readb(chip->alt_port,
555 ALS4K_IOB_16_ACK_FOR_CR1E);
556
557 /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n",
558 pci_irqstatus, sb_irqstatus); */
559
560 /* only ack the things we actually handled above */
561 return IRQ_RETVAL(
562 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
563 ALS4K_IOB_0E_MPU_IRQ))
564 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
565 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
566 );
567}
568
569/*****************************************************************/
570
571static const struct snd_pcm_hardware snd_als4000_playback =
572{
573 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
574 SNDRV_PCM_INFO_MMAP_VALID),
575 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
576 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
577 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
578 .rate_min = 4000,
579 .rate_max = 48000,
580 .channels_min = 1,
581 .channels_max = 2,
582 .buffer_bytes_max = 65536,
583 .period_bytes_min = 64,
584 .period_bytes_max = 65536,
585 .periods_min = 1,
586 .periods_max = 1024,
587 .fifo_size = 0
588};
589
590static const struct snd_pcm_hardware snd_als4000_capture =
591{
592 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
593 SNDRV_PCM_INFO_MMAP_VALID),
594 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
595 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
596 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
597 .rate_min = 4000,
598 .rate_max = 48000,
599 .channels_min = 1,
600 .channels_max = 2,
601 .buffer_bytes_max = 65536,
602 .period_bytes_min = 64,
603 .period_bytes_max = 65536,
604 .periods_min = 1,
605 .periods_max = 1024,
606 .fifo_size = 0
607};
608
609/*****************************************************************/
610
611static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
612{
613 struct snd_sb *chip = snd_pcm_substream_chip(substream);
614 struct snd_pcm_runtime *runtime = substream->runtime;
615
616 chip->playback_substream = substream;
617 runtime->hw = snd_als4000_playback;
618 return 0;
619}
620
621static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
622{
623 struct snd_sb *chip = snd_pcm_substream_chip(substream);
624
625 chip->playback_substream = NULL;
626 return 0;
627}
628
629static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
630{
631 struct snd_sb *chip = snd_pcm_substream_chip(substream);
632 struct snd_pcm_runtime *runtime = substream->runtime;
633
634 chip->capture_substream = substream;
635 runtime->hw = snd_als4000_capture;
636 return 0;
637}
638
639static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
640{
641 struct snd_sb *chip = snd_pcm_substream_chip(substream);
642
643 chip->capture_substream = NULL;
644 return 0;
645}
646
647/******************************************************************/
648
649static const struct snd_pcm_ops snd_als4000_playback_ops = {
650 .open = snd_als4000_playback_open,
651 .close = snd_als4000_playback_close,
652 .prepare = snd_als4000_playback_prepare,
653 .trigger = snd_als4000_playback_trigger,
654 .pointer = snd_als4000_playback_pointer
655};
656
657static const struct snd_pcm_ops snd_als4000_capture_ops = {
658 .open = snd_als4000_capture_open,
659 .close = snd_als4000_capture_close,
660 .prepare = snd_als4000_capture_prepare,
661 .trigger = snd_als4000_capture_trigger,
662 .pointer = snd_als4000_capture_pointer
663};
664
665static int snd_als4000_pcm(struct snd_sb *chip, int device)
666{
667 struct snd_pcm *pcm;
668 int err;
669
670 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
671 if (err < 0)
672 return err;
673 pcm->private_data = chip;
674 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
675 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
676 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
677
678 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
679 &chip->pci->dev, 64*1024, 64*1024);
680
681 chip->pcm = pcm;
682
683 return 0;
684}
685
686/******************************************************************/
687
688static void snd_als4000_set_addr(unsigned long iobase,
689 unsigned int sb_io,
690 unsigned int mpu_io,
691 unsigned int opl_io,
692 unsigned int game_io)
693{
694 u32 cfg1 = 0;
695 u32 cfg2 = 0;
696
697 if (mpu_io > 0)
698 cfg2 |= (mpu_io | 1) << 16;
699 if (sb_io > 0)
700 cfg2 |= (sb_io | 1);
701 if (game_io > 0)
702 cfg1 |= (game_io | 1) << 16;
703 if (opl_io > 0)
704 cfg1 |= (opl_io | 1);
705 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
706 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
707}
708
709static void snd_als4000_configure(struct snd_sb *chip)
710{
711 u8 tmp;
712 int i;
713
714 /* do some more configuration */
715 spin_lock_irq(&chip->mixer_lock);
716 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
717 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
718 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
719 /* always select DMA channel 0, since we do not actually use DMA
720 * SPECS_PAGE: 19/20 */
721 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
722 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
723 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
724 spin_unlock_irq(&chip->mixer_lock);
725
726 spin_lock_irq(&chip->reg_lock);
727 /* enable interrupts */
728 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
729 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
730
731 /* SPECS_PAGE: 39 */
732 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
733 snd_als4k_gcr_write(chip, i, 0);
734 /* enable burst mode to prevent dropouts during high PCI bus usage */
735 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
736 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
737 spin_unlock_irq(&chip->reg_lock);
738}
739
740#ifdef SUPPORT_JOYSTICK
741static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
742{
743 struct gameport *gp;
744 struct resource *r;
745 int io_port;
746
747 if (joystick_port[dev] == 0)
748 return -ENODEV;
749
750 if (joystick_port[dev] == 1) { /* auto-detect */
751 for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
[717]752 r = devm_request_region(&acard->pci->dev, io_port, 8,
753 "ALS4000 gameport");
[679]754 if (r)
755 break;
756 }
757 } else {
758 io_port = joystick_port[dev];
[717]759 r = devm_request_region(&acard->pci->dev, io_port, 8,
760 "ALS4000 gameport");
[679]761 }
762
763 if (!r) {
764 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
765 return -EBUSY;
766 }
767
768 acard->gameport = gp = gameport_allocate_port();
769 if (!gp) {
770 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
771 return -ENOMEM;
772 }
773
774 gameport_set_name(gp, "ALS4000 Gameport");
775 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
776 gameport_set_dev_parent(gp, &acard->pci->dev);
777 gp->io = io_port;
778
779 /* Enable legacy joystick port */
780 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
781
782 gameport_register_port(acard->gameport);
783
784 return 0;
785}
786
787static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
788{
789 if (acard->gameport) {
790 gameport_unregister_port(acard->gameport);
791 acard->gameport = NULL;
792
793 /* disable joystick */
794 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
795 }
796}
797#else
798static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
799static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
800#endif
801
802static void snd_card_als4000_free( struct snd_card *card )
803{
804 struct snd_card_als4000 *acard = card->private_data;
805
806 /* make sure that interrupts are disabled */
807 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
808 /* free resources */
809 snd_als4000_free_gameport(acard);
810}
811
[717]812static int __snd_card_als4000_probe(struct pci_dev *pci,
813 const struct pci_device_id *pci_id)
[679]814{
815 static int dev;
816 struct snd_card *card;
817 struct snd_card_als4000 *acard;
818 unsigned long iobase;
819 struct snd_sb *chip;
820 struct snd_opl3 *opl3;
821 unsigned short word;
822 int err;
823
824 if (dev >= SNDRV_CARDS)
825 return -ENODEV;
826 if (!enable[dev]) {
827 dev++;
828 return -ENOENT;
829 }
830
831 /* enable PCI device */
[717]832 err = pcim_enable_device(pci);
[703]833 if (err < 0)
[679]834 return err;
[703]835
[679]836 /* check, if we can restrict PCI DMA transfers to 24 bits */
[695]837 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
[679]838 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
839 return -ENXIO;
840 }
841
[703]842 err = pci_request_regions(pci, "ALS4000");
[717]843 if (err < 0)
[679]844 return err;
845 iobase = pci_resource_start(pci, 0);
846
847 pci_read_config_word(pci, PCI_COMMAND, &word);
848 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
849 pci_set_master(pci);
850
[717]851 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
852 sizeof(*acard) /* private_data: acard */,
853 &card);
854 if (err < 0)
[679]855 return err;
856
857 acard = card->private_data;
858 acard->pci = pci;
859 acard->iobase = iobase;
860 card->private_free = snd_card_als4000_free;
861
862 /* disable all legacy ISA stuff */
863 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
864
[703]865 err = snd_sbdsp_create(card,
866 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
867 pci->irq,
[679]868 /* internally registered as IRQF_SHARED in case of ALS4000 SB */
[703]869 snd_als4000_interrupt,
870 -1,
871 -1,
872 SB_HW_ALS4000,
873 &chip);
874 if (err < 0)
[717]875 return err;
[679]876 acard->chip = chip;
877
878 chip->pci = pci;
879 chip->alt_port = iobase;
880
881 snd_als4000_configure(chip);
882
883 strcpy(card->driver, "ALS4000");
884 strcpy(card->shortname, "Avance Logic ALS4000");
885 sprintf(card->longname, "%s at 0x%lx, irq %i",
886 card->shortname, chip->alt_port, chip->irq);
887
[703]888 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ALS4000,
889 iobase + ALS4K_IOB_30_MIDI_DATA,
890 MPU401_INFO_INTEGRATED |
891 MPU401_INFO_IRQ_HOOK,
892 -1, &chip->rmidi);
893 if (err < 0) {
[679]894 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
895 iobase + ALS4K_IOB_30_MIDI_DATA);
[717]896 return err;
[679]897 }
898 /* FIXME: ALS4000 has interesting MPU401 configuration features
899 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
900 * (pass-thru / UART switching, fast MIDI clock, etc.),
901 * however there doesn't seem to be an ALSA API for this...
902 * SPECS_PAGE: 21 */
903
[703]904 err = snd_als4000_pcm(chip, 0);
905 if (err < 0)
[717]906 return err;
[703]907
908 err = snd_sbmixer_new(chip);
909 if (err < 0)
[717]910 return err;
[679]911
912 if (snd_opl3_create(card,
913 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
914 iobase + ALS4K_IOB_12_ADLIB_ADDR2,
915 OPL3_HW_AUTO, 1, &opl3) < 0) {
916 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
917 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
918 iobase + ALS4K_IOB_12_ADLIB_ADDR2);
919 } else {
[703]920 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
921 if (err < 0)
[717]922 return err;
[679]923 }
924
925 snd_als4000_create_gameport(acard, dev);
926
[703]927 err = snd_card_register(card);
928 if (err < 0)
[717]929 return err;
[703]930
[679]931 pci_set_drvdata(pci, card);
932 dev++;
[717]933 return 0;
[679]934}
935
[717]936static int snd_card_als4000_probe(struct pci_dev *pci,
937 const struct pci_device_id *pci_id)
[679]938{
[717]939 return snd_card_free_on_error(&pci->dev, __snd_card_als4000_probe(pci, pci_id));
[679]940}
941
942static int snd_als4000_suspend(struct device *dev)
943{
944 struct snd_card *card = dev_get_drvdata(dev);
945 struct snd_card_als4000 *acard = card->private_data;
946 struct snd_sb *chip = acard->chip;
947
948 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
949
950 snd_sbmixer_suspend(chip);
951 return 0;
952}
953
954static int snd_als4000_resume(struct device *dev)
955{
956 struct snd_card *card = dev_get_drvdata(dev);
957 struct snd_card_als4000 *acard = card->private_data;
958 struct snd_sb *chip = acard->chip;
959
960 snd_als4000_configure(chip);
961 snd_sbdsp_reset(chip);
962 snd_sbmixer_resume(chip);
963
964#ifdef SUPPORT_JOYSTICK
965 if (acard->gameport)
966 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
967#endif
968
969 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
970 return 0;
971}
972
[777]973static DEFINE_SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
[679]974
975static struct pci_driver als4000_driver = {
976 .name = KBUILD_MODNAME,
977 .id_table = snd_als4000_ids,
978 .probe = snd_card_als4000_probe,
979 .driver = {
[777]980 .pm = &snd_als4000_pm,
[679]981 },
982};
983
984module_pci_driver(als4000_driver);
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