| 1 | /* SPDX-License-Identifier: GPL-2.0 */
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| 2 | /*
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| 3 | * HD-audio codec verbs
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| 4 | */
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| 5 |
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| 6 | #ifndef __SOUND_HDA_VERBS_H
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| 7 | #define __SOUND_HDA_VERBS_H
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| 8 |
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| 9 | /*
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| 10 | * nodes
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| 11 | */
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| 12 | #define AC_NODE_ROOT 0x00
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| 13 |
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| 14 | /*
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| 15 | * function group types
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| 16 | */
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| 17 | enum {
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| 18 | AC_GRP_AUDIO_FUNCTION = 0x01,
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| 19 | AC_GRP_MODEM_FUNCTION = 0x02,
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| 20 | };
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| 21 |
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| 22 | /*
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| 23 | * widget types
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| 24 | */
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| 25 | enum {
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| 26 | AC_WID_AUD_OUT, /* Audio Out */
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| 27 | AC_WID_AUD_IN, /* Audio In */
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| 28 | AC_WID_AUD_MIX, /* Audio Mixer */
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| 29 | AC_WID_AUD_SEL, /* Audio Selector */
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| 30 | AC_WID_PIN, /* Pin Complex */
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| 31 | AC_WID_POWER, /* Power */
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| 32 | AC_WID_VOL_KNB, /* Volume Knob */
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| 33 | AC_WID_BEEP, /* Beep Generator */
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| 34 | AC_WID_VENDOR = 0x0f /* Vendor specific */
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| 35 | };
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| 36 |
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| 37 | /*
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| 38 | * GET verbs
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| 39 | */
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| 40 | #define AC_VERB_GET_STREAM_FORMAT 0x0a00
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| 41 | #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
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| 42 | #define AC_VERB_GET_PROC_COEF 0x0c00
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| 43 | #define AC_VERB_GET_COEF_INDEX 0x0d00
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| 44 | #define AC_VERB_PARAMETERS 0x0f00
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| 45 | #define AC_VERB_GET_CONNECT_SEL 0x0f01
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| 46 | #define AC_VERB_GET_CONNECT_LIST 0x0f02
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| 47 | #define AC_VERB_GET_PROC_STATE 0x0f03
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| 48 | #define AC_VERB_GET_SDI_SELECT 0x0f04
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| 49 | #define AC_VERB_GET_POWER_STATE 0x0f05
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| 50 | #define AC_VERB_GET_CONV 0x0f06
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| 51 | #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
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| 52 | #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
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| 53 | #define AC_VERB_GET_PIN_SENSE 0x0f09
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| 54 | #define AC_VERB_GET_BEEP_CONTROL 0x0f0a
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| 55 | #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
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| 56 | #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
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| 57 | #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
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| 58 | #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
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| 59 | /* f10-f1a: GPIO */
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| 60 | #define AC_VERB_GET_GPIO_DATA 0x0f15
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| 61 | #define AC_VERB_GET_GPIO_MASK 0x0f16
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| 62 | #define AC_VERB_GET_GPIO_DIRECTION 0x0f17
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| 63 | #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
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| 64 | #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
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| 65 | #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
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| 66 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
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| 67 | /* f20: AFG/MFG */
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| 68 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
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| 69 | #define AC_VERB_GET_STRIPE_CONTROL 0x0f24
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| 70 | #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
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| 71 | #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
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| 72 | #define AC_VERB_GET_HDMI_ELDD 0x0f2f
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| 73 | #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
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| 74 | #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
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| 75 | #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
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| 76 | #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
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| 77 | #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
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| 78 | #define AC_VERB_GET_DEVICE_SEL 0xf35
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| 79 | #define AC_VERB_GET_DEVICE_LIST 0xf36
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| 80 |
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| 81 | /*
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| 82 | * SET verbs
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| 83 | */
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| 84 | #define AC_VERB_SET_STREAM_FORMAT 0x200
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| 85 | #define AC_VERB_SET_AMP_GAIN_MUTE 0x300
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| 86 | #define AC_VERB_SET_PROC_COEF 0x400
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| 87 | #define AC_VERB_SET_COEF_INDEX 0x500
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| 88 | #define AC_VERB_SET_CONNECT_SEL 0x701
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| 89 | #define AC_VERB_SET_PROC_STATE 0x703
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| 90 | #define AC_VERB_SET_SDI_SELECT 0x704
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| 91 | #define AC_VERB_SET_POWER_STATE 0x705
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| 92 | #define AC_VERB_SET_CHANNEL_STREAMID 0x706
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| 93 | #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
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| 94 | #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
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| 95 | #define AC_VERB_SET_PIN_SENSE 0x709
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| 96 | #define AC_VERB_SET_BEEP_CONTROL 0x70a
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| 97 | #define AC_VERB_SET_EAPD_BTLENABLE 0x70c
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| 98 | #define AC_VERB_SET_DIGI_CONVERT_1 0x70d
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| 99 | #define AC_VERB_SET_DIGI_CONVERT_2 0x70e
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| 100 | #define AC_VERB_SET_DIGI_CONVERT_3 0x73e
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| 101 | #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
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| 102 | #define AC_VERB_SET_GPIO_DATA 0x715
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| 103 | #define AC_VERB_SET_GPIO_MASK 0x716
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| 104 | #define AC_VERB_SET_GPIO_DIRECTION 0x717
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| 105 | #define AC_VERB_SET_GPIO_WAKE_MASK 0x718
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| 106 | #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
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| 107 | #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
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| 108 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
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| 109 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
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| 110 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
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| 111 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
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| 112 | #define AC_VERB_SET_EAPD 0x788
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| 113 | #define AC_VERB_SET_CODEC_RESET 0x7ff
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| 114 | #define AC_VERB_SET_STRIPE_CONTROL 0x724
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| 115 | #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
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| 116 | #define AC_VERB_SET_HDMI_DIP_INDEX 0x730
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| 117 | #define AC_VERB_SET_HDMI_DIP_DATA 0x731
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| 118 | #define AC_VERB_SET_HDMI_DIP_XMIT 0x732
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| 119 | #define AC_VERB_SET_HDMI_CP_CTRL 0x733
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| 120 | #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
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| 121 | #define AC_VERB_SET_DEVICE_SEL 0x735
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| 122 |
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| 123 | /*
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| 124 | * Parameter IDs
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| 125 | */
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| 126 | #define AC_PAR_VENDOR_ID 0x00
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| 127 | #define AC_PAR_SUBSYSTEM_ID 0x01
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| 128 | #define AC_PAR_REV_ID 0x02
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| 129 | #define AC_PAR_NODE_COUNT 0x04
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| 130 | #define AC_PAR_FUNCTION_TYPE 0x05
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| 131 | #define AC_PAR_AUDIO_FG_CAP 0x08
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| 132 | #define AC_PAR_AUDIO_WIDGET_CAP 0x09
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| 133 | #define AC_PAR_PCM 0x0a
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| 134 | #define AC_PAR_STREAM 0x0b
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| 135 | #define AC_PAR_PIN_CAP 0x0c
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| 136 | #define AC_PAR_AMP_IN_CAP 0x0d
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| 137 | #define AC_PAR_CONNLIST_LEN 0x0e
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| 138 | #define AC_PAR_POWER_STATE 0x0f
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| 139 | #define AC_PAR_PROC_CAP 0x10
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| 140 | #define AC_PAR_GPIO_CAP 0x11
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| 141 | #define AC_PAR_AMP_OUT_CAP 0x12
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| 142 | #define AC_PAR_VOL_KNB_CAP 0x13
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| 143 | #define AC_PAR_DEVLIST_LEN 0x15
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| 144 | #define AC_PAR_HDMI_LPCM_CAP 0x20
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| 145 |
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| 146 | /*
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| 147 | * AC_VERB_PARAMETERS results (32bit)
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| 148 | */
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| 149 |
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| 150 | /* Function Group Type */
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| 151 | #define AC_FGT_TYPE (0xff<<0)
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| 152 | #define AC_FGT_TYPE_SHIFT 0
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| 153 | #define AC_FGT_UNSOL_CAP (1<<8)
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| 154 |
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| 155 | /* Audio Function Group Capabilities */
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| 156 | #define AC_AFG_OUT_DELAY (0xf<<0)
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| 157 | #define AC_AFG_IN_DELAY (0xf<<8)
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| 158 | #define AC_AFG_BEEP_GEN (1<<16)
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| 159 |
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| 160 | /* Audio Widget Capabilities */
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| 161 | #define AC_WCAP_STEREO (1<<0) /* stereo I/O */
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| 162 | #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
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| 163 | #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
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| 164 | #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
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| 165 | #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
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| 166 | #define AC_WCAP_STRIPE (1<<5) /* stripe */
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| 167 | #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
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| 168 | #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
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| 169 | #define AC_WCAP_CONN_LIST (1<<8) /* connection list */
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| 170 | #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
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| 171 | #define AC_WCAP_POWER (1<<10) /* power control */
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| 172 | #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
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| 173 | #define AC_WCAP_CP_CAPS (1<<12) /* content protection */
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| 174 | #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
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| 175 | #define AC_WCAP_DELAY (0xf<<16)
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| 176 | #define AC_WCAP_DELAY_SHIFT 16
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| 177 | #define AC_WCAP_TYPE (0xf<<20)
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| 178 | #define AC_WCAP_TYPE_SHIFT 20
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| 179 |
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| 180 | /* supported PCM rates and bits */
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| 181 | #define AC_SUPPCM_RATES (0xfff << 0)
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| 182 | #define AC_SUPPCM_BITS_8 (1<<16)
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| 183 | #define AC_SUPPCM_BITS_16 (1<<17)
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| 184 | #define AC_SUPPCM_BITS_20 (1<<18)
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| 185 | #define AC_SUPPCM_BITS_24 (1<<19)
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| 186 | #define AC_SUPPCM_BITS_32 (1<<20)
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| 187 |
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| 188 | /* supported PCM stream format */
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| 189 | #define AC_SUPFMT_PCM (1<<0)
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| 190 | #define AC_SUPFMT_FLOAT32 (1<<1)
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| 191 | #define AC_SUPFMT_AC3 (1<<2)
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| 192 |
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| 193 | /* GP I/O count */
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| 194 | #define AC_GPIO_IO_COUNT (0xff<<0)
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| 195 | #define AC_GPIO_O_COUNT (0xff<<8)
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| 196 | #define AC_GPIO_O_COUNT_SHIFT 8
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| 197 | #define AC_GPIO_I_COUNT (0xff<<16)
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| 198 | #define AC_GPIO_I_COUNT_SHIFT 16
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| 199 | #define AC_GPIO_UNSOLICITED (1<<30)
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| 200 | #define AC_GPIO_WAKE (1<<31)
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| 201 |
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| 202 | /* Converter stream, channel */
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| 203 | #define AC_CONV_CHANNEL (0xf<<0)
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| 204 | #define AC_CONV_STREAM (0xf<<4)
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| 205 | #define AC_CONV_STREAM_SHIFT 4
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| 206 |
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| 207 | /* Input converter SDI select */
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| 208 | #define AC_SDI_SELECT (0xf<<0)
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| 209 |
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| 210 | /* stream format id */
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| 211 | #define AC_FMT_CHAN_SHIFT 0
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| 212 | #define AC_FMT_CHAN_MASK (0x0f << 0)
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| 213 | #define AC_FMT_BITS_SHIFT 4
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| 214 | #define AC_FMT_BITS_MASK (7 << 4)
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| 215 | #define AC_FMT_BITS_8 (0 << 4)
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| 216 | #define AC_FMT_BITS_16 (1 << 4)
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| 217 | #define AC_FMT_BITS_20 (2 << 4)
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| 218 | #define AC_FMT_BITS_24 (3 << 4)
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| 219 | #define AC_FMT_BITS_32 (4 << 4)
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| 220 | #define AC_FMT_DIV_SHIFT 8
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| 221 | #define AC_FMT_DIV_MASK (7 << 8)
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| 222 | #define AC_FMT_MULT_SHIFT 11
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| 223 | #define AC_FMT_MULT_MASK (7 << 11)
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| 224 | #define AC_FMT_BASE_SHIFT 14
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| 225 | #define AC_FMT_BASE_48K (0 << 14)
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| 226 | #define AC_FMT_BASE_44K (1 << 14)
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| 227 | #define AC_FMT_TYPE_SHIFT 15
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| 228 | #define AC_FMT_TYPE_PCM (0 << 15)
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| 229 | #define AC_FMT_TYPE_NON_PCM (1 << 15)
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| 230 |
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| 231 | /* Unsolicited response control */
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| 232 | #define AC_UNSOL_TAG (0x3f<<0)
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| 233 | #define AC_UNSOL_ENABLED (1<<7)
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| 234 | #define AC_USRSP_EN AC_UNSOL_ENABLED
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| 235 |
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| 236 | /* Unsolicited responses */
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| 237 | #define AC_UNSOL_RES_TAG (0x3f<<26)
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| 238 | #define AC_UNSOL_RES_TAG_SHIFT 26
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| 239 | #define AC_UNSOL_RES_SUBTAG (0x1f<<21)
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| 240 | #define AC_UNSOL_RES_SUBTAG_SHIFT 21
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| 241 | #define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry
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| 242 | * (for DP1.2 MST)
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| 243 | */
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| 244 | #define AC_UNSOL_RES_DE_SHIFT 15
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| 245 | #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */
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| 246 | #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
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| 247 | #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
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| 248 | #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
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| 249 | #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
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| 250 |
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| 251 | /* Pin widget capabilies */
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| 252 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
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| 253 | #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
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| 254 | #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
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| 255 | #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
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| 256 | #define AC_PINCAP_OUT (1<<4) /* output capable */
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| 257 | #define AC_PINCAP_IN (1<<5) /* input capable */
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| 258 | #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
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| 259 | /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
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| 260 | * but is marked reserved in the Intel HDA specification.
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| 261 | */
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| 262 | #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
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| 263 | /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
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| 264 | * in HD-audio specification
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| 265 | */
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| 266 | #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
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| 267 | #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
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| 268 | * coexist with AC_PINCAP_HDMI
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| 269 | */
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| 270 | #define AC_PINCAP_VREF (0x37<<8)
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| 271 | #define AC_PINCAP_VREF_SHIFT 8
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| 272 | #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
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| 273 | #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
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| 274 | /* Vref status (used in pin cap) */
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| 275 | #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
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| 276 | #define AC_PINCAP_VREF_50 (1<<1) /* 50% */
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| 277 | #define AC_PINCAP_VREF_GRD (1<<2) /* ground */
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| 278 | #define AC_PINCAP_VREF_80 (1<<4) /* 80% */
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| 279 | #define AC_PINCAP_VREF_100 (1<<5) /* 100% */
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| 280 |
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| 281 | /* Amplifier capabilities */
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| 282 | #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
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| 283 | #define AC_AMPCAP_OFFSET_SHIFT 0
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| 284 | #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
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| 285 | #define AC_AMPCAP_NUM_STEPS_SHIFT 8
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| 286 | #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
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| 287 | * in 0.25dB
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| 288 | */
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| 289 | #define AC_AMPCAP_STEP_SIZE_SHIFT 16
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| 290 | #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
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| 291 | #define AC_AMPCAP_MUTE_SHIFT 31
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| 292 |
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| 293 | /* driver-specific amp-caps: using bits 24-30 */
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| 294 | #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
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| 295 |
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| 296 | /* Connection list */
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| 297 | #define AC_CLIST_LENGTH (0x7f<<0)
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| 298 | #define AC_CLIST_LONG (1<<7)
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| 299 |
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| 300 | /* Supported power status */
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| 301 | #define AC_PWRST_D0SUP (1<<0)
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| 302 | #define AC_PWRST_D1SUP (1<<1)
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| 303 | #define AC_PWRST_D2SUP (1<<2)
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| 304 | #define AC_PWRST_D3SUP (1<<3)
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| 305 | #define AC_PWRST_D3COLDSUP (1<<4)
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| 306 | #define AC_PWRST_S3D3COLDSUP (1<<29)
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| 307 | #define AC_PWRST_CLKSTOP (1<<30)
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| 308 | #define AC_PWRST_EPSS (1U<<31)
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| 309 |
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| 310 | /* Power state values */
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| 311 | #define AC_PWRST_SETTING (0xf<<0)
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| 312 | #define AC_PWRST_ACTUAL (0xf<<4)
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| 313 | #define AC_PWRST_ACTUAL_SHIFT 4
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| 314 | #define AC_PWRST_D0 0x00
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| 315 | #define AC_PWRST_D1 0x01
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| 316 | #define AC_PWRST_D2 0x02
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| 317 | #define AC_PWRST_D3 0x03
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| 318 | #define AC_PWRST_ERROR (1<<8)
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| 319 | #define AC_PWRST_CLK_STOP_OK (1<<9)
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| 320 | #define AC_PWRST_SETTING_RESET (1<<10)
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| 321 |
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| 322 | /* Processing capabilies */
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| 323 | #define AC_PCAP_BENIGN (1<<0)
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| 324 | #define AC_PCAP_NUM_COEF (0xff<<8)
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| 325 | #define AC_PCAP_NUM_COEF_SHIFT 8
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| 326 |
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| 327 | /* Volume knobs capabilities */
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| 328 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0)
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| 329 | #define AC_KNBCAP_DELTA (1<<7)
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| 330 |
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| 331 | /* HDMI LPCM capabilities */
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| 332 | #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
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| 333 | #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
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| 334 | #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
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| 335 | #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
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| 336 | #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
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| 337 | #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
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| 338 | #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
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| 339 | #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
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| 340 | #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
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| 341 | #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
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| 342 | #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
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| 343 | #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
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| 344 | #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
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| 345 | #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
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| 346 |
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| 347 | /* Display pin's device list length */
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| 348 | #define AC_DEV_LIST_LEN_MASK 0x3f
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| 349 | #define AC_MAX_DEV_LIST_LEN 64
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| 350 |
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| 351 | /*
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| 352 | * Control Parameters
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| 353 | */
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| 354 |
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| 355 | /* Amp gain/mute */
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| 356 | #define AC_AMP_MUTE (1<<7)
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| 357 | #define AC_AMP_GAIN (0x7f)
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| 358 | #define AC_AMP_GET_INDEX (0xf<<0)
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| 359 |
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| 360 | #define AC_AMP_GET_LEFT (1<<13)
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| 361 | #define AC_AMP_GET_RIGHT (0<<13)
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| 362 | #define AC_AMP_GET_OUTPUT (1<<15)
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| 363 | #define AC_AMP_GET_INPUT (0<<15)
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| 364 |
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| 365 | #define AC_AMP_SET_INDEX (0xf<<8)
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| 366 | #define AC_AMP_SET_INDEX_SHIFT 8
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| 367 | #define AC_AMP_SET_RIGHT (1<<12)
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| 368 | #define AC_AMP_SET_LEFT (1<<13)
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| 369 | #define AC_AMP_SET_INPUT (1<<14)
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| 370 | #define AC_AMP_SET_OUTPUT (1<<15)
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| 371 |
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| 372 | /* DIGITAL1 bits */
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| 373 | #define AC_DIG1_ENABLE (1<<0)
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| 374 | #define AC_DIG1_V (1<<1)
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| 375 | #define AC_DIG1_VCFG (1<<2)
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| 376 | #define AC_DIG1_EMPHASIS (1<<3)
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| 377 | #define AC_DIG1_COPYRIGHT (1<<4)
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| 378 | #define AC_DIG1_NONAUDIO (1<<5)
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| 379 | #define AC_DIG1_PROFESSIONAL (1<<6)
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| 380 | #define AC_DIG1_LEVEL (1<<7)
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| 381 |
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| 382 | /* DIGITAL2 bits */
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| 383 | #define AC_DIG2_CC (0x7f<<0)
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| 384 |
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| 385 | /* DIGITAL3 bits */
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| 386 | #define AC_DIG3_ICT (0xf<<0)
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| 387 | #define AC_DIG3_KAE (1<<7)
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| 388 |
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| 389 | /* Pin widget control - 8bit */
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| 390 | #define AC_PINCTL_EPT (0x3<<0)
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| 391 | #define AC_PINCTL_EPT_NATIVE 0
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| 392 | #define AC_PINCTL_EPT_HBR 3
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| 393 | #define AC_PINCTL_VREFEN (0x7<<0)
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| 394 | #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
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| 395 | #define AC_PINCTL_VREF_50 1 /* 50% */
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| 396 | #define AC_PINCTL_VREF_GRD 2 /* ground */
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| 397 | #define AC_PINCTL_VREF_80 4 /* 80% */
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| 398 | #define AC_PINCTL_VREF_100 5 /* 100% */
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| 399 | #define AC_PINCTL_IN_EN (1<<5)
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| 400 | #define AC_PINCTL_OUT_EN (1<<6)
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| 401 | #define AC_PINCTL_HP_EN (1<<7)
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| 402 |
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| 403 | /* Pin sense - 32bit */
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| 404 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
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| 405 | #define AC_PINSENSE_PRESENCE (1<<31)
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| 406 | #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
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| 407 |
|
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| 408 | /* EAPD/BTL enable - 32bit */
|
|---|
| 409 | #define AC_EAPDBTL_BALANCED (1<<0)
|
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| 410 | #define AC_EAPDBTL_EAPD (1<<1)
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| 411 | #define AC_EAPDBTL_LR_SWAP (1<<2)
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| 412 |
|
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| 413 | /* HDMI ELD data */
|
|---|
| 414 | #define AC_ELDD_ELD_VALID (1<<31)
|
|---|
| 415 | #define AC_ELDD_ELD_DATA 0xff
|
|---|
| 416 |
|
|---|
| 417 | /* HDMI DIP size */
|
|---|
| 418 | #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
|
|---|
| 419 | #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
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| 420 |
|
|---|
| 421 | /* HDMI DIP index */
|
|---|
| 422 | #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
|
|---|
| 423 | #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
|
|---|
| 424 |
|
|---|
| 425 | /* HDMI DIP xmit (transmit) control */
|
|---|
| 426 | #define AC_DIPXMIT_MASK (0x3<<6)
|
|---|
| 427 | #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
|
|---|
| 428 | #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
|
|---|
| 429 | #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
|
|---|
| 430 |
|
|---|
| 431 | /* HDMI content protection (CP) control */
|
|---|
| 432 | #define AC_CPCTRL_CES (1<<9) /* current encryption state */
|
|---|
| 433 | #define AC_CPCTRL_READY (1<<8) /* ready bit */
|
|---|
| 434 | #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
|
|---|
| 435 | #define AC_CPCTRL_STATE (3<<0) /* current CP request state */
|
|---|
| 436 |
|
|---|
| 437 | /* Converter channel <-> HDMI slot mapping */
|
|---|
| 438 | #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
|
|---|
| 439 | #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
|
|---|
| 440 |
|
|---|
| 441 | /* configuration default - 32bit */
|
|---|
| 442 | #define AC_DEFCFG_SEQUENCE (0xf<<0)
|
|---|
| 443 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4)
|
|---|
| 444 | #define AC_DEFCFG_ASSOC_SHIFT 4
|
|---|
| 445 | #define AC_DEFCFG_MISC (0xf<<8)
|
|---|
| 446 | #define AC_DEFCFG_MISC_SHIFT 8
|
|---|
| 447 | #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
|
|---|
| 448 | #define AC_DEFCFG_COLOR (0xf<<12)
|
|---|
| 449 | #define AC_DEFCFG_COLOR_SHIFT 12
|
|---|
| 450 | #define AC_DEFCFG_CONN_TYPE (0xf<<16)
|
|---|
| 451 | #define AC_DEFCFG_CONN_TYPE_SHIFT 16
|
|---|
| 452 | #define AC_DEFCFG_DEVICE (0xf<<20)
|
|---|
| 453 | #define AC_DEFCFG_DEVICE_SHIFT 20
|
|---|
| 454 | #define AC_DEFCFG_LOCATION (0x3f<<24)
|
|---|
| 455 | #define AC_DEFCFG_LOCATION_SHIFT 24
|
|---|
| 456 | #define AC_DEFCFG_PORT_CONN (0x3<<30)
|
|---|
| 457 | #define AC_DEFCFG_PORT_CONN_SHIFT 30
|
|---|
| 458 |
|
|---|
| 459 | /* Display pin's device list entry */
|
|---|
| 460 | #define AC_DE_PD (1<<0)
|
|---|
| 461 | #define AC_DE_ELDV (1<<1)
|
|---|
| 462 | #define AC_DE_IA (1<<2)
|
|---|
| 463 |
|
|---|
| 464 | /* device types (0x0-0xf) */
|
|---|
| 465 | enum {
|
|---|
| 466 | AC_JACK_LINE_OUT,
|
|---|
| 467 | AC_JACK_SPEAKER,
|
|---|
| 468 | AC_JACK_HP_OUT,
|
|---|
| 469 | AC_JACK_CD,
|
|---|
| 470 | AC_JACK_SPDIF_OUT,
|
|---|
| 471 | AC_JACK_DIG_OTHER_OUT,
|
|---|
| 472 | AC_JACK_MODEM_LINE_SIDE,
|
|---|
| 473 | AC_JACK_MODEM_HAND_SIDE,
|
|---|
| 474 | AC_JACK_LINE_IN,
|
|---|
| 475 | AC_JACK_AUX,
|
|---|
| 476 | AC_JACK_MIC_IN,
|
|---|
| 477 | AC_JACK_TELEPHONY,
|
|---|
| 478 | AC_JACK_SPDIF_IN,
|
|---|
| 479 | AC_JACK_DIG_OTHER_IN,
|
|---|
| 480 | AC_JACK_OTHER = 0xf,
|
|---|
| 481 | };
|
|---|
| 482 |
|
|---|
| 483 | /* jack connection types (0x0-0xf) */
|
|---|
| 484 | enum {
|
|---|
| 485 | AC_JACK_CONN_UNKNOWN,
|
|---|
| 486 | AC_JACK_CONN_1_8,
|
|---|
| 487 | AC_JACK_CONN_1_4,
|
|---|
| 488 | AC_JACK_CONN_ATAPI,
|
|---|
| 489 | AC_JACK_CONN_RCA,
|
|---|
| 490 | AC_JACK_CONN_OPTICAL,
|
|---|
| 491 | AC_JACK_CONN_OTHER_DIGITAL,
|
|---|
| 492 | AC_JACK_CONN_OTHER_ANALOG,
|
|---|
| 493 | AC_JACK_CONN_DIN,
|
|---|
| 494 | AC_JACK_CONN_XLR,
|
|---|
| 495 | AC_JACK_CONN_RJ11,
|
|---|
| 496 | AC_JACK_CONN_COMB,
|
|---|
| 497 | AC_JACK_CONN_OTHER = 0xf,
|
|---|
| 498 | };
|
|---|
| 499 |
|
|---|
| 500 | /* jack colors (0x0-0xf) */
|
|---|
| 501 | enum {
|
|---|
| 502 | AC_JACK_COLOR_UNKNOWN,
|
|---|
| 503 | AC_JACK_COLOR_BLACK,
|
|---|
| 504 | AC_JACK_COLOR_GREY,
|
|---|
| 505 | AC_JACK_COLOR_BLUE,
|
|---|
| 506 | AC_JACK_COLOR_GREEN,
|
|---|
| 507 | AC_JACK_COLOR_RED,
|
|---|
| 508 | AC_JACK_COLOR_ORANGE,
|
|---|
| 509 | AC_JACK_COLOR_YELLOW,
|
|---|
| 510 | AC_JACK_COLOR_PURPLE,
|
|---|
| 511 | AC_JACK_COLOR_PINK,
|
|---|
| 512 | AC_JACK_COLOR_WHITE = 0xe,
|
|---|
| 513 | AC_JACK_COLOR_OTHER,
|
|---|
| 514 | };
|
|---|
| 515 |
|
|---|
| 516 | /* Jack location (0x0-0x3f) */
|
|---|
| 517 | /* common case */
|
|---|
| 518 | enum {
|
|---|
| 519 | AC_JACK_LOC_NONE,
|
|---|
| 520 | AC_JACK_LOC_REAR,
|
|---|
| 521 | AC_JACK_LOC_FRONT,
|
|---|
| 522 | AC_JACK_LOC_LEFT,
|
|---|
| 523 | AC_JACK_LOC_RIGHT,
|
|---|
| 524 | AC_JACK_LOC_TOP,
|
|---|
| 525 | AC_JACK_LOC_BOTTOM,
|
|---|
| 526 | };
|
|---|
| 527 | /* bits 4-5 */
|
|---|
| 528 | enum {
|
|---|
| 529 | AC_JACK_LOC_EXTERNAL = 0x00,
|
|---|
| 530 | AC_JACK_LOC_INTERNAL = 0x10,
|
|---|
| 531 | AC_JACK_LOC_SEPARATE = 0x20,
|
|---|
| 532 | AC_JACK_LOC_OTHER = 0x30,
|
|---|
| 533 | };
|
|---|
| 534 | enum {
|
|---|
| 535 | /* external on primary chasis */
|
|---|
| 536 | AC_JACK_LOC_REAR_PANEL = 0x07,
|
|---|
| 537 | AC_JACK_LOC_DRIVE_BAY,
|
|---|
| 538 | /* internal */
|
|---|
| 539 | AC_JACK_LOC_RISER = 0x17,
|
|---|
| 540 | AC_JACK_LOC_HDMI,
|
|---|
| 541 | AC_JACK_LOC_ATAPI,
|
|---|
| 542 | /* others */
|
|---|
| 543 | AC_JACK_LOC_MOBILE_IN = 0x37,
|
|---|
| 544 | AC_JACK_LOC_MOBILE_OUT,
|
|---|
| 545 | };
|
|---|
| 546 |
|
|---|
| 547 | /* Port connectivity (0-3) */
|
|---|
| 548 | enum {
|
|---|
| 549 | AC_JACK_PORT_COMPLEX,
|
|---|
| 550 | AC_JACK_PORT_NONE,
|
|---|
| 551 | AC_JACK_PORT_FIXED,
|
|---|
| 552 | AC_JACK_PORT_BOTH,
|
|---|
| 553 | };
|
|---|
| 554 |
|
|---|
| 555 | /* max. codec address */
|
|---|
| 556 | #define HDA_MAX_CODEC_ADDRESS 0x0f
|
|---|
| 557 |
|
|---|
| 558 | #endif /* __SOUND_HDA_VERBS_H */
|
|---|
