source: GPL/branches/uniaud32-next/lib32/regmap.c@ 660

Last change on this file since 660 was 654, checked in by Paul Smedley, 5 years ago

Fix warnings

File size: 79.7 KB
Line 
1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9/* from 5.10.10 */
10
11#include <linux/device.h>
12#include <linux/slab.h>
13#include <linux/export.h>
14#include <linux/mutex.h>
15#include <linux/err.h>
16//#include <linux/property.h>
17#include <linux/rbtree.h>
18#include <linux/sched.h>
19#include <linux/delay.h>
20#include <linux/log2.h>
21//#include <linux/hwspinlock.h>
22#include <asm/unaligned.h>
23#include <linux/module.h>
24#include <linux/workqueue.h>
25#include <linux/byteorder/little_endian.h>
26#include <linux/printk.h>
27
28/* hwspinlock mode argument */
29#define HWLOCK_IRQSTATE 0x01 /* Disable interrupts, save state */
30#define HWLOCK_IRQ 0x02 /* Disable interrupts, don't save state */
31#define HWLOCK_RAW 0x03
32
33#define CREATE_TRACE_POINTS
34//#include "trace.h"
35
36#include "internal.h"
37
38/*
39 * Sometimes for failures during very early init the trace
40 * infrastructure isn't available early enough to be used. For this
41 * sort of problem defining LOG_DEVICE will add printks for basic
42 * register I/O on a specific device.
43 */
44#undef LOG_DEVICE
45
46#ifdef LOG_DEVICE
47static inline bool regmap_should_log(struct regmap *map)
48{
49 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
50}
51#else
52static inline bool regmap_should_log(struct regmap *map) { return false; }
53#endif
54
55
56static int _regmap_update_bits(struct regmap *map, unsigned int reg,
57 unsigned int mask, unsigned int val,
58 bool *change, bool force_write);
59
60static int _regmap_bus_reg_read(void *context, unsigned int reg,
61 unsigned int *val);
62static int _regmap_bus_read(void *context, unsigned int reg,
63 unsigned int *val);
64static int _regmap_bus_formatted_write(void *context, unsigned int reg,
65 unsigned int val);
66static int _regmap_bus_reg_write(void *context, unsigned int reg,
67 unsigned int val);
68static int _regmap_bus_raw_write(void *context, unsigned int reg,
69 unsigned int val);
70
71bool regmap_reg_in_ranges(unsigned int reg,
72 const struct regmap_range *ranges,
73 unsigned int nranges)
74{
75 const struct regmap_range *r;
76 int i;
77
78 for (i = 0, r = ranges; i < nranges; i++, r++)
79 if (regmap_reg_in_range(reg, r))
80 return true;
81 return false;
82}
83EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
84
85bool regmap_check_range_table(struct regmap *map, unsigned int reg,
86 const struct regmap_access_table *table)
87{
88 /* Check "no ranges" first */
89 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
90 return false;
91
92 /* In case zero "yes ranges" are supplied, any reg is OK */
93 if (!table->n_yes_ranges)
94 return true;
95
96 return regmap_reg_in_ranges(reg, table->yes_ranges,
97 table->n_yes_ranges);
98}
99EXPORT_SYMBOL_GPL(regmap_check_range_table);
100
101bool regmap_writeable(struct regmap *map, unsigned int reg)
102{
103 if (map->max_register && reg > map->max_register)
104 return false;
105
106 if (map->writeable_reg)
107 return map->writeable_reg(map->dev, reg);
108
109 if (map->wr_table)
110 return regmap_check_range_table(map, reg, map->wr_table);
111
112 return true;
113}
114
115bool regmap_cached(struct regmap *map, unsigned int reg)
116{
117 int ret;
118 unsigned int val;
119
120 if (map->cache_type == REGCACHE_NONE)
121 return false;
122
123 if (!map->cache_ops)
124 return false;
125
126 if (map->max_register && reg > map->max_register)
127 return false;
128
129 map->lock(map->lock_arg);
130 ret = regcache_read(map, reg, &val);
131 map->unlock(map->lock_arg);
132 if (ret)
133 return false;
134
135 return true;
136}
137
138bool regmap_readable(struct regmap *map, unsigned int reg)
139{
140 if (!map->reg_read)
141 return false;
142
143 if (map->max_register && reg > map->max_register)
144 return false;
145
146 if (map->format.format_write)
147 return false;
148
149 if (map->readable_reg)
150 return map->readable_reg(map->dev, reg);
151
152 if (map->rd_table)
153 return regmap_check_range_table(map, reg, map->rd_table);
154
155 return true;
156}
157
158bool regmap_volatile(struct regmap *map, unsigned int reg)
159{
160 if (!map->format.format_write && !regmap_readable(map, reg))
161 return false;
162
163 if (map->volatile_reg)
164 return map->volatile_reg(map->dev, reg);
165
166 if (map->volatile_table)
167 return regmap_check_range_table(map, reg, map->volatile_table);
168
169 if (map->cache_ops)
170 return false;
171 else
172 return true;
173}
174
175bool regmap_precious(struct regmap *map, unsigned int reg)
176{
177 if (!regmap_readable(map, reg))
178 return false;
179
180 if (map->precious_reg)
181 return map->precious_reg(map->dev, reg);
182
183 if (map->precious_table)
184 return regmap_check_range_table(map, reg, map->precious_table);
185
186 return false;
187}
188
189bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->writeable_noinc_reg)
192 return map->writeable_noinc_reg(map->dev, reg);
193
194 if (map->wr_noinc_table)
195 return regmap_check_range_table(map, reg, map->wr_noinc_table);
196
197 return true;
198}
199
200bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
201{
202 if (map->readable_noinc_reg)
203 return map->readable_noinc_reg(map->dev, reg);
204
205 if (map->rd_noinc_table)
206 return regmap_check_range_table(map, reg, map->rd_noinc_table);
207
208 return true;
209}
210
211static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
212 size_t num)
213{
214 unsigned int i;
215
216 for (i = 0; i < num; i++)
217 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
218 return false;
219
220 return true;
221}
222
223static void regmap_format_12_20_write(struct regmap *map,
224 unsigned int reg, unsigned int val)
225{
226 u8 *out = map->work_buf;
227
228 out[0] = reg >> 4;
229 out[1] = (reg << 4) | (val >> 16);
230 out[2] = val >> 8;
231 out[3] = val;
232}
233
234
235static void regmap_format_2_6_write(struct regmap *map,
236 unsigned int reg, unsigned int val)
237{
238 u8 *out = map->work_buf;
239
240 *out = (reg << 6) | val;
241}
242
243static void regmap_format_4_12_write(struct regmap *map,
244 unsigned int reg, unsigned int val)
245{
246 __be16 *out = map->work_buf;
247 *out = cpu_to_be16((reg << 12) | val);
248}
249
250static void regmap_format_7_9_write(struct regmap *map,
251 unsigned int reg, unsigned int val)
252{
253 __be16 *out = map->work_buf;
254 *out = cpu_to_be16((reg << 9) | val);
255}
256
257static void regmap_format_10_14_write(struct regmap *map,
258 unsigned int reg, unsigned int val)
259{
260 u8 *out = map->work_buf;
261
262 out[2] = val;
263 out[1] = (val >> 8) | (reg << 6);
264 out[0] = reg >> 2;
265}
266
267static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
268{
269 u8 *b = buf;
270
271 b[0] = val << shift;
272}
273
274static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
275{
276 put_unaligned_be16(val << shift, buf);
277}
278
279static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
280{
281 put_unaligned_le16(val << shift, buf);
282}
283
284static void regmap_format_16_native(void *buf, unsigned int val,
285 unsigned int shift)
286{
287 u16 v = val << shift;
288
289 memcpy(buf, &v, sizeof(v));
290}
291
292static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
293{
294 u8 *b = buf;
295
296 val <<= shift;
297
298 b[0] = val >> 16;
299 b[1] = val >> 8;
300 b[2] = val;
301}
302
303static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
304{
305 put_unaligned_be32(val << shift, buf);
306}
307
308static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
309{
310 put_unaligned_le32(val << shift, buf);
311}
312
313static void regmap_format_32_native(void *buf, unsigned int val,
314 unsigned int shift)
315{
316 u32 v = val << shift;
317
318 memcpy(buf, &v, sizeof(v));
319}
320
321#ifdef CONFIG_64BIT
322static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
323{
324 put_unaligned_be64((u64) val << shift, buf);
325}
326
327static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
328{
329 put_unaligned_le64((u64) val << shift, buf);
330}
331
332static void regmap_format_64_native(void *buf, unsigned int val,
333 unsigned int shift)
334{
335 u64 v = (u64) val << shift;
336
337 memcpy(buf, &v, sizeof(v));
338}
339#endif
340
341static void regmap_parse_inplace_noop(void *buf)
342{
343}
344
345static unsigned int regmap_parse_8(const void *buf)
346{
347 const u8 *b = buf;
348
349 return b[0];
350}
351
352static unsigned int regmap_parse_16_be(const void *buf)
353{
354 return get_unaligned_be16(buf);
355}
356
357static unsigned int regmap_parse_16_le(const void *buf)
358{
359 return get_unaligned_le16(buf);
360}
361
362static void regmap_parse_16_be_inplace(void *buf)
363{
364 u16 v = get_unaligned_be16(buf);
365
366 memcpy(buf, &v, sizeof(v));
367}
368
369static void regmap_parse_16_le_inplace(void *buf)
370{
371 u16 v = get_unaligned_le16(buf);
372
373 memcpy(buf, &v, sizeof(v));
374}
375
376static unsigned int regmap_parse_16_native(const void *buf)
377{
378 u16 v;
379
380 memcpy(&v, buf, sizeof(v));
381 return v;
382}
383
384static unsigned int regmap_parse_24(const void *buf)
385{
386 const u8 *b = buf;
387 unsigned int ret = b[2];
388 ret |= ((unsigned int)b[1]) << 8;
389 ret |= ((unsigned int)b[0]) << 16;
390
391 return ret;
392}
393
394static unsigned int regmap_parse_32_be(const void *buf)
395{
396 return get_unaligned_be32(buf);
397}
398
399static unsigned int regmap_parse_32_le(const void *buf)
400{
401 return get_unaligned_le32(buf);
402}
403
404static void regmap_parse_32_be_inplace(void *buf)
405{
406 u32 v = get_unaligned_be32(buf);
407
408 memcpy(buf, &v, sizeof(v));
409}
410
411static void regmap_parse_32_le_inplace(void *buf)
412{
413 u32 v = get_unaligned_le32(buf);
414
415 memcpy(buf, &v, sizeof(v));
416}
417
418static unsigned int regmap_parse_32_native(const void *buf)
419{
420 u32 v;
421
422 memcpy(&v, buf, sizeof(v));
423 return v;
424}
425
426#ifdef CONFIG_64BIT
427static unsigned int regmap_parse_64_be(const void *buf)
428{
429 return get_unaligned_be64(buf);
430}
431
432static unsigned int regmap_parse_64_le(const void *buf)
433{
434 return get_unaligned_le64(buf);
435}
436
437static void regmap_parse_64_be_inplace(void *buf)
438{
439 u64 v = get_unaligned_be64(buf);
440
441 memcpy(buf, &v, sizeof(v));
442}
443
444static void regmap_parse_64_le_inplace(void *buf)
445{
446 u64 v = get_unaligned_le64(buf);
447
448 memcpy(buf, &v, sizeof(v));
449}
450
451static unsigned int regmap_parse_64_native(const void *buf)
452{
453 u64 v;
454
455 memcpy(&v, buf, sizeof(v));
456 return v;
457}
458#endif
459
460static void regmap_lock_hwlock(void *__map)
461{
462#ifndef TARGET_OS2
463 struct regmap *map = __map;
464
465 hwspin_lock_timeout(map->hwlock, UINT_MAX);
466#endif
467}
468
469static void regmap_lock_hwlock_irq(void *__map)
470{
471#ifndef TARGET_OS2
472 struct regmap *map = __map;
473
474 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
475#endif
476}
477
478static void regmap_lock_hwlock_irqsave(void *__map)
479{
480#ifndef TARGET_OS2
481 struct regmap *map = __map;
482
483 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
484 &map->spinlock_flags);
485#endif
486}
487
488static void regmap_unlock_hwlock(void *__map)
489{
490#ifndef TARGET_OS2
491 struct regmap *map = __map;
492
493 hwspin_unlock(map->hwlock);
494#endif
495}
496
497static void regmap_unlock_hwlock_irq(void *__map)
498{
499#ifndef TARGET_OS2
500 struct regmap *map = __map;
501
502 hwspin_unlock_irq(map->hwlock);
503#endif
504}
505
506static void regmap_unlock_hwlock_irqrestore(void *__map)
507{
508#ifndef TARGET_OS2
509 struct regmap *map = __map;
510
511 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
512#endif
513}
514
515static void regmap_lock_unlock_none(void *__map)
516{
517
518}
519
520static void regmap_lock_mutex(void *__map)
521{
522 struct regmap *map = __map;
523 mutex_lock(&map->mutex);
524}
525
526static void regmap_unlock_mutex(void *__map)
527{
528 struct regmap *map = __map;
529 mutex_unlock(&map->mutex);
530}
531
532static void regmap_lock_spinlock(void *__map)
533__acquires(&map->spinlock)
534{
535 struct regmap *map = __map;
536 unsigned long flags;
537
538 spin_lock_irqsave(&map->spinlock, flags);
539 map->spinlock_flags = flags;
540}
541
542static void regmap_unlock_spinlock(void *__map)
543__releases(&map->spinlock)
544{
545 struct regmap *map = __map;
546 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
547}
548
549static void dev_get_regmap_release(struct device *dev, void *res)
550{
551 /*
552 * We don't actually have anything to do here; the goal here
553 * is not to manage the regmap but to provide a simple way to
554 * get the regmap back given a struct device.
555 */
556}
557
558static bool _regmap_range_add(struct regmap *map,
559 struct regmap_range_node *data)
560{
561 struct rb_root *root = &map->range_tree;
562 struct rb_node **new = &(root->rb_node), *parent = NULL;
563
564 while (*new) {
565 struct regmap_range_node *this =
566 rb_entry(*new, struct regmap_range_node, node);
567
568 parent = *new;
569 if (data->range_max < this->range_min)
570 new = &((*new)->rb_left);
571 else if (data->range_min > this->range_max)
572 new = &((*new)->rb_right);
573 else
574 return false;
575 }
576
577 rb_link_node(&data->node, parent, new);
578 rb_insert_color(&data->node, root);
579
580 return true;
581}
582
583static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
584 unsigned int reg)
585{
586 struct rb_node *node = map->range_tree.rb_node;
587
588 while (node) {
589 struct regmap_range_node *this =
590 rb_entry(node, struct regmap_range_node, node);
591
592 if (reg < this->range_min)
593 node = node->rb_left;
594 else if (reg > this->range_max)
595 node = node->rb_right;
596 else
597 return this;
598 }
599
600 return NULL;
601}
602
603static void regmap_range_exit(struct regmap *map)
604{
605 struct rb_node *next;
606 struct regmap_range_node *range_node;
607
608 next = rb_first(&map->range_tree);
609 while (next) {
610 range_node = rb_entry(next, struct regmap_range_node, node);
611 next = rb_next(&range_node->node);
612 rb_erase(&range_node->node, &map->range_tree);
613 kfree(range_node);
614 }
615
616 kfree(map->selector_work_buf);
617}
618
619static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
620{
621 if (config->name) {
622#ifndef TARGET_OS2
623 const char *name = kstrdup_const(config->name, GFP_KERNEL);
624#else
625 const char *name = config->name;
626#endif
627
628 if (!name)
629 return -ENOMEM;
630
631#ifndef TARGET_OS2
632 kfree_const(map->name);
633#else
634 kfree(map->name);
635#endif
636 map->name = name;
637 }
638
639 return 0;
640}
641
642int regmap_attach_dev(struct device *dev, struct regmap *map,
643 const struct regmap_config *config)
644{
645 struct regmap **m;
646 int ret;
647
648 map->dev = dev;
649
650 ret = regmap_set_name(map, config);
651 if (ret)
652 return ret;
653
654 regmap_debugfs_init(map);
655
656 /* Add a devres resource for dev_get_regmap() */
657 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
658 if (!m) {
659 regmap_debugfs_exit(map);
660 return -ENOMEM;
661 }
662 *m = map;
663 devres_add(dev, m);
664
665 return 0;
666}
667EXPORT_SYMBOL_GPL(regmap_attach_dev);
668
669static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
670 const struct regmap_config *config)
671{
672 enum regmap_endian endian;
673
674 /* Retrieve the endianness specification from the regmap config */
675 endian = config->reg_format_endian;
676
677 /* If the regmap config specified a non-default value, use that */
678 if (endian != REGMAP_ENDIAN_DEFAULT)
679 return endian;
680
681 /* Retrieve the endianness specification from the bus config */
682 if (bus && bus->reg_format_endian_default)
683 endian = bus->reg_format_endian_default;
684
685 /* If the bus specified a non-default value, use that */
686 if (endian != REGMAP_ENDIAN_DEFAULT)
687 return endian;
688
689 /* Use this if no other value was found */
690 return REGMAP_ENDIAN_BIG;
691}
692
693enum regmap_endian regmap_get_val_endian(struct device *dev,
694 const struct regmap_bus *bus,
695 const struct regmap_config *config)
696{
697#ifndef TARGET_OS2
698 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
699#endif
700 enum regmap_endian endian;
701
702 /* Retrieve the endianness specification from the regmap config */
703 endian = config->val_format_endian;
704
705 /* If the regmap config specified a non-default value, use that */
706 if (endian != REGMAP_ENDIAN_DEFAULT)
707 return endian;
708
709#ifndef TARGET_OS2
710 /* If the firmware node exist try to get endianness from it */
711 if (fwnode_property_read_bool(fwnode, "big-endian"))
712 endian = REGMAP_ENDIAN_BIG;
713 else if (fwnode_property_read_bool(fwnode, "little-endian"))
714 endian = REGMAP_ENDIAN_LITTLE;
715 else if (fwnode_property_read_bool(fwnode, "native-endian"))
716 endian = REGMAP_ENDIAN_NATIVE;
717#endif
718 /* If the endianness was specified in fwnode, use that */
719 if (endian != REGMAP_ENDIAN_DEFAULT)
720 return endian;
721
722 /* Retrieve the endianness specification from the bus config */
723 if (bus && bus->val_format_endian_default)
724 endian = bus->val_format_endian_default;
725
726 /* If the bus specified a non-default value, use that */
727 if (endian != REGMAP_ENDIAN_DEFAULT)
728 return endian;
729
730 /* Use this if no other value was found */
731 return REGMAP_ENDIAN_BIG;
732}
733EXPORT_SYMBOL_GPL(regmap_get_val_endian);
734
735struct regmap *__regmap_init(struct device *dev,
736 const struct regmap_bus *bus,
737 void *bus_context,
738 const struct regmap_config *config,
739 struct lock_class_key *lock_key,
740 const char *lock_name)
741{
742 struct regmap *map;
743 int ret = -EINVAL;
744 enum regmap_endian reg_endian, val_endian;
745 int i, j;
746#ifdef TARGET_OS2
747 // 2020-11-17 SHL FIXME patched struct rb_root
748 struct rb_root _RB_ROOT = { NULL, };
749#endif
750
751 if (!config)
752 goto err;
753
754 map = kzalloc(sizeof(*map), GFP_KERNEL);
755 if (map == NULL) {
756 ret = -ENOMEM;
757 goto err;
758 }
759
760 ret = regmap_set_name(map, config);
761 if (ret)
762 goto err_map;
763
764 ret = -EINVAL; /* Later error paths rely on this */
765
766 if (config->disable_locking) {
767 map->lock = map->unlock = regmap_lock_unlock_none;
768 map->can_sleep = config->can_sleep;
769 regmap_debugfs_disable(map);
770 } else if (config->lock && config->unlock) {
771 map->lock = config->lock;
772 map->unlock = config->unlock;
773 map->lock_arg = config->lock_arg;
774 map->can_sleep = config->can_sleep;
775 } else if (config->use_hwlock) {
776#ifndef TARGET_OS2
777 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
778 if (!map->hwlock) {
779 ret = -ENXIO;
780 goto err_name;
781 }
782#endif
783 switch (config->hwlock_mode) {
784 case HWLOCK_IRQSTATE:
785 map->lock = regmap_lock_hwlock_irqsave;
786 map->unlock = regmap_unlock_hwlock_irqrestore;
787 break;
788 case HWLOCK_IRQ:
789 map->lock = regmap_lock_hwlock_irq;
790 map->unlock = regmap_unlock_hwlock_irq;
791 break;
792 default:
793 map->lock = regmap_lock_hwlock;
794 map->unlock = regmap_unlock_hwlock;
795 break;
796 }
797
798 map->lock_arg = map;
799 } else {
800 if ((bus && bus->fast_io) ||
801 config->fast_io) {
802 spin_lock_init(&map->spinlock);
803 map->lock = regmap_lock_spinlock;
804 map->unlock = regmap_unlock_spinlock;
805 lockdep_set_class_and_name(&map->spinlock,
806 lock_key, lock_name);
807 } else {
808 mutex_init(&map->mutex);
809 map->lock = regmap_lock_mutex;
810 map->unlock = regmap_unlock_mutex;
811 map->can_sleep = true;
812 lockdep_set_class_and_name(&map->mutex,
813 lock_key, lock_name);
814 }
815 map->lock_arg = map;
816 }
817
818 /*
819 * When we write in fast-paths with regmap_bulk_write() don't allocate
820 * scratch buffers with sleeping allocations.
821 */
822 if ((bus && bus->fast_io) || config->fast_io)
823 map->alloc_flags = GFP_ATOMIC;
824 else
825 map->alloc_flags = GFP_KERNEL;
826
827 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
828 map->format.pad_bytes = config->pad_bits / 8;
829 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
830 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
831 config->val_bits + config->pad_bits, 8);
832 map->reg_shift = config->pad_bits % 8;
833 if (config->reg_stride)
834 map->reg_stride = config->reg_stride;
835 else
836 map->reg_stride = 1;
837 if (is_power_of_2(map->reg_stride))
838 map->reg_stride_order = ilog2(map->reg_stride);
839 else
840 map->reg_stride_order = -1;
841 map->use_single_read = config->use_single_read || !bus || !bus->read;
842 map->use_single_write = config->use_single_write || !bus || !bus->write;
843 map->can_multi_write = config->can_multi_write && bus && bus->write;
844 if (bus) {
845 map->max_raw_read = bus->max_raw_read;
846 map->max_raw_write = bus->max_raw_write;
847 }
848 map->dev = dev;
849 map->bus = bus;
850 map->bus_context = bus_context;
851 map->max_register = config->max_register;
852 map->wr_table = config->wr_table;
853 map->rd_table = config->rd_table;
854 map->volatile_table = config->volatile_table;
855 map->precious_table = config->precious_table;
856 map->wr_noinc_table = config->wr_noinc_table;
857 map->rd_noinc_table = config->rd_noinc_table;
858 map->writeable_reg = config->writeable_reg;
859 map->readable_reg = config->readable_reg;
860 map->volatile_reg = config->volatile_reg;
861 map->precious_reg = config->precious_reg;
862 map->writeable_noinc_reg = config->writeable_noinc_reg;
863 map->readable_noinc_reg = config->readable_noinc_reg;
864 map->cache_type = config->cache_type;
865
866 spin_lock_init(&map->async_lock);
867 INIT_LIST_HEAD(&map->async_list);
868 INIT_LIST_HEAD(&map->async_free);
869 init_waitqueue_head(&map->async_waitq);
870
871 if (config->read_flag_mask ||
872 config->write_flag_mask ||
873 config->zero_flag_mask) {
874 map->read_flag_mask = config->read_flag_mask;
875 map->write_flag_mask = config->write_flag_mask;
876 } else if (bus) {
877 map->read_flag_mask = bus->read_flag_mask;
878 }
879
880 if (!bus) {
881 map->reg_read = config->reg_read;
882 map->reg_write = config->reg_write;
883
884 map->defer_caching = false;
885 goto skip_format_initialization;
886 } else if (!bus->read || !bus->write) {
887 map->reg_read = _regmap_bus_reg_read;
888 map->reg_write = _regmap_bus_reg_write;
889 map->reg_update_bits = bus->reg_update_bits;
890
891 map->defer_caching = false;
892 goto skip_format_initialization;
893 } else {
894 map->reg_read = _regmap_bus_read;
895 map->reg_update_bits = bus->reg_update_bits;
896 }
897
898 reg_endian = regmap_get_reg_endian(bus, config);
899 val_endian = regmap_get_val_endian(dev, bus, config);
900
901 switch (config->reg_bits + map->reg_shift) {
902 case 2:
903 switch (config->val_bits) {
904 case 6:
905 map->format.format_write = regmap_format_2_6_write;
906 break;
907 default:
908 goto err_hwlock;
909 }
910 break;
911
912 case 4:
913 switch (config->val_bits) {
914 case 12:
915 map->format.format_write = regmap_format_4_12_write;
916 break;
917 default:
918 goto err_hwlock;
919 }
920 break;
921
922 case 7:
923 switch (config->val_bits) {
924 case 9:
925 map->format.format_write = regmap_format_7_9_write;
926 break;
927 default:
928 goto err_hwlock;
929 }
930 break;
931
932 case 10:
933 switch (config->val_bits) {
934 case 14:
935 map->format.format_write = regmap_format_10_14_write;
936 break;
937 default:
938 goto err_hwlock;
939 }
940 break;
941
942 case 12:
943 switch (config->val_bits) {
944 case 20:
945 map->format.format_write = regmap_format_12_20_write;
946 break;
947 default:
948 goto err_hwlock;
949 }
950 break;
951
952 case 8:
953 map->format.format_reg = regmap_format_8;
954 break;
955
956 case 16:
957 switch (reg_endian) {
958 case REGMAP_ENDIAN_BIG:
959 map->format.format_reg = regmap_format_16_be;
960 break;
961 case REGMAP_ENDIAN_LITTLE:
962 map->format.format_reg = regmap_format_16_le;
963 break;
964 case REGMAP_ENDIAN_NATIVE:
965 map->format.format_reg = regmap_format_16_native;
966 break;
967 default:
968 goto err_hwlock;
969 }
970 break;
971
972 case 24:
973 if (reg_endian != REGMAP_ENDIAN_BIG)
974 goto err_hwlock;
975 map->format.format_reg = regmap_format_24;
976 break;
977
978 case 32:
979 switch (reg_endian) {
980 case REGMAP_ENDIAN_BIG:
981 map->format.format_reg = regmap_format_32_be;
982 break;
983 case REGMAP_ENDIAN_LITTLE:
984 map->format.format_reg = regmap_format_32_le;
985 break;
986 case REGMAP_ENDIAN_NATIVE:
987 map->format.format_reg = regmap_format_32_native;
988 break;
989 default:
990 goto err_hwlock;
991 }
992 break;
993
994#ifdef CONFIG_64BIT
995 case 64:
996 switch (reg_endian) {
997 case REGMAP_ENDIAN_BIG:
998 map->format.format_reg = regmap_format_64_be;
999 break;
1000 case REGMAP_ENDIAN_LITTLE:
1001 map->format.format_reg = regmap_format_64_le;
1002 break;
1003 case REGMAP_ENDIAN_NATIVE:
1004 map->format.format_reg = regmap_format_64_native;
1005 break;
1006 default:
1007 goto err_hwlock;
1008 }
1009 break;
1010#endif
1011
1012 default:
1013 goto err_hwlock;
1014 }
1015
1016 if (val_endian == REGMAP_ENDIAN_NATIVE)
1017 map->format.parse_inplace = regmap_parse_inplace_noop;
1018
1019 switch (config->val_bits) {
1020 case 8:
1021 map->format.format_val = regmap_format_8;
1022 map->format.parse_val = regmap_parse_8;
1023 map->format.parse_inplace = regmap_parse_inplace_noop;
1024 break;
1025 case 16:
1026 switch (val_endian) {
1027 case REGMAP_ENDIAN_BIG:
1028 map->format.format_val = regmap_format_16_be;
1029 map->format.parse_val = regmap_parse_16_be;
1030 map->format.parse_inplace = regmap_parse_16_be_inplace;
1031 break;
1032 case REGMAP_ENDIAN_LITTLE:
1033 map->format.format_val = regmap_format_16_le;
1034 map->format.parse_val = regmap_parse_16_le;
1035 map->format.parse_inplace = regmap_parse_16_le_inplace;
1036 break;
1037 case REGMAP_ENDIAN_NATIVE:
1038 map->format.format_val = regmap_format_16_native;
1039 map->format.parse_val = regmap_parse_16_native;
1040 break;
1041 default:
1042 goto err_hwlock;
1043 }
1044 break;
1045 case 24:
1046 if (val_endian != REGMAP_ENDIAN_BIG)
1047 goto err_hwlock;
1048 map->format.format_val = regmap_format_24;
1049 map->format.parse_val = regmap_parse_24;
1050 break;
1051 case 32:
1052 switch (val_endian) {
1053 case REGMAP_ENDIAN_BIG:
1054 map->format.format_val = regmap_format_32_be;
1055 map->format.parse_val = regmap_parse_32_be;
1056 map->format.parse_inplace = regmap_parse_32_be_inplace;
1057 break;
1058 case REGMAP_ENDIAN_LITTLE:
1059 map->format.format_val = regmap_format_32_le;
1060 map->format.parse_val = regmap_parse_32_le;
1061 map->format.parse_inplace = regmap_parse_32_le_inplace;
1062 break;
1063 case REGMAP_ENDIAN_NATIVE:
1064 map->format.format_val = regmap_format_32_native;
1065 map->format.parse_val = regmap_parse_32_native;
1066 break;
1067 default:
1068 goto err_hwlock;
1069 }
1070 break;
1071#ifdef CONFIG_64BIT
1072 case 64:
1073 switch (val_endian) {
1074 case REGMAP_ENDIAN_BIG:
1075 map->format.format_val = regmap_format_64_be;
1076 map->format.parse_val = regmap_parse_64_be;
1077 map->format.parse_inplace = regmap_parse_64_be_inplace;
1078 break;
1079 case REGMAP_ENDIAN_LITTLE:
1080 map->format.format_val = regmap_format_64_le;
1081 map->format.parse_val = regmap_parse_64_le;
1082 map->format.parse_inplace = regmap_parse_64_le_inplace;
1083 break;
1084 case REGMAP_ENDIAN_NATIVE:
1085 map->format.format_val = regmap_format_64_native;
1086 map->format.parse_val = regmap_parse_64_native;
1087 break;
1088 default:
1089 goto err_hwlock;
1090 }
1091 break;
1092#endif
1093 }
1094
1095 if (map->format.format_write) {
1096 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1097 (val_endian != REGMAP_ENDIAN_BIG))
1098 goto err_hwlock;
1099 map->use_single_write = true;
1100 }
1101
1102 if (!map->format.format_write &&
1103 !(map->format.format_reg && map->format.format_val))
1104 goto err_hwlock;
1105
1106 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1107 if (map->work_buf == NULL) {
1108 ret = -ENOMEM;
1109 goto err_hwlock;
1110 }
1111
1112 if (map->format.format_write) {
1113 map->defer_caching = false;
1114 map->reg_write = _regmap_bus_formatted_write;
1115 } else if (map->format.format_val) {
1116 map->defer_caching = true;
1117 map->reg_write = _regmap_bus_raw_write;
1118 }
1119
1120skip_format_initialization:
1121
1122#ifndef TARGET_OS2
1123 map->range_tree = RB_ROOT;
1124#else
1125 map->range_tree = _RB_ROOT;
1126 map->range_tree.rb_node = NULL;
1127 memset(&map->range_tree, 0, sizeof(struct rb_root));
1128#endif
1129 for (i = 0; i < config->num_ranges; i++) {
1130 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1131 struct regmap_range_node *new;
1132
1133 /* Sanity check */
1134 if (range_cfg->range_max < range_cfg->range_min) {
1135 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1136 range_cfg->range_max, range_cfg->range_min);
1137 goto err_range;
1138 }
1139
1140 if (range_cfg->range_max > map->max_register) {
1141 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1142 range_cfg->range_max, map->max_register);
1143 goto err_range;
1144 }
1145
1146 if (range_cfg->selector_reg > map->max_register) {
1147 dev_err(map->dev,
1148 "Invalid range %d: selector out of map\n", i);
1149 goto err_range;
1150 }
1151
1152 if (range_cfg->window_len == 0) {
1153 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1154 i);
1155 goto err_range;
1156 }
1157
1158 /* Make sure, that this register range has no selector
1159 or data window within its boundary */
1160 for (j = 0; j < config->num_ranges; j++) {
1161 unsigned sel_reg = config->ranges[j].selector_reg;
1162 unsigned win_min = config->ranges[j].window_start;
1163 unsigned win_max = win_min +
1164 config->ranges[j].window_len - 1;
1165
1166 /* Allow data window inside its own virtual range */
1167 if (j == i)
1168 continue;
1169
1170 if (range_cfg->range_min <= sel_reg &&
1171 sel_reg <= range_cfg->range_max) {
1172 dev_err(map->dev,
1173 "Range %d: selector for %d in window\n",
1174 i, j);
1175 goto err_range;
1176 }
1177
1178 if (!(win_max < range_cfg->range_min ||
1179 win_min > range_cfg->range_max)) {
1180 dev_err(map->dev,
1181 "Range %d: window for %d in window\n",
1182 i, j);
1183 goto err_range;
1184 }
1185 }
1186
1187 new = kzalloc(sizeof(*new), GFP_KERNEL);
1188 if (new == NULL) {
1189 ret = -ENOMEM;
1190 goto err_range;
1191 }
1192
1193 new->map = map;
1194 new->name = range_cfg->name;
1195 new->range_min = range_cfg->range_min;
1196 new->range_max = range_cfg->range_max;
1197 new->selector_reg = range_cfg->selector_reg;
1198 new->selector_mask = range_cfg->selector_mask;
1199 new->selector_shift = range_cfg->selector_shift;
1200 new->window_start = range_cfg->window_start;
1201 new->window_len = range_cfg->window_len;
1202
1203 if (!_regmap_range_add(map, new)) {
1204 dev_err(map->dev, "Failed to add range %d\n", i);
1205 kfree(new);
1206 goto err_range;
1207 }
1208
1209 if (map->selector_work_buf == NULL) {
1210 map->selector_work_buf =
1211 kzalloc(map->format.buf_size, GFP_KERNEL);
1212 if (map->selector_work_buf == NULL) {
1213 ret = -ENOMEM;
1214 goto err_range;
1215 }
1216 }
1217 }
1218
1219 ret = regcache_init(map, config);
1220 if (ret != 0)
1221 goto err_range;
1222
1223 if (dev) {
1224 ret = regmap_attach_dev(dev, map, config);
1225 if (ret != 0)
1226 goto err_regcache;
1227 } else {
1228 regmap_debugfs_init(map);
1229 }
1230
1231 return map;
1232
1233err_regcache:
1234 regcache_exit(map);
1235err_range:
1236 regmap_range_exit(map);
1237 kfree(map->work_buf);
1238err_hwlock:
1239#ifndef TARGET_OS2
1240 if (map->hwlock)
1241 hwspin_lock_free(map->hwlock);
1242err_name:
1243 kfree_const(map->name);
1244#endif
1245err_map:
1246 kfree(map);
1247err:
1248 return ERR_PTR(ret);
1249}
1250EXPORT_SYMBOL_GPL(__regmap_init);
1251
1252#ifndef TARGET_OS2
1253static void devm_regmap_release(struct device *dev, void *res)
1254{
1255 regmap_exit(*(struct regmap **)res);
1256}
1257
1258struct regmap *__devm_regmap_init(struct device *dev,
1259 const struct regmap_bus *bus,
1260 void *bus_context,
1261 const struct regmap_config *config,
1262 struct lock_class_key *lock_key,
1263 const char *lock_name)
1264{
1265 struct regmap **ptr, *regmap;
1266
1267 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1268 if (!ptr)
1269 return ERR_PTR(-ENOMEM);
1270
1271 regmap = __regmap_init(dev, bus, bus_context, config,
1272 lock_key, lock_name);
1273 if (!IS_ERR(regmap)) {
1274 *ptr = regmap;
1275 devres_add(dev, ptr);
1276 } else {
1277 devres_free(ptr);
1278 }
1279
1280 return regmap;
1281}
1282EXPORT_SYMBOL_GPL(__devm_regmap_init);
1283#endif
1284
1285static void regmap_field_init(struct regmap_field *rm_field,
1286 struct regmap *regmap, struct reg_field reg_field)
1287{
1288 rm_field->regmap = regmap;
1289 rm_field->reg = reg_field.reg;
1290 rm_field->shift = reg_field.lsb;
1291 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1292 rm_field->id_size = reg_field.id_size;
1293 rm_field->id_offset = reg_field.id_offset;
1294}
1295
1296#ifndef TARGET_OS2
1297/**
1298 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1299 *
1300 * @dev: Device that will be interacted with
1301 * @regmap: regmap bank in which this register field is located.
1302 * @reg_field: Register field with in the bank.
1303 *
1304 * The return value will be an ERR_PTR() on error or a valid pointer
1305 * to a struct regmap_field. The regmap_field will be automatically freed
1306 * by the device management code.
1307 */
1308struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1309 struct regmap *regmap, struct reg_field reg_field)
1310{
1311 struct regmap_field *rm_field = devm_kzalloc(dev,
1312 sizeof(*rm_field), GFP_KERNEL);
1313 if (!rm_field)
1314 return ERR_PTR(-ENOMEM);
1315
1316 regmap_field_init(rm_field, regmap, reg_field);
1317
1318 return rm_field;
1319
1320}
1321EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1322#endif
1323
1324/**
1325 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1326 *
1327 * @regmap: regmap bank in which this register field is located.
1328 * @rm_field: regmap register fields within the bank.
1329 * @reg_field: Register fields within the bank.
1330 * @num_fields: Number of register fields.
1331 *
1332 * The return value will be an -ENOMEM on error or zero for success.
1333 * Newly allocated regmap_fields should be freed by calling
1334 * regmap_field_bulk_free()
1335 */
1336int regmap_field_bulk_alloc(struct regmap *regmap,
1337 struct regmap_field **rm_field,
1338 struct reg_field *reg_field,
1339 int num_fields)
1340{
1341 struct regmap_field *rf;
1342 int i;
1343
1344 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1345 if (!rf)
1346 return -ENOMEM;
1347
1348 for (i = 0; i < num_fields; i++) {
1349 regmap_field_init(&rf[i], regmap, reg_field[i]);
1350 rm_field[i] = &rf[i];
1351 }
1352
1353 return 0;
1354}
1355EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1356
1357#ifndef TARGET_OS2
1358/**
1359 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1360 * fields.
1361 *
1362 * @dev: Device that will be interacted with
1363 * @regmap: regmap bank in which this register field is located.
1364 * @rm_field: regmap register fields within the bank.
1365 * @reg_field: Register fields within the bank.
1366 * @num_fields: Number of register fields.
1367 *
1368 * The return value will be an -ENOMEM on error or zero for success.
1369 * Newly allocated regmap_fields will be automatically freed by the
1370 * device management code.
1371 */
1372int devm_regmap_field_bulk_alloc(struct device *dev,
1373 struct regmap *regmap,
1374 struct regmap_field **rm_field,
1375 struct reg_field *reg_field,
1376 int num_fields)
1377{
1378 struct regmap_field *rf;
1379 int i;
1380
1381 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1382 if (!rf)
1383 return -ENOMEM;
1384
1385 for (i = 0; i < num_fields; i++) {
1386 regmap_field_init(&rf[i], regmap, reg_field[i]);
1387 rm_field[i] = &rf[i];
1388 }
1389
1390 return 0;
1391}
1392EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1393#endif
1394
1395/**
1396 * regmap_field_bulk_free() - Free register field allocated using
1397 * regmap_field_bulk_alloc.
1398 *
1399 * @field: regmap fields which should be freed.
1400 */
1401void regmap_field_bulk_free(struct regmap_field *field)
1402{
1403 kfree(field);
1404}
1405EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1406
1407#ifndef TARGET_OS2
1408/**
1409 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1410 * devm_regmap_field_bulk_alloc.
1411 *
1412 * @dev: Device that will be interacted with
1413 * @field: regmap field which should be freed.
1414 *
1415 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1416 * drivers need not call this function, as the memory allocated via devm
1417 * will be freed as per device-driver life-cycle.
1418 */
1419void devm_regmap_field_bulk_free(struct device *dev,
1420 struct regmap_field *field)
1421{
1422 devm_kfree(dev, field);
1423}
1424EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1425
1426/**
1427 * devm_regmap_field_free() - Free a register field allocated using
1428 * devm_regmap_field_alloc.
1429 *
1430 * @dev: Device that will be interacted with
1431 * @field: regmap field which should be freed.
1432 *
1433 * Free register field allocated using devm_regmap_field_alloc(). Usually
1434 * drivers need not call this function, as the memory allocated via devm
1435 * will be freed as per device-driver life-cyle.
1436 */
1437void devm_regmap_field_free(struct device *dev,
1438 struct regmap_field *field)
1439{
1440 devm_kfree(dev, field);
1441}
1442EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1443#endif
1444
1445/**
1446 * regmap_field_alloc() - Allocate and initialise a register field.
1447 *
1448 * @regmap: regmap bank in which this register field is located.
1449 * @reg_field: Register field with in the bank.
1450 *
1451 * The return value will be an ERR_PTR() on error or a valid pointer
1452 * to a struct regmap_field. The regmap_field should be freed by the
1453 * user once its finished working with it using regmap_field_free().
1454 */
1455struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1456 struct reg_field reg_field)
1457{
1458 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1459
1460 if (!rm_field)
1461 return ERR_PTR(-ENOMEM);
1462
1463 regmap_field_init(rm_field, regmap, reg_field);
1464
1465 return rm_field;
1466}
1467EXPORT_SYMBOL_GPL(regmap_field_alloc);
1468
1469/**
1470 * regmap_field_free() - Free register field allocated using
1471 * regmap_field_alloc.
1472 *
1473 * @field: regmap field which should be freed.
1474 */
1475void regmap_field_free(struct regmap_field *field)
1476{
1477 kfree(field);
1478}
1479EXPORT_SYMBOL_GPL(regmap_field_free);
1480
1481/**
1482 * regmap_reinit_cache() - Reinitialise the current register cache
1483 *
1484 * @map: Register map to operate on.
1485 * @config: New configuration. Only the cache data will be used.
1486 *
1487 * Discard any existing register cache for the map and initialize a
1488 * new cache. This can be used to restore the cache to defaults or to
1489 * update the cache configuration to reflect runtime discovery of the
1490 * hardware.
1491 *
1492 * No explicit locking is done here, the user needs to ensure that
1493 * this function will not race with other calls to regmap.
1494 */
1495int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1496{
1497 int ret;
1498
1499 regcache_exit(map);
1500 regmap_debugfs_exit(map);
1501
1502 map->max_register = config->max_register;
1503 map->writeable_reg = config->writeable_reg;
1504 map->readable_reg = config->readable_reg;
1505 map->volatile_reg = config->volatile_reg;
1506 map->precious_reg = config->precious_reg;
1507 map->writeable_noinc_reg = config->writeable_noinc_reg;
1508 map->readable_noinc_reg = config->readable_noinc_reg;
1509 map->cache_type = config->cache_type;
1510
1511 ret = regmap_set_name(map, config);
1512 if (ret)
1513 return ret;
1514
1515 regmap_debugfs_init(map);
1516
1517 map->cache_bypass = false;
1518 map->cache_only = false;
1519
1520 return regcache_init(map, config);
1521}
1522EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1523
1524/**
1525 * regmap_exit() - Free a previously allocated register map
1526 *
1527 * @map: Register map to operate on.
1528 */
1529void regmap_exit(struct regmap *map)
1530{
1531 struct regmap_async *async;
1532
1533 regcache_exit(map);
1534 regmap_debugfs_exit(map);
1535 regmap_range_exit(map);
1536 if (map->bus && map->bus->free_context)
1537 map->bus->free_context(map->bus_context);
1538 kfree(map->work_buf);
1539 while (!list_empty(&map->async_free)) {
1540 async = list_first_entry_or_null(&map->async_free,
1541 struct regmap_async,
1542 list);
1543 list_del(&async->list);
1544 kfree(async->work_buf);
1545 kfree(async);
1546 }
1547#ifndef TARGET_OS2
1548 if (map->hwlock)
1549 hwspin_lock_free(map->hwlock);
1550#endif
1551 if (map->lock == regmap_lock_mutex)
1552 mutex_destroy(&map->mutex);
1553#ifndef TARGET_OS2
1554 kfree_const(map->name);
1555#else
1556 kfree(map->name);
1557#endif
1558 kfree(map->patch);
1559 kfree(map);
1560}
1561EXPORT_SYMBOL_GPL(regmap_exit);
1562
1563static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1564{
1565 struct regmap **r = res;
1566 if (!r || !*r) {
1567 WARN_ON(!r || !*r);
1568 return 0;
1569 }
1570
1571 /* If the user didn't specify a name match any */
1572 if (data)
1573 return !strcmp((*r)->name, data);
1574 else
1575 return 1;
1576}
1577
1578/**
1579 * dev_get_regmap() - Obtain the regmap (if any) for a device
1580 *
1581 * @dev: Device to retrieve the map for
1582 * @name: Optional name for the register map, usually NULL.
1583 *
1584 * Returns the regmap for the device if one is present, or NULL. If
1585 * name is specified then it must match the name specified when
1586 * registering the device, if it is NULL then the first regmap found
1587 * will be used. Devices with multiple register maps are very rare,
1588 * generic code should normally not need to specify a name.
1589 */
1590struct regmap *dev_get_regmap(struct device *dev, const char *name)
1591{
1592 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1593 dev_get_regmap_match, (void *)name);
1594
1595 if (!r)
1596 return NULL;
1597 return *r;
1598}
1599EXPORT_SYMBOL_GPL(dev_get_regmap);
1600
1601/**
1602 * regmap_get_device() - Obtain the device from a regmap
1603 *
1604 * @map: Register map to operate on.
1605 *
1606 * Returns the underlying device that the regmap has been created for.
1607 */
1608struct device *regmap_get_device(struct regmap *map)
1609{
1610 return map->dev;
1611}
1612EXPORT_SYMBOL_GPL(regmap_get_device);
1613
1614static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1615 struct regmap_range_node *range,
1616 unsigned int val_num)
1617{
1618 void *orig_work_buf;
1619 unsigned int win_offset;
1620 unsigned int win_page;
1621 bool page_chg;
1622 int ret;
1623
1624 win_offset = (*reg - range->range_min) % range->window_len;
1625 win_page = (*reg - range->range_min) / range->window_len;
1626
1627 if (val_num > 1) {
1628 /* Bulk write shouldn't cross range boundary */
1629 if (*reg + val_num - 1 > range->range_max)
1630 return -EINVAL;
1631
1632 /* ... or single page boundary */
1633 if (val_num > range->window_len - win_offset)
1634 return -EINVAL;
1635 }
1636
1637 /* It is possible to have selector register inside data window.
1638 In that case, selector register is located on every page and
1639 it needs no page switching, when accessed alone. */
1640 if (val_num > 1 ||
1641 range->window_start + win_offset != range->selector_reg) {
1642 /* Use separate work_buf during page switching */
1643 orig_work_buf = map->work_buf;
1644 map->work_buf = map->selector_work_buf;
1645
1646 ret = _regmap_update_bits(map, range->selector_reg,
1647 range->selector_mask,
1648 win_page << range->selector_shift,
1649 &page_chg, false);
1650
1651 map->work_buf = orig_work_buf;
1652
1653 if (ret != 0)
1654 return ret;
1655 }
1656
1657 *reg = range->window_start + win_offset;
1658
1659 return 0;
1660}
1661
1662static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1663 unsigned long mask)
1664{
1665 u8 *buf;
1666 int i;
1667
1668 if (!mask || !map->work_buf)
1669 return;
1670
1671 buf = map->work_buf;
1672
1673 for (i = 0; i < max_bytes; i++)
1674 buf[i] |= (mask >> (8 * i)) & 0xff;
1675}
1676
1677static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1678 const void *val, size_t val_len, bool noinc)
1679{
1680 struct regmap_range_node *range;
1681 unsigned long flags;
1682 void *work_val = map->work_buf + map->format.reg_bytes +
1683 map->format.pad_bytes;
1684 void *buf;
1685 int ret = -ENOTSUPP;
1686 size_t len;
1687 int i;
1688
1689 WARN_ON(!map->bus);
1690
1691 /* Check for unwritable or noinc registers in range
1692 * before we start
1693 */
1694 if (!regmap_writeable_noinc(map, reg)) {
1695 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1696 unsigned int element =
1697 reg + regmap_get_offset(map, i);
1698 if (!regmap_writeable(map, element) ||
1699 regmap_writeable_noinc(map, element))
1700 return -EINVAL;
1701 }
1702 }
1703
1704 if (!map->cache_bypass && map->format.parse_val) {
1705 unsigned int ival;
1706 int val_bytes = map->format.val_bytes;
1707 for (i = 0; i < val_len / val_bytes; i++) {
1708 ival = map->format.parse_val(val + (i * val_bytes));
1709 ret = regcache_write(map,
1710 reg + regmap_get_offset(map, i),
1711 ival);
1712 if (ret) {
1713 dev_err(map->dev,
1714 "Error in caching of register: %x ret: %d\n",
1715 reg + i, ret);
1716 return ret;
1717 }
1718 }
1719 if (map->cache_only) {
1720 map->cache_dirty = true;
1721 return 0;
1722 }
1723 }
1724
1725 range = _regmap_range_lookup(map, reg);
1726 if (range) {
1727 int val_num = val_len / map->format.val_bytes;
1728 int win_offset = (reg - range->range_min) % range->window_len;
1729 int win_residue = range->window_len - win_offset;
1730
1731 /* If the write goes beyond the end of the window split it */
1732 while (val_num > win_residue) {
1733 dev_dbg(map->dev, "Writing window %d/%zu\n",
1734 win_residue, val_len / map->format.val_bytes);
1735 ret = _regmap_raw_write_impl(map, reg, val,
1736 win_residue *
1737 map->format.val_bytes, noinc);
1738 if (ret != 0)
1739 return ret;
1740
1741 reg += win_residue;
1742 val_num -= win_residue;
1743 val += win_residue * map->format.val_bytes;
1744 val_len -= win_residue * map->format.val_bytes;
1745
1746 win_offset = (reg - range->range_min) %
1747 range->window_len;
1748 win_residue = range->window_len - win_offset;
1749 }
1750
1751 ret = _regmap_select_page(map, &reg, range, noinc ? 1 : val_num);
1752 if (ret != 0)
1753 return ret;
1754 }
1755
1756 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1757 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1758 map->write_flag_mask);
1759
1760 /*
1761 * Essentially all I/O mechanisms will be faster with a single
1762 * buffer to write. Since register syncs often generate raw
1763 * writes of single registers optimise that case.
1764 */
1765 if (val != work_val && val_len == map->format.val_bytes) {
1766 memcpy(work_val, val, map->format.val_bytes);
1767 val = work_val;
1768 }
1769
1770 if (map->async && map->bus->async_write) {
1771 struct regmap_async *async;
1772
1773 spin_lock_irqsave(&map->async_lock, flags);
1774 async = list_first_entry_or_null(&map->async_free,
1775 struct regmap_async,
1776 list);
1777 if (async)
1778 list_del(&async->list);
1779 spin_unlock_irqrestore(&map->async_lock, flags);
1780
1781 if (!async) {
1782 async = map->bus->async_alloc();
1783 if (!async)
1784 return -ENOMEM;
1785
1786 async->work_buf = kzalloc(map->format.buf_size,
1787 GFP_KERNEL | GFP_DMA);
1788 if (!async->work_buf) {
1789 kfree(async);
1790 return -ENOMEM;
1791 }
1792 }
1793
1794 async->map = map;
1795
1796 /* If the caller supplied the value we can use it safely. */
1797 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1798 map->format.reg_bytes + map->format.val_bytes);
1799
1800 spin_lock_irqsave(&map->async_lock, flags);
1801 list_add_tail(&async->list, &map->async_list);
1802 spin_unlock_irqrestore(&map->async_lock, flags);
1803
1804 if (val != work_val)
1805 ret = map->bus->async_write(map->bus_context,
1806 async->work_buf,
1807 map->format.reg_bytes +
1808 map->format.pad_bytes,
1809 val, val_len, async);
1810 else
1811 ret = map->bus->async_write(map->bus_context,
1812 async->work_buf,
1813 map->format.reg_bytes +
1814 map->format.pad_bytes +
1815 val_len, NULL, 0, async);
1816
1817 if (ret != 0) {
1818 dev_err(map->dev, "Failed to schedule write: %d\n",
1819 ret);
1820
1821 spin_lock_irqsave(&map->async_lock, flags);
1822 list_move(&async->list, &map->async_free);
1823 spin_unlock_irqrestore(&map->async_lock, flags);
1824 }
1825
1826 return ret;
1827 }
1828
1829 /* If we're doing a single register write we can probably just
1830 * send the work_buf directly, otherwise try to do a gather
1831 * write.
1832 */
1833 if (val == work_val)
1834 ret = map->bus->write(map->bus_context, map->work_buf,
1835 map->format.reg_bytes +
1836 map->format.pad_bytes +
1837 val_len);
1838 else if (map->bus->gather_write)
1839 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1840 map->format.reg_bytes +
1841 map->format.pad_bytes,
1842 val, val_len);
1843 else
1844 ret = -ENOTSUPP;
1845
1846 /* If that didn't work fall back on linearising by hand. */
1847 if (ret == -ENOTSUPP) {
1848 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1849 buf = kzalloc(len, GFP_KERNEL);
1850 if (!buf)
1851 return -ENOMEM;
1852
1853 memcpy(buf, map->work_buf, map->format.reg_bytes);
1854 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1855 val, val_len);
1856 ret = map->bus->write(map->bus_context, buf, len);
1857
1858 kfree(buf);
1859 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1860 /* regcache_drop_region() takes lock that we already have,
1861 * thus call map->cache_ops->drop() directly
1862 */
1863 if (map->cache_ops && map->cache_ops->drop)
1864 map->cache_ops->drop(map, reg, reg + 1);
1865 }
1866
1867 return ret;
1868}
1869
1870/**
1871 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1872 *
1873 * @map: Map to check.
1874 */
1875bool regmap_can_raw_write(struct regmap *map)
1876{
1877 return map->bus && map->bus->write && map->format.format_val &&
1878 map->format.format_reg;
1879}
1880EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1881
1882/**
1883 * regmap_get_raw_read_max - Get the maximum size we can read
1884 *
1885 * @map: Map to check.
1886 */
1887size_t regmap_get_raw_read_max(struct regmap *map)
1888{
1889 return map->max_raw_read;
1890}
1891EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1892
1893/**
1894 * regmap_get_raw_write_max - Get the maximum size we can read
1895 *
1896 * @map: Map to check.
1897 */
1898size_t regmap_get_raw_write_max(struct regmap *map)
1899{
1900 return map->max_raw_write;
1901}
1902EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1903
1904static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1905 unsigned int val)
1906{
1907 int ret;
1908 struct regmap_range_node *range;
1909 struct regmap *map = context;
1910
1911 WARN_ON(!map->bus || !map->format.format_write);
1912
1913 range = _regmap_range_lookup(map, reg);
1914 if (range) {
1915 ret = _regmap_select_page(map, &reg, range, 1);
1916 if (ret != 0)
1917 return ret;
1918 }
1919
1920 map->format.format_write(map, reg, val);
1921
1922 ret = map->bus->write(map->bus_context, map->work_buf,
1923 map->format.buf_size);
1924
1925 return ret;
1926}
1927
1928static int _regmap_bus_reg_write(void *context, unsigned int reg,
1929 unsigned int val)
1930{
1931 struct regmap *map = context;
1932
1933 return map->bus->reg_write(map->bus_context, reg, val);
1934}
1935
1936static int _regmap_bus_raw_write(void *context, unsigned int reg,
1937 unsigned int val)
1938{
1939 struct regmap *map = context;
1940
1941 WARN_ON(!map->bus || !map->format.format_val);
1942
1943 map->format.format_val(map->work_buf + map->format.reg_bytes
1944 + map->format.pad_bytes, val, 0);
1945 return _regmap_raw_write_impl(map, reg,
1946 map->work_buf +
1947 map->format.reg_bytes +
1948 map->format.pad_bytes,
1949 map->format.val_bytes,
1950 false);
1951}
1952
1953static inline void *_regmap_map_get_context(struct regmap *map)
1954{
1955 return (map->bus) ? map : map->bus_context;
1956}
1957
1958int _regmap_write(struct regmap *map, unsigned int reg,
1959 unsigned int val)
1960{
1961 int ret;
1962 void *context = _regmap_map_get_context(map);
1963
1964 if (!regmap_writeable(map, reg))
1965 return -EIO;
1966
1967 if (!map->cache_bypass && !map->defer_caching) {
1968 ret = regcache_write(map, reg, val);
1969 if (ret != 0)
1970 return ret;
1971 if (map->cache_only) {
1972 map->cache_dirty = true;
1973 return 0;
1974 }
1975 }
1976
1977 if (regmap_should_log(map))
1978 dev_info(map->dev, "%x <= %x\n", reg, val);
1979
1980 return map->reg_write(context, reg, val);
1981}
1982
1983#ifdef TARGET_OS2
1984#define IS_ALIGNED(x, a) (((x) & ((unsigned int)(a) - 1)) == 0)
1985#endif
1986
1987/**
1988 * regmap_write() - Write a value to a single register
1989 *
1990 * @map: Register map to write to
1991 * @reg: Register to write to
1992 * @val: Value to be written
1993 *
1994 * A value of zero will be returned on success, a negative errno will
1995 * be returned in error cases.
1996 */
1997int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1998{
1999 int ret;
2000
2001 if (!IS_ALIGNED(reg, map->reg_stride))
2002 return -EINVAL;
2003
2004 map->lock(map->lock_arg);
2005
2006 ret = _regmap_write(map, reg, val);
2007
2008 map->unlock(map->lock_arg);
2009
2010 return ret;
2011}
2012EXPORT_SYMBOL_GPL(regmap_write);
2013
2014/**
2015 * regmap_write_async() - Write a value to a single register asynchronously
2016 *
2017 * @map: Register map to write to
2018 * @reg: Register to write to
2019 * @val: Value to be written
2020 *
2021 * A value of zero will be returned on success, a negative errno will
2022 * be returned in error cases.
2023 */
2024int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
2025{
2026 int ret;
2027
2028 if (!IS_ALIGNED(reg, map->reg_stride))
2029 return -EINVAL;
2030
2031 map->lock(map->lock_arg);
2032
2033 map->async = true;
2034
2035 ret = _regmap_write(map, reg, val);
2036
2037 map->async = false;
2038
2039 map->unlock(map->lock_arg);
2040
2041 return ret;
2042}
2043EXPORT_SYMBOL_GPL(regmap_write_async);
2044
2045int _regmap_raw_write(struct regmap *map, unsigned int reg,
2046 const void *val, size_t val_len, bool noinc)
2047{
2048 size_t val_bytes = map->format.val_bytes;
2049 size_t val_count = val_len / val_bytes;
2050 size_t chunk_count, chunk_bytes;
2051 size_t chunk_regs = val_count;
2052 int ret, i;
2053
2054 if (!val_count)
2055 return -EINVAL;
2056
2057 if (map->use_single_write)
2058 chunk_regs = 1;
2059 else if (map->max_raw_write && val_len > map->max_raw_write)
2060 chunk_regs = map->max_raw_write / val_bytes;
2061
2062 chunk_count = val_count / chunk_regs;
2063 chunk_bytes = chunk_regs * val_bytes;
2064
2065 /* Write as many bytes as possible with chunk_size */
2066 for (i = 0; i < chunk_count; i++) {
2067 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2068 if (ret)
2069 return ret;
2070
2071 reg += regmap_get_offset(map, chunk_regs);
2072 val += chunk_bytes;
2073 val_len -= chunk_bytes;
2074 }
2075
2076 /* Write remaining bytes */
2077 if (val_len)
2078 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2079
2080 return ret;
2081}
2082
2083/**
2084 * regmap_raw_write() - Write raw values to one or more registers
2085 *
2086 * @map: Register map to write to
2087 * @reg: Initial register to write to
2088 * @val: Block of data to be written, laid out for direct transmission to the
2089 * device
2090 * @val_len: Length of data pointed to by val.
2091 *
2092 * This function is intended to be used for things like firmware
2093 * download where a large block of data needs to be transferred to the
2094 * device. No formatting will be done on the data provided.
2095 *
2096 * A value of zero will be returned on success, a negative errno will
2097 * be returned in error cases.
2098 */
2099int regmap_raw_write(struct regmap *map, unsigned int reg,
2100 const void *val, size_t val_len)
2101{
2102 int ret;
2103
2104 if (!regmap_can_raw_write(map))
2105 return -EINVAL;
2106 if (val_len % map->format.val_bytes)
2107 return -EINVAL;
2108
2109 map->lock(map->lock_arg);
2110
2111 ret = _regmap_raw_write(map, reg, val, val_len, false);
2112
2113 map->unlock(map->lock_arg);
2114
2115 return ret;
2116}
2117EXPORT_SYMBOL_GPL(regmap_raw_write);
2118
2119/**
2120 * regmap_noinc_write(): Write data from a register without incrementing the
2121 * register number
2122 *
2123 * @map: Register map to write to
2124 * @reg: Register to write to
2125 * @val: Pointer to data buffer
2126 * @val_len: Length of output buffer in bytes.
2127 *
2128 * The regmap API usually assumes that bulk bus write operations will write a
2129 * range of registers. Some devices have certain registers for which a write
2130 * operation can write to an internal FIFO.
2131 *
2132 * The target register must be volatile but registers after it can be
2133 * completely unrelated cacheable registers.
2134 *
2135 * This will attempt multiple writes as required to write val_len bytes.
2136 *
2137 * A value of zero will be returned on success, a negative errno will be
2138 * returned in error cases.
2139 */
2140int regmap_noinc_write(struct regmap *map, unsigned int reg,
2141 const void *val, size_t val_len)
2142{
2143 size_t write_len;
2144 int ret;
2145
2146 if (!map->bus)
2147 return -EINVAL;
2148 if (!map->bus->write)
2149 return -ENOTSUPP;
2150 if (val_len % map->format.val_bytes)
2151 return -EINVAL;
2152 if (!IS_ALIGNED(reg, map->reg_stride))
2153 return -EINVAL;
2154 if (val_len == 0)
2155 return -EINVAL;
2156
2157 map->lock(map->lock_arg);
2158
2159 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2160 ret = -EINVAL;
2161 goto out_unlock;
2162 }
2163
2164 while (val_len) {
2165 if (map->max_raw_write && map->max_raw_write < val_len)
2166 write_len = map->max_raw_write;
2167 else
2168 write_len = val_len;
2169 ret = _regmap_raw_write(map, reg, val, write_len, true);
2170 if (ret)
2171 goto out_unlock;
2172 val = ((u8 *)val) + write_len;
2173 val_len -= write_len;
2174 }
2175
2176out_unlock:
2177 map->unlock(map->lock_arg);
2178 return ret;
2179}
2180EXPORT_SYMBOL_GPL(regmap_noinc_write);
2181
2182/**
2183 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2184 * register field.
2185 *
2186 * @field: Register field to write to
2187 * @mask: Bitmask to change
2188 * @val: Value to be written
2189 * @change: Boolean indicating if a write was done
2190 * @async: Boolean indicating asynchronously
2191 * @force: Boolean indicating use force update
2192 *
2193 * Perform a read/modify/write cycle on the register field with change,
2194 * async, force option.
2195 *
2196 * A value of zero will be returned on success, a negative errno will
2197 * be returned in error cases.
2198 */
2199int regmap_field_update_bits_base(struct regmap_field *field,
2200 unsigned int mask, unsigned int val,
2201 bool *change, bool async, bool force)
2202{
2203 mask = (mask << field->shift) & field->mask;
2204
2205 return regmap_update_bits_base(field->regmap, field->reg,
2206 mask, val << field->shift,
2207 change, async, force);
2208}
2209EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2210
2211/**
2212 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2213 * register field with port ID
2214 *
2215 * @field: Register field to write to
2216 * @id: port ID
2217 * @mask: Bitmask to change
2218 * @val: Value to be written
2219 * @change: Boolean indicating if a write was done
2220 * @async: Boolean indicating asynchronously
2221 * @force: Boolean indicating use force update
2222 *
2223 * A value of zero will be returned on success, a negative errno will
2224 * be returned in error cases.
2225 */
2226int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2227 unsigned int mask, unsigned int val,
2228 bool *change, bool async, bool force)
2229{
2230 if (id >= field->id_size)
2231 return -EINVAL;
2232
2233 mask = (mask << field->shift) & field->mask;
2234
2235 return regmap_update_bits_base(field->regmap,
2236 field->reg + (field->id_offset * id),
2237 mask, val << field->shift,
2238 change, async, force);
2239}
2240EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2241
2242/**
2243 * regmap_bulk_write() - Write multiple registers to the device
2244 *
2245 * @map: Register map to write to
2246 * @reg: First register to be write from
2247 * @val: Block of data to be written, in native register size for device
2248 * @val_count: Number of registers to write
2249 *
2250 * This function is intended to be used for writing a large block of
2251 * data to the device either in single transfer or multiple transfer.
2252 *
2253 * A value of zero will be returned on success, a negative errno will
2254 * be returned in error cases.
2255 */
2256int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2257 size_t val_count)
2258{
2259 int ret = 0, i;
2260 size_t val_bytes = map->format.val_bytes;
2261
2262 if (!IS_ALIGNED(reg, map->reg_stride))
2263 return -EINVAL;
2264
2265 /*
2266 * Some devices don't support bulk write, for them we have a series of
2267 * single write operations.
2268 */
2269 if (!map->bus || !map->format.parse_inplace) {
2270 map->lock(map->lock_arg);
2271 for (i = 0; i < val_count; i++) {
2272 unsigned int ival;
2273
2274 switch (val_bytes) {
2275 case 1:
2276 ival = *(u8 *)(val + (i * val_bytes));
2277 break;
2278 case 2:
2279 ival = *(u16 *)(val + (i * val_bytes));
2280 break;
2281 case 4:
2282 ival = *(u32 *)(val + (i * val_bytes));
2283 break;
2284#ifdef CONFIG_64BIT
2285 case 8:
2286 ival = *(u64 *)(val + (i * val_bytes));
2287 break;
2288#endif
2289 default:
2290 ret = -EINVAL;
2291 goto out;
2292 }
2293
2294 ret = _regmap_write(map,
2295 reg + regmap_get_offset(map, i),
2296 ival);
2297 if (ret != 0)
2298 goto out;
2299 }
2300out:
2301 map->unlock(map->lock_arg);
2302 } else {
2303 void *wval;
2304
2305 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2306 if (!wval)
2307 return -ENOMEM;
2308
2309 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2310 map->format.parse_inplace(wval + i);
2311
2312 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2313
2314 kfree(wval);
2315 }
2316 return ret;
2317}
2318EXPORT_SYMBOL_GPL(regmap_bulk_write);
2319
2320/*
2321 * _regmap_raw_multi_reg_write()
2322 *
2323 * the (register,newvalue) pairs in regs have not been formatted, but
2324 * they are all in the same page and have been changed to being page
2325 * relative. The page register has been written if that was necessary.
2326 */
2327static int _regmap_raw_multi_reg_write(struct regmap *map,
2328 const struct reg_sequence *regs,
2329 size_t num_regs)
2330{
2331 int ret;
2332 void *buf;
2333 int i;
2334 u8 *u8;
2335 size_t val_bytes = map->format.val_bytes;
2336 size_t reg_bytes = map->format.reg_bytes;
2337 size_t pad_bytes = map->format.pad_bytes;
2338 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2339 size_t len = pair_size * num_regs;
2340
2341 if (!len)
2342 return -EINVAL;
2343
2344 buf = kzalloc(len, GFP_KERNEL);
2345 if (!buf)
2346 return -ENOMEM;
2347
2348 /* We have to linearise by hand. */
2349
2350 u8 = buf;
2351
2352 for (i = 0; i < num_regs; i++) {
2353 unsigned int reg = regs[i].reg;
2354 unsigned int val = regs[i].def;
2355 map->format.format_reg(u8, reg, map->reg_shift);
2356 u8 += reg_bytes + pad_bytes;
2357 map->format.format_val(u8, val, 0);
2358 u8 += val_bytes;
2359 }
2360 u8 = buf;
2361 *u8 |= map->write_flag_mask;
2362
2363 ret = map->bus->write(map->bus_context, buf, len);
2364
2365 kfree(buf);
2366
2367#ifndef TARGET_OS2
2368 for (i = 0; i < num_regs; i++) {
2369 int reg = regs[i].reg;
2370 trace_regmap_hw_write_done(map, reg, 1);
2371 }
2372#endif
2373 return ret;
2374}
2375
2376static unsigned int _regmap_register_page(struct regmap *map,
2377 unsigned int reg,
2378 struct regmap_range_node *range)
2379{
2380 unsigned int win_page = (reg - range->range_min) / range->window_len;
2381
2382 return win_page;
2383}
2384
2385static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2386 struct reg_sequence *regs,
2387 size_t num_regs)
2388{
2389 int ret;
2390 int i, n;
2391 struct reg_sequence *base;
2392 unsigned int this_page = 0;
2393 unsigned int page_change = 0;
2394 /*
2395 * the set of registers are not neccessarily in order, but
2396 * since the order of write must be preserved this algorithm
2397 * chops the set each time the page changes. This also applies
2398 * if there is a delay required at any point in the sequence.
2399 */
2400 base = regs;
2401 for (i = 0, n = 0; i < num_regs; i++, n++) {
2402 unsigned int reg = regs[i].reg;
2403 struct regmap_range_node *range;
2404
2405 range = _regmap_range_lookup(map, reg);
2406 if (range) {
2407 unsigned int win_page = _regmap_register_page(map, reg,
2408 range);
2409
2410 if (i == 0)
2411 this_page = win_page;
2412 if (win_page != this_page) {
2413 this_page = win_page;
2414 page_change = 1;
2415 }
2416 }
2417
2418 /* If we have both a page change and a delay make sure to
2419 * write the regs and apply the delay before we change the
2420 * page.
2421 */
2422
2423 if (page_change || regs[i].delay_us) {
2424
2425 /* For situations where the first write requires
2426 * a delay we need to make sure we don't call
2427 * raw_multi_reg_write with n=0
2428 * This can't occur with page breaks as we
2429 * never write on the first iteration
2430 */
2431 if (regs[i].delay_us && i == 0)
2432 n = 1;
2433
2434 ret = _regmap_raw_multi_reg_write(map, base, n);
2435 if (ret != 0)
2436 return ret;
2437
2438 if (regs[i].delay_us) {
2439#ifndef TARGET_OS2
2440 if (map->can_sleep)
2441 fsleep(regs[i].delay_us);
2442 else
2443#endif
2444 udelay(regs[i].delay_us);
2445 }
2446
2447 base += n;
2448 n = 0;
2449
2450 if (page_change) {
2451 ret = _regmap_select_page(map,
2452 &base[n].reg,
2453 range, 1);
2454 if (ret != 0)
2455 return ret;
2456
2457 page_change = 0;
2458 }
2459
2460 }
2461
2462 }
2463 if (n > 0)
2464 return _regmap_raw_multi_reg_write(map, base, n);
2465 return 0;
2466}
2467
2468static int _regmap_multi_reg_write(struct regmap *map,
2469 const struct reg_sequence *regs,
2470 size_t num_regs)
2471{
2472 int i;
2473 int ret;
2474
2475 if (!map->can_multi_write) {
2476 for (i = 0; i < num_regs; i++) {
2477 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2478 if (ret != 0)
2479 return ret;
2480
2481 if (regs[i].delay_us) {
2482#ifndef TARGET_OS2
2483 if (map->can_sleep)
2484 fsleep(regs[i].delay_us);
2485 else
2486#endif
2487 udelay(regs[i].delay_us);
2488 }
2489 }
2490 return 0;
2491 }
2492
2493 if (!map->format.parse_inplace)
2494 return -EINVAL;
2495
2496 if (map->writeable_reg)
2497 for (i = 0; i < num_regs; i++) {
2498 int reg = regs[i].reg;
2499 if (!map->writeable_reg(map->dev, reg))
2500 return -EINVAL;
2501 if (!IS_ALIGNED(reg, map->reg_stride))
2502 return -EINVAL;
2503 }
2504
2505 if (!map->cache_bypass) {
2506 for (i = 0; i < num_regs; i++) {
2507 unsigned int val = regs[i].def;
2508 unsigned int reg = regs[i].reg;
2509 ret = regcache_write(map, reg, val);
2510 if (ret) {
2511 dev_err(map->dev,
2512 "Error in caching of register: %x ret: %d\n",
2513 reg, ret);
2514 return ret;
2515 }
2516 }
2517 if (map->cache_only) {
2518 map->cache_dirty = true;
2519 return 0;
2520 }
2521 }
2522
2523 WARN_ON(!map->bus);
2524
2525 for (i = 0; i < num_regs; i++) {
2526 unsigned int reg = regs[i].reg;
2527 struct regmap_range_node *range;
2528
2529 /* Coalesce all the writes between a page break or a delay
2530 * in a sequence
2531 */
2532 range = _regmap_range_lookup(map, reg);
2533 if (range || regs[i].delay_us) {
2534 size_t len = sizeof(struct reg_sequence)*num_regs;
2535 struct reg_sequence *base = kmemdup(regs, len,
2536 GFP_KERNEL);
2537 if (!base)
2538 return -ENOMEM;
2539 ret = _regmap_range_multi_paged_reg_write(map, base,
2540 num_regs);
2541 kfree(base);
2542
2543 return ret;
2544 }
2545 }
2546 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2547}
2548
2549/**
2550 * regmap_multi_reg_write() - Write multiple registers to the device
2551 *
2552 * @map: Register map to write to
2553 * @regs: Array of structures containing register,value to be written
2554 * @num_regs: Number of registers to write
2555 *
2556 * Write multiple registers to the device where the set of register, value
2557 * pairs are supplied in any order, possibly not all in a single range.
2558 *
2559 * The 'normal' block write mode will send ultimately send data on the
2560 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2561 * addressed. However, this alternative block multi write mode will send
2562 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2563 * must of course support the mode.
2564 *
2565 * A value of zero will be returned on success, a negative errno will be
2566 * returned in error cases.
2567 */
2568int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2569 int num_regs)
2570{
2571 int ret;
2572
2573 map->lock(map->lock_arg);
2574
2575 ret = _regmap_multi_reg_write(map, regs, num_regs);
2576
2577 map->unlock(map->lock_arg);
2578
2579 return ret;
2580}
2581EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2582
2583/**
2584 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2585 * device but not the cache
2586 *
2587 * @map: Register map to write to
2588 * @regs: Array of structures containing register,value to be written
2589 * @num_regs: Number of registers to write
2590 *
2591 * Write multiple registers to the device but not the cache where the set
2592 * of register are supplied in any order.
2593 *
2594 * This function is intended to be used for writing a large block of data
2595 * atomically to the device in single transfer for those I2C client devices
2596 * that implement this alternative block write mode.
2597 *
2598 * A value of zero will be returned on success, a negative errno will
2599 * be returned in error cases.
2600 */
2601int regmap_multi_reg_write_bypassed(struct regmap *map,
2602 const struct reg_sequence *regs,
2603 int num_regs)
2604{
2605 int ret;
2606 bool bypass;
2607
2608 map->lock(map->lock_arg);
2609
2610 bypass = map->cache_bypass;
2611 map->cache_bypass = true;
2612
2613 ret = _regmap_multi_reg_write(map, regs, num_regs);
2614
2615 map->cache_bypass = bypass;
2616
2617 map->unlock(map->lock_arg);
2618
2619 return ret;
2620}
2621EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2622
2623/**
2624 * regmap_raw_write_async() - Write raw values to one or more registers
2625 * asynchronously
2626 *
2627 * @map: Register map to write to
2628 * @reg: Initial register to write to
2629 * @val: Block of data to be written, laid out for direct transmission to the
2630 * device. Must be valid until regmap_async_complete() is called.
2631 * @val_len: Length of data pointed to by val.
2632 *
2633 * This function is intended to be used for things like firmware
2634 * download where a large block of data needs to be transferred to the
2635 * device. No formatting will be done on the data provided.
2636 *
2637 * If supported by the underlying bus the write will be scheduled
2638 * asynchronously, helping maximise I/O speed on higher speed buses
2639 * like SPI. regmap_async_complete() can be called to ensure that all
2640 * asynchrnous writes have been completed.
2641 *
2642 * A value of zero will be returned on success, a negative errno will
2643 * be returned in error cases.
2644 */
2645int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2646 const void *val, size_t val_len)
2647{
2648 int ret;
2649
2650 if (val_len % map->format.val_bytes)
2651 return -EINVAL;
2652 if (!IS_ALIGNED(reg, map->reg_stride))
2653 return -EINVAL;
2654
2655 map->lock(map->lock_arg);
2656
2657 map->async = true;
2658
2659 ret = _regmap_raw_write(map, reg, val, val_len, false);
2660
2661 map->async = false;
2662
2663 map->unlock(map->lock_arg);
2664
2665 return ret;
2666}
2667EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2668
2669static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2670 unsigned int val_len, bool noinc)
2671{
2672 struct regmap_range_node *range;
2673 int ret;
2674
2675 WARN_ON(!map->bus);
2676
2677 if (!map->bus || !map->bus->read)
2678 return -EINVAL;
2679
2680 range = _regmap_range_lookup(map, reg);
2681 if (range) {
2682 ret = _regmap_select_page(map, &reg, range,
2683 noinc ? 1 : val_len / map->format.val_bytes);
2684 if (ret != 0)
2685 return ret;
2686 }
2687
2688 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2689 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2690 map->read_flag_mask);
2691
2692 ret = map->bus->read(map->bus_context, map->work_buf,
2693 map->format.reg_bytes + map->format.pad_bytes,
2694 val, val_len);
2695
2696 return ret;
2697}
2698
2699static int _regmap_bus_reg_read(void *context, unsigned int reg,
2700 unsigned int *val)
2701{
2702 struct regmap *map = context;
2703
2704 return map->bus->reg_read(map->bus_context, reg, val);
2705}
2706
2707static int _regmap_bus_read(void *context, unsigned int reg,
2708 unsigned int *val)
2709{
2710 int ret;
2711 struct regmap *map = context;
2712 void *work_val = map->work_buf + map->format.reg_bytes +
2713 map->format.pad_bytes;
2714
2715 if (!map->format.parse_val)
2716 return -EINVAL;
2717
2718 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2719 if (ret == 0)
2720 *val = map->format.parse_val(work_val);
2721
2722 return ret;
2723}
2724
2725static int _regmap_read(struct regmap *map, unsigned int reg,
2726 unsigned int *val)
2727{
2728 int ret;
2729 void *context = _regmap_map_get_context(map);
2730
2731 if (!map->cache_bypass) {
2732 ret = regcache_read(map, reg, val);
2733 if (ret == 0)
2734 return 0;
2735 }
2736
2737 if (map->cache_only)
2738 return -EBUSY;
2739
2740 if (!regmap_readable(map, reg))
2741 return -EIO;
2742
2743 ret = map->reg_read(context, reg, val);
2744 if (ret == 0) {
2745 if (regmap_should_log(map))
2746 dev_info(map->dev, "%x => %x\n", reg, *val);
2747
2748 if (!map->cache_bypass)
2749 regcache_write(map, reg, *val);
2750 }
2751
2752 return ret;
2753}
2754
2755/**
2756 * regmap_read() - Read a value from a single register
2757 *
2758 * @map: Register map to read from
2759 * @reg: Register to be read from
2760 * @val: Pointer to store read value
2761 *
2762 * A value of zero will be returned on success, a negative errno will
2763 * be returned in error cases.
2764 */
2765int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2766{
2767 int ret;
2768
2769 if (!IS_ALIGNED(reg, map->reg_stride))
2770 return -EINVAL;
2771
2772 map->lock(map->lock_arg);
2773
2774 ret = _regmap_read(map, reg, val);
2775
2776 map->unlock(map->lock_arg);
2777
2778 return ret;
2779}
2780EXPORT_SYMBOL_GPL(regmap_read);
2781
2782/**
2783 * regmap_raw_read() - Read raw data from the device
2784 *
2785 * @map: Register map to read from
2786 * @reg: First register to be read from
2787 * @val: Pointer to store read value
2788 * @val_len: Size of data to read
2789 *
2790 * A value of zero will be returned on success, a negative errno will
2791 * be returned in error cases.
2792 */
2793int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2794 size_t val_len)
2795{
2796 size_t val_bytes = map->format.val_bytes;
2797 size_t val_count = val_len / val_bytes;
2798 unsigned int v;
2799 int ret, i;
2800
2801 if (!map->bus)
2802 return -EINVAL;
2803 if (val_len % map->format.val_bytes)
2804 return -EINVAL;
2805 if (!IS_ALIGNED(reg, map->reg_stride))
2806 return -EINVAL;
2807 if (val_count == 0)
2808 return -EINVAL;
2809
2810 map->lock(map->lock_arg);
2811
2812 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2813 map->cache_type == REGCACHE_NONE) {
2814 size_t chunk_count, chunk_bytes;
2815 size_t chunk_regs = val_count;
2816
2817 if (!map->bus->read) {
2818 ret = -ENOTSUPP;
2819 goto out;
2820 }
2821
2822 if (map->use_single_read)
2823 chunk_regs = 1;
2824 else if (map->max_raw_read && val_len > map->max_raw_read)
2825 chunk_regs = map->max_raw_read / val_bytes;
2826
2827 chunk_count = val_count / chunk_regs;
2828 chunk_bytes = chunk_regs * val_bytes;
2829
2830 /* Read bytes that fit into whole chunks */
2831 for (i = 0; i < chunk_count; i++) {
2832 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2833 if (ret != 0)
2834 goto out;
2835
2836 reg += regmap_get_offset(map, chunk_regs);
2837 val += chunk_bytes;
2838 val_len -= chunk_bytes;
2839 }
2840
2841 /* Read remaining bytes */
2842 if (val_len) {
2843 ret = _regmap_raw_read(map, reg, val, val_len, false);
2844 if (ret != 0)
2845 goto out;
2846 }
2847 } else {
2848 /* Otherwise go word by word for the cache; should be low
2849 * cost as we expect to hit the cache.
2850 */
2851 for (i = 0; i < val_count; i++) {
2852 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2853 &v);
2854 if (ret != 0)
2855 goto out;
2856
2857 map->format.format_val(val + (i * val_bytes), v, 0);
2858 }
2859 }
2860
2861 out:
2862 map->unlock(map->lock_arg);
2863
2864 return ret;
2865}
2866EXPORT_SYMBOL_GPL(regmap_raw_read);
2867
2868/**
2869 * regmap_noinc_read(): Read data from a register without incrementing the
2870 * register number
2871 *
2872 * @map: Register map to read from
2873 * @reg: Register to read from
2874 * @val: Pointer to data buffer
2875 * @val_len: Length of output buffer in bytes.
2876 *
2877 * The regmap API usually assumes that bulk bus read operations will read a
2878 * range of registers. Some devices have certain registers for which a read
2879 * operation read will read from an internal FIFO.
2880 *
2881 * The target register must be volatile but registers after it can be
2882 * completely unrelated cacheable registers.
2883 *
2884 * This will attempt multiple reads as required to read val_len bytes.
2885 *
2886 * A value of zero will be returned on success, a negative errno will be
2887 * returned in error cases.
2888 */
2889int regmap_noinc_read(struct regmap *map, unsigned int reg,
2890 void *val, size_t val_len)
2891{
2892 size_t read_len;
2893 int ret;
2894
2895 if (!map->bus)
2896 return -EINVAL;
2897 if (!map->bus->read)
2898 return -ENOTSUPP;
2899 if (val_len % map->format.val_bytes)
2900 return -EINVAL;
2901 if (!IS_ALIGNED(reg, map->reg_stride))
2902 return -EINVAL;
2903 if (val_len == 0)
2904 return -EINVAL;
2905
2906 map->lock(map->lock_arg);
2907
2908 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2909 ret = -EINVAL;
2910 goto out_unlock;
2911 }
2912
2913 while (val_len) {
2914 if (map->max_raw_read && map->max_raw_read < val_len)
2915 read_len = map->max_raw_read;
2916 else
2917 read_len = val_len;
2918 ret = _regmap_raw_read(map, reg, val, read_len, true);
2919 if (ret)
2920 goto out_unlock;
2921 val = ((u8 *)val) + read_len;
2922 val_len -= read_len;
2923 }
2924
2925out_unlock:
2926 map->unlock(map->lock_arg);
2927 return ret;
2928}
2929EXPORT_SYMBOL_GPL(regmap_noinc_read);
2930
2931/**
2932 * regmap_field_read(): Read a value to a single register field
2933 *
2934 * @field: Register field to read from
2935 * @val: Pointer to store read value
2936 *
2937 * A value of zero will be returned on success, a negative errno will
2938 * be returned in error cases.
2939 */
2940int regmap_field_read(struct regmap_field *field, unsigned int *val)
2941{
2942 int ret;
2943 unsigned int reg_val;
2944 ret = regmap_read(field->regmap, field->reg, &reg_val);
2945 if (ret != 0)
2946 return ret;
2947
2948 reg_val &= field->mask;
2949 reg_val >>= field->shift;
2950 *val = reg_val;
2951
2952 return ret;
2953}
2954EXPORT_SYMBOL_GPL(regmap_field_read);
2955
2956/**
2957 * regmap_fields_read() - Read a value to a single register field with port ID
2958 *
2959 * @field: Register field to read from
2960 * @id: port ID
2961 * @val: Pointer to store read value
2962 *
2963 * A value of zero will be returned on success, a negative errno will
2964 * be returned in error cases.
2965 */
2966int regmap_fields_read(struct regmap_field *field, unsigned int id,
2967 unsigned int *val)
2968{
2969 int ret;
2970 unsigned int reg_val;
2971
2972 if (id >= field->id_size)
2973 return -EINVAL;
2974
2975 ret = regmap_read(field->regmap,
2976 field->reg + (field->id_offset * id),
2977 &reg_val);
2978 if (ret != 0)
2979 return ret;
2980
2981 reg_val &= field->mask;
2982 reg_val >>= field->shift;
2983 *val = reg_val;
2984
2985 return ret;
2986}
2987EXPORT_SYMBOL_GPL(regmap_fields_read);
2988
2989/**
2990 * regmap_bulk_read() - Read multiple registers from the device
2991 *
2992 * @map: Register map to read from
2993 * @reg: First register to be read from
2994 * @val: Pointer to store read value, in native register size for device
2995 * @val_count: Number of registers to read
2996 *
2997 * A value of zero will be returned on success, a negative errno will
2998 * be returned in error cases.
2999 */
3000int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3001 size_t val_count)
3002{
3003 int ret, i;
3004 size_t val_bytes = map->format.val_bytes;
3005 bool vol = regmap_volatile_range(map, reg, val_count);
3006
3007 if (!IS_ALIGNED(reg, map->reg_stride))
3008 return -EINVAL;
3009 if (val_count == 0)
3010 return -EINVAL;
3011
3012 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3013 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3014 if (ret != 0)
3015 return ret;
3016
3017 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3018 map->format.parse_inplace(val + i);
3019 } else {
3020#ifdef CONFIG_64BIT
3021 u64 *u64 = val;
3022#endif
3023 u32 *u32 = val;
3024 u16 *u16 = val;
3025 u8 *u8 = val;
3026
3027 map->lock(map->lock_arg);
3028
3029 for (i = 0; i < val_count; i++) {
3030 unsigned int ival;
3031
3032 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3033 &ival);
3034 if (ret != 0)
3035 goto out;
3036
3037 switch (map->format.val_bytes) {
3038#ifdef CONFIG_64BIT
3039 case 8:
3040 u64[i] = ival;
3041 break;
3042#endif
3043 case 4:
3044 u32[i] = ival;
3045 break;
3046 case 2:
3047 u16[i] = ival;
3048 break;
3049 case 1:
3050 u8[i] = ival;
3051 break;
3052 default:
3053 ret = -EINVAL;
3054 goto out;
3055 }
3056 }
3057
3058out:
3059 map->unlock(map->lock_arg);
3060 }
3061
3062 return ret;
3063}
3064EXPORT_SYMBOL_GPL(regmap_bulk_read);
3065
3066static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3067 unsigned int mask, unsigned int val,
3068 bool *change, bool force_write)
3069{
3070 int ret;
3071 unsigned int tmp, orig;
3072
3073 if (change)
3074 *change = false;
3075
3076 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3077 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3078 if (ret == 0 && change)
3079 *change = true;
3080 } else {
3081 ret = _regmap_read(map, reg, &orig);
3082 if (ret != 0)
3083 return ret;
3084
3085 tmp = orig & ~mask;
3086 tmp |= val & mask;
3087
3088 if (force_write || (tmp != orig)) {
3089 ret = _regmap_write(map, reg, tmp);
3090 if (ret == 0 && change)
3091 *change = true;
3092 }
3093 }
3094
3095 return ret;
3096}
3097
3098/**
3099 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3100 *
3101 * @map: Register map to update
3102 * @reg: Register to update
3103 * @mask: Bitmask to change
3104 * @val: New value for bitmask
3105 * @change: Boolean indicating if a write was done
3106 * @async: Boolean indicating asynchronously
3107 * @force: Boolean indicating use force update
3108 *
3109 * Perform a read/modify/write cycle on a register map with change, async, force
3110 * options.
3111 *
3112 * If async is true:
3113 *
3114 * With most buses the read must be done synchronously so this is most useful
3115 * for devices with a cache which do not need to interact with the hardware to
3116 * determine the current register value.
3117 *
3118 * Returns zero for success, a negative number on error.
3119 */
3120int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3121 unsigned int mask, unsigned int val,
3122 bool *change, bool async, bool force)
3123{
3124 int ret;
3125
3126 map->lock(map->lock_arg);
3127
3128 map->async = async;
3129
3130 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3131
3132 map->async = false;
3133
3134 map->unlock(map->lock_arg);
3135
3136 return ret;
3137}
3138EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3139
3140/**
3141 * regmap_test_bits() - Check if all specified bits are set in a register.
3142 *
3143 * @map: Register map to operate on
3144 * @reg: Register to read from
3145 * @bits: Bits to test
3146 *
3147 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3148 * bits are set and a negative error number if the underlying regmap_read()
3149 * fails.
3150 */
3151int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3152{
3153 unsigned int val, ret;
3154
3155 ret = regmap_read(map, reg, &val);
3156 if (ret)
3157 return ret;
3158
3159 return (val & bits) == bits;
3160}
3161EXPORT_SYMBOL_GPL(regmap_test_bits);
3162
3163void regmap_async_complete_cb(struct regmap_async *async, int ret)
3164{
3165 struct regmap *map = async->map;
3166 bool wake;
3167
3168 spin_lock(&map->async_lock);
3169 list_move(&async->list, &map->async_free);
3170 wake = list_empty(&map->async_list);
3171
3172 if (ret != 0)
3173 map->async_ret = ret;
3174
3175 spin_unlock(&map->async_lock);
3176
3177 if (wake)
3178 wake_up(&map->async_waitq);
3179}
3180EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3181
3182#ifndef TARGET_OS2
3183static int regmap_async_is_done(struct regmap *map)
3184{
3185 unsigned long flags;
3186 int ret;
3187
3188 spin_lock_irqsave(&map->async_lock, flags);
3189 ret = list_empty(&map->async_list);
3190 spin_unlock_irqrestore(&map->async_lock, flags);
3191
3192 return ret;
3193}
3194#endif
3195
3196/**
3197 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3198 *
3199 * @map: Map to operate on.
3200 *
3201 * Blocks until any pending asynchronous I/O has completed. Returns
3202 * an error code for any failed I/O operations.
3203 */
3204int regmap_async_complete(struct regmap *map)
3205{
3206 unsigned long flags;
3207 int ret;
3208
3209 /* Nothing to do with no async support */
3210 if (!map->bus || !map->bus->async_write)
3211 return 0;
3212
3213#ifndef TARGET_OS2
3214 wait_event(map->async_waitq, regmap_async_is_done(map));
3215#endif
3216 spin_lock_irqsave(&map->async_lock, flags);
3217 ret = map->async_ret;
3218 map->async_ret = 0;
3219 spin_unlock_irqrestore(&map->async_lock, flags);
3220
3221 return ret;
3222}
3223EXPORT_SYMBOL_GPL(regmap_async_complete);
3224
3225/**
3226 * regmap_register_patch - Register and apply register updates to be applied
3227 * on device initialistion
3228 *
3229 * @map: Register map to apply updates to.
3230 * @regs: Values to update.
3231 * @num_regs: Number of entries in regs.
3232 *
3233 * Register a set of register updates to be applied to the device
3234 * whenever the device registers are synchronised with the cache and
3235 * apply them immediately. Typically this is used to apply
3236 * corrections to be applied to the device defaults on startup, such
3237 * as the updates some vendors provide to undocumented registers.
3238 *
3239 * The caller must ensure that this function cannot be called
3240 * concurrently with either itself or regcache_sync().
3241 */
3242int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3243 int num_regs)
3244{
3245 struct reg_sequence *p;
3246 int ret;
3247 bool bypass;
3248
3249#ifndef TARGET_OS2
3250 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3251 num_regs))
3252 return 0;
3253#else
3254 if (num_regs <= 0) {
3255 pr_warn("invalid registers number (%d)", num_regs);
3256 return 0;
3257 }
3258#endif
3259 p = krealloc(map->patch,
3260 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3261 GFP_KERNEL);
3262 if (p) {
3263 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3264 map->patch = p;
3265 map->patch_regs += num_regs;
3266 } else {
3267 return -ENOMEM;
3268 }
3269
3270 map->lock(map->lock_arg);
3271
3272 bypass = map->cache_bypass;
3273
3274 map->cache_bypass = true;
3275 map->async = true;
3276
3277 ret = _regmap_multi_reg_write(map, regs, num_regs);
3278
3279 map->async = false;
3280 map->cache_bypass = bypass;
3281
3282 map->unlock(map->lock_arg);
3283
3284 regmap_async_complete(map);
3285
3286 return ret;
3287}
3288EXPORT_SYMBOL_GPL(regmap_register_patch);
3289
3290/**
3291 * regmap_get_val_bytes() - Report the size of a register value
3292 *
3293 * @map: Register map to operate on.
3294 *
3295 * Report the size of a register value, mainly intended to for use by
3296 * generic infrastructure built on top of regmap.
3297 */
3298int regmap_get_val_bytes(struct regmap *map)
3299{
3300 if (map->format.format_write)
3301 return -EINVAL;
3302
3303 return map->format.val_bytes;
3304}
3305EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3306
3307/**
3308 * regmap_get_max_register() - Report the max register value
3309 *
3310 * @map: Register map to operate on.
3311 *
3312 * Report the max register value, mainly intended to for use by
3313 * generic infrastructure built on top of regmap.
3314 */
3315int regmap_get_max_register(struct regmap *map)
3316{
3317 return map->max_register ? map->max_register : -EINVAL;
3318}
3319EXPORT_SYMBOL_GPL(regmap_get_max_register);
3320
3321/**
3322 * regmap_get_reg_stride() - Report the register address stride
3323 *
3324 * @map: Register map to operate on.
3325 *
3326 * Report the register address stride, mainly intended to for use by
3327 * generic infrastructure built on top of regmap.
3328 */
3329int regmap_get_reg_stride(struct regmap *map)
3330{
3331 return map->reg_stride;
3332}
3333EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3334
3335int regmap_parse_val(struct regmap *map, const void *buf,
3336 unsigned int *val)
3337{
3338 if (!map->format.parse_val)
3339 return -EINVAL;
3340
3341 *val = map->format.parse_val(buf);
3342
3343 return 0;
3344}
3345EXPORT_SYMBOL_GPL(regmap_parse_val);
3346
3347static int __init regmap_initcall(void)
3348{
3349 regmap_debugfs_initcall();
3350
3351 return 0;
3352}
3353postcore_initcall(regmap_initcall);
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