source: GPL/branches/uniaud32-next/lib32/regmap.c@ 625

Last change on this file since 625 was 625, checked in by Paul Smedley, 5 years ago

Code cleanups to simplify future maintenance, update regmap/regcache/rbtree to linux 4.19.163 level

File size: 73.3 KB
Line 
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12/* from 4.19.163 */
13
14#include <linux/device.h>
15#include <linux/slab.h>
16#include <linux/export.h>
17#include <linux/mutex.h>
18#include <linux/err.h>
19#include <linux/of.h>
20#include <linux/rbtree.h>
21#include <linux/sched.h>
22#include <linux/delay.h>
23#include <linux/log2.h>
24//#include <linux/hwspinlock.h>
25#include <asm/unaligned.h>
26#include <linux/module.h>
27#include <linux/workqueue.h>
28#include <linux/byteorder/little_endian.h>
29#include <linux/printk.h>
30
31/* hwspinlock mode argument */
32#define HWLOCK_IRQSTATE 0x01 /* Disable interrupts, save state */
33#define HWLOCK_IRQ 0x02 /* Disable interrupts, don't save state */
34#define HWLOCK_RAW 0x03
35
36#define CREATE_TRACE_POINTS
37//#include "trace.h"
38
39#include "internal.h"
40
41/*
42 * Sometimes for failures during very early init the trace
43 * infrastructure isn't available early enough to be used. For this
44 * sort of problem defining LOG_DEVICE will add printks for basic
45 * register I/O on a specific device.
46 */
47#undef LOG_DEVICE
48
49/*static inline*/ int _regmap_update_bits(struct regmap *map, unsigned int reg,
50 unsigned int mask, unsigned int val,
51 bool *change, bool force_write);
52
53/*static inline*/ int _regmap_bus_reg_read(void *context, unsigned int reg,
54 unsigned int *val);
55/*static inline*/ int _regmap_bus_read(void *context, unsigned int reg,
56 unsigned int *val);
57/*static inline*/ int _regmap_bus_formatted_write(void *context, unsigned int reg,
58 unsigned int val);
59/*static inline*/ int _regmap_bus_reg_write(void *context, unsigned int reg,
60 unsigned int val);
61/*static inline*/ int _regmap_bus_raw_write(void *context, unsigned int reg,
62 unsigned int val);
63
64bool regmap_reg_in_ranges(unsigned int reg,
65 const struct regmap_range *ranges,
66 unsigned int nranges)
67{
68 const struct regmap_range *r;
69 int i;
70
71 for (i = 0, r = ranges; i < nranges; i++, r++)
72 if (regmap_reg_in_range(reg, r))
73 return true;
74 return false;
75}
76EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
77
78bool regmap_check_range_table(struct regmap *map, unsigned int reg,
79 const struct regmap_access_table *table)
80{
81 /* Check "no ranges" first */
82 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
83 return false;
84
85 /* In case zero "yes ranges" are supplied, any reg is OK */
86 if (!table->n_yes_ranges)
87 return true;
88
89 return regmap_reg_in_ranges(reg, table->yes_ranges,
90 table->n_yes_ranges);
91}
92EXPORT_SYMBOL_GPL(regmap_check_range_table);
93
94bool regmap_writeable(struct regmap *map, unsigned int reg)
95{
96 if (map->max_register && reg > map->max_register)
97 return false;
98
99 if (map->writeable_reg)
100 return map->writeable_reg(map->dev, reg);
101
102 if (map->wr_table)
103 return regmap_check_range_table(map, reg, map->wr_table);
104
105 return true;
106}
107
108bool regmap_cached(struct regmap *map, unsigned int reg)
109{
110 int ret;
111 unsigned int val;
112
113 if (map->cache_type == REGCACHE_NONE)
114 return false;
115
116 if (!map->cache_ops)
117 return false;
118
119 if (map->max_register && reg > map->max_register)
120 return false;
121
122 map->lock(map->lock_arg);
123 ret = regcache_read(map, reg, &val);
124 map->unlock(map->lock_arg);
125 if (ret)
126 return false;
127
128 return true;
129}
130
131bool regmap_readable(struct regmap *map, unsigned int reg)
132{
133 if (!map->reg_read)
134 return false;
135
136 if (map->max_register && reg > map->max_register)
137 return false;
138
139 if (map->format.format_write)
140 return false;
141
142 if (map->readable_reg)
143 return map->readable_reg(map->dev, reg);
144
145 if (map->rd_table)
146 return regmap_check_range_table(map, reg, map->rd_table);
147
148 return true;
149}
150
151bool regmap_volatile(struct regmap *map, unsigned int reg)
152{
153 if (!map->format.format_write && !regmap_readable(map, reg))
154 return false;
155
156 if (map->volatile_reg)
157 return map->volatile_reg(map->dev, reg);
158
159 if (map->volatile_table)
160 return regmap_check_range_table(map, reg, map->volatile_table);
161
162 if (map->cache_ops)
163 return false;
164 else
165 return true;
166}
167
168bool regmap_precious(struct regmap *map, unsigned int reg)
169{
170 if (!regmap_readable(map, reg))
171 return false;
172
173 if (map->precious_reg)
174 return map->precious_reg(map->dev, reg);
175
176 if (map->precious_table)
177 return regmap_check_range_table(map, reg, map->precious_table);
178
179 return false;
180}
181
182bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
183{
184 if (map->readable_noinc_reg)
185 return map->readable_noinc_reg(map->dev, reg);
186
187 if (map->rd_noinc_table)
188 return regmap_check_range_table(map, reg, map->rd_noinc_table);
189
190 return true;
191}
192
193/*static inline*/ bool regmap_volatile_range(struct regmap *map, unsigned int reg,
194 size_t num)
195{
196 unsigned int i;
197
198 for (i = 0; i < num; i++)
199 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
200 return false;
201
202 return true;
203}
204
205/*static inline*/ void regmap_format_2_6_write(struct regmap *map,
206 unsigned int reg, unsigned int val)
207{
208 u8 *out = map->work_buf;
209
210 *out = (reg << 6) | val;
211}
212
213/*static inline*/ void regmap_format_4_12_write(struct regmap *map,
214 unsigned int reg, unsigned int val)
215{
216 __be16 *out = map->work_buf;
217 *out = cpu_to_be16((reg << 12) | val);
218}
219
220/*static inline*/ void regmap_format_7_9_write(struct regmap *map,
221 unsigned int reg, unsigned int val)
222{
223 __be16 *out = map->work_buf;
224 *out = cpu_to_be16((reg << 9) | val);
225}
226
227/*static inline*/ void regmap_format_10_14_write(struct regmap *map,
228 unsigned int reg, unsigned int val)
229{
230 u8 *out = map->work_buf;
231
232 out[2] = val;
233 out[1] = (val >> 8) | (reg << 6);
234 out[0] = reg >> 2;
235}
236
237/*static inline*/ void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
238{
239 u8 *b = buf;
240
241 b[0] = val << shift;
242}
243
244/*static inline*/ void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
245{
246 put_unaligned_be16(val << shift, buf);
247}
248
249/*static inline*/ void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
250{
251 put_unaligned_le16(val << shift, buf);
252}
253
254/*static inline*/ void regmap_format_16_native(void *buf, unsigned int val,
255 unsigned int shift)
256{
257 u16 v = val << shift;
258
259 memcpy(buf, &v, sizeof(v));
260}
261
262/*static inline*/ void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
263{
264 u8 *b = buf;
265
266 val <<= shift;
267
268 b[0] = val >> 16;
269 b[1] = val >> 8;
270 b[2] = val;
271}
272
273/*static inline*/ void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be32(val << shift, buf);
276}
277
278/*static inline*/ void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le32(val << shift, buf);
281}
282
283/*static inline*/ void regmap_format_32_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u32 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291#ifdef CONFIG_64BIT
292/*static inline*/ void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
293{
294 put_unaligned_be64((u64) val << shift, buf);
295}
296
297/*static inline*/ void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
298{
299 put_unaligned_le64((u64) val << shift, buf);
300}
301
302/*static inline*/ void regmap_format_64_native(void *buf, unsigned int val,
303 unsigned int shift)
304{
305 u64 v = (u64) val << shift;
306
307 memcpy(buf, &v, sizeof(v));
308}
309#endif
310
311/*static inline*/ void regmap_parse_inplace_noop(void *buf)
312{
313}
314
315/*static inline*/ unsigned int regmap_parse_8(const void *buf)
316{
317 const u8 *b = buf;
318
319 return b[0];
320}
321
322/*static inline*/ unsigned int regmap_parse_16_be(const void *buf)
323{
324 return get_unaligned_be16(buf);
325}
326
327/*static inline*/ unsigned int regmap_parse_16_le(const void *buf)
328{
329 return get_unaligned_le16(buf);
330}
331
332/*static inline*/ void regmap_parse_16_be_inplace(void *buf)
333{
334 u16 v = get_unaligned_be16(buf);
335
336 memcpy(buf, &v, sizeof(v));
337}
338
339/*static inline*/ void regmap_parse_16_le_inplace(void *buf)
340{
341 u16 v = get_unaligned_le16(buf);
342
343 memcpy(buf, &v, sizeof(v));
344}
345
346/*static inline*/ unsigned int regmap_parse_16_native(const void *buf)
347{
348 u16 v;
349
350 memcpy(&v, buf, sizeof(v));
351 return v;
352}
353
354/*static inline*/ unsigned int regmap_parse_24(const void *buf)
355{
356 const u8 *b = buf;
357 unsigned int ret = b[2];
358 ret |= ((unsigned int)b[1]) << 8;
359 ret |= ((unsigned int)b[0]) << 16;
360
361 return ret;
362}
363
364/*static inline*/ unsigned int regmap_parse_32_be(const void *buf)
365{
366 return get_unaligned_be32(buf);
367}
368
369/*static inline*/ unsigned int regmap_parse_32_le(const void *buf)
370{
371 return get_unaligned_le32(buf);
372}
373
374/*static inline*/ void regmap_parse_32_be_inplace(void *buf)
375{
376 u32 v = get_unaligned_be32(buf);
377
378 memcpy(buf, &v, sizeof(v));
379}
380
381/*static inline*/ void regmap_parse_32_le_inplace(void *buf)
382{
383 u32 v = get_unaligned_le32(buf);
384
385 memcpy(buf, &v, sizeof(v));
386}
387
388/*static inline*/ unsigned int regmap_parse_32_native(const void *buf)
389{
390 u32 v;
391
392 memcpy(&v, buf, sizeof(v));
393 return v;
394}
395
396#ifdef CONFIG_64BIT
397/*static inline*/ unsigned int regmap_parse_64_be(const void *buf)
398{
399 return get_unaligned_be64(buf);
400}
401
402/*static inline*/ unsigned int regmap_parse_64_le(const void *buf)
403{
404 return get_unaligned_le64(buf);
405}
406
407/*static inline*/ void regmap_parse_64_be_inplace(void *buf)
408{
409 u64 v = get_unaligned_be64(buf);
410
411 memcpy(buf, &v, sizeof(v));
412}
413
414/*static inline*/ void regmap_parse_64_le_inplace(void *buf)
415{
416 u64 v = get_unaligned_le64(buf);
417
418 memcpy(buf, &v, sizeof(v));
419}
420
421/*static inline*/ unsigned int regmap_parse_64_native(const void *buf)
422{
423 u64 v;
424
425 memcpy(&v, buf, sizeof(v));
426 return v;
427}
428#endif
429
430/*static inline*/ void regmap_lock_hwlock(void *__map)
431{
432 struct regmap *map = __map;
433
434// hwspin_lock_timeout(map->hwlock, UINT_MAX);
435}
436
437/*static inline*/ void regmap_lock_hwlock_irq(void *__map)
438{
439 struct regmap *map = __map;
440
441// hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
442}
443
444/*static inline*/ void regmap_lock_hwlock_irqsave(void *__map)
445{
446 struct regmap *map = __map;
447
448// hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
449// &map->spinlock_flags);
450}
451
452/*static inline*/ void regmap_unlock_hwlock(void *__map)
453{
454 struct regmap *map = __map;
455
456// hwspin_unlock(map->hwlock);
457}
458
459/*static inline*/ void regmap_unlock_hwlock_irq(void *__map)
460{
461 struct regmap *map = __map;
462
463// hwspin_unlock_irq(map->hwlock);
464}
465
466/*static inline*/ void regmap_unlock_hwlock_irqrestore(void *__map)
467{
468 struct regmap *map = __map;
469
470// hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
471}
472
473/*static inline*/ void regmap_lock_unlock_none(void *__map)
474{
475
476}
477
478/*static inline*/ void regmap_lock_mutex(void *__map)
479{
480 struct regmap *map = __map;
481 mutex_lock(&map->mutex);
482}
483
484/*static inline*/ void regmap_unlock_mutex(void *__map)
485{
486 struct regmap *map = __map;
487 mutex_unlock(&map->mutex);
488}
489
490/*static inline*/ void regmap_lock_spinlock(void *__map)
491__acquires(&map->spinlock)
492{
493 struct regmap *map = __map;
494 unsigned long flags;
495
496 spin_lock_irqsave(&map->spinlock, flags);
497 map->spinlock_flags = flags;
498}
499
500/*static inline*/ void regmap_unlock_spinlock(void *__map)
501__releases(&map->spinlock)
502{
503 struct regmap *map = __map;
504 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
505}
506
507/*static inline*/ void dev_get_regmap_release(struct device *dev, void *res)
508{
509 /*
510 * We don't actually have anything to do here; the goal here
511 * is not to manage the regmap but to provide a simple way to
512 * get the regmap back given a struct device.
513 */
514}
515
516/*static inline*/ bool _regmap_range_add(struct regmap *map,
517 struct regmap_range_node *data)
518{
519 struct rb_root *root = &map->range_tree;
520 struct rb_node **new = &(root->rb_node), *parent = NULL;
521
522 while (*new) {
523 struct regmap_range_node *this =
524 rb_entry(*new, struct regmap_range_node, node);
525
526 parent = *new;
527 if (data->range_max < this->range_min)
528 new = &((*new)->rb_left);
529 else if (data->range_min > this->range_max)
530 new = &((*new)->rb_right);
531 else
532 return false;
533 }
534
535 rb_link_node(&data->node, parent, new);
536 rb_insert_color(&data->node, root);
537
538 return true;
539}
540
541/*static inline*/ struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
542 unsigned int reg)
543{
544 struct rb_node *node = map->range_tree.rb_node;
545
546 while (node) {
547 struct regmap_range_node *this =
548 rb_entry(node, struct regmap_range_node, node);
549
550 if (reg < this->range_min)
551 node = node->rb_left;
552 else if (reg > this->range_max)
553 node = node->rb_right;
554 else
555 return this;
556 }
557
558 return NULL;
559}
560
561/*static inline*/ void regmap_range_exit(struct regmap *map)
562{
563 struct rb_node *next;
564 struct regmap_range_node *range_node;
565
566 next = rb_first(&map->range_tree);
567 while (next) {
568 range_node = rb_entry(next, struct regmap_range_node, node);
569 next = rb_next(&range_node->node);
570 rb_erase(&range_node->node, &map->range_tree);
571 kfree(range_node);
572 }
573
574 kfree(map->selector_work_buf);
575}
576
577int regmap_attach_dev(struct device *dev, struct regmap *map,
578 const struct regmap_config *config)
579{
580 struct regmap **m;
581
582 map->dev = dev;
583
584 regmap_debugfs_init(map, config->name);
585
586 /* Add a devres resource for dev_get_regmap() */
587 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
588 if (!m) {
589 regmap_debugfs_exit(map);
590 return -ENOMEM;
591 }
592 *m = map;
593 devres_add(dev, m);
594
595 return 0;
596}
597EXPORT_SYMBOL_GPL(regmap_attach_dev);
598
599/*static inline*/ enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
600 const struct regmap_config *config)
601{
602 enum regmap_endian endian;
603
604 /* Retrieve the endianness specification from the regmap config */
605 endian = config->reg_format_endian;
606
607 /* If the regmap config specified a non-default value, use that */
608 if (endian != REGMAP_ENDIAN_DEFAULT)
609 return endian;
610
611 /* Retrieve the endianness specification from the bus config */
612 if (bus && bus->reg_format_endian_default)
613 endian = bus->reg_format_endian_default;
614
615 /* If the bus specified a non-default value, use that */
616 if (endian != REGMAP_ENDIAN_DEFAULT)
617 return endian;
618
619 /* Use this if no other value was found */
620 return REGMAP_ENDIAN_BIG;
621}
622
623enum regmap_endian regmap_get_val_endian(struct device *dev,
624 const struct regmap_bus *bus,
625 const struct regmap_config *config)
626{
627 struct device_node *np;
628 enum regmap_endian endian;
629
630 /* Retrieve the endianness specification from the regmap config */
631 endian = config->val_format_endian;
632
633 /* If the regmap config specified a non-default value, use that */
634 if (endian != REGMAP_ENDIAN_DEFAULT)
635 return endian;
636
637 /* If the dev and dev->of_node exist try to get endianness from DT */
638 if (dev && dev->of_node) {
639 np = dev->of_node;
640
641 /* Parse the device's DT node for an endianness specification */
642 if (of_property_read_bool(np, "big-endian"))
643 endian = REGMAP_ENDIAN_BIG;
644 else if (of_property_read_bool(np, "little-endian"))
645 endian = REGMAP_ENDIAN_LITTLE;
646 else if (of_property_read_bool(np, "native-endian"))
647 endian = REGMAP_ENDIAN_NATIVE;
648
649 /* If the endianness was specified in DT, use that */
650 if (endian != REGMAP_ENDIAN_DEFAULT)
651 return endian;
652 }
653
654 /* Retrieve the endianness specification from the bus config */
655 if (bus && bus->val_format_endian_default)
656 endian = bus->val_format_endian_default;
657
658 /* If the bus specified a non-default value, use that */
659 if (endian != REGMAP_ENDIAN_DEFAULT)
660 return endian;
661
662 /* Use this if no other value was found */
663 return REGMAP_ENDIAN_BIG;
664}
665EXPORT_SYMBOL_GPL(regmap_get_val_endian);
666
667struct regmap *__regmap_init(struct device *dev,
668 const struct regmap_bus *bus,
669 void *bus_context,
670 const struct regmap_config *config,
671 struct lock_class_key *lock_key,
672 const char *lock_name)
673{
674 struct regmap *map;
675 int ret = -EINVAL;
676 enum regmap_endian reg_endian, val_endian;
677 int i, j;
678#ifdef TARGET_OS2
679 // 2020-11-17 SHL FIXME patched struct rb_root
680 struct rb_root _RB_ROOT = { NULL, };
681#endif
682
683 if (!config)
684 goto err;
685
686 map = kzalloc(sizeof(*map), GFP_KERNEL);
687 if (map == NULL) {
688 ret = -ENOMEM;
689 goto err;
690 }
691
692 if (config->name) {
693#ifndef TARGET_OS2
694 map->name = kstrdup_const(config->name, GFP_KERNEL);
695#else
696 map->name = config->name;
697#endif
698 if (!map->name) {
699 ret = -ENOMEM;
700 goto err_map;
701 }
702 }
703
704 if (config->disable_locking) {
705 map->lock = map->unlock = regmap_lock_unlock_none;
706 regmap_debugfs_disable(map);
707 } else if (config->lock && config->unlock) {
708 map->lock = config->lock;
709 map->unlock = config->unlock;
710 map->lock_arg = config->lock_arg;
711 } else if (config->use_hwlock) {
712// map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
713// if (!map->hwlock) {
714// ret = -ENXIO;
715// goto err_name;
716// }
717
718 switch (config->hwlock_mode) {
719 case HWLOCK_IRQSTATE:
720 map->lock = regmap_lock_hwlock_irqsave;
721 map->unlock = regmap_unlock_hwlock_irqrestore;
722 break;
723 case HWLOCK_IRQ:
724 map->lock = regmap_lock_hwlock_irq;
725 map->unlock = regmap_unlock_hwlock_irq;
726 break;
727 default:
728 map->lock = regmap_lock_hwlock;
729 map->unlock = regmap_unlock_hwlock;
730 break;
731 }
732
733 map->lock_arg = map;
734 } else {
735 if ((bus && bus->fast_io) ||
736 config->fast_io) {
737 spin_lock_init(&map->spinlock);
738 map->lock = regmap_lock_spinlock;
739 map->unlock = regmap_unlock_spinlock;
740 lockdep_set_class_and_name(&map->spinlock,
741 lock_key, lock_name);
742 } else {
743 mutex_init(&map->mutex);
744 map->lock = regmap_lock_mutex;
745 map->unlock = regmap_unlock_mutex;
746 lockdep_set_class_and_name(&map->mutex,
747 lock_key, lock_name);
748 }
749 map->lock_arg = map;
750 }
751
752 /*
753 * When we write in fast-paths with regmap_bulk_write() don't allocate
754 * scratch buffers with sleeping allocations.
755 */
756 if ((bus && bus->fast_io) || config->fast_io)
757 map->alloc_flags = GFP_ATOMIC;
758 else
759 map->alloc_flags = GFP_KERNEL;
760
761 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762 map->format.pad_bytes = config->pad_bits / 8;
763 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
764 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
765 config->val_bits + config->pad_bits, 8);
766 map->reg_shift = config->pad_bits % 8;
767 if (config->reg_stride)
768 map->reg_stride = config->reg_stride;
769 else
770 map->reg_stride = 1;
771 if (is_power_of_2(map->reg_stride))
772 map->reg_stride_order = ilog2(map->reg_stride);
773 else
774 map->reg_stride_order = -1;
775 map->use_single_read = config->use_single_read || !bus || !bus->read;
776 map->use_single_write = config->use_single_read || !bus || !bus->write;
777 map->can_multi_write = config->can_multi_write && bus && bus->write;
778 if (bus) {
779 map->max_raw_read = bus->max_raw_read;
780 map->max_raw_write = bus->max_raw_write;
781 }
782 map->dev = dev;
783 map->bus = bus;
784 map->bus_context = bus_context;
785 map->max_register = config->max_register;
786 map->wr_table = config->wr_table;
787 map->rd_table = config->rd_table;
788 map->volatile_table = config->volatile_table;
789 map->precious_table = config->precious_table;
790 map->rd_noinc_table = config->rd_noinc_table;
791 map->writeable_reg = config->writeable_reg;
792 map->readable_reg = config->readable_reg;
793 map->volatile_reg = config->volatile_reg;
794 map->precious_reg = config->precious_reg;
795 map->readable_noinc_reg = config->readable_noinc_reg;
796 map->cache_type = config->cache_type;
797
798 spin_lock_init(&map->async_lock);
799 INIT_LIST_HEAD(&map->async_list);
800 INIT_LIST_HEAD(&map->async_free);
801 init_waitqueue_head(&map->async_waitq);
802
803 if (config->read_flag_mask ||
804 config->write_flag_mask ||
805 config->zero_flag_mask) {
806 map->read_flag_mask = config->read_flag_mask;
807 map->write_flag_mask = config->write_flag_mask;
808 } else if (bus) {
809 map->read_flag_mask = bus->read_flag_mask;
810 }
811
812 if (!bus) {
813 map->reg_read = config->reg_read;
814 map->reg_write = config->reg_write;
815
816 map->defer_caching = false;
817 goto skip_format_initialization;
818 } else if (!bus->read || !bus->write) {
819 map->reg_read = _regmap_bus_reg_read;
820 map->reg_write = _regmap_bus_reg_write;
821
822 map->defer_caching = false;
823 goto skip_format_initialization;
824 } else {
825 map->reg_read = _regmap_bus_read;
826 map->reg_update_bits = bus->reg_update_bits;
827 }
828
829 reg_endian = regmap_get_reg_endian(bus, config);
830 val_endian = regmap_get_val_endian(dev, bus, config);
831
832 switch (config->reg_bits + map->reg_shift) {
833 case 2:
834 switch (config->val_bits) {
835 case 6:
836 map->format.format_write = regmap_format_2_6_write;
837 break;
838 default:
839 goto err_hwlock;
840 }
841 break;
842
843 case 4:
844 switch (config->val_bits) {
845 case 12:
846 map->format.format_write = regmap_format_4_12_write;
847 break;
848 default:
849 goto err_hwlock;
850 }
851 break;
852
853 case 7:
854 switch (config->val_bits) {
855 case 9:
856 map->format.format_write = regmap_format_7_9_write;
857 break;
858 default:
859 goto err_hwlock;
860 }
861 break;
862
863 case 10:
864 switch (config->val_bits) {
865 case 14:
866 map->format.format_write = regmap_format_10_14_write;
867 break;
868 default:
869 goto err_hwlock;
870 }
871 break;
872
873 case 8:
874 map->format.format_reg = regmap_format_8;
875 break;
876
877 case 16:
878 switch (reg_endian) {
879 case REGMAP_ENDIAN_BIG:
880 map->format.format_reg = regmap_format_16_be;
881 break;
882 case REGMAP_ENDIAN_LITTLE:
883 map->format.format_reg = regmap_format_16_le;
884 break;
885 case REGMAP_ENDIAN_NATIVE:
886 map->format.format_reg = regmap_format_16_native;
887 break;
888 default:
889 goto err_hwlock;
890 }
891 break;
892
893 case 24:
894 if (reg_endian != REGMAP_ENDIAN_BIG)
895 goto err_hwlock;
896 map->format.format_reg = regmap_format_24;
897 break;
898
899 case 32:
900 switch (reg_endian) {
901 case REGMAP_ENDIAN_BIG:
902 map->format.format_reg = regmap_format_32_be;
903 break;
904 case REGMAP_ENDIAN_LITTLE:
905 map->format.format_reg = regmap_format_32_le;
906 break;
907 case REGMAP_ENDIAN_NATIVE:
908 map->format.format_reg = regmap_format_32_native;
909 break;
910 default:
911 goto err_hwlock;
912 }
913 break;
914
915#ifdef CONFIG_64BIT
916 case 64:
917 switch (reg_endian) {
918 case REGMAP_ENDIAN_BIG:
919 map->format.format_reg = regmap_format_64_be;
920 break;
921 case REGMAP_ENDIAN_LITTLE:
922 map->format.format_reg = regmap_format_64_le;
923 break;
924 case REGMAP_ENDIAN_NATIVE:
925 map->format.format_reg = regmap_format_64_native;
926 break;
927 default:
928 goto err_hwlock;
929 }
930 break;
931#endif
932
933 default:
934 goto err_hwlock;
935 }
936
937 if (val_endian == REGMAP_ENDIAN_NATIVE)
938 map->format.parse_inplace = regmap_parse_inplace_noop;
939
940 switch (config->val_bits) {
941 case 8:
942 map->format.format_val = regmap_format_8;
943 map->format.parse_val = regmap_parse_8;
944 map->format.parse_inplace = regmap_parse_inplace_noop;
945 break;
946 case 16:
947 switch (val_endian) {
948 case REGMAP_ENDIAN_BIG:
949 map->format.format_val = regmap_format_16_be;
950 map->format.parse_val = regmap_parse_16_be;
951 map->format.parse_inplace = regmap_parse_16_be_inplace;
952 break;
953 case REGMAP_ENDIAN_LITTLE:
954 map->format.format_val = regmap_format_16_le;
955 map->format.parse_val = regmap_parse_16_le;
956 map->format.parse_inplace = regmap_parse_16_le_inplace;
957 break;
958 case REGMAP_ENDIAN_NATIVE:
959 map->format.format_val = regmap_format_16_native;
960 map->format.parse_val = regmap_parse_16_native;
961 break;
962 default:
963 goto err_hwlock;
964 }
965 break;
966 case 24:
967 if (val_endian != REGMAP_ENDIAN_BIG)
968 goto err_hwlock;
969 map->format.format_val = regmap_format_24;
970 map->format.parse_val = regmap_parse_24;
971 break;
972 case 32:
973 switch (val_endian) {
974 case REGMAP_ENDIAN_BIG:
975 map->format.format_val = regmap_format_32_be;
976 map->format.parse_val = regmap_parse_32_be;
977 map->format.parse_inplace = regmap_parse_32_be_inplace;
978 break;
979 case REGMAP_ENDIAN_LITTLE:
980 map->format.format_val = regmap_format_32_le;
981 map->format.parse_val = regmap_parse_32_le;
982 map->format.parse_inplace = regmap_parse_32_le_inplace;
983 break;
984 case REGMAP_ENDIAN_NATIVE:
985 map->format.format_val = regmap_format_32_native;
986 map->format.parse_val = regmap_parse_32_native;
987 break;
988 default:
989 goto err_hwlock;
990 }
991 break;
992#ifdef CONFIG_64BIT
993 case 64:
994 switch (val_endian) {
995 case REGMAP_ENDIAN_BIG:
996 map->format.format_val = regmap_format_64_be;
997 map->format.parse_val = regmap_parse_64_be;
998 map->format.parse_inplace = regmap_parse_64_be_inplace;
999 break;
1000 case REGMAP_ENDIAN_LITTLE:
1001 map->format.format_val = regmap_format_64_le;
1002 map->format.parse_val = regmap_parse_64_le;
1003 map->format.parse_inplace = regmap_parse_64_le_inplace;
1004 break;
1005 case REGMAP_ENDIAN_NATIVE:
1006 map->format.format_val = regmap_format_64_native;
1007 map->format.parse_val = regmap_parse_64_native;
1008 break;
1009 default:
1010 goto err_hwlock;
1011 }
1012 break;
1013#endif
1014 }
1015
1016 if (map->format.format_write) {
1017 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1018 (val_endian != REGMAP_ENDIAN_BIG))
1019 goto err_hwlock;
1020 map->use_single_write = true;
1021 }
1022
1023 if (!map->format.format_write &&
1024 !(map->format.format_reg && map->format.format_val))
1025 goto err_hwlock;
1026
1027 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1028 if (map->work_buf == NULL) {
1029 ret = -ENOMEM;
1030 goto err_hwlock;
1031 }
1032
1033 if (map->format.format_write) {
1034 map->defer_caching = false;
1035 map->reg_write = _regmap_bus_formatted_write;
1036 } else if (map->format.format_val) {
1037 map->defer_caching = true;
1038 map->reg_write = _regmap_bus_raw_write;
1039 }
1040
1041skip_format_initialization:
1042
1043#ifndef TARGET_OS2
1044 map->range_tree = RB_ROOT;
1045#else
1046 map->range_tree = _RB_ROOT;
1047 map->range_tree.rb_node = NULL;
1048 memset(&map->range_tree, 0, sizeof(struct rb_root));
1049#endif
1050
1051 for (i = 0; i < config->num_ranges; i++) {
1052 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1053 struct regmap_range_node *new;
1054
1055 /* Sanity check */
1056 if (range_cfg->range_max < range_cfg->range_min) {
1057 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1058 range_cfg->range_max, range_cfg->range_min);
1059 goto err_range;
1060 }
1061
1062 if (range_cfg->range_max > map->max_register) {
1063 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1064 range_cfg->range_max, map->max_register);
1065 goto err_range;
1066 }
1067
1068 if (range_cfg->selector_reg > map->max_register) {
1069 dev_err(map->dev,
1070 "Invalid range %d: selector out of map\n", i);
1071 goto err_range;
1072 }
1073
1074 if (range_cfg->window_len == 0) {
1075 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1076 i);
1077 goto err_range;
1078 }
1079
1080 /* Make sure, that this register range has no selector
1081 or data window within its boundary */
1082 for (j = 0; j < config->num_ranges; j++) {
1083 unsigned sel_reg = config->ranges[j].selector_reg;
1084 unsigned win_min = config->ranges[j].window_start;
1085 unsigned win_max = win_min +
1086 config->ranges[j].window_len - 1;
1087
1088 /* Allow data window inside its own virtual range */
1089 if (j == i)
1090 continue;
1091
1092 if (range_cfg->range_min <= sel_reg &&
1093 sel_reg <= range_cfg->range_max) {
1094 dev_err(map->dev,
1095 "Range %d: selector for %d in window\n",
1096 i, j);
1097 goto err_range;
1098 }
1099
1100 if (!(win_max < range_cfg->range_min ||
1101 win_min > range_cfg->range_max)) {
1102 dev_err(map->dev,
1103 "Range %d: window for %d in window\n",
1104 i, j);
1105 goto err_range;
1106 }
1107 }
1108
1109 new = kzalloc(sizeof(*new), GFP_KERNEL);
1110 if (new == NULL) {
1111 ret = -ENOMEM;
1112 goto err_range;
1113 }
1114
1115 new->map = map;
1116 new->name = range_cfg->name;
1117 new->range_min = range_cfg->range_min;
1118 new->range_max = range_cfg->range_max;
1119 new->selector_reg = range_cfg->selector_reg;
1120 new->selector_mask = range_cfg->selector_mask;
1121 new->selector_shift = range_cfg->selector_shift;
1122 new->window_start = range_cfg->window_start;
1123 new->window_len = range_cfg->window_len;
1124
1125 if (!_regmap_range_add(map, new)) {
1126 dev_err(map->dev, "Failed to add range %d\n", i);
1127 kfree(new);
1128 goto err_range;
1129 }
1130
1131 if (map->selector_work_buf == NULL) {
1132 map->selector_work_buf =
1133 kzalloc(map->format.buf_size, GFP_KERNEL);
1134 if (map->selector_work_buf == NULL) {
1135 ret = -ENOMEM;
1136 goto err_range;
1137 }
1138 }
1139 }
1140
1141 ret = regcache_init(map, config);
1142 if (ret != 0)
1143 goto err_range;
1144
1145 if (dev) {
1146 ret = regmap_attach_dev(dev, map, config);
1147 if (ret != 0)
1148 goto err_regcache;
1149 } else {
1150 regmap_debugfs_init(map, config->name);
1151 }
1152
1153 return map;
1154
1155err_regcache:
1156 regcache_exit(map);
1157err_range:
1158 regmap_range_exit(map);
1159 kfree(map->work_buf);
1160err_hwlock:
1161// if (map->hwlock)
1162// hwspin_lock_free(map->hwlock);
1163err_name:
1164// kfree_const(map->name);
1165err_map:
1166 kfree(map);
1167err:
1168 return ERR_PTR(ret);
1169}
1170EXPORT_SYMBOL_GPL(__regmap_init);
1171
1172#ifndef TARGET_OS2
1173/*static inline*/ void devm_regmap_release(struct device *dev, void *res)
1174{
1175 regmap_exit(*(struct regmap **)res);
1176}
1177
1178struct regmap *__devm_regmap_init(struct device *dev,
1179 const struct regmap_bus *bus,
1180 void *bus_context,
1181 const struct regmap_config *config,
1182 struct lock_class_key *lock_key,
1183 const char *lock_name)
1184{
1185 struct regmap **ptr, *regmap;
1186
1187 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1188 if (!ptr)
1189 return ERR_PTR(-ENOMEM);
1190
1191 regmap = __regmap_init(dev, bus, bus_context, config,
1192 lock_key, lock_name);
1193 if (!IS_ERR(regmap)) {
1194 *ptr = regmap;
1195 devres_add(dev, ptr);
1196 } else {
1197 devres_free(ptr);
1198 }
1199
1200 return regmap;
1201}
1202EXPORT_SYMBOL_GPL(__devm_regmap_init);
1203#endif
1204
1205/*static inline*/ void regmap_field_init(struct regmap_field *rm_field,
1206 struct regmap *regmap, struct reg_field reg_field)
1207{
1208 rm_field->regmap = regmap;
1209 rm_field->reg = reg_field.reg;
1210 rm_field->shift = reg_field.lsb;
1211 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1212 rm_field->id_size = reg_field.id_size;
1213 rm_field->id_offset = reg_field.id_offset;
1214}
1215
1216#ifndef TARGET_OS2
1217/**
1218 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1219 *
1220 * @dev: Device that will be interacted with
1221 * @regmap: regmap bank in which this register field is located.
1222 * @reg_field: Register field with in the bank.
1223 *
1224 * The return value will be an ERR_PTR() on error or a valid pointer
1225 * to a struct regmap_field. The regmap_field will be automatically freed
1226 * by the device management code.
1227 */
1228struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1229 struct regmap *regmap, struct reg_field reg_field)
1230{
1231 struct regmap_field *rm_field = devm_kzalloc(dev,
1232 sizeof(*rm_field), GFP_KERNEL);
1233 if (!rm_field)
1234 return ERR_PTR(-ENOMEM);
1235
1236 regmap_field_init(rm_field, regmap, reg_field);
1237
1238 return rm_field;
1239
1240}
1241EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1242
1243/**
1244 * devm_regmap_field_free() - Free a register field allocated using
1245 * devm_regmap_field_alloc.
1246 *
1247 * @dev: Device that will be interacted with
1248 * @field: regmap field which should be freed.
1249 *
1250 * Free register field allocated using devm_regmap_field_alloc(). Usually
1251 * drivers need not call this function, as the memory allocated via devm
1252 * will be freed as per device-driver life-cyle.
1253 */
1254void devm_regmap_field_free(struct device *dev,
1255 struct regmap_field *field)
1256{
1257 devm_kfree(dev, field);
1258}
1259EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1260#endif
1261
1262/**
1263 * regmap_field_alloc() - Allocate and initialise a register field.
1264 *
1265 * @regmap: regmap bank in which this register field is located.
1266 * @reg_field: Register field with in the bank.
1267 *
1268 * The return value will be an ERR_PTR() on error or a valid pointer
1269 * to a struct regmap_field. The regmap_field should be freed by the
1270 * user once its finished working with it using regmap_field_free().
1271 */
1272struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1273 struct reg_field reg_field)
1274{
1275 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1276
1277 if (!rm_field)
1278 return ERR_PTR(-ENOMEM);
1279
1280 regmap_field_init(rm_field, regmap, reg_field);
1281
1282 return rm_field;
1283}
1284EXPORT_SYMBOL_GPL(regmap_field_alloc);
1285
1286/**
1287 * regmap_field_free() - Free register field allocated using
1288 * regmap_field_alloc.
1289 *
1290 * @field: regmap field which should be freed.
1291 */
1292void regmap_field_free(struct regmap_field *field)
1293{
1294 kfree(field);
1295}
1296EXPORT_SYMBOL_GPL(regmap_field_free);
1297
1298/**
1299 * regmap_reinit_cache() - Reinitialise the current register cache
1300 *
1301 * @map: Register map to operate on.
1302 * @config: New configuration. Only the cache data will be used.
1303 *
1304 * Discard any existing register cache for the map and initialize a
1305 * new cache. This can be used to restore the cache to defaults or to
1306 * update the cache configuration to reflect runtime discovery of the
1307 * hardware.
1308 *
1309 * No explicit locking is done here, the user needs to ensure that
1310 * this function will not race with other calls to regmap.
1311 */
1312int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1313{
1314 regcache_exit(map);
1315 regmap_debugfs_exit(map);
1316
1317 map->max_register = config->max_register;
1318 map->writeable_reg = config->writeable_reg;
1319 map->readable_reg = config->readable_reg;
1320 map->volatile_reg = config->volatile_reg;
1321 map->precious_reg = config->precious_reg;
1322 map->readable_noinc_reg = config->readable_noinc_reg;
1323 map->cache_type = config->cache_type;
1324
1325 regmap_debugfs_init(map, config->name);
1326
1327 map->cache_bypass = false;
1328 map->cache_only = false;
1329
1330 return regcache_init(map, config);
1331}
1332EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1333
1334/**
1335 * regmap_exit() - Free a previously allocated register map
1336 *
1337 * @map: Register map to operate on.
1338 */
1339void regmap_exit(struct regmap *map)
1340{
1341 struct regmap_async *async;
1342
1343 regcache_exit(map);
1344 regmap_debugfs_exit(map);
1345 regmap_range_exit(map);
1346 if (map->bus && map->bus->free_context)
1347 map->bus->free_context(map->bus_context);
1348 kfree(map->work_buf);
1349 while (!list_empty(&map->async_free)) {
1350 async = list_first_entry_or_null(&map->async_free,
1351 struct regmap_async,
1352 list);
1353 list_del(&async->list);
1354 kfree(async->work_buf);
1355 kfree(async);
1356 }
1357// if (map->hwlock)
1358// hwspin_lock_free(map->hwlock);
1359// kfree_const(map->name);
1360 kfree(map->patch);
1361 kfree(map);
1362}
1363EXPORT_SYMBOL_GPL(regmap_exit);
1364
1365/*static inline*/ int dev_get_regmap_match(struct device *dev, void *res, void *data)
1366{
1367 struct regmap **r = res;
1368 if (!r || !*r) {
1369 WARN_ON(!r || !*r);
1370 return 0;
1371 }
1372
1373 /* If the user didn't specify a name match any */
1374 if (data)
1375 return !strcmp((*r)->name, data);
1376 else
1377 return 1;
1378}
1379
1380/**
1381 * dev_get_regmap() - Obtain the regmap (if any) for a device
1382 *
1383 * @dev: Device to retrieve the map for
1384 * @name: Optional name for the register map, usually NULL.
1385 *
1386 * Returns the regmap for the device if one is present, or NULL. If
1387 * name is specified then it must match the name specified when
1388 * registering the device, if it is NULL then the first regmap found
1389 * will be used. Devices with multiple register maps are very rare,
1390 * generic code should normally not need to specify a name.
1391 */
1392struct regmap *dev_get_regmap(struct device *dev, const char *name)
1393{
1394 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1395 dev_get_regmap_match, (void *)name);
1396
1397 if (!r)
1398 return NULL;
1399 return *r;
1400}
1401EXPORT_SYMBOL_GPL(dev_get_regmap);
1402
1403/**
1404 * regmap_get_device() - Obtain the device from a regmap
1405 *
1406 * @map: Register map to operate on.
1407 *
1408 * Returns the underlying device that the regmap has been created for.
1409 */
1410struct device *regmap_get_device(struct regmap *map)
1411{
1412 return map->dev;
1413}
1414EXPORT_SYMBOL_GPL(regmap_get_device);
1415
1416/*static inline*/ int _regmap_select_page(struct regmap *map, unsigned int *reg,
1417 struct regmap_range_node *range,
1418 unsigned int val_num)
1419{
1420 void *orig_work_buf;
1421 unsigned int win_offset;
1422 unsigned int win_page;
1423 bool page_chg;
1424 int ret;
1425
1426 win_offset = (*reg - range->range_min) % range->window_len;
1427 win_page = (*reg - range->range_min) / range->window_len;
1428
1429 if (val_num > 1) {
1430 /* Bulk write shouldn't cross range boundary */
1431 if (*reg + val_num - 1 > range->range_max)
1432 return -EINVAL;
1433
1434 /* ... or single page boundary */
1435 if (val_num > range->window_len - win_offset)
1436 return -EINVAL;
1437 }
1438
1439 /* It is possible to have selector register inside data window.
1440 In that case, selector register is located on every page and
1441 it needs no page switching, when accessed alone. */
1442 if (val_num > 1 ||
1443 range->window_start + win_offset != range->selector_reg) {
1444 /* Use separate work_buf during page switching */
1445 orig_work_buf = map->work_buf;
1446 map->work_buf = map->selector_work_buf;
1447
1448 ret = _regmap_update_bits(map, range->selector_reg,
1449 range->selector_mask,
1450 win_page << range->selector_shift,
1451 &page_chg, false);
1452
1453 map->work_buf = orig_work_buf;
1454
1455 if (ret != 0)
1456 return ret;
1457 }
1458
1459 *reg = range->window_start + win_offset;
1460
1461 return 0;
1462}
1463
1464/*static inline*/ void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1465 unsigned long mask)
1466{
1467 u8 *buf;
1468 int i;
1469
1470 if (!mask || !map->work_buf)
1471 return;
1472
1473 buf = map->work_buf;
1474
1475 for (i = 0; i < max_bytes; i++)
1476 buf[i] |= (mask >> (8 * i)) & 0xff;
1477}
1478
1479/*static inline*/ int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1480 const void *val, size_t val_len)
1481{
1482 struct regmap_range_node *range;
1483 unsigned long flags;
1484 void *work_val = map->work_buf + map->format.reg_bytes +
1485 map->format.pad_bytes;
1486 void *buf;
1487 int ret = -ENOTSUPP;
1488 size_t len;
1489 int i;
1490
1491 WARN_ON(!map->bus);
1492
1493 /* Check for unwritable registers before we start */
1494 if (map->writeable_reg)
1495 for (i = 0; i < val_len / map->format.val_bytes; i++)
1496 if (!map->writeable_reg(map->dev,
1497 reg + regmap_get_offset(map, i)))
1498 return -EINVAL;
1499
1500 if (!map->cache_bypass && map->format.parse_val) {
1501 unsigned int ival;
1502 int val_bytes = map->format.val_bytes;
1503 for (i = 0; i < val_len / val_bytes; i++) {
1504 ival = map->format.parse_val(val + (i * val_bytes));
1505 ret = regcache_write(map,
1506 reg + regmap_get_offset(map, i),
1507 ival);
1508 if (ret) {
1509 dev_err(map->dev,
1510 "Error in caching of register: %x ret: %d\n",
1511 reg + i, ret);
1512 return ret;
1513 }
1514 }
1515 if (map->cache_only) {
1516 map->cache_dirty = true;
1517 return 0;
1518 }
1519 }
1520
1521 range = _regmap_range_lookup(map, reg);
1522 if (range) {
1523 int val_num = val_len / map->format.val_bytes;
1524 int win_offset = (reg - range->range_min) % range->window_len;
1525 int win_residue = range->window_len - win_offset;
1526
1527 /* If the write goes beyond the end of the window split it */
1528 while (val_num > win_residue) {
1529 dev_dbg(map->dev, "Writing window %d/%zu\n",
1530 win_residue, val_len / map->format.val_bytes);
1531 ret = _regmap_raw_write_impl(map, reg, val,
1532 win_residue *
1533 map->format.val_bytes);
1534 if (ret != 0)
1535 return ret;
1536
1537 reg += win_residue;
1538 val_num -= win_residue;
1539 val += win_residue * map->format.val_bytes;
1540 val_len -= win_residue * map->format.val_bytes;
1541
1542 win_offset = (reg - range->range_min) %
1543 range->window_len;
1544 win_residue = range->window_len - win_offset;
1545 }
1546
1547 ret = _regmap_select_page(map, &reg, range, val_num);
1548 if (ret != 0)
1549 return ret;
1550 }
1551
1552 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1553 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1554 map->write_flag_mask);
1555
1556 /*
1557 * Essentially all I/O mechanisms will be faster with a single
1558 * buffer to write. Since register syncs often generate raw
1559 * writes of single registers optimise that case.
1560 */
1561 if (val != work_val && val_len == map->format.val_bytes) {
1562 memcpy(work_val, val, map->format.val_bytes);
1563 val = work_val;
1564 }
1565
1566 if (map->async && map->bus->async_write) {
1567 struct regmap_async *async;
1568
1569 spin_lock_irqsave(&map->async_lock, flags);
1570 async = list_first_entry_or_null(&map->async_free,
1571 struct regmap_async,
1572 list);
1573 if (async)
1574 list_del(&async->list);
1575 spin_unlock_irqrestore(&map->async_lock, flags);
1576
1577 if (!async) {
1578 async = map->bus->async_alloc();
1579 if (!async)
1580 return -ENOMEM;
1581
1582 async->work_buf = kzalloc(map->format.buf_size,
1583 GFP_KERNEL | GFP_DMA);
1584 if (!async->work_buf) {
1585 kfree(async);
1586 return -ENOMEM;
1587 }
1588 }
1589
1590 async->map = map;
1591
1592 /* If the caller supplied the value we can use it safely. */
1593 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1594 map->format.reg_bytes + map->format.val_bytes);
1595
1596 spin_lock_irqsave(&map->async_lock, flags);
1597 list_add_tail(&async->list, &map->async_list);
1598 spin_unlock_irqrestore(&map->async_lock, flags);
1599
1600 if (val != work_val)
1601 ret = map->bus->async_write(map->bus_context,
1602 async->work_buf,
1603 map->format.reg_bytes +
1604 map->format.pad_bytes,
1605 val, val_len, async);
1606 else
1607 ret = map->bus->async_write(map->bus_context,
1608 async->work_buf,
1609 map->format.reg_bytes +
1610 map->format.pad_bytes +
1611 val_len, NULL, 0, async);
1612
1613 if (ret != 0) {
1614 dev_err(map->dev, "Failed to schedule write: %d\n",
1615 ret);
1616
1617 spin_lock_irqsave(&map->async_lock, flags);
1618 list_move(&async->list, &map->async_free);
1619 spin_unlock_irqrestore(&map->async_lock, flags);
1620 }
1621
1622 return ret;
1623 }
1624
1625 /* If we're doing a single register write we can probably just
1626 * send the work_buf directly, otherwise try to do a gather
1627 * write.
1628 */
1629 if (val == work_val)
1630 ret = map->bus->write(map->bus_context, map->work_buf,
1631 map->format.reg_bytes +
1632 map->format.pad_bytes +
1633 val_len);
1634 else if (map->bus->gather_write)
1635 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1636 map->format.reg_bytes +
1637 map->format.pad_bytes,
1638 val, val_len);
1639 else
1640 ret = -ENOTSUPP;
1641
1642 /* If that didn't work fall back on linearising by hand. */
1643 if (ret == -ENOTSUPP) {
1644 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1645 buf = kzalloc(len, GFP_KERNEL);
1646 if (!buf)
1647 return -ENOMEM;
1648
1649 memcpy(buf, map->work_buf, map->format.reg_bytes);
1650 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1651 val, val_len);
1652 ret = map->bus->write(map->bus_context, buf, len);
1653
1654 kfree(buf);
1655 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1656 /* regcache_drop_region() takes lock that we already have,
1657 * thus call map->cache_ops->drop() directly
1658 */
1659 if (map->cache_ops && map->cache_ops->drop)
1660 map->cache_ops->drop(map, reg, reg + 1);
1661 }
1662
1663 return ret;
1664}
1665
1666/**
1667 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1668 *
1669 * @map: Map to check.
1670 */
1671bool regmap_can_raw_write(struct regmap *map)
1672{
1673 return map->bus && map->bus->write && map->format.format_val &&
1674 map->format.format_reg;
1675}
1676EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1677
1678/**
1679 * regmap_get_raw_read_max - Get the maximum size we can read
1680 *
1681 * @map: Map to check.
1682 */
1683size_t regmap_get_raw_read_max(struct regmap *map)
1684{
1685 return map->max_raw_read;
1686}
1687EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1688
1689/**
1690 * regmap_get_raw_write_max - Get the maximum size we can read
1691 *
1692 * @map: Map to check.
1693 */
1694size_t regmap_get_raw_write_max(struct regmap *map)
1695{
1696 return map->max_raw_write;
1697}
1698EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1699
1700/*static inline*/ int _regmap_bus_formatted_write(void *context, unsigned int reg,
1701 unsigned int val)
1702{
1703 int ret;
1704 struct regmap_range_node *range;
1705 struct regmap *map = context;
1706
1707 WARN_ON(!map->bus || !map->format.format_write);
1708
1709 range = _regmap_range_lookup(map, reg);
1710 if (range) {
1711 ret = _regmap_select_page(map, &reg, range, 1);
1712 if (ret != 0)
1713 return ret;
1714 }
1715
1716 map->format.format_write(map, reg, val);
1717
1718 ret = map->bus->write(map->bus_context, map->work_buf,
1719 map->format.buf_size);
1720
1721 return ret;
1722}
1723
1724/*static inline*/ int _regmap_bus_reg_write(void *context, unsigned int reg,
1725 unsigned int val)
1726{
1727 struct regmap *map = context;
1728
1729 return map->bus->reg_write(map->bus_context, reg, val);
1730}
1731
1732/*static inline*/ int _regmap_bus_raw_write(void *context, unsigned int reg,
1733 unsigned int val)
1734{
1735 struct regmap *map = context;
1736
1737 WARN_ON(!map->bus || !map->format.format_val);
1738
1739 map->format.format_val(map->work_buf + map->format.reg_bytes
1740 + map->format.pad_bytes, val, 0);
1741 return _regmap_raw_write_impl(map, reg,
1742 map->work_buf +
1743 map->format.reg_bytes +
1744 map->format.pad_bytes,
1745 map->format.val_bytes);
1746}
1747
1748/*static inline*/ inline void *_regmap_map_get_context(struct regmap *map)
1749{
1750 return (map->bus) ? map : map->bus_context;
1751}
1752
1753int _regmap_write(struct regmap *map, unsigned int reg,
1754 unsigned int val)
1755{
1756 int ret;
1757 void *context = _regmap_map_get_context(map);
1758
1759 if (!regmap_writeable(map, reg))
1760 return -EIO;
1761
1762 if (!map->cache_bypass && !map->defer_caching) {
1763 ret = regcache_write(map, reg, val);
1764 if (ret != 0)
1765 return ret;
1766 if (map->cache_only) {
1767 map->cache_dirty = true;
1768 return 0;
1769 }
1770 }
1771
1772#ifdef LOG_DEVICE
1773 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1774 dev_info(map->dev, "%x <= %x\n", reg, val);
1775#endif
1776
1777 return map->reg_write(context, reg, val);
1778}
1779
1780#define IS_ALIGNED(x, a) (((x) & ((unsigned int)(a) - 1)) == 0)
1781
1782/**
1783 * regmap_write() - Write a value to a single register
1784 *
1785 * @map: Register map to write to
1786 * @reg: Register to write to
1787 * @val: Value to be written
1788 *
1789 * A value of zero will be returned on success, a negative errno will
1790 * be returned in error cases.
1791 */
1792int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1793{
1794 int ret;
1795
1796 if (!IS_ALIGNED(reg, map->reg_stride))
1797 return -EINVAL;
1798
1799 map->lock(map->lock_arg);
1800
1801 ret = _regmap_write(map, reg, val);
1802
1803 map->unlock(map->lock_arg);
1804
1805 return ret;
1806}
1807EXPORT_SYMBOL_GPL(regmap_write);
1808
1809/**
1810 * regmap_write_async() - Write a value to a single register asynchronously
1811 *
1812 * @map: Register map to write to
1813 * @reg: Register to write to
1814 * @val: Value to be written
1815 *
1816 * A value of zero will be returned on success, a negative errno will
1817 * be returned in error cases.
1818 */
1819int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1820{
1821 int ret;
1822
1823 if (!IS_ALIGNED(reg, map->reg_stride))
1824 return -EINVAL;
1825
1826 map->lock(map->lock_arg);
1827
1828 map->async = true;
1829
1830 ret = _regmap_write(map, reg, val);
1831
1832 map->async = false;
1833
1834 map->unlock(map->lock_arg);
1835
1836 return ret;
1837}
1838EXPORT_SYMBOL_GPL(regmap_write_async);
1839
1840int _regmap_raw_write(struct regmap *map, unsigned int reg,
1841 const void *val, size_t val_len)
1842{
1843 size_t val_bytes = map->format.val_bytes;
1844 size_t val_count = val_len / val_bytes;
1845 size_t chunk_count, chunk_bytes;
1846 size_t chunk_regs = val_count;
1847 int ret, i;
1848
1849 if (!val_count)
1850 return -EINVAL;
1851
1852 if (map->use_single_write)
1853 chunk_regs = 1;
1854 else if (map->max_raw_write && val_len > map->max_raw_write)
1855 chunk_regs = map->max_raw_write / val_bytes;
1856
1857 chunk_count = val_count / chunk_regs;
1858 chunk_bytes = chunk_regs * val_bytes;
1859
1860 /* Write as many bytes as possible with chunk_size */
1861 for (i = 0; i < chunk_count; i++) {
1862 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes);
1863 if (ret)
1864 return ret;
1865
1866 reg += regmap_get_offset(map, chunk_regs);
1867 val += chunk_bytes;
1868 val_len -= chunk_bytes;
1869 }
1870
1871 /* Write remaining bytes */
1872 if (val_len)
1873 ret = _regmap_raw_write_impl(map, reg, val, val_len);
1874
1875 return ret;
1876}
1877
1878/**
1879 * regmap_raw_write() - Write raw values to one or more registers
1880 *
1881 * @map: Register map to write to
1882 * @reg: Initial register to write to
1883 * @val: Block of data to be written, laid out for direct transmission to the
1884 * device
1885 * @val_len: Length of data pointed to by val.
1886 *
1887 * This function is intended to be used for things like firmware
1888 * download where a large block of data needs to be transferred to the
1889 * device. No formatting will be done on the data provided.
1890 *
1891 * A value of zero will be returned on success, a negative errno will
1892 * be returned in error cases.
1893 */
1894int regmap_raw_write(struct regmap *map, unsigned int reg,
1895 const void *val, size_t val_len)
1896{
1897 int ret;
1898
1899 if (!regmap_can_raw_write(map))
1900 return -EINVAL;
1901 if (val_len % map->format.val_bytes)
1902 return -EINVAL;
1903
1904 map->lock(map->lock_arg);
1905
1906 ret = _regmap_raw_write(map, reg, val, val_len);
1907
1908 map->unlock(map->lock_arg);
1909
1910 return ret;
1911}
1912EXPORT_SYMBOL_GPL(regmap_raw_write);
1913
1914/**
1915 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
1916 * register field.
1917 *
1918 * @field: Register field to write to
1919 * @mask: Bitmask to change
1920 * @val: Value to be written
1921 * @change: Boolean indicating if a write was done
1922 * @async: Boolean indicating asynchronously
1923 * @force: Boolean indicating use force update
1924 *
1925 * Perform a read/modify/write cycle on the register field with change,
1926 * async, force option.
1927 *
1928 * A value of zero will be returned on success, a negative errno will
1929 * be returned in error cases.
1930 */
1931int regmap_field_update_bits_base(struct regmap_field *field,
1932 unsigned int mask, unsigned int val,
1933 bool *change, bool async, bool force)
1934{
1935 mask = (mask << field->shift) & field->mask;
1936
1937 return regmap_update_bits_base(field->regmap, field->reg,
1938 mask, val << field->shift,
1939 change, async, force);
1940}
1941EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1942
1943/**
1944 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
1945 * register field with port ID
1946 *
1947 * @field: Register field to write to
1948 * @id: port ID
1949 * @mask: Bitmask to change
1950 * @val: Value to be written
1951 * @change: Boolean indicating if a write was done
1952 * @async: Boolean indicating asynchronously
1953 * @force: Boolean indicating use force update
1954 *
1955 * A value of zero will be returned on success, a negative errno will
1956 * be returned in error cases.
1957 */
1958int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1959 unsigned int mask, unsigned int val,
1960 bool *change, bool async, bool force)
1961{
1962 if (id >= field->id_size)
1963 return -EINVAL;
1964
1965 mask = (mask << field->shift) & field->mask;
1966
1967 return regmap_update_bits_base(field->regmap,
1968 field->reg + (field->id_offset * id),
1969 mask, val << field->shift,
1970 change, async, force);
1971}
1972EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1973
1974/**
1975 * regmap_bulk_write() - Write multiple registers to the device
1976 *
1977 * @map: Register map to write to
1978 * @reg: First register to be write from
1979 * @val: Block of data to be written, in native register size for device
1980 * @val_count: Number of registers to write
1981 *
1982 * This function is intended to be used for writing a large block of
1983 * data to the device either in single transfer or multiple transfer.
1984 *
1985 * A value of zero will be returned on success, a negative errno will
1986 * be returned in error cases.
1987 */
1988int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1989 size_t val_count)
1990{
1991 int ret = 0, i;
1992 size_t val_bytes = map->format.val_bytes;
1993
1994 if (!IS_ALIGNED(reg, map->reg_stride))
1995 return -EINVAL;
1996
1997 /*
1998 * Some devices don't support bulk write, for them we have a series of
1999 * single write operations.
2000 */
2001 if (!map->bus || !map->format.parse_inplace) {
2002 map->lock(map->lock_arg);
2003 for (i = 0; i < val_count; i++) {
2004 unsigned int ival;
2005
2006 switch (val_bytes) {
2007 case 1:
2008 ival = *(u8 *)(val + (i * val_bytes));
2009 break;
2010 case 2:
2011 ival = *(u16 *)(val + (i * val_bytes));
2012 break;
2013 case 4:
2014 ival = *(u32 *)(val + (i * val_bytes));
2015 break;
2016#ifdef CONFIG_64BIT
2017 case 8:
2018 ival = *(u64 *)(val + (i * val_bytes));
2019 break;
2020#endif
2021 default:
2022 ret = -EINVAL;
2023 goto out;
2024 }
2025
2026 ret = _regmap_write(map,
2027 reg + regmap_get_offset(map, i),
2028 ival);
2029 if (ret != 0)
2030 goto out;
2031 }
2032out:
2033 map->unlock(map->lock_arg);
2034 } else {
2035 void *wval;
2036
2037 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2038 if (!wval)
2039 return -ENOMEM;
2040
2041 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2042 map->format.parse_inplace(wval + i);
2043
2044 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2045
2046 kfree(wval);
2047 }
2048 return ret;
2049}
2050EXPORT_SYMBOL_GPL(regmap_bulk_write);
2051
2052/*
2053 * _regmap_raw_multi_reg_write()
2054 *
2055 * the (register,newvalue) pairs in regs have not been formatted, but
2056 * they are all in the same page and have been changed to being page
2057 * relative. The page register has been written if that was necessary.
2058 */
2059/*static inline*/ int _regmap_raw_multi_reg_write(struct regmap *map,
2060 const struct reg_sequence *regs,
2061 size_t num_regs)
2062{
2063 int ret;
2064 void *buf;
2065 int i;
2066 u8 *u8;
2067 size_t val_bytes = map->format.val_bytes;
2068 size_t reg_bytes = map->format.reg_bytes;
2069 size_t pad_bytes = map->format.pad_bytes;
2070 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2071 size_t len = pair_size * num_regs;
2072
2073 if (!len)
2074 return -EINVAL;
2075
2076 buf = kzalloc(len, GFP_KERNEL);
2077 if (!buf)
2078 return -ENOMEM;
2079
2080 /* We have to linearise by hand. */
2081
2082 u8 = buf;
2083
2084 for (i = 0; i < num_regs; i++) {
2085 unsigned int reg = regs[i].reg;
2086 unsigned int val = regs[i].def;
2087 map->format.format_reg(u8, reg, map->reg_shift);
2088 u8 += reg_bytes + pad_bytes;
2089 map->format.format_val(u8, val, 0);
2090 u8 += val_bytes;
2091 }
2092 u8 = buf;
2093 *u8 |= map->write_flag_mask;
2094
2095 ret = map->bus->write(map->bus_context, buf, len);
2096
2097 kfree(buf);
2098
2099 for (i = 0; i < num_regs; i++) {
2100 int reg = regs[i].reg;
2101 }
2102 return ret;
2103}
2104
2105/*static inline*/ unsigned int _regmap_register_page(struct regmap *map,
2106 unsigned int reg,
2107 struct regmap_range_node *range)
2108{
2109 unsigned int win_page = (reg - range->range_min) / range->window_len;
2110
2111 return win_page;
2112}
2113
2114/*static inline*/ int _regmap_range_multi_paged_reg_write(struct regmap *map,
2115 struct reg_sequence *regs,
2116 size_t num_regs)
2117{
2118 int ret;
2119 int i, n;
2120 struct reg_sequence *base;
2121 unsigned int this_page = 0;
2122 unsigned int page_change = 0;
2123 /*
2124 * the set of registers are not neccessarily in order, but
2125 * since the order of write must be preserved this algorithm
2126 * chops the set each time the page changes. This also applies
2127 * if there is a delay required at any point in the sequence.
2128 */
2129 base = regs;
2130 for (i = 0, n = 0; i < num_regs; i++, n++) {
2131 unsigned int reg = regs[i].reg;
2132 struct regmap_range_node *range;
2133
2134 range = _regmap_range_lookup(map, reg);
2135 if (range) {
2136 unsigned int win_page = _regmap_register_page(map, reg,
2137 range);
2138
2139 if (i == 0)
2140 this_page = win_page;
2141 if (win_page != this_page) {
2142 this_page = win_page;
2143 page_change = 1;
2144 }
2145 }
2146
2147 /* If we have both a page change and a delay make sure to
2148 * write the regs and apply the delay before we change the
2149 * page.
2150 */
2151
2152 if (page_change || regs[i].delay_us) {
2153
2154 /* For situations where the first write requires
2155 * a delay we need to make sure we don't call
2156 * raw_multi_reg_write with n=0
2157 * This can't occur with page breaks as we
2158 * never write on the first iteration
2159 */
2160 if (regs[i].delay_us && i == 0)
2161 n = 1;
2162
2163 ret = _regmap_raw_multi_reg_write(map, base, n);
2164 if (ret != 0)
2165 return ret;
2166
2167 if (regs[i].delay_us)
2168 udelay(regs[i].delay_us);
2169
2170 base += n;
2171 n = 0;
2172
2173 if (page_change) {
2174 ret = _regmap_select_page(map,
2175 &base[n].reg,
2176 range, 1);
2177 if (ret != 0)
2178 return ret;
2179
2180 page_change = 0;
2181 }
2182
2183 }
2184
2185 }
2186 if (n > 0)
2187 return _regmap_raw_multi_reg_write(map, base, n);
2188 return 0;
2189}
2190
2191/*static inline*/ int _regmap_multi_reg_write(struct regmap *map,
2192 const struct reg_sequence *regs,
2193 size_t num_regs)
2194{
2195 int i;
2196 int ret;
2197
2198 if (!map->can_multi_write) {
2199 for (i = 0; i < num_regs; i++) {
2200 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2201 if (ret != 0)
2202 return ret;
2203
2204 if (regs[i].delay_us)
2205 udelay(regs[i].delay_us);
2206 }
2207 return 0;
2208 }
2209
2210 if (!map->format.parse_inplace)
2211 return -EINVAL;
2212
2213 if (map->writeable_reg)
2214 for (i = 0; i < num_regs; i++) {
2215 int reg = regs[i].reg;
2216 if (!map->writeable_reg(map->dev, reg))
2217 return -EINVAL;
2218 if (!IS_ALIGNED(reg, map->reg_stride))
2219 return -EINVAL;
2220 }
2221
2222 if (!map->cache_bypass) {
2223 for (i = 0; i < num_regs; i++) {
2224 unsigned int val = regs[i].def;
2225 unsigned int reg = regs[i].reg;
2226 ret = regcache_write(map, reg, val);
2227 if (ret) {
2228 dev_err(map->dev,
2229 "Error in caching of register: %x ret: %d\n",
2230 reg, ret);
2231 return ret;
2232 }
2233 }
2234 if (map->cache_only) {
2235 map->cache_dirty = true;
2236 return 0;
2237 }
2238 }
2239
2240 WARN_ON(!map->bus);
2241
2242 for (i = 0; i < num_regs; i++) {
2243 unsigned int reg = regs[i].reg;
2244 struct regmap_range_node *range;
2245
2246 /* Coalesce all the writes between a page break or a delay
2247 * in a sequence
2248 */
2249 range = _regmap_range_lookup(map, reg);
2250 if (range || regs[i].delay_us) {
2251 size_t len = sizeof(struct reg_sequence)*num_regs;
2252 struct reg_sequence *base = kmemdup(regs, len,
2253 GFP_KERNEL);
2254 if (!base)
2255 return -ENOMEM;
2256 ret = _regmap_range_multi_paged_reg_write(map, base,
2257 num_regs);
2258 kfree(base);
2259
2260 return ret;
2261 }
2262 }
2263 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2264}
2265
2266/**
2267 * regmap_multi_reg_write() - Write multiple registers to the device
2268 *
2269 * @map: Register map to write to
2270 * @regs: Array of structures containing register,value to be written
2271 * @num_regs: Number of registers to write
2272 *
2273 * Write multiple registers to the device where the set of register, value
2274 * pairs are supplied in any order, possibly not all in a single range.
2275 *
2276 * The 'normal' block write mode will send ultimately send data on the
2277 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2278 * addressed. However, this alternative block multi write mode will send
2279 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2280 * must of course support the mode.
2281 *
2282 * A value of zero will be returned on success, a negative errno will be
2283 * returned in error cases.
2284 */
2285int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2286 int num_regs)
2287{
2288 int ret;
2289
2290 map->lock(map->lock_arg);
2291
2292 ret = _regmap_multi_reg_write(map, regs, num_regs);
2293
2294 map->unlock(map->lock_arg);
2295
2296 return ret;
2297}
2298EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2299
2300/**
2301 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2302 * device but not the cache
2303 *
2304 * @map: Register map to write to
2305 * @regs: Array of structures containing register,value to be written
2306 * @num_regs: Number of registers to write
2307 *
2308 * Write multiple registers to the device but not the cache where the set
2309 * of register are supplied in any order.
2310 *
2311 * This function is intended to be used for writing a large block of data
2312 * atomically to the device in single transfer for those I2C client devices
2313 * that implement this alternative block write mode.
2314 *
2315 * A value of zero will be returned on success, a negative errno will
2316 * be returned in error cases.
2317 */
2318int regmap_multi_reg_write_bypassed(struct regmap *map,
2319 const struct reg_sequence *regs,
2320 int num_regs)
2321{
2322 int ret;
2323 bool bypass;
2324
2325 map->lock(map->lock_arg);
2326
2327 bypass = map->cache_bypass;
2328 map->cache_bypass = true;
2329
2330 ret = _regmap_multi_reg_write(map, regs, num_regs);
2331
2332 map->cache_bypass = bypass;
2333
2334 map->unlock(map->lock_arg);
2335
2336 return ret;
2337}
2338EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2339
2340/**
2341 * regmap_raw_write_async() - Write raw values to one or more registers
2342 * asynchronously
2343 *
2344 * @map: Register map to write to
2345 * @reg: Initial register to write to
2346 * @val: Block of data to be written, laid out for direct transmission to the
2347 * device. Must be valid until regmap_async_complete() is called.
2348 * @val_len: Length of data pointed to by val.
2349 *
2350 * This function is intended to be used for things like firmware
2351 * download where a large block of data needs to be transferred to the
2352 * device. No formatting will be done on the data provided.
2353 *
2354 * If supported by the underlying bus the write will be scheduled
2355 * asynchronously, helping maximise I/O speed on higher speed buses
2356 * like SPI. regmap_async_complete() can be called to ensure that all
2357 * asynchrnous writes have been completed.
2358 *
2359 * A value of zero will be returned on success, a negative errno will
2360 * be returned in error cases.
2361 */
2362int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2363 const void *val, size_t val_len)
2364{
2365 int ret;
2366
2367 if (val_len % map->format.val_bytes)
2368 return -EINVAL;
2369 if (!IS_ALIGNED(reg, map->reg_stride))
2370 return -EINVAL;
2371
2372 map->lock(map->lock_arg);
2373
2374 map->async = true;
2375
2376 ret = _regmap_raw_write(map, reg, val, val_len);
2377
2378 map->async = false;
2379
2380 map->unlock(map->lock_arg);
2381
2382 return ret;
2383}
2384EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2385
2386/*static inline*/ int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2387 unsigned int val_len, bool noinc)
2388{
2389 struct regmap_range_node *range;
2390 int ret;
2391
2392 WARN_ON(!map->bus);
2393
2394 if (!map->bus || !map->bus->read)
2395 return -EINVAL;
2396
2397 range = _regmap_range_lookup(map, reg);
2398 if (range) {
2399 ret = _regmap_select_page(map, &reg, range,
2400 noinc ? 1 : val_len / map->format.val_bytes);
2401 if (ret != 0)
2402 return ret;
2403 }
2404
2405 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2406 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2407 map->read_flag_mask);
2408
2409 ret = map->bus->read(map->bus_context, map->work_buf,
2410 map->format.reg_bytes + map->format.pad_bytes,
2411 val, val_len);
2412
2413 return ret;
2414}
2415
2416/*static inline*/ int _regmap_bus_reg_read(void *context, unsigned int reg,
2417 unsigned int *val)
2418{
2419 struct regmap *map = context;
2420
2421 return map->bus->reg_read(map->bus_context, reg, val);
2422}
2423
2424/*static inline*/ int _regmap_bus_read(void *context, unsigned int reg,
2425 unsigned int *val)
2426{
2427 int ret;
2428 struct regmap *map = context;
2429 void *work_val = map->work_buf + map->format.reg_bytes +
2430 map->format.pad_bytes;
2431
2432 if (!map->format.parse_val)
2433 return -EINVAL;
2434
2435 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2436 if (ret == 0)
2437 *val = map->format.parse_val(work_val);
2438
2439 return ret;
2440}
2441
2442/*static inline*/ int _regmap_read(struct regmap *map, unsigned int reg,
2443 unsigned int *val)
2444{
2445 int ret;
2446 void *context = _regmap_map_get_context(map);
2447
2448 if (!map->cache_bypass) {
2449 ret = regcache_read(map, reg, val);
2450 if (ret == 0)
2451 return 0;
2452 }
2453
2454 if (map->cache_only)
2455 return -EBUSY;
2456
2457 if (!regmap_readable(map, reg))
2458 return -EIO;
2459
2460 ret = map->reg_read(context, reg, val);
2461 if (ret == 0) {
2462#ifdef LOG_DEVICE
2463 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2464 dev_info(map->dev, "%x => %x\n", reg, *val);
2465#endif
2466
2467 if (!map->cache_bypass)
2468 regcache_write(map, reg, *val);
2469 }
2470
2471 return ret;
2472}
2473
2474/**
2475 * regmap_read() - Read a value from a single register
2476 *
2477 * @map: Register map to read from
2478 * @reg: Register to be read from
2479 * @val: Pointer to store read value
2480 *
2481 * A value of zero will be returned on success, a negative errno will
2482 * be returned in error cases.
2483 */
2484int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2485{
2486 int ret;
2487
2488 if (!IS_ALIGNED(reg, map->reg_stride))
2489 return -EINVAL;
2490
2491 map->lock(map->lock_arg);
2492
2493 ret = _regmap_read(map, reg, val);
2494
2495 map->unlock(map->lock_arg);
2496
2497 return ret;
2498}
2499EXPORT_SYMBOL_GPL(regmap_read);
2500
2501/**
2502 * regmap_raw_read() - Read raw data from the device
2503 *
2504 * @map: Register map to read from
2505 * @reg: First register to be read from
2506 * @val: Pointer to store read value
2507 * @val_len: Size of data to read
2508 *
2509 * A value of zero will be returned on success, a negative errno will
2510 * be returned in error cases.
2511 */
2512int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2513 size_t val_len)
2514{
2515 size_t val_bytes = map->format.val_bytes;
2516 size_t val_count = val_len / val_bytes;
2517 unsigned int v;
2518 int ret, i;
2519
2520 if (!map->bus)
2521 return -EINVAL;
2522 if (val_len % map->format.val_bytes)
2523 return -EINVAL;
2524 if (!IS_ALIGNED(reg, map->reg_stride))
2525 return -EINVAL;
2526 if (val_count == 0)
2527 return -EINVAL;
2528
2529 map->lock(map->lock_arg);
2530
2531 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2532 map->cache_type == REGCACHE_NONE) {
2533 size_t chunk_count, chunk_bytes;
2534 size_t chunk_regs = val_count;
2535
2536 if (!map->bus->read) {
2537 ret = -ENOTSUPP;
2538 goto out;
2539 }
2540
2541 if (map->use_single_read)
2542 chunk_regs = 1;
2543 else if (map->max_raw_read && val_len > map->max_raw_read)
2544 chunk_regs = map->max_raw_read / val_bytes;
2545
2546 chunk_count = val_count / chunk_regs;
2547 chunk_bytes = chunk_regs * val_bytes;
2548
2549 /* Read bytes that fit into whole chunks */
2550 for (i = 0; i < chunk_count; i++) {
2551 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2552 if (ret != 0)
2553 goto out;
2554
2555 reg += regmap_get_offset(map, chunk_regs);
2556 val += chunk_bytes;
2557 val_len -= chunk_bytes;
2558 }
2559
2560 /* Read remaining bytes */
2561 if (val_len) {
2562 ret = _regmap_raw_read(map, reg, val, val_len, false);
2563 if (ret != 0)
2564 goto out;
2565 }
2566 } else {
2567 /* Otherwise go word by word for the cache; should be low
2568 * cost as we expect to hit the cache.
2569 */
2570 for (i = 0; i < val_count; i++) {
2571 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2572 &v);
2573 if (ret != 0)
2574 goto out;
2575
2576 map->format.format_val(val + (i * val_bytes), v, 0);
2577 }
2578 }
2579
2580 out:
2581 map->unlock(map->lock_arg);
2582
2583 return ret;
2584}
2585EXPORT_SYMBOL_GPL(regmap_raw_read);
2586
2587/**
2588 * regmap_noinc_read(): Read data from a register without incrementing the
2589 * register number
2590 *
2591 * @map: Register map to read from
2592 * @reg: Register to read from
2593 * @val: Pointer to data buffer
2594 * @val_len: Length of output buffer in bytes.
2595 *
2596 * The regmap API usually assumes that bulk bus read operations will read a
2597 * range of registers. Some devices have certain registers for which a read
2598 * operation read will read from an internal FIFO.
2599 *
2600 * The target register must be volatile but registers after it can be
2601 * completely unrelated cacheable registers.
2602 *
2603 * This will attempt multiple reads as required to read val_len bytes.
2604 *
2605 * A value of zero will be returned on success, a negative errno will be
2606 * returned in error cases.
2607 */
2608int regmap_noinc_read(struct regmap *map, unsigned int reg,
2609 void *val, size_t val_len)
2610{
2611 size_t read_len;
2612 int ret;
2613
2614 if (!map->bus)
2615 return -EINVAL;
2616 if (!map->bus->read)
2617 return -ENOTSUPP;
2618 if (val_len % map->format.val_bytes)
2619 return -EINVAL;
2620 if (!IS_ALIGNED(reg, map->reg_stride))
2621 return -EINVAL;
2622 if (val_len == 0)
2623 return -EINVAL;
2624
2625 map->lock(map->lock_arg);
2626
2627 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2628 ret = -EINVAL;
2629 goto out_unlock;
2630 }
2631
2632 while (val_len) {
2633 if (map->max_raw_read && map->max_raw_read < val_len)
2634 read_len = map->max_raw_read;
2635 else
2636 read_len = val_len;
2637 ret = _regmap_raw_read(map, reg, val, read_len, true);
2638 if (ret)
2639 goto out_unlock;
2640 val = ((u8 *)val) + read_len;
2641 val_len -= read_len;
2642 }
2643
2644out_unlock:
2645 map->unlock(map->lock_arg);
2646 return ret;
2647}
2648EXPORT_SYMBOL_GPL(regmap_noinc_read);
2649
2650/**
2651 * regmap_field_read(): Read a value to a single register field
2652 *
2653 * @field: Register field to read from
2654 * @val: Pointer to store read value
2655 *
2656 * A value of zero will be returned on success, a negative errno will
2657 * be returned in error cases.
2658 */
2659int regmap_field_read(struct regmap_field *field, unsigned int *val)
2660{
2661 int ret;
2662 unsigned int reg_val;
2663 ret = regmap_read(field->regmap, field->reg, &reg_val);
2664 if (ret != 0)
2665 return ret;
2666
2667 reg_val &= field->mask;
2668 reg_val >>= field->shift;
2669 *val = reg_val;
2670
2671 return ret;
2672}
2673EXPORT_SYMBOL_GPL(regmap_field_read);
2674
2675/**
2676 * regmap_fields_read() - Read a value to a single register field with port ID
2677 *
2678 * @field: Register field to read from
2679 * @id: port ID
2680 * @val: Pointer to store read value
2681 *
2682 * A value of zero will be returned on success, a negative errno will
2683 * be returned in error cases.
2684 */
2685int regmap_fields_read(struct regmap_field *field, unsigned int id,
2686 unsigned int *val)
2687{
2688 int ret;
2689 unsigned int reg_val;
2690
2691 if (id >= field->id_size)
2692 return -EINVAL;
2693
2694 ret = regmap_read(field->regmap,
2695 field->reg + (field->id_offset * id),
2696 &reg_val);
2697 if (ret != 0)
2698 return ret;
2699
2700 reg_val &= field->mask;
2701 reg_val >>= field->shift;
2702 *val = reg_val;
2703
2704 return ret;
2705}
2706EXPORT_SYMBOL_GPL(regmap_fields_read);
2707
2708/**
2709 * regmap_bulk_read() - Read multiple registers from the device
2710 *
2711 * @map: Register map to read from
2712 * @reg: First register to be read from
2713 * @val: Pointer to store read value, in native register size for device
2714 * @val_count: Number of registers to read
2715 *
2716 * A value of zero will be returned on success, a negative errno will
2717 * be returned in error cases.
2718 */
2719int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2720 size_t val_count)
2721{
2722 int ret, i;
2723 size_t val_bytes = map->format.val_bytes;
2724 bool vol = regmap_volatile_range(map, reg, val_count);
2725
2726 if (!IS_ALIGNED(reg, map->reg_stride))
2727 return -EINVAL;
2728 if (val_count == 0)
2729 return -EINVAL;
2730
2731 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2732 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
2733 if (ret != 0)
2734 return ret;
2735
2736 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2737 map->format.parse_inplace(val + i);
2738 } else {
2739#ifdef CONFIG_64BIT
2740 u64 *u64 = val;
2741#endif
2742 u32 *u32 = val;
2743 u16 *u16 = val;
2744 u8 *u8 = val;
2745
2746 map->lock(map->lock_arg);
2747
2748 for (i = 0; i < val_count; i++) {
2749 unsigned int ival;
2750
2751 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2752 &ival);
2753 if (ret != 0)
2754 goto out;
2755
2756 switch (map->format.val_bytes) {
2757#ifdef CONFIG_64BIT
2758 case 8:
2759 u64[i] = ival;
2760 break;
2761#endif
2762 case 4:
2763 u32[i] = ival;
2764 break;
2765 case 2:
2766 u16[i] = ival;
2767 break;
2768 case 1:
2769 u8[i] = ival;
2770 break;
2771 default:
2772 ret = -EINVAL;
2773 goto out;
2774 }
2775 }
2776
2777out:
2778 map->unlock(map->lock_arg);
2779 }
2780
2781 return ret;
2782}
2783EXPORT_SYMBOL_GPL(regmap_bulk_read);
2784
2785/*static inline*/ int _regmap_update_bits(struct regmap *map, unsigned int reg,
2786 unsigned int mask, unsigned int val,
2787 bool *change, bool force_write)
2788{
2789 int ret;
2790 unsigned int tmp, orig;
2791
2792 if (change)
2793 *change = false;
2794
2795 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2796 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2797 if (ret == 0 && change)
2798 *change = true;
2799 } else {
2800 ret = _regmap_read(map, reg, &orig);
2801 if (ret != 0)
2802 return ret;
2803
2804 tmp = orig & ~mask;
2805 tmp |= val & mask;
2806
2807 if (force_write || (tmp != orig)) {
2808 ret = _regmap_write(map, reg, tmp);
2809 if (ret == 0 && change)
2810 *change = true;
2811 }
2812 }
2813
2814 return ret;
2815}
2816
2817/**
2818 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
2819 *
2820 * @map: Register map to update
2821 * @reg: Register to update
2822 * @mask: Bitmask to change
2823 * @val: New value for bitmask
2824 * @change: Boolean indicating if a write was done
2825 * @async: Boolean indicating asynchronously
2826 * @force: Boolean indicating use force update
2827 *
2828 * Perform a read/modify/write cycle on a register map with change, async, force
2829 * options.
2830 *
2831 * If async is true:
2832 *
2833 * With most buses the read must be done synchronously so this is most useful
2834 * for devices with a cache which do not need to interact with the hardware to
2835 * determine the current register value.
2836 *
2837 * Returns zero for success, a negative number on error.
2838 */
2839int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2840 unsigned int mask, unsigned int val,
2841 bool *change, bool async, bool force)
2842{
2843 int ret;
2844
2845 map->lock(map->lock_arg);
2846
2847 map->async = async;
2848
2849 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2850
2851 map->async = false;
2852
2853 map->unlock(map->lock_arg);
2854
2855 return ret;
2856}
2857EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2858
2859void regmap_async_complete_cb(struct regmap_async *async, int ret)
2860{
2861 struct regmap *map = async->map;
2862 bool wake;
2863
2864 spin_lock(&map->async_lock);
2865 list_move(&async->list, &map->async_free);
2866 wake = list_empty(&map->async_list);
2867
2868 if (ret != 0)
2869 map->async_ret = ret;
2870
2871 spin_unlock(&map->async_lock);
2872
2873 if (wake)
2874 wake_up(&map->async_waitq);
2875}
2876EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2877
2878/*static inline*/ int regmap_async_is_done(struct regmap *map)
2879{
2880 unsigned long flags;
2881 int ret;
2882
2883 spin_lock_irqsave(&map->async_lock, flags);
2884 ret = list_empty(&map->async_list);
2885 spin_unlock_irqrestore(&map->async_lock, flags);
2886
2887 return ret;
2888}
2889
2890/**
2891 * regmap_async_complete - Ensure all asynchronous I/O has completed.
2892 *
2893 * @map: Map to operate on.
2894 *
2895 * Blocks until any pending asynchronous I/O has completed. Returns
2896 * an error code for any failed I/O operations.
2897 */
2898int regmap_async_complete(struct regmap *map)
2899{
2900 unsigned long flags;
2901 int ret;
2902
2903 /* Nothing to do with no async support */
2904 if (!map->bus || !map->bus->async_write)
2905 return 0;
2906
2907// wait_event(map->async_waitq, regmap_async_is_done(map));
2908
2909 spin_lock_irqsave(&map->async_lock, flags);
2910 ret = map->async_ret;
2911 map->async_ret = 0;
2912 spin_unlock_irqrestore(&map->async_lock, flags);
2913
2914 return ret;
2915}
2916EXPORT_SYMBOL_GPL(regmap_async_complete);
2917
2918/**
2919 * regmap_register_patch - Register and apply register updates to be applied
2920 * on device initialistion
2921 *
2922 * @map: Register map to apply updates to.
2923 * @regs: Values to update.
2924 * @num_regs: Number of entries in regs.
2925 *
2926 * Register a set of register updates to be applied to the device
2927 * whenever the device registers are synchronised with the cache and
2928 * apply them immediately. Typically this is used to apply
2929 * corrections to be applied to the device defaults on startup, such
2930 * as the updates some vendors provide to undocumented registers.
2931 *
2932 * The caller must ensure that this function cannot be called
2933 * concurrently with either itself or regcache_sync().
2934 */
2935int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2936 int num_regs)
2937{
2938 struct reg_sequence *p;
2939 int ret;
2940 bool bypass;
2941
2942#if 0
2943 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2944 num_regs))
2945 return 0;
2946#endif
2947 p = krealloc(map->patch,
2948 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2949 GFP_KERNEL);
2950 if (p) {
2951 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2952 map->patch = p;
2953 map->patch_regs += num_regs;
2954 } else {
2955 return -ENOMEM;
2956 }
2957
2958 map->lock(map->lock_arg);
2959
2960 bypass = map->cache_bypass;
2961
2962 map->cache_bypass = true;
2963 map->async = true;
2964
2965 ret = _regmap_multi_reg_write(map, regs, num_regs);
2966
2967 map->async = false;
2968 map->cache_bypass = bypass;
2969
2970 map->unlock(map->lock_arg);
2971
2972 regmap_async_complete(map);
2973
2974 return ret;
2975}
2976EXPORT_SYMBOL_GPL(regmap_register_patch);
2977
2978/**
2979 * regmap_get_val_bytes() - Report the size of a register value
2980 *
2981 * @map: Register map to operate on.
2982 *
2983 * Report the size of a register value, mainly intended to for use by
2984 * generic infrastructure built on top of regmap.
2985 */
2986int regmap_get_val_bytes(struct regmap *map)
2987{
2988 if (map->format.format_write)
2989 return -EINVAL;
2990
2991 return map->format.val_bytes;
2992}
2993EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2994
2995/**
2996 * regmap_get_max_register() - Report the max register value
2997 *
2998 * @map: Register map to operate on.
2999 *
3000 * Report the max register value, mainly intended to for use by
3001 * generic infrastructure built on top of regmap.
3002 */
3003int regmap_get_max_register(struct regmap *map)
3004{
3005 return map->max_register ? map->max_register : -EINVAL;
3006}
3007EXPORT_SYMBOL_GPL(regmap_get_max_register);
3008
3009/**
3010 * regmap_get_reg_stride() - Report the register address stride
3011 *
3012 * @map: Register map to operate on.
3013 *
3014 * Report the register address stride, mainly intended to for use by
3015 * generic infrastructure built on top of regmap.
3016 */
3017int regmap_get_reg_stride(struct regmap *map)
3018{
3019 return map->reg_stride;
3020}
3021EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3022
3023int regmap_parse_val(struct regmap *map, const void *buf,
3024 unsigned int *val)
3025{
3026 if (!map->format.parse_val)
3027 return -EINVAL;
3028
3029 *val = map->format.parse_val(buf);
3030
3031 return 0;
3032}
3033EXPORT_SYMBOL_GPL(regmap_parse_val);
3034
3035/*static inline*/ int __init regmap_initcall(void)
3036{
3037 regmap_debugfs_initcall();
3038
3039 return 0;
3040}
3041postcore_initcall(regmap_initcall);
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