source: GPL/branches/uniaud32-next/lib32/regmap.c@ 615

Last change on this file since 615 was 615, checked in by Paul Smedley, 5 years ago

Add source for uniaud32 based on code from linux kernel 5.4.86

File size: 70.2 KB
Line 
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12/* from 4.14.202 */
13
14#include <linux/device.h>
15#include <linux/slab.h>
16#include <linux/export.h>
17#include <linux/mutex.h>
18#include <linux/err.h>
19#include <linux/of.h>
20#include <linux/rbtree.h>
21#include <linux/sched.h>
22#include <linux/delay.h>
23#include <linux/log2.h>
24#include <linux/module.h>
25#include <linux/workqueue.h>
26#include <linux/byteorder/little_endian.h>
27#include <linux/printk.h>
28
29#define CREATE_TRACE_POINTS
30//#include "trace.h"
31
32#include "internal.h"
33
34/*
35 * Sometimes for failures during very early init the trace
36 * infrastructure isn't available early enough to be used. For this
37 * sort of problem defining LOG_DEVICE will add printks for basic
38 * register I/O on a specific device.
39 */
40#undef LOG_DEVICE
41
42static int _regmap_update_bits(struct regmap *map, unsigned int reg,
43 unsigned int mask, unsigned int val,
44 bool *change, bool force_write);
45
46static int _regmap_bus_reg_read(void *context, unsigned int reg,
47 unsigned int *val);
48static int _regmap_bus_read(void *context, unsigned int reg,
49 unsigned int *val);
50static int _regmap_bus_formatted_write(void *context, unsigned int reg,
51 unsigned int val);
52static int _regmap_bus_reg_write(void *context, unsigned int reg,
53 unsigned int val);
54static int _regmap_bus_raw_write(void *context, unsigned int reg,
55 unsigned int val);
56
57bool regmap_reg_in_ranges(unsigned int reg,
58 const struct regmap_range *ranges,
59 unsigned int nranges)
60{
61 const struct regmap_range *r;
62 int i;
63
64 for (i = 0, r = ranges; i < nranges; i++, r++)
65 if (regmap_reg_in_range(reg, r))
66 return true;
67 return false;
68}
69EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
70
71bool regmap_check_range_table(struct regmap *map, unsigned int reg,
72 const struct regmap_access_table *table)
73{
74 /* Check "no ranges" first */
75 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
76 return false;
77
78 /* In case zero "yes ranges" are supplied, any reg is OK */
79 if (!table->n_yes_ranges)
80 return true;
81
82 return regmap_reg_in_ranges(reg, table->yes_ranges,
83 table->n_yes_ranges);
84}
85EXPORT_SYMBOL_GPL(regmap_check_range_table);
86
87bool regmap_writeable(struct regmap *map, unsigned int reg)
88{
89 if (map->max_register && reg > map->max_register)
90 return false;
91
92 if (map->writeable_reg)
93 return map->writeable_reg(map->dev, reg);
94
95 if (map->wr_table)
96 return regmap_check_range_table(map, reg, map->wr_table);
97
98 return true;
99}
100
101bool regmap_cached(struct regmap *map, unsigned int reg)
102{
103 int ret;
104 unsigned int val;
105
106 if (map->cache_type == REGCACHE_NONE)
107 return false;
108
109 if (!map->cache_ops)
110 return false;
111
112 if (map->max_register && reg > map->max_register)
113 return false;
114
115 map->lock(map->lock_arg);
116 ret = regcache_read(map, reg, &val);
117 map->unlock(map->lock_arg);
118 if (ret)
119 return false;
120
121 return true;
122}
123
124bool regmap_readable(struct regmap *map, unsigned int reg)
125{
126 if (!map->reg_read)
127 return false;
128
129 if (map->max_register && reg > map->max_register)
130 return false;
131
132 if (map->format.format_write)
133 return false;
134
135 if (map->readable_reg)
136 return map->readable_reg(map->dev, reg);
137
138 if (map->rd_table)
139 return regmap_check_range_table(map, reg, map->rd_table);
140
141 return true;
142}
143
144bool regmap_volatile(struct regmap *map, unsigned int reg)
145{
146 if (!map->format.format_write && !regmap_readable(map, reg))
147 return false;
148
149 if (map->volatile_reg)
150 return map->volatile_reg(map->dev, reg);
151
152 if (map->volatile_table)
153 return regmap_check_range_table(map, reg, map->volatile_table);
154
155 if (map->cache_ops)
156 return false;
157 else
158 return true;
159}
160
161bool regmap_precious(struct regmap *map, unsigned int reg)
162{
163 if (!regmap_readable(map, reg))
164 return false;
165
166 if (map->precious_reg)
167 return map->precious_reg(map->dev, reg);
168
169 if (map->precious_table)
170 return regmap_check_range_table(map, reg, map->precious_table);
171
172 return false;
173}
174
175static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
176 size_t num)
177{
178 unsigned int i;
179
180 for (i = 0; i < num; i++)
181 if (!regmap_volatile(map, reg + i))
182 return false;
183
184 return true;
185}
186
187static void regmap_format_2_6_write(struct regmap *map,
188 unsigned int reg, unsigned int val)
189{
190 u8 *out = map->work_buf;
191
192 *out = (reg << 6) | val;
193}
194
195static void regmap_format_4_12_write(struct regmap *map,
196 unsigned int reg, unsigned int val)
197{
198 __be16 *out = map->work_buf;
199 *out = cpu_to_be16((reg << 12) | val);
200}
201
202static void regmap_format_7_9_write(struct regmap *map,
203 unsigned int reg, unsigned int val)
204{
205 __be16 *out = map->work_buf;
206 *out = cpu_to_be16((reg << 9) | val);
207}
208
209static void regmap_format_10_14_write(struct regmap *map,
210 unsigned int reg, unsigned int val)
211{
212 u8 *out = map->work_buf;
213
214 out[2] = val;
215 out[1] = (val >> 8) | (reg << 6);
216 out[0] = reg >> 2;
217}
218
219static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
220{
221 u8 *b = buf;
222
223 b[0] = val << shift;
224}
225
226static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
227{
228 __be16 *b = buf;
229
230 b[0] = cpu_to_be16(val << shift);
231}
232
233static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
234{
235 __le16 *b = buf;
236
237 b[0] = cpu_to_le16(val << shift);
238}
239
240static void regmap_format_16_native(void *buf, unsigned int val,
241 unsigned int shift)
242{
243 *(u16 *)buf = val << shift;
244}
245
246static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
247{
248 u8 *b = buf;
249
250 val <<= shift;
251
252 b[0] = val >> 16;
253 b[1] = val >> 8;
254 b[2] = val;
255}
256
257static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
258{
259 __be32 *b = buf;
260
261 b[0] = cpu_to_be32(val << shift);
262}
263
264static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
265{
266 __le32 *b = buf;
267
268 b[0] = cpu_to_le32(val << shift);
269}
270
271static void regmap_format_32_native(void *buf, unsigned int val,
272 unsigned int shift)
273{
274 *(u32 *)buf = val << shift;
275}
276
277#ifdef CONFIG_64BIT
278static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
279{
280 __be64 *b = buf;
281
282 b[0] = cpu_to_be64((u64)val << shift);
283}
284
285static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
286{
287 __le64 *b = buf;
288
289 b[0] = cpu_to_le64((u64)val << shift);
290}
291
292static void regmap_format_64_native(void *buf, unsigned int val,
293 unsigned int shift)
294{
295 *(u64 *)buf = (u64)val << shift;
296}
297#endif
298
299static void regmap_parse_inplace_noop(void *buf)
300{
301}
302
303static unsigned int regmap_parse_8(const void *buf)
304{
305 const u8 *b = buf;
306
307 return b[0];
308}
309
310static unsigned int regmap_parse_16_be(const void *buf)
311{
312 const __be16 *b = buf;
313
314 return be16_to_cpu(b[0]);
315}
316
317static unsigned int regmap_parse_16_le(const void *buf)
318{
319 const __le16 *b = buf;
320
321 return le16_to_cpu(b[0]);
322}
323
324static void regmap_parse_16_be_inplace(void *buf)
325{
326 __be16 *b = buf;
327
328 b[0] = be16_to_cpu(b[0]);
329}
330
331static void regmap_parse_16_le_inplace(void *buf)
332{
333 __le16 *b = buf;
334
335 b[0] = le16_to_cpu(b[0]);
336}
337
338static unsigned int regmap_parse_16_native(const void *buf)
339{
340 return *(u16 *)buf;
341}
342
343static unsigned int regmap_parse_24(const void *buf)
344{
345 const u8 *b = buf;
346 unsigned int ret = b[2];
347 ret |= ((unsigned int)b[1]) << 8;
348 ret |= ((unsigned int)b[0]) << 16;
349
350 return ret;
351}
352
353static unsigned int regmap_parse_32_be(const void *buf)
354{
355 const __be32 *b = buf;
356
357 return be32_to_cpu(b[0]);
358}
359
360static unsigned int regmap_parse_32_le(const void *buf)
361{
362 const __le32 *b = buf;
363
364 return le32_to_cpu(b[0]);
365}
366
367static void regmap_parse_32_be_inplace(void *buf)
368{
369 __be32 *b = buf;
370
371 b[0] = be32_to_cpu(b[0]);
372}
373
374static void regmap_parse_32_le_inplace(void *buf)
375{
376 __le32 *b = buf;
377
378 b[0] = le32_to_cpu(b[0]);
379}
380
381static unsigned int regmap_parse_32_native(const void *buf)
382{
383 return *(u32 *)buf;
384}
385
386#ifdef CONFIG_64BIT
387static unsigned int regmap_parse_64_be(const void *buf)
388{
389 const __be64 *b = buf;
390
391 return be64_to_cpu(b[0]);
392}
393
394static unsigned int regmap_parse_64_le(const void *buf)
395{
396 const __le64 *b = buf;
397
398 return le64_to_cpu(b[0]);
399}
400
401static void regmap_parse_64_be_inplace(void *buf)
402{
403 __be64 *b = buf;
404
405 b[0] = be64_to_cpu(b[0]);
406}
407
408static void regmap_parse_64_le_inplace(void *buf)
409{
410 __le64 *b = buf;
411
412 b[0] = le64_to_cpu(b[0]);
413}
414
415static unsigned int regmap_parse_64_native(const void *buf)
416{
417 return *(u64 *)buf;
418}
419#endif
420
421static void regmap_lock_mutex(void *__map)
422{
423 struct regmap *map = __map;
424 mutex_lock(&map->mutex);
425}
426
427static void regmap_unlock_mutex(void *__map)
428{
429 struct regmap *map = __map;
430 mutex_unlock(&map->mutex);
431}
432
433static void regmap_lock_spinlock(void *__map)
434__acquires(&map->spinlock)
435{
436 struct regmap *map = __map;
437 unsigned long flags;
438
439 spin_lock_irqsave(&map->spinlock, flags);
440 map->spinlock_flags = flags;
441}
442
443static void regmap_unlock_spinlock(void *__map)
444__releases(&map->spinlock)
445{
446 struct regmap *map = __map;
447 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
448}
449
450static void dev_get_regmap_release(struct device *dev, void *res)
451{
452 /*
453 * We don't actually have anything to do here; the goal here
454 * is not to manage the regmap but to provide a simple way to
455 * get the regmap back given a struct device.
456 */
457}
458
459static bool _regmap_range_add(struct regmap *map,
460 struct regmap_range_node *data)
461{
462 struct rb_root *root = &map->range_tree;
463 struct rb_node **new = &(root->rb_node), *parent = NULL;
464
465 while (*new) {
466 struct regmap_range_node *this =
467 rb_entry(*new, struct regmap_range_node, node);
468
469 parent = *new;
470 if (data->range_max < this->range_min)
471 new = &((*new)->rb_left);
472 else if (data->range_min > this->range_max)
473 new = &((*new)->rb_right);
474 else
475 return false;
476 }
477
478 rb_link_node(&data->node, parent, new);
479 rb_insert_color(&data->node, root);
480
481 return true;
482}
483
484static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
485 unsigned int reg)
486{
487 struct rb_node *node = map->range_tree.rb_node;
488
489 while (node) {
490 struct regmap_range_node *this =
491 rb_entry(node, struct regmap_range_node, node);
492
493 if (reg < this->range_min)
494 node = node->rb_left;
495 else if (reg > this->range_max)
496 node = node->rb_right;
497 else
498 return this;
499 }
500
501 return NULL;
502}
503
504static void regmap_range_exit(struct regmap *map)
505{
506 struct rb_node *next;
507 struct regmap_range_node *range_node;
508
509 next = rb_first(&map->range_tree);
510 while (next) {
511 range_node = rb_entry(next, struct regmap_range_node, node);
512 next = rb_next(&range_node->node);
513 rb_erase(&range_node->node, &map->range_tree);
514 kfree(range_node);
515 }
516
517 kfree(map->selector_work_buf);
518}
519
520int regmap_attach_dev(struct device *dev, struct regmap *map,
521 const struct regmap_config *config)
522{
523 struct regmap **m;
524
525 map->dev = dev;
526
527 regmap_debugfs_init(map, config->name);
528
529 /* Add a devres resource for dev_get_regmap() */
530 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
531 if (!m) {
532 regmap_debugfs_exit(map);
533 return -ENOMEM;
534 }
535 *m = map;
536 devres_add(dev, m);
537
538 return 0;
539}
540EXPORT_SYMBOL_GPL(regmap_attach_dev);
541
542static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
543 const struct regmap_config *config)
544{
545 enum regmap_endian endian;
546
547 /* Retrieve the endianness specification from the regmap config */
548 endian = config->reg_format_endian;
549
550 /* If the regmap config specified a non-default value, use that */
551 if (endian != REGMAP_ENDIAN_DEFAULT)
552 return endian;
553
554 /* Retrieve the endianness specification from the bus config */
555 if (bus && bus->reg_format_endian_default)
556 endian = bus->reg_format_endian_default;
557
558 /* If the bus specified a non-default value, use that */
559 if (endian != REGMAP_ENDIAN_DEFAULT)
560 return endian;
561
562 /* Use this if no other value was found */
563 return REGMAP_ENDIAN_BIG;
564}
565
566enum regmap_endian regmap_get_val_endian(struct device *dev,
567 const struct regmap_bus *bus,
568 const struct regmap_config *config)
569{
570 struct device_node *np;
571 enum regmap_endian endian;
572
573 /* Retrieve the endianness specification from the regmap config */
574 endian = config->val_format_endian;
575
576 /* If the regmap config specified a non-default value, use that */
577 if (endian != REGMAP_ENDIAN_DEFAULT)
578 return endian;
579
580 /* If the dev and dev->of_node exist try to get endianness from DT */
581 if (dev && dev->of_node) {
582 np = dev->of_node;
583
584 /* Parse the device's DT node for an endianness specification */
585 if (of_property_read_bool(np, "big-endian"))
586 endian = REGMAP_ENDIAN_BIG;
587 else if (of_property_read_bool(np, "little-endian"))
588 endian = REGMAP_ENDIAN_LITTLE;
589 else if (of_property_read_bool(np, "native-endian"))
590 endian = REGMAP_ENDIAN_NATIVE;
591
592 /* If the endianness was specified in DT, use that */
593 if (endian != REGMAP_ENDIAN_DEFAULT)
594 return endian;
595 }
596
597 /* Retrieve the endianness specification from the bus config */
598 if (bus && bus->val_format_endian_default)
599 endian = bus->val_format_endian_default;
600
601 /* If the bus specified a non-default value, use that */
602 if (endian != REGMAP_ENDIAN_DEFAULT)
603 return endian;
604
605 /* Use this if no other value was found */
606 return REGMAP_ENDIAN_BIG;
607}
608EXPORT_SYMBOL_GPL(regmap_get_val_endian);
609
610struct regmap *__regmap_init(struct device *dev,
611 const struct regmap_bus *bus,
612 void *bus_context,
613 const struct regmap_config *config,
614 struct lock_class_key *lock_key,
615 const char *lock_name)
616{
617 struct regmap *map;
618 int ret = -EINVAL;
619 enum regmap_endian reg_endian, val_endian;
620 int i, j;
621#ifdef TARGET_OS2
622 // 2020-11-17 SHL FIXME patched struct rb_root
623 struct rb_root _RB_ROOT = { NULL, };
624#endif
625////pr_warn("__regmap_init");
626
627 if (!config)
628 goto err;
629
630 map = kzalloc(sizeof(*map), GFP_KERNEL);
631 if (map == NULL) {
632 ret = -ENOMEM;
633 goto err;
634 }
635
636 if (config->lock && config->unlock) {
637 map->lock = config->lock;
638 map->unlock = config->unlock;
639 map->lock_arg = config->lock_arg;
640 } else {
641 if ((bus && bus->fast_io) ||
642 config->fast_io) {
643 spin_lock_init(&map->spinlock);
644 map->lock = regmap_lock_spinlock;
645 map->unlock = regmap_unlock_spinlock;
646 lockdep_set_class_and_name(&map->spinlock,
647 lock_key, lock_name);
648 } else {
649 mutex_init(&map->mutex);
650 map->lock = regmap_lock_mutex;
651 map->unlock = regmap_unlock_mutex;
652 lockdep_set_class_and_name(&map->mutex,
653 lock_key, lock_name);
654 }
655 map->lock_arg = map;
656 }
657
658 /*
659 * When we write in fast-paths with regmap_bulk_write() don't allocate
660 * scratch buffers with sleeping allocations.
661 */
662 if ((bus && bus->fast_io) || config->fast_io)
663 map->alloc_flags = GFP_ATOMIC;
664 else
665 map->alloc_flags = GFP_KERNEL;
666
667 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
668 map->format.pad_bytes = config->pad_bits / 8;
669 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
670 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
671 config->val_bits + config->pad_bits, 8);
672 map->reg_shift = config->pad_bits % 8;
673 if (config->reg_stride)
674 map->reg_stride = config->reg_stride;
675 else
676 map->reg_stride = 1;
677 if (is_power_of_2(map->reg_stride))
678 map->reg_stride_order = ilog2(map->reg_stride);
679 else
680 map->reg_stride_order = -1;
681 map->use_single_read = config->use_single_read || !bus || !bus->read;
682 map->use_single_write = config->use_single_read || !bus || !bus->write;
683 map->can_multi_write = config->can_multi_write && bus && bus->write;
684 if (bus) {
685 map->max_raw_read = bus->max_raw_read;
686 map->max_raw_write = bus->max_raw_write;
687 }
688 map->dev = dev;
689 map->bus = bus;
690 map->bus_context = bus_context;
691 map->max_register = config->max_register;
692 map->wr_table = config->wr_table;
693 map->rd_table = config->rd_table;
694 map->volatile_table = config->volatile_table;
695 map->precious_table = config->precious_table;
696 map->writeable_reg = config->writeable_reg;
697 map->readable_reg = config->readable_reg;
698 map->volatile_reg = config->volatile_reg;
699 map->precious_reg = config->precious_reg;
700 map->cache_type = config->cache_type;
701 map->name = config->name;
702
703 spin_lock_init(&map->async_lock);
704 INIT_LIST_HEAD(&map->async_list);
705 INIT_LIST_HEAD(&map->async_free);
706 init_waitqueue_head(&map->async_waitq);
707
708 if (config->read_flag_mask || config->write_flag_mask) {
709 map->read_flag_mask = config->read_flag_mask;
710 map->write_flag_mask = config->write_flag_mask;
711 } else if (bus) {
712 map->read_flag_mask = bus->read_flag_mask;
713 }
714
715 if (!bus) {
716 map->reg_read = config->reg_read;
717 map->reg_write = config->reg_write;
718
719 map->defer_caching = false;
720 goto skip_format_initialization;
721 } else if (!bus->read || !bus->write) {
722 map->reg_read = _regmap_bus_reg_read;
723 map->reg_write = _regmap_bus_reg_write;
724
725 map->defer_caching = false;
726 goto skip_format_initialization;
727 } else {
728 map->reg_read = _regmap_bus_read;
729 map->reg_update_bits = bus->reg_update_bits;
730 }
731
732 reg_endian = regmap_get_reg_endian(bus, config);
733 val_endian = regmap_get_val_endian(dev, bus, config);
734
735 switch (config->reg_bits + map->reg_shift) {
736 case 2:
737 switch (config->val_bits) {
738 case 6:
739 map->format.format_write = regmap_format_2_6_write;
740 break;
741 default:
742 goto err_map;
743 }
744 break;
745
746 case 4:
747 switch (config->val_bits) {
748 case 12:
749 map->format.format_write = regmap_format_4_12_write;
750 break;
751 default:
752 goto err_map;
753 }
754 break;
755
756 case 7:
757 switch (config->val_bits) {
758 case 9:
759 map->format.format_write = regmap_format_7_9_write;
760 break;
761 default:
762 goto err_map;
763 }
764 break;
765
766 case 10:
767 switch (config->val_bits) {
768 case 14:
769 map->format.format_write = regmap_format_10_14_write;
770 break;
771 default:
772 goto err_map;
773 }
774 break;
775
776 case 8:
777 map->format.format_reg = regmap_format_8;
778 break;
779
780 case 16:
781 switch (reg_endian) {
782 case REGMAP_ENDIAN_BIG:
783 map->format.format_reg = regmap_format_16_be;
784 break;
785 case REGMAP_ENDIAN_LITTLE:
786 map->format.format_reg = regmap_format_16_le;
787 break;
788 case REGMAP_ENDIAN_NATIVE:
789 map->format.format_reg = regmap_format_16_native;
790 break;
791 default:
792 goto err_map;
793 }
794 break;
795
796 case 24:
797 if (reg_endian != REGMAP_ENDIAN_BIG)
798 goto err_map;
799 map->format.format_reg = regmap_format_24;
800 break;
801
802 case 32:
803 switch (reg_endian) {
804 case REGMAP_ENDIAN_BIG:
805 map->format.format_reg = regmap_format_32_be;
806 break;
807 case REGMAP_ENDIAN_LITTLE:
808 map->format.format_reg = regmap_format_32_le;
809 break;
810 case REGMAP_ENDIAN_NATIVE:
811 map->format.format_reg = regmap_format_32_native;
812 break;
813 default:
814 goto err_map;
815 }
816 break;
817
818#ifdef CONFIG_64BIT
819 case 64:
820 switch (reg_endian) {
821 case REGMAP_ENDIAN_BIG:
822 map->format.format_reg = regmap_format_64_be;
823 break;
824 case REGMAP_ENDIAN_LITTLE:
825 map->format.format_reg = regmap_format_64_le;
826 break;
827 case REGMAP_ENDIAN_NATIVE:
828 map->format.format_reg = regmap_format_64_native;
829 break;
830 default:
831 goto err_map;
832 }
833 break;
834#endif
835
836 default:
837 goto err_map;
838 }
839
840 if (val_endian == REGMAP_ENDIAN_NATIVE)
841 map->format.parse_inplace = regmap_parse_inplace_noop;
842
843 switch (config->val_bits) {
844 case 8:
845 map->format.format_val = regmap_format_8;
846 map->format.parse_val = regmap_parse_8;
847 map->format.parse_inplace = regmap_parse_inplace_noop;
848 break;
849 case 16:
850 switch (val_endian) {
851 case REGMAP_ENDIAN_BIG:
852 map->format.format_val = regmap_format_16_be;
853 map->format.parse_val = regmap_parse_16_be;
854 map->format.parse_inplace = regmap_parse_16_be_inplace;
855 break;
856 case REGMAP_ENDIAN_LITTLE:
857 map->format.format_val = regmap_format_16_le;
858 map->format.parse_val = regmap_parse_16_le;
859 map->format.parse_inplace = regmap_parse_16_le_inplace;
860 break;
861 case REGMAP_ENDIAN_NATIVE:
862 map->format.format_val = regmap_format_16_native;
863 map->format.parse_val = regmap_parse_16_native;
864 break;
865 default:
866 goto err_map;
867 }
868 break;
869 case 24:
870 if (val_endian != REGMAP_ENDIAN_BIG)
871 goto err_map;
872 map->format.format_val = regmap_format_24;
873 map->format.parse_val = regmap_parse_24;
874 break;
875 case 32:
876 switch (val_endian) {
877 case REGMAP_ENDIAN_BIG:
878 map->format.format_val = regmap_format_32_be;
879 map->format.parse_val = regmap_parse_32_be;
880 map->format.parse_inplace = regmap_parse_32_be_inplace;
881 break;
882 case REGMAP_ENDIAN_LITTLE:
883 map->format.format_val = regmap_format_32_le;
884 map->format.parse_val = regmap_parse_32_le;
885 map->format.parse_inplace = regmap_parse_32_le_inplace;
886 break;
887 case REGMAP_ENDIAN_NATIVE:
888 map->format.format_val = regmap_format_32_native;
889 map->format.parse_val = regmap_parse_32_native;
890 break;
891 default:
892 goto err_map;
893 }
894 break;
895#ifdef CONFIG_64BIT
896 case 64:
897 switch (val_endian) {
898 case REGMAP_ENDIAN_BIG:
899 map->format.format_val = regmap_format_64_be;
900 map->format.parse_val = regmap_parse_64_be;
901 map->format.parse_inplace = regmap_parse_64_be_inplace;
902 break;
903 case REGMAP_ENDIAN_LITTLE:
904 map->format.format_val = regmap_format_64_le;
905 map->format.parse_val = regmap_parse_64_le;
906 map->format.parse_inplace = regmap_parse_64_le_inplace;
907 break;
908 case REGMAP_ENDIAN_NATIVE:
909 map->format.format_val = regmap_format_64_native;
910 map->format.parse_val = regmap_parse_64_native;
911 break;
912 default:
913 goto err_map;
914 }
915 break;
916#endif
917 }
918
919 if (map->format.format_write) {
920 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
921 (val_endian != REGMAP_ENDIAN_BIG))
922 goto err_map;
923 map->use_single_write = true;
924 }
925
926 if (!map->format.format_write &&
927 !(map->format.format_reg && map->format.format_val))
928 goto err_map;
929
930 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
931 if (map->work_buf == NULL) {
932 ret = -ENOMEM;
933 goto err_map;
934 }
935
936 if (map->format.format_write) {
937 map->defer_caching = false;
938 map->reg_write = _regmap_bus_formatted_write;
939 } else if (map->format.format_val) {
940 map->defer_caching = true;
941 map->reg_write = _regmap_bus_raw_write;
942 }
943
944skip_format_initialization:
945
946#ifndef TARGET_OS2
947 map->range_tree = RB_ROOT;
948#else
949 map->range_tree = _RB_ROOT;
950 map->range_tree.rb_node = NULL;
951 memset(&map->range_tree, 0, sizeof(struct rb_root));
952#endif
953//pr_warn("config->num_ranges = %u",config->num_ranges);
954 for (i = 0; i < config->num_ranges; i++) {
955 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
956//pr_warn("config->num_ranges = %u, range_cfg->range_max = %u, range_cfg->range_min = %u",config->num_ranges, range_cfg->range_max, range_cfg->range_min);
957 struct regmap_range_node *new;
958
959 /* Sanity check */
960 if (range_cfg->range_max < range_cfg->range_min) {
961 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
962 range_cfg->range_max, range_cfg->range_min);
963 goto err_range;
964 }
965
966 if (range_cfg->range_max > map->max_register) {
967 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
968 range_cfg->range_max, map->max_register);
969 goto err_range;
970 }
971
972 if (range_cfg->selector_reg > map->max_register) {
973 dev_err(map->dev,
974 "Invalid range %d: selector out of map\n", i);
975 goto err_range;
976 }
977
978 if (range_cfg->window_len == 0) {
979 dev_err(map->dev, "Invalid range %d: window_len 0\n",
980 i);
981 goto err_range;
982 }
983
984 /* Make sure, that this register range has no selector
985 or data window within its boundary */
986 for (j = 0; j < config->num_ranges; j++) {
987 unsigned sel_reg = config->ranges[j].selector_reg;
988 unsigned win_min = config->ranges[j].window_start;
989 unsigned win_max = win_min +
990 config->ranges[j].window_len - 1;
991
992 /* Allow data window inside its own virtual range */
993 if (j == i)
994 continue;
995
996 if (range_cfg->range_min <= sel_reg &&
997 sel_reg <= range_cfg->range_max) {
998 dev_err(map->dev,
999 "Range %d: selector for %d in window\n",
1000 i, j);
1001 goto err_range;
1002 }
1003
1004 if (!(win_max < range_cfg->range_min ||
1005 win_min > range_cfg->range_max)) {
1006 dev_err(map->dev,
1007 "Range %d: window for %d in window\n",
1008 i, j);
1009 goto err_range;
1010 }
1011 }
1012
1013 new = kzalloc(sizeof(*new), GFP_KERNEL);
1014 if (new == NULL) {
1015 ret = -ENOMEM;
1016 goto err_range;
1017 }
1018
1019 new->map = map;
1020 new->name = range_cfg->name;
1021 new->range_min = range_cfg->range_min;
1022 new->range_max = range_cfg->range_max;
1023 new->selector_reg = range_cfg->selector_reg;
1024 new->selector_mask = range_cfg->selector_mask;
1025 new->selector_shift = range_cfg->selector_shift;
1026 new->window_start = range_cfg->window_start;
1027 new->window_len = range_cfg->window_len;
1028
1029 if (!_regmap_range_add(map, new)) {
1030 dev_err(map->dev, "Failed to add range %d\n", i);
1031 kfree(new);
1032 goto err_range;
1033 }
1034
1035 if (map->selector_work_buf == NULL) {
1036 map->selector_work_buf =
1037 kzalloc(map->format.buf_size, GFP_KERNEL);
1038 if (map->selector_work_buf == NULL) {
1039 ret = -ENOMEM;
1040 goto err_range;
1041 }
1042 }
1043 }
1044
1045 ret = regcache_init(map, config);
1046 if (ret != 0)
1047 goto err_range;
1048
1049 if (dev) {
1050 ret = regmap_attach_dev(dev, map, config);
1051
1052 if (ret != 0)
1053 goto err_regcache;
1054 }
1055
1056 return map;
1057
1058err_regcache:
1059 regcache_exit(map);
1060err_range:
1061 regmap_range_exit(map);
1062 kfree(map->work_buf);
1063err_map:
1064 kfree(map);
1065err:
1066 return ERR_PTR(ret);
1067}
1068EXPORT_SYMBOL_GPL(__regmap_init);
1069
1070#ifndef TARGET_OS2
1071static void devm_regmap_release(struct device *dev, void *res)
1072{
1073 regmap_exit(*(struct regmap **)res);
1074}
1075
1076struct regmap *__devm_regmap_init(struct device *dev,
1077 const struct regmap_bus *bus,
1078 void *bus_context,
1079 const struct regmap_config *config,
1080 struct lock_class_key *lock_key,
1081 const char *lock_name)
1082{
1083 struct regmap **ptr, *regmap;
1084
1085 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1086 if (!ptr)
1087 return ERR_PTR(-ENOMEM);
1088
1089 regmap = __regmap_init(dev, bus, bus_context, config,
1090 lock_key, lock_name);
1091 if (!IS_ERR(regmap)) {
1092 *ptr = regmap;
1093 devres_add(dev, ptr);
1094 } else {
1095 devres_free(ptr);
1096 }
1097
1098 return regmap;
1099}
1100EXPORT_SYMBOL_GPL(__devm_regmap_init);
1101#endif
1102
1103static void regmap_field_init(struct regmap_field *rm_field,
1104 struct regmap *regmap, struct reg_field reg_field)
1105{
1106 rm_field->regmap = regmap;
1107 rm_field->reg = reg_field.reg;
1108 rm_field->shift = reg_field.lsb;
1109 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1110 rm_field->id_size = reg_field.id_size;
1111 rm_field->id_offset = reg_field.id_offset;
1112}
1113
1114#ifndef TARGET_OS2
1115/**
1116 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1117 *
1118 * @dev: Device that will be interacted with
1119 * @regmap: regmap bank in which this register field is located.
1120 * @reg_field: Register field with in the bank.
1121 *
1122 * The return value will be an ERR_PTR() on error or a valid pointer
1123 * to a struct regmap_field. The regmap_field will be automatically freed
1124 * by the device management code.
1125 */
1126struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1127 struct regmap *regmap, struct reg_field reg_field)
1128{
1129 struct regmap_field *rm_field = devm_kzalloc(dev,
1130 sizeof(*rm_field), GFP_KERNEL);
1131 if (!rm_field)
1132 return ERR_PTR(-ENOMEM);
1133
1134 regmap_field_init(rm_field, regmap, reg_field);
1135
1136 return rm_field;
1137
1138}
1139EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1140
1141/**
1142 * devm_regmap_field_free() - Free a register field allocated using
1143 * devm_regmap_field_alloc.
1144 *
1145 * @dev: Device that will be interacted with
1146 * @field: regmap field which should be freed.
1147 *
1148 * Free register field allocated using devm_regmap_field_alloc(). Usually
1149 * drivers need not call this function, as the memory allocated via devm
1150 * will be freed as per device-driver life-cyle.
1151 */
1152void devm_regmap_field_free(struct device *dev,
1153 struct regmap_field *field)
1154{
1155 devm_kfree(dev, field);
1156}
1157EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1158#endif
1159
1160/**
1161 * regmap_field_alloc() - Allocate and initialise a register field.
1162 *
1163 * @regmap: regmap bank in which this register field is located.
1164 * @reg_field: Register field with in the bank.
1165 *
1166 * The return value will be an ERR_PTR() on error or a valid pointer
1167 * to a struct regmap_field. The regmap_field should be freed by the
1168 * user once its finished working with it using regmap_field_free().
1169 */
1170struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1171 struct reg_field reg_field)
1172{
1173 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1174
1175 if (!rm_field)
1176 return ERR_PTR(-ENOMEM);
1177
1178 regmap_field_init(rm_field, regmap, reg_field);
1179
1180 return rm_field;
1181}
1182EXPORT_SYMBOL_GPL(regmap_field_alloc);
1183
1184/**
1185 * regmap_field_free() - Free register field allocated using
1186 * regmap_field_alloc.
1187 *
1188 * @field: regmap field which should be freed.
1189 */
1190void regmap_field_free(struct regmap_field *field)
1191{
1192 kfree(field);
1193}
1194EXPORT_SYMBOL_GPL(regmap_field_free);
1195
1196/**
1197 * regmap_reinit_cache() - Reinitialise the current register cache
1198 *
1199 * @map: Register map to operate on.
1200 * @config: New configuration. Only the cache data will be used.
1201 *
1202 * Discard any existing register cache for the map and initialize a
1203 * new cache. This can be used to restore the cache to defaults or to
1204 * update the cache configuration to reflect runtime discovery of the
1205 * hardware.
1206 *
1207 * No explicit locking is done here, the user needs to ensure that
1208 * this function will not race with other calls to regmap.
1209 */
1210int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1211{
1212 regcache_exit(map);
1213 regmap_debugfs_exit(map);
1214
1215 map->max_register = config->max_register;
1216 map->writeable_reg = config->writeable_reg;
1217 map->readable_reg = config->readable_reg;
1218 map->volatile_reg = config->volatile_reg;
1219 map->precious_reg = config->precious_reg;
1220 map->cache_type = config->cache_type;
1221
1222 regmap_debugfs_init(map, config->name);
1223
1224 map->cache_bypass = false;
1225 map->cache_only = false;
1226
1227 return regcache_init(map, config);
1228}
1229EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1230
1231/**
1232 * regmap_exit() - Free a previously allocated register map
1233 *
1234 * @map: Register map to operate on.
1235 */
1236void regmap_exit(struct regmap *map)
1237{
1238 struct regmap_async *async;
1239
1240 regcache_exit(map);
1241 regmap_debugfs_exit(map);
1242 regmap_range_exit(map);
1243 if (map->bus && map->bus->free_context)
1244 map->bus->free_context(map->bus_context);
1245 kfree(map->work_buf);
1246 while (!list_empty(&map->async_free)) {
1247 async = list_first_entry_or_null(&map->async_free,
1248 struct regmap_async,
1249 list);
1250 list_del(&async->list);
1251 kfree(async->work_buf);
1252 kfree(async);
1253 }
1254 kfree(map);
1255}
1256EXPORT_SYMBOL_GPL(regmap_exit);
1257
1258static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1259{
1260 struct regmap **r = res;
1261 if (!r || !*r) {
1262 WARN_ON(!r || !*r);
1263 return 0;
1264 }
1265
1266 /* If the user didn't specify a name match any */
1267 if (data)
1268 return !strcmp((*r)->name, data);
1269 else
1270 return 1;
1271}
1272
1273/**
1274 * dev_get_regmap() - Obtain the regmap (if any) for a device
1275 *
1276 * @dev: Device to retrieve the map for
1277 * @name: Optional name for the register map, usually NULL.
1278 *
1279 * Returns the regmap for the device if one is present, or NULL. If
1280 * name is specified then it must match the name specified when
1281 * registering the device, if it is NULL then the first regmap found
1282 * will be used. Devices with multiple register maps are very rare,
1283 * generic code should normally not need to specify a name.
1284 */
1285struct regmap *dev_get_regmap(struct device *dev, const char *name)
1286{
1287 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1288 dev_get_regmap_match, (void *)name);
1289
1290 if (!r)
1291 return NULL;
1292 return *r;
1293}
1294EXPORT_SYMBOL_GPL(dev_get_regmap);
1295
1296/**
1297 * regmap_get_device() - Obtain the device from a regmap
1298 *
1299 * @map: Register map to operate on.
1300 *
1301 * Returns the underlying device that the regmap has been created for.
1302 */
1303struct device *regmap_get_device(struct regmap *map)
1304{
1305 return map->dev;
1306}
1307EXPORT_SYMBOL_GPL(regmap_get_device);
1308
1309static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1310 struct regmap_range_node *range,
1311 unsigned int val_num)
1312{
1313 void *orig_work_buf;
1314 unsigned int win_offset;
1315 unsigned int win_page;
1316 bool page_chg;
1317 int ret;
1318
1319 win_offset = (*reg - range->range_min) % range->window_len;
1320 win_page = (*reg - range->range_min) / range->window_len;
1321
1322 if (val_num > 1) {
1323 /* Bulk write shouldn't cross range boundary */
1324 if (*reg + val_num - 1 > range->range_max)
1325 return -EINVAL;
1326
1327 /* ... or single page boundary */
1328 if (val_num > range->window_len - win_offset)
1329 return -EINVAL;
1330 }
1331
1332 /* It is possible to have selector register inside data window.
1333 In that case, selector register is located on every page and
1334 it needs no page switching, when accessed alone. */
1335 if (val_num > 1 ||
1336 range->window_start + win_offset != range->selector_reg) {
1337 /* Use separate work_buf during page switching */
1338 orig_work_buf = map->work_buf;
1339 map->work_buf = map->selector_work_buf;
1340
1341 ret = _regmap_update_bits(map, range->selector_reg,
1342 range->selector_mask,
1343 win_page << range->selector_shift,
1344 &page_chg, false);
1345
1346 map->work_buf = orig_work_buf;
1347
1348 if (ret != 0)
1349 return ret;
1350 }
1351
1352 *reg = range->window_start + win_offset;
1353
1354 return 0;
1355}
1356
1357static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1358 unsigned long mask)
1359{
1360 u8 *buf;
1361 int i;
1362
1363 if (!mask || !map->work_buf)
1364 return;
1365
1366 buf = map->work_buf;
1367
1368 for (i = 0; i < max_bytes; i++)
1369 buf[i] |= (mask >> (8 * i)) & 0xff;
1370}
1371
1372int _regmap_raw_write(struct regmap *map, unsigned int reg,
1373 const void *val, size_t val_len)
1374{
1375 struct regmap_range_node *range;
1376 unsigned long flags;
1377 void *work_val = map->work_buf + map->format.reg_bytes +
1378 map->format.pad_bytes;
1379 void *buf;
1380 int ret = -ENOTSUPP;
1381 size_t len;
1382 int i;
1383
1384 WARN_ON(!map->bus);
1385
1386 /* Check for unwritable registers before we start */
1387 if (map->writeable_reg)
1388 for (i = 0; i < val_len / map->format.val_bytes; i++)
1389 if (!map->writeable_reg(map->dev,
1390 reg + regmap_get_offset(map, i)))
1391 return -EINVAL;
1392
1393 if (!map->cache_bypass && map->format.parse_val) {
1394 unsigned int ival;
1395 int val_bytes = map->format.val_bytes;
1396 for (i = 0; i < val_len / val_bytes; i++) {
1397 ival = map->format.parse_val(val + (i * val_bytes));
1398 ret = regcache_write(map,
1399 reg + regmap_get_offset(map, i),
1400 ival);
1401 if (ret) {
1402 dev_err(map->dev,
1403 "Error in caching of register: %x ret: %d\n",
1404 reg + i, ret);
1405 return ret;
1406 }
1407 }
1408 if (map->cache_only) {
1409 map->cache_dirty = true;
1410 return 0;
1411 }
1412 }
1413
1414 range = _regmap_range_lookup(map, reg);
1415 if (range) {
1416 int val_num = val_len / map->format.val_bytes;
1417 int win_offset = (reg - range->range_min) % range->window_len;
1418 int win_residue = range->window_len - win_offset;
1419
1420 /* If the write goes beyond the end of the window split it */
1421 while (val_num > win_residue) {
1422 dev_dbg(map->dev, "Writing window %d/%zu\n",
1423 win_residue, val_len / map->format.val_bytes);
1424 ret = _regmap_raw_write(map, reg, val, win_residue *
1425 map->format.val_bytes);
1426 if (ret != 0)
1427 return ret;
1428
1429 reg += win_residue;
1430 val_num -= win_residue;
1431 val += win_residue * map->format.val_bytes;
1432 val_len -= win_residue * map->format.val_bytes;
1433
1434 win_offset = (reg - range->range_min) %
1435 range->window_len;
1436 win_residue = range->window_len - win_offset;
1437 }
1438
1439 ret = _regmap_select_page(map, &reg, range, val_num);
1440 if (ret != 0)
1441 return ret;
1442 }
1443
1444 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1445 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1446 map->write_flag_mask);
1447
1448 /*
1449 * Essentially all I/O mechanisms will be faster with a single
1450 * buffer to write. Since register syncs often generate raw
1451 * writes of single registers optimise that case.
1452 */
1453 if (val != work_val && val_len == map->format.val_bytes) {
1454 memcpy(work_val, val, map->format.val_bytes);
1455 val = work_val;
1456 }
1457
1458 if (map->async && map->bus->async_write) {
1459 struct regmap_async *async;
1460
1461 spin_lock_irqsave(&map->async_lock, flags);
1462 async = list_first_entry_or_null(&map->async_free,
1463 struct regmap_async,
1464 list);
1465 if (async)
1466 list_del(&async->list);
1467 spin_unlock_irqrestore(&map->async_lock, flags);
1468
1469 if (!async) {
1470 async = map->bus->async_alloc();
1471 if (!async)
1472 return -ENOMEM;
1473
1474 async->work_buf = kzalloc(map->format.buf_size,
1475 GFP_KERNEL | GFP_DMA);
1476 if (!async->work_buf) {
1477 kfree(async);
1478 return -ENOMEM;
1479 }
1480 }
1481
1482 async->map = map;
1483
1484 /* If the caller supplied the value we can use it safely. */
1485 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1486 map->format.reg_bytes + map->format.val_bytes);
1487
1488 spin_lock_irqsave(&map->async_lock, flags);
1489 list_add_tail(&async->list, &map->async_list);
1490 spin_unlock_irqrestore(&map->async_lock, flags);
1491
1492 if (val != work_val)
1493 ret = map->bus->async_write(map->bus_context,
1494 async->work_buf,
1495 map->format.reg_bytes +
1496 map->format.pad_bytes,
1497 val, val_len, async);
1498 else
1499 ret = map->bus->async_write(map->bus_context,
1500 async->work_buf,
1501 map->format.reg_bytes +
1502 map->format.pad_bytes +
1503 val_len, NULL, 0, async);
1504
1505 if (ret != 0) {
1506 dev_err(map->dev, "Failed to schedule write: %d\n",
1507 ret);
1508
1509 spin_lock_irqsave(&map->async_lock, flags);
1510 list_move(&async->list, &map->async_free);
1511 spin_unlock_irqrestore(&map->async_lock, flags);
1512 }
1513
1514 return ret;
1515 }
1516
1517 /* If we're doing a single register write we can probably just
1518 * send the work_buf directly, otherwise try to do a gather
1519 * write.
1520 */
1521 if (val == work_val)
1522 ret = map->bus->write(map->bus_context, map->work_buf,
1523 map->format.reg_bytes +
1524 map->format.pad_bytes +
1525 val_len);
1526 else if (map->bus->gather_write)
1527 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1528 map->format.reg_bytes +
1529 map->format.pad_bytes,
1530 val, val_len);
1531 else
1532 ret = -ENOTSUPP;
1533
1534 /* If that didn't work fall back on linearising by hand. */
1535 if (ret == -ENOTSUPP) {
1536 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1537 buf = kzalloc(len, GFP_KERNEL);
1538 if (!buf)
1539 return -ENOMEM;
1540
1541 memcpy(buf, map->work_buf, map->format.reg_bytes);
1542 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1543 val, val_len);
1544 ret = map->bus->write(map->bus_context, buf, len);
1545
1546 kfree(buf);
1547 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1548 /* regcache_drop_region() takes lock that we already have,
1549 * thus call map->cache_ops->drop() directly
1550 */
1551 if (map->cache_ops && map->cache_ops->drop)
1552 map->cache_ops->drop(map, reg, reg + 1);
1553 }
1554
1555 return ret;
1556}
1557
1558/**
1559 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1560 *
1561 * @map: Map to check.
1562 */
1563bool regmap_can_raw_write(struct regmap *map)
1564{
1565 return map->bus && map->bus->write && map->format.format_val &&
1566 map->format.format_reg;
1567}
1568EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1569
1570/**
1571 * regmap_get_raw_read_max - Get the maximum size we can read
1572 *
1573 * @map: Map to check.
1574 */
1575size_t regmap_get_raw_read_max(struct regmap *map)
1576{
1577 return map->max_raw_read;
1578}
1579EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1580
1581/**
1582 * regmap_get_raw_write_max - Get the maximum size we can read
1583 *
1584 * @map: Map to check.
1585 */
1586size_t regmap_get_raw_write_max(struct regmap *map)
1587{
1588 return map->max_raw_write;
1589}
1590EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1591
1592static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1593 unsigned int val)
1594{
1595 int ret;
1596 struct regmap_range_node *range;
1597 struct regmap *map = context;
1598
1599 WARN_ON(!map->bus || !map->format.format_write);
1600
1601 range = _regmap_range_lookup(map, reg);
1602 if (range) {
1603 ret = _regmap_select_page(map, &reg, range, 1);
1604 if (ret != 0)
1605 return ret;
1606 }
1607
1608 map->format.format_write(map, reg, val);
1609
1610 ret = map->bus->write(map->bus_context, map->work_buf,
1611 map->format.buf_size);
1612
1613 return ret;
1614}
1615
1616static int _regmap_bus_reg_write(void *context, unsigned int reg,
1617 unsigned int val)
1618{
1619 struct regmap *map = context;
1620
1621 return map->bus->reg_write(map->bus_context, reg, val);
1622}
1623
1624static int _regmap_bus_raw_write(void *context, unsigned int reg,
1625 unsigned int val)
1626{
1627 struct regmap *map = context;
1628
1629 WARN_ON(!map->bus || !map->format.format_val);
1630
1631 map->format.format_val(map->work_buf + map->format.reg_bytes
1632 + map->format.pad_bytes, val, 0);
1633 return _regmap_raw_write(map, reg,
1634 map->work_buf +
1635 map->format.reg_bytes +
1636 map->format.pad_bytes,
1637 map->format.val_bytes);
1638}
1639
1640static inline void *_regmap_map_get_context(struct regmap *map)
1641{
1642 return (map->bus) ? map : map->bus_context;
1643}
1644
1645int _regmap_write(struct regmap *map, unsigned int reg,
1646 unsigned int val)
1647{
1648 int ret;
1649 void *context = _regmap_map_get_context(map);
1650
1651 if (!regmap_writeable(map, reg))
1652 return -EIO;
1653
1654 if (!map->cache_bypass && !map->defer_caching) {
1655 ret = regcache_write(map, reg, val);
1656 if (ret != 0)
1657 return ret;
1658 if (map->cache_only) {
1659 map->cache_dirty = true;
1660 return 0;
1661 }
1662 }
1663
1664#ifdef LOG_DEVICE
1665 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1666 dev_info(map->dev, "%x <= %x\n", reg, val);
1667#endif
1668
1669 return map->reg_write(context, reg, val);
1670}
1671
1672#define IS_ALIGNED(x, a) (((x) & ((unsigned int)(a) - 1)) == 0)
1673
1674/**
1675 * regmap_write() - Write a value to a single register
1676 *
1677 * @map: Register map to write to
1678 * @reg: Register to write to
1679 * @val: Value to be written
1680 *
1681 * A value of zero will be returned on success, a negative errno will
1682 * be returned in error cases.
1683 */
1684int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1685{
1686 int ret;
1687
1688 if (!IS_ALIGNED(reg, map->reg_stride))
1689 return -EINVAL;
1690
1691 map->lock(map->lock_arg);
1692
1693 ret = _regmap_write(map, reg, val);
1694
1695 map->unlock(map->lock_arg);
1696
1697 return ret;
1698}
1699EXPORT_SYMBOL_GPL(regmap_write);
1700
1701/**
1702 * regmap_write_async() - Write a value to a single register asynchronously
1703 *
1704 * @map: Register map to write to
1705 * @reg: Register to write to
1706 * @val: Value to be written
1707 *
1708 * A value of zero will be returned on success, a negative errno will
1709 * be returned in error cases.
1710 */
1711int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1712{
1713 int ret;
1714
1715 if (!IS_ALIGNED(reg, map->reg_stride))
1716 return -EINVAL;
1717
1718 map->lock(map->lock_arg);
1719
1720 map->async = true;
1721
1722 ret = _regmap_write(map, reg, val);
1723
1724 map->async = false;
1725
1726 map->unlock(map->lock_arg);
1727
1728 return ret;
1729}
1730EXPORT_SYMBOL_GPL(regmap_write_async);
1731
1732/**
1733 * regmap_raw_write() - Write raw values to one or more registers
1734 *
1735 * @map: Register map to write to
1736 * @reg: Initial register to write to
1737 * @val: Block of data to be written, laid out for direct transmission to the
1738 * device
1739 * @val_len: Length of data pointed to by val.
1740 *
1741 * This function is intended to be used for things like firmware
1742 * download where a large block of data needs to be transferred to the
1743 * device. No formatting will be done on the data provided.
1744 *
1745 * A value of zero will be returned on success, a negative errno will
1746 * be returned in error cases.
1747 */
1748int regmap_raw_write(struct regmap *map, unsigned int reg,
1749 const void *val, size_t val_len)
1750{
1751 int ret;
1752
1753 if (!regmap_can_raw_write(map))
1754 return -EINVAL;
1755 if (val_len % map->format.val_bytes)
1756 return -EINVAL;
1757 if (map->max_raw_write && map->max_raw_write < val_len)
1758 return -E2BIG;
1759
1760 map->lock(map->lock_arg);
1761
1762 ret = _regmap_raw_write(map, reg, val, val_len);
1763
1764 map->unlock(map->lock_arg);
1765
1766 return ret;
1767}
1768EXPORT_SYMBOL_GPL(regmap_raw_write);
1769
1770/**
1771 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
1772 * register field.
1773 *
1774 * @field: Register field to write to
1775 * @mask: Bitmask to change
1776 * @val: Value to be written
1777 * @change: Boolean indicating if a write was done
1778 * @async: Boolean indicating asynchronously
1779 * @force: Boolean indicating use force update
1780 *
1781 * Perform a read/modify/write cycle on the register field with change,
1782 * async, force option.
1783 *
1784 * A value of zero will be returned on success, a negative errno will
1785 * be returned in error cases.
1786 */
1787int regmap_field_update_bits_base(struct regmap_field *field,
1788 unsigned int mask, unsigned int val,
1789 bool *change, bool async, bool force)
1790{
1791 mask = (mask << field->shift) & field->mask;
1792
1793 return regmap_update_bits_base(field->regmap, field->reg,
1794 mask, val << field->shift,
1795 change, async, force);
1796}
1797EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1798
1799/**
1800 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
1801 * register field with port ID
1802 *
1803 * @field: Register field to write to
1804 * @id: port ID
1805 * @mask: Bitmask to change
1806 * @val: Value to be written
1807 * @change: Boolean indicating if a write was done
1808 * @async: Boolean indicating asynchronously
1809 * @force: Boolean indicating use force update
1810 *
1811 * A value of zero will be returned on success, a negative errno will
1812 * be returned in error cases.
1813 */
1814int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1815 unsigned int mask, unsigned int val,
1816 bool *change, bool async, bool force)
1817{
1818 if (id >= field->id_size)
1819 return -EINVAL;
1820
1821 mask = (mask << field->shift) & field->mask;
1822
1823 return regmap_update_bits_base(field->regmap,
1824 field->reg + (field->id_offset * id),
1825 mask, val << field->shift,
1826 change, async, force);
1827}
1828EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1829
1830/**
1831 * regmap_bulk_write() - Write multiple registers to the device
1832 *
1833 * @map: Register map to write to
1834 * @reg: First register to be write from
1835 * @val: Block of data to be written, in native register size for device
1836 * @val_count: Number of registers to write
1837 *
1838 * This function is intended to be used for writing a large block of
1839 * data to the device either in single transfer or multiple transfer.
1840 *
1841 * A value of zero will be returned on success, a negative errno will
1842 * be returned in error cases.
1843 */
1844int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1845 size_t val_count)
1846{
1847 int ret = 0, i;
1848 size_t val_bytes = map->format.val_bytes;
1849 size_t total_size = val_bytes * val_count;
1850
1851 if (!IS_ALIGNED(reg, map->reg_stride))
1852 return -EINVAL;
1853
1854 /*
1855 * Some devices don't support bulk write, for
1856 * them we have a series of single write operations in the first two if
1857 * blocks.
1858 *
1859 * The first if block is used for memory mapped io. It does not allow
1860 * val_bytes of 3 for example.
1861 * The second one is for busses that do not provide raw I/O.
1862 * The third one is used for busses which do not have these limitations
1863 * and can write arbitrary value lengths.
1864 */
1865 if (!map->bus) {
1866 map->lock(map->lock_arg);
1867 for (i = 0; i < val_count; i++) {
1868 unsigned int ival;
1869
1870 switch (val_bytes) {
1871 case 1:
1872 ival = *(u8 *)(val + (i * val_bytes));
1873 break;
1874 case 2:
1875 ival = *(u16 *)(val + (i * val_bytes));
1876 break;
1877 case 4:
1878 ival = *(u32 *)(val + (i * val_bytes));
1879 break;
1880#ifdef CONFIG_64BIT
1881 case 8:
1882 ival = *(u64 *)(val + (i * val_bytes));
1883 break;
1884#endif
1885 default:
1886 ret = -EINVAL;
1887 goto out;
1888 }
1889
1890 ret = _regmap_write(map,
1891 reg + regmap_get_offset(map, i),
1892 ival);
1893 if (ret != 0)
1894 goto out;
1895 }
1896out:
1897 map->unlock(map->lock_arg);
1898 } else if (map->bus && !map->format.parse_inplace) {
1899 const u8 *u8 = val;
1900 const u16 *u16 = val;
1901 const u32 *u32 = val;
1902 unsigned int ival;
1903
1904 for (i = 0; i < val_count; i++) {
1905 switch (map->format.val_bytes) {
1906 case 4:
1907 ival = u32[i];
1908 break;
1909 case 2:
1910 ival = u16[i];
1911 break;
1912 case 1:
1913 ival = u8[i];
1914 break;
1915 default:
1916 return -EINVAL;
1917 }
1918
1919 ret = regmap_write(map, reg + (i * map->reg_stride),
1920 ival);
1921 if (ret)
1922 return ret;
1923 }
1924 } else if (map->use_single_write ||
1925 (map->max_raw_write && map->max_raw_write < total_size)) {
1926 int chunk_stride = map->reg_stride;
1927 size_t chunk_size = val_bytes;
1928 size_t chunk_count = val_count;
1929
1930 if (!map->use_single_write) {
1931 chunk_size = map->max_raw_write;
1932 if (chunk_size % val_bytes)
1933 chunk_size -= chunk_size % val_bytes;
1934 chunk_count = total_size / chunk_size;
1935 chunk_stride *= chunk_size / val_bytes;
1936 }
1937
1938 map->lock(map->lock_arg);
1939 /* Write as many bytes as possible with chunk_size */
1940 for (i = 0; i < chunk_count; i++) {
1941 ret = _regmap_raw_write(map,
1942 reg + (i * chunk_stride),
1943 val + (i * chunk_size),
1944 chunk_size);
1945 if (ret)
1946 break;
1947 }
1948
1949 /* Write remaining bytes */
1950 if (!ret && chunk_size * i < total_size) {
1951 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1952 val + (i * chunk_size),
1953 total_size - i * chunk_size);
1954 }
1955 map->unlock(map->lock_arg);
1956 } else {
1957 void *wval;
1958
1959 if (!val_count)
1960 return -EINVAL;
1961
1962 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1963 if (!wval) {
1964 dev_err(map->dev, "Error in memory allocation\n");
1965 return -ENOMEM;
1966 }
1967 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1968 map->format.parse_inplace(wval + i);
1969
1970 map->lock(map->lock_arg);
1971 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1972 map->unlock(map->lock_arg);
1973
1974 kfree(wval);
1975 }
1976 return ret;
1977}
1978EXPORT_SYMBOL_GPL(regmap_bulk_write);
1979
1980/*
1981 * _regmap_raw_multi_reg_write()
1982 *
1983 * the (register,newvalue) pairs in regs have not been formatted, but
1984 * they are all in the same page and have been changed to being page
1985 * relative. The page register has been written if that was necessary.
1986 */
1987static int _regmap_raw_multi_reg_write(struct regmap *map,
1988 const struct reg_sequence *regs,
1989 size_t num_regs)
1990{
1991 int ret;
1992 void *buf;
1993 int i;
1994 u8 *u8;
1995 size_t val_bytes = map->format.val_bytes;
1996 size_t reg_bytes = map->format.reg_bytes;
1997 size_t pad_bytes = map->format.pad_bytes;
1998 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1999 size_t len = pair_size * num_regs;
2000
2001 if (!len)
2002 return -EINVAL;
2003
2004 buf = kzalloc(len, GFP_KERNEL);
2005 if (!buf)
2006 return -ENOMEM;
2007
2008 /* We have to linearise by hand. */
2009
2010 u8 = buf;
2011
2012 for (i = 0; i < num_regs; i++) {
2013 unsigned int reg = regs[i].reg;
2014 unsigned int val = regs[i].def;
2015 map->format.format_reg(u8, reg, map->reg_shift);
2016 u8 += reg_bytes + pad_bytes;
2017 map->format.format_val(u8, val, 0);
2018 u8 += val_bytes;
2019 }
2020 u8 = buf;
2021 *u8 |= map->write_flag_mask;
2022
2023 ret = map->bus->write(map->bus_context, buf, len);
2024
2025 kfree(buf);
2026
2027 for (i = 0; i < num_regs; i++) {
2028 int reg = regs[i].reg;
2029 }
2030 return ret;
2031}
2032
2033static unsigned int _regmap_register_page(struct regmap *map,
2034 unsigned int reg,
2035 struct regmap_range_node *range)
2036{
2037 unsigned int win_page = (reg - range->range_min) / range->window_len;
2038
2039 return win_page;
2040}
2041
2042static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2043 struct reg_sequence *regs,
2044 size_t num_regs)
2045{
2046 int ret;
2047 int i, n;
2048 struct reg_sequence *base;
2049 unsigned int this_page = 0;
2050 unsigned int page_change = 0;
2051 /*
2052 * the set of registers are not neccessarily in order, but
2053 * since the order of write must be preserved this algorithm
2054 * chops the set each time the page changes. This also applies
2055 * if there is a delay required at any point in the sequence.
2056 */
2057 base = regs;
2058 for (i = 0, n = 0; i < num_regs; i++, n++) {
2059 unsigned int reg = regs[i].reg;
2060 struct regmap_range_node *range;
2061
2062 range = _regmap_range_lookup(map, reg);
2063 if (range) {
2064 unsigned int win_page = _regmap_register_page(map, reg,
2065 range);
2066
2067 if (i == 0)
2068 this_page = win_page;
2069 if (win_page != this_page) {
2070 this_page = win_page;
2071 page_change = 1;
2072 }
2073 }
2074
2075 /* If we have both a page change and a delay make sure to
2076 * write the regs and apply the delay before we change the
2077 * page.
2078 */
2079
2080 if (page_change || regs[i].delay_us) {
2081
2082 /* For situations where the first write requires
2083 * a delay we need to make sure we don't call
2084 * raw_multi_reg_write with n=0
2085 * This can't occur with page breaks as we
2086 * never write on the first iteration
2087 */
2088 if (regs[i].delay_us && i == 0)
2089 n = 1;
2090
2091 ret = _regmap_raw_multi_reg_write(map, base, n);
2092 if (ret != 0)
2093 return ret;
2094
2095 if (regs[i].delay_us)
2096 udelay(regs[i].delay_us);
2097
2098 base += n;
2099 n = 0;
2100
2101 if (page_change) {
2102 ret = _regmap_select_page(map,
2103 &base[n].reg,
2104 range, 1);
2105 if (ret != 0)
2106 return ret;
2107
2108 page_change = 0;
2109 }
2110
2111 }
2112
2113 }
2114 if (n > 0)
2115 return _regmap_raw_multi_reg_write(map, base, n);
2116 return 0;
2117}
2118
2119static int _regmap_multi_reg_write(struct regmap *map,
2120 const struct reg_sequence *regs,
2121 size_t num_regs)
2122{
2123 int i;
2124 int ret;
2125
2126 if (!map->can_multi_write) {
2127 for (i = 0; i < num_regs; i++) {
2128 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2129 if (ret != 0)
2130 return ret;
2131
2132 if (regs[i].delay_us)
2133 udelay(regs[i].delay_us);
2134 }
2135 return 0;
2136 }
2137
2138 if (!map->format.parse_inplace)
2139 return -EINVAL;
2140
2141 if (map->writeable_reg)
2142 for (i = 0; i < num_regs; i++) {
2143 int reg = regs[i].reg;
2144 if (!map->writeable_reg(map->dev, reg))
2145 return -EINVAL;
2146 if (!IS_ALIGNED(reg, map->reg_stride))
2147 return -EINVAL;
2148 }
2149
2150 if (!map->cache_bypass) {
2151 for (i = 0; i < num_regs; i++) {
2152 unsigned int val = regs[i].def;
2153 unsigned int reg = regs[i].reg;
2154 ret = regcache_write(map, reg, val);
2155 if (ret) {
2156 dev_err(map->dev,
2157 "Error in caching of register: %x ret: %d\n",
2158 reg, ret);
2159 return ret;
2160 }
2161 }
2162 if (map->cache_only) {
2163 map->cache_dirty = true;
2164 return 0;
2165 }
2166 }
2167
2168 WARN_ON(!map->bus);
2169
2170 for (i = 0; i < num_regs; i++) {
2171 unsigned int reg = regs[i].reg;
2172 struct regmap_range_node *range;
2173
2174 /* Coalesce all the writes between a page break or a delay
2175 * in a sequence
2176 */
2177 range = _regmap_range_lookup(map, reg);
2178 if (range || regs[i].delay_us) {
2179 size_t len = sizeof(struct reg_sequence)*num_regs;
2180 struct reg_sequence *base = kmemdup(regs, len,
2181 GFP_KERNEL);
2182 if (!base)
2183 return -ENOMEM;
2184 ret = _regmap_range_multi_paged_reg_write(map, base,
2185 num_regs);
2186 kfree(base);
2187
2188 return ret;
2189 }
2190 }
2191 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2192}
2193
2194/**
2195 * regmap_multi_reg_write() - Write multiple registers to the device
2196 *
2197 * @map: Register map to write to
2198 * @regs: Array of structures containing register,value to be written
2199 * @num_regs: Number of registers to write
2200 *
2201 * Write multiple registers to the device where the set of register, value
2202 * pairs are supplied in any order, possibly not all in a single range.
2203 *
2204 * The 'normal' block write mode will send ultimately send data on the
2205 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2206 * addressed. However, this alternative block multi write mode will send
2207 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2208 * must of course support the mode.
2209 *
2210 * A value of zero will be returned on success, a negative errno will be
2211 * returned in error cases.
2212 */
2213int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2214 int num_regs)
2215{
2216 int ret;
2217
2218 map->lock(map->lock_arg);
2219
2220 ret = _regmap_multi_reg_write(map, regs, num_regs);
2221
2222 map->unlock(map->lock_arg);
2223
2224 return ret;
2225}
2226EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2227
2228/**
2229 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2230 * device but not the cache
2231 *
2232 * @map: Register map to write to
2233 * @regs: Array of structures containing register,value to be written
2234 * @num_regs: Number of registers to write
2235 *
2236 * Write multiple registers to the device but not the cache where the set
2237 * of register are supplied in any order.
2238 *
2239 * This function is intended to be used for writing a large block of data
2240 * atomically to the device in single transfer for those I2C client devices
2241 * that implement this alternative block write mode.
2242 *
2243 * A value of zero will be returned on success, a negative errno will
2244 * be returned in error cases.
2245 */
2246int regmap_multi_reg_write_bypassed(struct regmap *map,
2247 const struct reg_sequence *regs,
2248 int num_regs)
2249{
2250 int ret;
2251 bool bypass;
2252
2253 map->lock(map->lock_arg);
2254
2255 bypass = map->cache_bypass;
2256 map->cache_bypass = true;
2257
2258 ret = _regmap_multi_reg_write(map, regs, num_regs);
2259
2260 map->cache_bypass = bypass;
2261
2262 map->unlock(map->lock_arg);
2263
2264 return ret;
2265}
2266EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2267
2268/**
2269 * regmap_raw_write_async() - Write raw values to one or more registers
2270 * asynchronously
2271 *
2272 * @map: Register map to write to
2273 * @reg: Initial register to write to
2274 * @val: Block of data to be written, laid out for direct transmission to the
2275 * device. Must be valid until regmap_async_complete() is called.
2276 * @val_len: Length of data pointed to by val.
2277 *
2278 * This function is intended to be used for things like firmware
2279 * download where a large block of data needs to be transferred to the
2280 * device. No formatting will be done on the data provided.
2281 *
2282 * If supported by the underlying bus the write will be scheduled
2283 * asynchronously, helping maximise I/O speed on higher speed buses
2284 * like SPI. regmap_async_complete() can be called to ensure that all
2285 * asynchrnous writes have been completed.
2286 *
2287 * A value of zero will be returned on success, a negative errno will
2288 * be returned in error cases.
2289 */
2290int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2291 const void *val, size_t val_len)
2292{
2293 int ret;
2294
2295 if (val_len % map->format.val_bytes)
2296 return -EINVAL;
2297 if (!IS_ALIGNED(reg, map->reg_stride))
2298 return -EINVAL;
2299
2300 map->lock(map->lock_arg);
2301
2302 map->async = true;
2303
2304 ret = _regmap_raw_write(map, reg, val, val_len);
2305
2306 map->async = false;
2307
2308 map->unlock(map->lock_arg);
2309
2310 return ret;
2311}
2312EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2313
2314static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2315 unsigned int val_len)
2316{
2317 struct regmap_range_node *range;
2318 int ret;
2319
2320 WARN_ON(!map->bus);
2321
2322 if (!map->bus || !map->bus->read)
2323 return -EINVAL;
2324
2325 range = _regmap_range_lookup(map, reg);
2326 if (range) {
2327 ret = _regmap_select_page(map, &reg, range,
2328 val_len / map->format.val_bytes);
2329 if (ret != 0)
2330 return ret;
2331 }
2332
2333 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2334 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2335 map->read_flag_mask);
2336
2337 ret = map->bus->read(map->bus_context, map->work_buf,
2338 map->format.reg_bytes + map->format.pad_bytes,
2339 val, val_len);
2340
2341 return ret;
2342}
2343
2344static int _regmap_bus_reg_read(void *context, unsigned int reg,
2345 unsigned int *val)
2346{
2347 struct regmap *map = context;
2348
2349 return map->bus->reg_read(map->bus_context, reg, val);
2350}
2351
2352static int _regmap_bus_read(void *context, unsigned int reg,
2353 unsigned int *val)
2354{
2355 int ret;
2356 struct regmap *map = context;
2357
2358 if (!map->format.parse_val)
2359 return -EINVAL;
2360
2361 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2362 if (ret == 0)
2363 *val = map->format.parse_val(map->work_buf);
2364
2365 return ret;
2366}
2367
2368static int _regmap_read(struct regmap *map, unsigned int reg,
2369 unsigned int *val)
2370{
2371 int ret;
2372 void *context = _regmap_map_get_context(map);
2373
2374 if (!map->cache_bypass) {
2375 ret = regcache_read(map, reg, val);
2376 if (ret == 0)
2377 return 0;
2378 }
2379
2380 if (map->cache_only)
2381 return -EBUSY;
2382
2383 if (!regmap_readable(map, reg))
2384 return -EIO;
2385
2386 ret = map->reg_read(context, reg, val);
2387 if (ret == 0) {
2388#ifdef LOG_DEVICE
2389 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2390 dev_info(map->dev, "%x => %x\n", reg, *val);
2391#endif
2392
2393 if (!map->cache_bypass)
2394 regcache_write(map, reg, *val);
2395 }
2396
2397 return ret;
2398}
2399
2400/**
2401 * regmap_read() - Read a value from a single register
2402 *
2403 * @map: Register map to read from
2404 * @reg: Register to be read from
2405 * @val: Pointer to store read value
2406 *
2407 * A value of zero will be returned on success, a negative errno will
2408 * be returned in error cases.
2409 */
2410int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2411{
2412 int ret;
2413
2414 if (!IS_ALIGNED(reg, map->reg_stride))
2415 return -EINVAL;
2416
2417 map->lock(map->lock_arg);
2418
2419 ret = _regmap_read(map, reg, val);
2420
2421 map->unlock(map->lock_arg);
2422
2423 return ret;
2424}
2425EXPORT_SYMBOL_GPL(regmap_read);
2426
2427/**
2428 * regmap_raw_read() - Read raw data from the device
2429 *
2430 * @map: Register map to read from
2431 * @reg: First register to be read from
2432 * @val: Pointer to store read value
2433 * @val_len: Size of data to read
2434 *
2435 * A value of zero will be returned on success, a negative errno will
2436 * be returned in error cases.
2437 */
2438int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2439 size_t val_len)
2440{
2441 size_t val_bytes = map->format.val_bytes;
2442 size_t val_count = val_len / val_bytes;
2443 unsigned int v;
2444 int ret, i;
2445
2446 if (!map->bus)
2447 return -EINVAL;
2448 if (val_len % map->format.val_bytes)
2449 return -EINVAL;
2450 if (!IS_ALIGNED(reg, map->reg_stride))
2451 return -EINVAL;
2452 if (val_count == 0)
2453 return -EINVAL;
2454
2455 map->lock(map->lock_arg);
2456
2457 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2458 map->cache_type == REGCACHE_NONE) {
2459 if (!map->bus->read) {
2460 ret = -ENOTSUPP;
2461 goto out;
2462 }
2463 if (map->max_raw_read && map->max_raw_read < val_len) {
2464 ret = -E2BIG;
2465 goto out;
2466 }
2467
2468 /* Physical block read if there's no cache involved */
2469 ret = _regmap_raw_read(map, reg, val, val_len);
2470
2471 } else {
2472 /* Otherwise go word by word for the cache; should be low
2473 * cost as we expect to hit the cache.
2474 */
2475 for (i = 0; i < val_count; i++) {
2476 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2477 &v);
2478 if (ret != 0)
2479 goto out;
2480
2481 map->format.format_val(val + (i * val_bytes), v, 0);
2482 }
2483 }
2484
2485 out:
2486 map->unlock(map->lock_arg);
2487
2488 return ret;
2489}
2490EXPORT_SYMBOL_GPL(regmap_raw_read);
2491
2492/**
2493 * regmap_field_read() - Read a value to a single register field
2494 *
2495 * @field: Register field to read from
2496 * @val: Pointer to store read value
2497 *
2498 * A value of zero will be returned on success, a negative errno will
2499 * be returned in error cases.
2500 */
2501int regmap_field_read(struct regmap_field *field, unsigned int *val)
2502{
2503 int ret;
2504 unsigned int reg_val;
2505 ret = regmap_read(field->regmap, field->reg, &reg_val);
2506 if (ret != 0)
2507 return ret;
2508
2509 reg_val &= field->mask;
2510 reg_val >>= field->shift;
2511 *val = reg_val;
2512
2513 return ret;
2514}
2515EXPORT_SYMBOL_GPL(regmap_field_read);
2516
2517/**
2518 * regmap_fields_read() - Read a value to a single register field with port ID
2519 *
2520 * @field: Register field to read from
2521 * @id: port ID
2522 * @val: Pointer to store read value
2523 *
2524 * A value of zero will be returned on success, a negative errno will
2525 * be returned in error cases.
2526 */
2527int regmap_fields_read(struct regmap_field *field, unsigned int id,
2528 unsigned int *val)
2529{
2530 int ret;
2531 unsigned int reg_val;
2532
2533 if (id >= field->id_size)
2534 return -EINVAL;
2535
2536 ret = regmap_read(field->regmap,
2537 field->reg + (field->id_offset * id),
2538 &reg_val);
2539 if (ret != 0)
2540 return ret;
2541
2542 reg_val &= field->mask;
2543 reg_val >>= field->shift;
2544 *val = reg_val;
2545
2546 return ret;
2547}
2548EXPORT_SYMBOL_GPL(regmap_fields_read);
2549
2550/**
2551 * regmap_bulk_read() - Read multiple registers from the device
2552 *
2553 * @map: Register map to read from
2554 * @reg: First register to be read from
2555 * @val: Pointer to store read value, in native register size for device
2556 * @val_count: Number of registers to read
2557 *
2558 * A value of zero will be returned on success, a negative errno will
2559 * be returned in error cases.
2560 */
2561int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2562 size_t val_count)
2563{
2564 int ret, i;
2565 size_t val_bytes = map->format.val_bytes;
2566 bool vol = regmap_volatile_range(map, reg, val_count);
2567
2568 if (!IS_ALIGNED(reg, map->reg_stride))
2569 return -EINVAL;
2570
2571 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2572 /*
2573 * Some devices does not support bulk read, for
2574 * them we have a series of single read operations.
2575 */
2576 size_t total_size = val_bytes * val_count;
2577
2578 if (!map->use_single_read &&
2579 (!map->max_raw_read || map->max_raw_read > total_size)) {
2580 ret = regmap_raw_read(map, reg, val,
2581 val_bytes * val_count);
2582 if (ret != 0)
2583 return ret;
2584 } else {
2585 /*
2586 * Some devices do not support bulk read or do not
2587 * support large bulk reads, for them we have a series
2588 * of read operations.
2589 */
2590 int chunk_stride = map->reg_stride;
2591 size_t chunk_size = val_bytes;
2592 size_t chunk_count = val_count;
2593
2594 if (!map->use_single_read) {
2595 chunk_size = map->max_raw_read;
2596 if (chunk_size % val_bytes)
2597 chunk_size -= chunk_size % val_bytes;
2598 chunk_count = total_size / chunk_size;
2599 chunk_stride *= chunk_size / val_bytes;
2600 }
2601
2602 /* Read bytes that fit into a multiple of chunk_size */
2603 for (i = 0; i < chunk_count; i++) {
2604 ret = regmap_raw_read(map,
2605 reg + (i * chunk_stride),
2606 val + (i * chunk_size),
2607 chunk_size);
2608 if (ret != 0)
2609 return ret;
2610 }
2611
2612 /* Read remaining bytes */
2613 if (chunk_size * i < total_size) {
2614 ret = regmap_raw_read(map,
2615 reg + (i * chunk_stride),
2616 val + (i * chunk_size),
2617 total_size - i * chunk_size);
2618 if (ret != 0)
2619 return ret;
2620 }
2621 }
2622
2623 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2624 map->format.parse_inplace(val + i);
2625 } else {
2626 for (i = 0; i < val_count; i++) {
2627 unsigned int ival;
2628 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2629 &ival);
2630 if (ret != 0)
2631 return ret;
2632
2633 if (map->format.format_val) {
2634 map->format.format_val(val + (i * val_bytes), ival, 0);
2635 } else {
2636 /* Devices providing read and write
2637 * operations can use the bulk I/O
2638 * functions if they define a val_bytes,
2639 * we assume that the values are native
2640 * endian.
2641 */
2642#ifdef CONFIG_64BIT
2643 u64 *u64 = val;
2644#endif
2645 u32 *u32 = val;
2646 u16 *u16 = val;
2647 u8 *u8 = val;
2648
2649 switch (map->format.val_bytes) {
2650#ifdef CONFIG_64BIT
2651 case 8:
2652 u64[i] = ival;
2653 break;
2654#endif
2655 case 4:
2656 u32[i] = ival;
2657 break;
2658 case 2:
2659 u16[i] = ival;
2660 break;
2661 case 1:
2662 u8[i] = ival;
2663 break;
2664 default:
2665 return -EINVAL;
2666 }
2667 }
2668 }
2669 }
2670
2671 return 0;
2672}
2673EXPORT_SYMBOL_GPL(regmap_bulk_read);
2674
2675static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2676 unsigned int mask, unsigned int val,
2677 bool *change, bool force_write)
2678{
2679 int ret;
2680 unsigned int tmp, orig;
2681
2682 if (change)
2683 *change = false;
2684
2685 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2686 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2687 if (ret == 0 && change)
2688 *change = true;
2689 } else {
2690 ret = _regmap_read(map, reg, &orig);
2691 if (ret != 0)
2692 return ret;
2693
2694 tmp = orig & ~mask;
2695 tmp |= val & mask;
2696
2697 if (force_write || (tmp != orig)) {
2698 ret = _regmap_write(map, reg, tmp);
2699 if (ret == 0 && change)
2700 *change = true;
2701 }
2702 }
2703
2704 return ret;
2705}
2706
2707/**
2708 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
2709 *
2710 * @map: Register map to update
2711 * @reg: Register to update
2712 * @mask: Bitmask to change
2713 * @val: New value for bitmask
2714 * @change: Boolean indicating if a write was done
2715 * @async: Boolean indicating asynchronously
2716 * @force: Boolean indicating use force update
2717 *
2718 * Perform a read/modify/write cycle on a register map with change, async, force
2719 * options.
2720 *
2721 * If async is true:
2722 *
2723 * With most buses the read must be done synchronously so this is most useful
2724 * for devices with a cache which do not need to interact with the hardware to
2725 * determine the current register value.
2726 *
2727 * Returns zero for success, a negative number on error.
2728 */
2729int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2730 unsigned int mask, unsigned int val,
2731 bool *change, bool async, bool force)
2732{
2733 int ret;
2734
2735 map->lock(map->lock_arg);
2736
2737 map->async = async;
2738
2739 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2740
2741 map->async = false;
2742
2743 map->unlock(map->lock_arg);
2744
2745 return ret;
2746}
2747EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2748
2749void regmap_async_complete_cb(struct regmap_async *async, int ret)
2750{
2751 struct regmap *map = async->map;
2752 bool wake;
2753
2754 spin_lock(&map->async_lock);
2755 list_move(&async->list, &map->async_free);
2756 wake = list_empty(&map->async_list);
2757
2758 if (ret != 0)
2759 map->async_ret = ret;
2760
2761 spin_unlock(&map->async_lock);
2762
2763 if (wake)
2764 wake_up(&map->async_waitq);
2765}
2766EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2767
2768#ifndef TARGET_OS2
2769static int regmap_async_is_done(struct regmap *map)
2770{
2771 unsigned long flags;
2772 int ret;
2773
2774 spin_lock_irqsave(&map->async_lock, flags);
2775 ret = list_empty(&map->async_list);
2776 spin_unlock_irqrestore(&map->async_lock, flags);
2777
2778 return ret;
2779}
2780#endif
2781
2782/**
2783 * regmap_async_complete - Ensure all asynchronous I/O has completed.
2784 *
2785 * @map: Map to operate on.
2786 *
2787 * Blocks until any pending asynchronous I/O has completed. Returns
2788 * an error code for any failed I/O operations.
2789 */
2790int regmap_async_complete(struct regmap *map)
2791{
2792 unsigned long flags;
2793 int ret;
2794
2795 /* Nothing to do with no async support */
2796 if (!map->bus || !map->bus->async_write)
2797 return 0;
2798
2799//FIXME wait_event(map->async_waitq, regmap_async_is_done(map));
2800
2801 spin_lock_irqsave(&map->async_lock, flags);
2802 ret = map->async_ret;
2803 map->async_ret = 0;
2804 spin_unlock_irqrestore(&map->async_lock, flags);
2805
2806 return ret;
2807}
2808EXPORT_SYMBOL_GPL(regmap_async_complete);
2809
2810/**
2811 * regmap_register_patch - Register and apply register updates to be applied
2812 * on device initialistion
2813 *
2814 * @map: Register map to apply updates to.
2815 * @regs: Values to update.
2816 * @num_regs: Number of entries in regs.
2817 *
2818 * Register a set of register updates to be applied to the device
2819 * whenever the device registers are synchronised with the cache and
2820 * apply them immediately. Typically this is used to apply
2821 * corrections to be applied to the device defaults on startup, such
2822 * as the updates some vendors provide to undocumented registers.
2823 *
2824 * The caller must ensure that this function cannot be called
2825 * concurrently with either itself or regcache_sync().
2826 */
2827int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2828 int num_regs)
2829{
2830 struct reg_sequence *p;
2831 int ret;
2832 bool bypass;
2833
2834#if 0
2835 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2836 num_regs))
2837 return 0;
2838#endif
2839
2840 p = krealloc(map->patch,
2841 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2842 GFP_KERNEL);
2843 if (p) {
2844 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2845 map->patch = p;
2846 map->patch_regs += num_regs;
2847 } else {
2848 return -ENOMEM;
2849 }
2850
2851 map->lock(map->lock_arg);
2852
2853 bypass = map->cache_bypass;
2854
2855 map->cache_bypass = true;
2856 map->async = true;
2857
2858 ret = _regmap_multi_reg_write(map, regs, num_regs);
2859
2860 map->async = false;
2861 map->cache_bypass = bypass;
2862
2863 map->unlock(map->lock_arg);
2864
2865 regmap_async_complete(map);
2866
2867 return ret;
2868}
2869EXPORT_SYMBOL_GPL(regmap_register_patch);
2870
2871/**
2872 * regmap_get_val_bytes() - Report the size of a register value
2873 *
2874 * @map: Register map to operate on.
2875 *
2876 * Report the size of a register value, mainly intended to for use by
2877 * generic infrastructure built on top of regmap.
2878 */
2879int regmap_get_val_bytes(struct regmap *map)
2880{
2881 if (map->format.format_write)
2882 return -EINVAL;
2883
2884 return map->format.val_bytes;
2885}
2886EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2887
2888/**
2889 * regmap_get_max_register() - Report the max register value
2890 *
2891 * @map: Register map to operate on.
2892 *
2893 * Report the max register value, mainly intended to for use by
2894 * generic infrastructure built on top of regmap.
2895 */
2896int regmap_get_max_register(struct regmap *map)
2897{
2898 return map->max_register ? map->max_register : -EINVAL;
2899}
2900EXPORT_SYMBOL_GPL(regmap_get_max_register);
2901
2902/**
2903 * regmap_get_reg_stride() - Report the register address stride
2904 *
2905 * @map: Register map to operate on.
2906 *
2907 * Report the register address stride, mainly intended to for use by
2908 * generic infrastructure built on top of regmap.
2909 */
2910int regmap_get_reg_stride(struct regmap *map)
2911{
2912 return map->reg_stride;
2913}
2914EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2915
2916int regmap_parse_val(struct regmap *map, const void *buf,
2917 unsigned int *val)
2918{
2919 if (!map->format.parse_val)
2920 return -EINVAL;
2921
2922 *val = map->format.parse_val(buf);
2923
2924 return 0;
2925}
2926EXPORT_SYMBOL_GPL(regmap_parse_val);
2927
2928static int __init regmap_initcall(void)
2929{
2930 regmap_debugfs_initcall();
2931
2932 return 0;
2933}
2934postcore_initcall(regmap_initcall);
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