source: GPL/branches/uniaud32-next/lib32/pci.c@ 730

Last change on this file since 730 was 730, checked in by Paul Smedley, 3 years ago

Cleanups

File size: 32.9 KB
Line 
1/* $Id: pci.c,v 1.1.1.1 2003/07/02 13:57:02 eleph Exp $ */
2/*
3 * OS/2 implementation of Linux PCI functions (using direct port I/O)
4 *
5 * (C) 2000-2002 InnoTek Systemberatung GmbH
6 * (C) 2000-2001 Sander van Leeuwen (sandervl@xs4all.nl)
7 * Copyright (c) 2016-2017 David Azarewicz <david@88watts.net>
8 *
9 * Parts based on Linux kernel sources
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this program; if not, write to the Free
23 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
24 * USA.
25 *
26 */
27#define CONFIG_PM
28#include "linux.h"
29#include <linux/init.h>
30#include <linux/poll.h>
31#include <linux/dma-mapping.h>
32#include <linux/gfp.h>
33#include <asm/uaccess.h>
34#include <asm/hardirq.h>
35#include <asm/io.h>
36#include <sound/config.h>
37#include <sound/core.h>
38#include <sound/asound.h>
39
40#define LINUX
41#include <ossidc.h>
42#include <stacktoflat.h>
43#include <dbgos2.h>
44#include <osspci.h>
45
46#define MAX_PCI_BUSSES 256
47#define MAX_PCI_DEVICES 16
48
49struct pci_dev pci_devices[MAX_PCI_DEVICES] = {0};
50//struct pci_bus pci_busses[MAX_PCI_BUSSES] = {0};
51
52extern int nrCardsDetected;
53extern int iAdapterNumber;
54
55
56#define PCI_CONFIG_ENABLE 0x80000000
57#define PCI_CONFIG_ADDRESS 0xCF8
58#define PCI_CONFIG_DATA 0xCFC
59
60//******************************************************************************
61#define CONFIG_CMD(dev, where) \
62 (PCI_CONFIG_ENABLE | (dev->bus->number<<16) | (dev->devfn<<8) | (where & ~3))
63//******************************************************************************
64int pci_read_config_byte(struct pci_dev *dev, int where, u8 *value)
65{
66 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
67 *value = inb(PCI_CONFIG_DATA + (where&3));
68 return PCIBIOS_SUCCESSFUL;
69}
70//******************************************************************************
71//******************************************************************************
72int pci_read_config_word(struct pci_dev *dev, int where, u16 *value)
73{
74 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
75 *value = inw(PCI_CONFIG_DATA + (where&2));
76 return PCIBIOS_SUCCESSFUL;
77}
78//******************************************************************************
79//******************************************************************************
80int pci_read_config_dword(struct pci_dev *dev, int where, u32 *value)
81{
82 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
83 *value = inl(PCI_CONFIG_DATA);
84 return PCIBIOS_SUCCESSFUL;
85}
86//******************************************************************************
87//******************************************************************************
88int pci_write_config_byte(struct pci_dev *dev, int where, u8 value)
89{
90 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
91 outb(value, PCI_CONFIG_DATA + (where&3));
92 return PCIBIOS_SUCCESSFUL;
93}
94//******************************************************************************
95//******************************************************************************
96int pci_write_config_word(struct pci_dev *dev, int where, u16 value)
97{
98 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
99 outw(value, PCI_CONFIG_DATA + (where&2));
100 return PCIBIOS_SUCCESSFUL;
101}
102//******************************************************************************
103//******************************************************************************
104int pci_write_config_dword(struct pci_dev *dev, int where, u32 value)
105{
106 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
107 outl(value, PCI_CONFIG_DATA);
108 return PCIBIOS_SUCCESSFUL;
109}
110//******************************************************************************
111//******************************************************************************
112int pcidev_prepare(struct pci_dev *dev)
113{
114 dprintf(("pcidev_prepare %x not implemented", dev));
115 return 1; //todo: correct return value??
116}
117//******************************************************************************
118//******************************************************************************
119int pcidev_activate(struct pci_dev *dev)
120{
121 dprintf(("pcidev_activate %x not implemented", dev));
122 return 1; //todo: correct return value??
123}
124//******************************************************************************
125//******************************************************************************
126int pcidev_deactivate(struct pci_dev *dev)
127{
128 dprintf(("pcidev_deactivate %x not implemented", dev));
129 return 1; //todo: correct return value??
130}
131
132/**
133 * Called by: pci_find_device, register_driver
134 *
135 * Find the next matching PCI device starting with the device specified by ulLast
136 * Returns: the found device, pcidev filled in. Returns zero if no device found.
137 */
138 static ULONG pci_query_device(const struct pci_device_id *pIdTable, struct pci_dev near *pcidev, ULONG ulLast)
139{
140 int resNo, addr;
141 u32 devNr, busNr, funcNr, detectedId, cfgaddrreg, ulPciAdr, ulTmp1, ulTmp2;
142 u8 headerType;
143
144 busNr = (ulLast >> 8) & 0xff;
145 devNr = PCI_SLOT(ulLast);
146 funcNr = PCI_FUNC(ulLast);
147 if (ulLast) funcNr++;
148
149 cfgaddrreg = inl(PCI_CONFIG_ADDRESS);
150 for ( ; busNr<MAX_PCI_BUSSES; busNr++) //BusNumber<255
151 {
152 for( ; devNr<32; devNr++)
153 {
154 for( ; funcNr<8; funcNr++)
155 {
156 headerType = 0;
157 ulPciAdr = PCI_CONFIG_ENABLE | (busNr<<16) | (devNr<<11) | (funcNr<<8);
158 outl(ulPciAdr, PCI_CONFIG_ADDRESS);
159 detectedId = inl(PCI_CONFIG_DATA);
160
161 if ( detectedId == 0xffffffff )
162 {
163 if ( funcNr == 0 ) break; /* if func 0 isn't there, the others aren't either */
164 continue;
165 }
166
167 outl(ulPciAdr + PCI_CLASS_REVISION, PCI_CONFIG_ADDRESS);
168 ulTmp2 = inl(PCI_CONFIG_DATA) >> 8; /* get class */
169
170 //dprintf(("Found: %x Class=%x need: %x%x class=%x", detectedId, ulTmp2, pIdTable->device&0xffff, pIdTable->vendor, pIdTable->class));
171
172 if ( pIdTable->class )
173 {
174 if ( (ulTmp2 & pIdTable->class_mask) != pIdTable->class ) continue;
175 }
176
177 if ( pIdTable->vendor && (pIdTable->vendor != (detectedId & 0xffff)) ) continue;
178 if ( pIdTable->device && (pIdTable->device != PCI_ANY_ID) && (pIdTable->device != (detectedId >> 16)) ) continue;
179
180 outl(ulPciAdr | (PCI_HEADER_TYPE & ~3), PCI_CONFIG_ADDRESS);
181 headerType = inb(PCI_CONFIG_DATA + (PCI_HEADER_TYPE & 3));
182
183 if ( (headerType & 0x7f) != PCI_HEADER_TYPE_NORMAL ) continue;
184
185 memset((void near *)pcidev, 0, sizeof(struct pci_dev));
186
187 pcidev->class = ulTmp2;
188 pcidev->vendor = detectedId & 0xffff;
189 pcidev->device = detectedId >> 16;
190 //pcidev->bus = &pci_busses[busNr];
191 pcidev->bus = kmalloc(sizeof(struct pci_bus), GFP_KERNEL);
192 if (pcidev->bus == NULL) return 0;
193 memset (pcidev->bus, 0, sizeof(struct pci_bus));
194 pcidev->bus->number = busNr;
195 pcidev->devfn = PCI_DEVFN(devNr, funcNr);
196 pcidev->hdr_type = headerType & 0x7f;
197
198 pcidev->prepare = pcidev_prepare;
199 pcidev->activate = pcidev_activate;
200 pcidev->deactivate = pcidev_deactivate;
201 pcidev->active = 1;
202 pcidev->ro = 0;
203 pcidev->sibling = NULL;
204 pcidev->next = NULL;
205 pcidev->dma_mask = 0xffffffff;
206 pcidev->dev.dma_mask = &pcidev->dma_mask;
207 pcidev->dev.coherent_dma_mask = 0xffffffffull;
208 INIT_LIST_HEAD(&pcidev->dev.devres_head);
209
210 // Subsystem ID
211 pci_read_config_word(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &pcidev->subsystem_vendor);
212 pci_read_config_word(pcidev, PCI_SUBSYSTEM_ID, &pcidev->subsystem_device);
213
214 // revision
215 pci_read_config_byte(pcidev, PCI_REVISION_ID, &pcidev->revision);
216
217 // I/O and MEM
218 resNo = 0;
219 for( addr = PCI_BASE_ADDRESS_0; addr <= PCI_BASE_ADDRESS_5; addr += 4 )
220 {
221 pci_read_config_dword(pcidev, addr, &ulTmp1);
222 if( ulTmp1 != 0 && ulTmp1 != 0xffffffff )
223 {
224 pci_write_config_dword(pcidev, addr, 0xffffffff);
225 pci_read_config_dword(pcidev, addr, &ulTmp2);
226 pci_write_config_dword(pcidev, addr, ulTmp1);
227
228 if( ulTmp1 & PCI_BASE_ADDRESS_SPACE_IO )
229 {
230 pcidev->resource[resNo].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
231 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_IO_MASK;
232 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
233 ~(ulTmp2 & PCI_BASE_ADDRESS_IO_MASK) + 1;
234 }
235 else
236 {
237 pcidev->resource[resNo].flags = IORESOURCE_MEM | IORESOURCE_MEM_WRITEABLE;
238 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_MEM_MASK;
239 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
240 ~(ulTmp2 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
241 }
242
243 resNo++;
244 }
245 }
246
247 // IRQ and PIN
248 pci_read_config_dword(pcidev, PCI_INTERRUPT_LINE, &ulTmp1);
249 //rprintf(("pci_query_device: PCI config IRQ=%d", ulTmp1&0xff));
250 if( (u8)ulTmp1 && (u8)ulTmp1 != 0xff )
251 {
252 pcidev->irq_resource[0].flags = IORESOURCE_IRQ;
253 pcidev->irq_resource[0].start = pcidev->irq_resource[0].end = ulTmp1 & 0xffff;
254 pcidev->irq = (u8)ulTmp1; // This is the interrupt used for init time processing
255 pcidev->irq_pin = ulTmp1>>8;
256 }
257
258 return ((busNr << 8) | PCI_DEVFN(devNr, funcNr));
259 } /* for funcNr */
260 funcNr = 0;
261 } /* for devNr */
262 devNr = 0;
263 }
264 outl(cfgaddrreg, PCI_CONFIG_ADDRESS);
265 return 0;
266}
267
268/**
269 * Called by: snd_pci_dev_present, various sound drivers
270 *
271 * Find the requested device
272 */
273struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
274{
275 int i;
276 struct pci_device_id id_table;
277
278 for(i=0; i<MAX_PCI_DEVICES; i++)
279 {
280 if ( pci_devices[i].devfn && (pci_devices[i].vendor == vendor) && (pci_devices[i].device == device) ) return &pci_devices[i];
281 }
282
283 for(i=0; i<MAX_PCI_DEVICES; i++)
284 {
285 if(pci_devices[i].devfn == 0)
286 {
287 memset(&id_table, 0, sizeof(id_table));
288 id_table.vendor = vendor;
289 id_table.device = device;
290 if( pci_query_device(&id_table, (struct pci_dev near *)&pci_devices[i], 0) ) return &pci_devices[i];
291 else break;
292 }
293 }
294
295 return NULL;
296}
297
298/** __request_region
299 */
300struct resource * __request_region(struct resource *a, unsigned long start, unsigned long n, const char *name)
301{
302 struct resource *resource;
303
304 if(a->flags & IORESOURCE_MEM) {
305 if(RMRequestMem(/*hResMgr,*/ start, n) == FALSE) {
306 printk("RMRequestIO failed for mem %x length %x\n", start, n);
307 return NULL;
308 }
309 }
310 else if(a->flags & IORESOURCE_IO) {
311 if(RMRequestIO(/*hResMgr,*/ start, n) == FALSE) {
312 printk("RMRequestIO failed for io %x length %x\n", start, n);
313 return NULL;
314 }
315 }
316
317 resource = kmalloc(sizeof(struct resource), GFP_KERNEL);
318 if (resource == NULL)
319 return NULL;
320 resource->name = name;
321 resource->start = start;
322 resource->end = start + n; // - 1;
323 resource->flags = a->flags;
324 resource->parent =
325 resource->child = NULL;
326
327 // insert in list
328 resource->sibling = a->sibling;
329 a->sibling = resource;
330
331 return resource;
332}
333
334/**
335 */
336void __release_region(struct resource *a, unsigned long start, unsigned long n)
337{
338 struct resource *resource;
339 struct resource **ppres = &a->sibling;
340 unsigned long end = start + n; // - 1;
341
342 while( *ppres )
343 {
344 resource = *ppres;
345
346 if( resource->start == start && resource->end == end )
347 {
348 // remove from list
349 *ppres = resource->sibling;
350 kfree(resource);
351 return;
352 }
353
354 ppres = &resource->sibling;
355 }
356}
357
358/**
359 */
360int pci_get_flags (struct pci_dev *dev, int n_base)
361{
362 if(n_base >= DEVICE_COUNT_RESOURCE || !dev->resource[n_base].flags) {
363 DebugInt3();
364 return 0;
365 }
366 return dev->resource[n_base].flags;
367}
368
369/**
370 */
371int pcibios_present(void)
372{
373 printk("pcibios_present -> pretend BIOS present\n");
374 return 1;
375}
376
377/**
378 */
379struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn)
380{
381 printk("pci_find_slot %d %x not implemented!!\n", bus, devfn);
382 DebugInt3();
383 return NULL;
384}
385
386/**
387 */
388int pci_dma_supported(struct pci_dev *dev, unsigned long mask)
389{
390 printk("pci_dma_supported: return TRUE\n");
391 return 1;
392}
393
394/**
395 */
396int pci_find_capability(struct pci_dev *dev, int cap)
397{
398 u16 status;
399 u8 pos, id;
400 int ttl = 48;
401
402 pci_read_config_word(dev, PCI_STATUS, &status);
403 if (!(status & PCI_STATUS_CAP_LIST))
404 return 0;
405 pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
406 while (ttl-- && pos >= 0x40) {
407 pos &= ~3;
408 pci_read_config_byte(dev, pos + PCI_CAP_LIST_ID, &id);
409 if (id == 0xff)
410 break;
411 if (id == cap)
412 return pos;
413 pci_read_config_byte(dev, pos + PCI_CAP_LIST_NEXT, &pos);
414 }
415 return 0;
416}
417
418/**
419 * Set power management state of a device. For transitions from state D3
420 * it isn't as straightforward as one could assume since many devices forget
421 * their configuration space during wakeup. Returns old power state.
422 */
423int pci_set_power_state(struct pci_dev *dev, int new_state)
424{
425 u32 base[5], romaddr;
426 u16 pci_command, pwr_command;
427 u8 pci_latency, pci_cacheline;
428 int i, old_state;
429 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
430
431 if (!pm)
432 return 0;
433 pci_read_config_word(dev, pm + PCI_PM_CTRL, &pwr_command);
434 old_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
435 if (old_state == new_state)
436 return old_state;
437 if (old_state == 3) {
438 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
439 pci_write_config_word(dev, PCI_COMMAND, pci_command & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
440 for (i = 0; i < 5; i++)
441 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, &base[i]);
442 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &romaddr);
443 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &pci_latency);
444 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_cacheline);
445 pci_write_config_word(dev, pm + PCI_PM_CTRL, new_state);
446 for (i = 0; i < 5; i++)
447 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, base[i]);
448 pci_write_config_dword(dev, PCI_ROM_ADDRESS, romaddr);
449 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
450 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cacheline);
451 pci_write_config_byte(dev, PCI_LATENCY_TIMER, pci_latency);
452 pci_write_config_word(dev, PCI_COMMAND, pci_command);
453 } else
454 pci_write_config_word(dev, pm + PCI_PM_CTRL, (pwr_command & ~PCI_PM_CTRL_STATE_MASK) | new_state);
455 return old_state;
456}
457
458/**
459 * pcim_enable_device - Managed pci_enable_device()
460 * @pdev: PCI device to be initialized
461 *
462 * Managed pci_enable_device().
463 */
464int pcim_enable_device(struct pci_dev *pdev)
465{
466 int rc;
467
468 rc = pci_enable_device(pdev);
469 return rc;
470}
471
472/**
473 * Initialize device before it's used by a driver. Ask low-level code
474 * to enable I/O and memory. Wake up the device if it was suspended.
475 * Beware, this function can fail.
476 */
477int pci_enable_device(struct pci_dev *dev)
478{
479 u16 pci_command;
480
481 dprintf(("pci_enable_device %x\n", dev));
482
483 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
484 pci_write_config_word(dev, PCI_COMMAND, pci_command | (PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
485 pci_set_power_state(dev, 0);
486 return 0;
487}
488
489/** pci_register_driver
490 *
491 * probes and registers a sound driver with RM.
492 *
493 * Returns: number of cards found.
494 */
495int pci_register_driver(struct pci_driver *driver)
496{
497 int iNumCards, iTmp;
498 ULONG ulLast;
499 struct pci_dev *pcidev;
500 struct pci_device_id IdTable;
501 USHORT usVendor, usDevice;
502 int iAdapter = 0;
503
504 if (!driver->probe) return 0;
505
506 iNumCards = 0;
507
508 /* find an empty slot */
509 for (iTmp=0; iTmp<MAX_PCI_DEVICES; iTmp++)
510 {
511 if (pci_devices[iTmp].devfn == 0) break;
512 }
513 if (iTmp >= MAX_PCI_DEVICES) return 0;
514 pcidev = &pci_devices[iTmp];
515
516 memset(&IdTable, 0, sizeof(IdTable));
517 IdTable.class = 0x000400 << 8; /* Any multimedia device */
518 IdTable.class_mask = 0xffff00 << 8;
519 ulLast = 0;
520 while( (ulLast = pci_query_device(&IdTable, pcidev, ulLast)) != 0 )
521 {
522 int iTableIx;
523
524 rprintf((__func__": query_device found %x %04x:%04x class=%x checking %s",
525 ulLast, pcidev->vendor, pcidev->device, pcidev->class, driver->name));
526
527 usVendor = 0;
528 usDevice = 0;
529
530 for( iTableIx = 0; driver->id_table[iTableIx].vendor; iTableIx++)
531 {
532 struct pci_device_id const *pDriverId = &driver->id_table[iTableIx];
533
534 if ( (pDriverId->class) && ((pcidev->class & pDriverId->class_mask) != pDriverId->class) ) continue;
535 if (pDriverId->vendor != pcidev->vendor) continue;
536 if ( (pDriverId->device != PCI_ANY_ID) && (pDriverId->device != pcidev->device) ) continue;
537
538 /* skip a duplicate device that could be matched by both and exact match and a class match */
539 if (usVendor == pcidev->vendor && usDevice == pcidev->device) continue;
540 usVendor = pcidev->vendor;
541 usDevice = pcidev->device;
542
543 rprintf((__func__": matched %d %x:%x/%x with %x:%x/%x %x (%s)", iTableIx,
544 pcidev->vendor, pcidev->device, pcidev->class,
545 pDriverId->vendor, pDriverId->device, pDriverId->class, pDriverId->class_mask, driver->name));
546
547 if ((iAdapterNumber >= 0) && (iAdapter < iAdapterNumber))
548 {
549 rprintf((__func__": AdapterNumber=%x skipping Adapter=%x", iAdapterNumber, iAdapter));
550 iAdapter++;
551 continue;
552 }
553
554 if (driver->probe(pcidev, pDriverId) == 0)
555 {
556 pcidev->pcidriver = (void *)driver;
557 pcidev->current_state = 4;
558
559 // create adapter
560 RMCreateAdapterU32((pcidev->device << 16) | pcidev->vendor, &pcidev->hAdapter, ulLast, iNumCards);
561
562 iNumCards++;
563 pcidev = NULL; /* we need a new slot */
564 break;
565 }
566 // release resources which were possibly allocated during probe()
567 RMDeallocRes();
568 } /* for id_table loop */
569
570 if (pcidev)
571 {
572 kfree(pcidev->bus);
573 pcidev->devfn = 0;
574 }
575 else
576 {
577 if (iAdapterNumber >= 0) break;
578 /* find another empty slot */
579 for (iTmp=0; iTmp<MAX_PCI_DEVICES; iTmp++)
580 {
581 if (pci_devices[iTmp].devfn == 0) break;
582 }
583 if (iTmp >= MAX_PCI_DEVICES) break;
584 pcidev = &pci_devices[iTmp];
585 }
586 } /* pci_query_device loop */
587
588 return iNumCards;
589}
590
591/**
592 */
593int pci_module_init(struct pci_driver *drv)
594{
595 int res = pci_register_driver(drv);
596 if (res == 0) return -ENODEV;
597 return res;
598}
599
600/**
601 */
602int pci_unregister_driver(struct pci_driver *driver)
603{
604 struct pci_dev *pcidev;
605 int i, j;
606
607 for (i=0; driver->id_table[i].vendor; i++) {
608 for(j=0; j<MAX_PCI_DEVICES; j++) {
609 pcidev = &pci_devices[j];
610 if (pcidev->devfn == 0) continue;
611 if (pcidev->vendor != driver->id_table[i].vendor) continue;
612 if ( (driver->id_table[i].device != PCI_ANY_ID) && (pcidev->device != driver->id_table[i].device) ) continue;
613 dprintf(("pci unreg match: %x:%x %x:%x", pci_devices[j].vendor, pci_devices[j].device, driver->id_table[i].vendor, driver->id_table[i].device));
614 if (driver->remove) driver->remove(pcidev);
615 kfree(pcidev->bus);
616 pcidev->devfn = 0;
617 }
618 }
619 return 0;
620}
621
622/**
623 */
624void pci_set_master(struct pci_dev *dev)
625{
626 u16 cmd;
627
628 pci_read_config_word(dev, PCI_COMMAND, &cmd);
629 if (! (cmd & PCI_COMMAND_MASTER)) {
630 dprintf(("pci_set_master %x", dev));
631 cmd |= PCI_COMMAND_MASTER;
632 pci_write_config_word(dev, PCI_COMMAND, cmd);
633 }
634 return;
635}
636
637/**
638 * Register a device with power management
639 */
640struct pm_dev *pm_register(pm_dev_t type, unsigned long id, pm_callback callback)
641{
642 dprintf(("pm_register STUB"));
643 DebugInt3();
644 return NULL;
645}
646
647/**
648 * Unregister a device with power management
649 */
650void pm_unregister(struct pm_dev *dev)
651{
652 dprintf(("pm_unregister STUB"));
653}
654
655/**
656 */
657int __compat_get_order(unsigned long size)
658{
659 int order;
660
661 size = (size-1) >> (PAGE_SHIFT-1);
662 order = -1;
663 do {
664 size >>= 1;
665 order++;
666 } while (size);
667 return order;
668}
669
670/**
671 */
672void *pci_alloc_consistent(struct pci_dev *hwdev,
673 long size, dma_addr_t *dma_handle)
674{
675 void *ret = NULL;
676 int gfp = GFP_ATOMIC;
677 int order;
678 dprintf(("pci_alloc_consistent %d mask %x", size, (hwdev) ? hwdev->dma_mask : 0));
679 if (hwdev == NULL || hwdev->dma_mask != 0xffffffff) {
680 //try not to exhaust low memory (< 16mb) so allocate from the high region first
681 //if that doesn't satisfy the dma mask requirement, then get it from the low
682 //region anyway
683 if(hwdev->dma_mask > 0x00ffffff) {
684 order = __compat_get_order(size);
685 ret = (void *)__get_free_pages(gfp|GFP_DMAHIGHMEM, order);
686 *dma_handle = virt_to_bus(ret);
687 if(*dma_handle > hwdev->dma_mask) {
688 free_pages((unsigned long)ret, __compat_get_order(size));
689 //be sure and allocate below 16 mb
690 gfp |= GFP_DMA;
691 ret = NULL;
692 }
693 }
694 else { //must always allocate below 16 mb
695 gfp |= GFP_DMA;
696 }
697 }
698 if(ret == NULL) {
699 ret = (void *)__get_free_pages(gfp, __compat_get_order(size));
700 }
701 if (ret != NULL) {
702 memset(ret, 0, size);
703 *dma_handle = virt_to_bus(ret);
704 }
705 return ret;
706}
707
708#if 0
709void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
710 dma_addr_t *dma_handle)
711 {
712 return dma_alloc_coherent(hwdev == NULL ? NULL : &hwdev->dev, size, dma_handle, GFP_ATOMIC);
713 }
714#endif
715#if 0
716void *dma_alloc_coherent(struct device *dev, size_t size,
717 dma_addr_t *dma_handle, gfp_t gfp)
718{
719 void *ret = NULL;
720 int order;
721
722 dprintf(("dma_alloc_coherent %d mask %x", size, (dev) ? dev->dma_mask : 0));
723 if (dev == NULL || *dev->dma_mask != 0xffffffff) {
724 dprintf(("dma_alloc_coherent"));
725 //try not to exhaust low memory (< 16mb) so allocate from the high region first
726 //if that doesn't satisfy the dma mask requirement, then get it from the low
727 //region anyway
728 if(*dev->dma_mask > 0x00ffffff) {
729 dprintf(("dma_alloc_coherent2"));
730 order = __compat_get_order(size);
731 ret = (void *)__get_free_pages(gfp|GFP_DMAHIGHMEM, order);
732 *dma_handle = virt_to_bus(ret);
733 if(*dma_handle > *dev->dma_mask) {
734 dprintf(("dma_alloc_coherent3"));
735 free_pages((unsigned long)ret, __compat_get_order(size));
736 //be sure and allocate below 16 mb
737 gfp |= GFP_DMA;
738 ret = NULL;
739 }
740 dprintf(("dma_alloc_coherent3a"));
741 }
742 else { //must always allocate below 16 mb
743 dprintf(("dma_alloc_coherent4"));
744 gfp |= GFP_DMA;
745 }
746 }
747 if(ret == NULL) {
748 dprintf(("dma_alloc_coherent5"));
749 ret = (void *)__get_free_pages(gfp, __compat_get_order(size));
750 }
751
752 if (ret != NULL) {
753 memset(ret, 0, size);
754 *dma_handle = virt_to_bus(ret);
755 }
756 return ret;
757
758}
759#endif
760
761int dma_supported(struct device *dev, u64 mask)
762{
763 return 1;
764}
765
766int dma_set_coherent_mask(struct device *dev, u64 mask)
767{
768 /*
769 * Truncate the mask to the actually supported dma_addr_t width to
770 * avoid generating unsupportable addresses.
771 */
772 mask = (dma_addr_t)mask;
773
774 if (!dma_supported(dev, mask))
775 return -EIO;
776
777 dev->coherent_dma_mask = mask;
778 return 0;
779}
780
781int dma_set_mask(struct device *dev, u64 mask)
782{
783 /*
784 * Truncate the mask to the actually supported dma_addr_t width to
785 * avoid generating unsupportable addresses.
786 */
787 mask = (dma_addr_t)mask;
788
789 if (!dev->dma_mask || !dma_supported(dev, mask))
790 return -EIO;
791
792 *dev->dma_mask = mask;
793 return 0;
794}
795
796/**
797 */
798void pci_free_consistent(struct pci_dev *hwdev, long size,
799 void *vaddr, dma_addr_t dma_handle)
800{
801 free_pages((unsigned long)vaddr, __compat_get_order(size));
802}
803
804
805/**
806 */
807unsigned long pci_get_dma_mask (struct pci_dev *dev)
808{
809 if (dev)
810 return dev->dma_mask;
811 return 0;
812}
813
814/**
815 */
816int release_resource(struct resource *newres)
817{
818 return 0;
819}
820
821/**
822 */
823int pci_set_latency_time(struct pci_dev *dev, int latency)
824{
825 pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
826 return 0;
827}
828
829/**
830 * pci_save_state - save the PCI configuration space of a device before suspending
831 * @dev: - PCI device that we're dealing with
832 * @buffer: - buffer to hold config space context
833 *
834 * @buffer must be large enough to hold the entire PCI 2.2 config space
835 * (>= 64 bytes).
836 */
837int pci_orig_save_state(struct pci_dev *dev, u32 *buffer)
838{
839 int i;
840 if (buffer) {
841 /* XXX: 100% dword access ok here? */
842 for (i = 0; i < 16; i++)
843 pci_read_config_dword(dev, i * 4,&buffer[i]);
844 }
845 return 0;
846}
847
848/**
849 * pci_restore_state - Restore the saved state of a PCI device
850 * @dev: - PCI device that we're dealing with
851 * @buffer: - saved PCI config space
852 *
853 */
854int pci_orig_restore_state(struct pci_dev *dev, u32 *buffer)
855{
856 int i;
857
858 if (buffer) {
859 for (i = 0; i < 16; i++)
860 pci_write_config_dword(dev,i * 4, buffer[i]);
861 }
862 /*
863 * otherwise, write the context information we know from bootup.
864 * This works around a problem where warm-booting from Windows
865 * combined with a D3(hot)->D0 transition causes PCI config
866 * header data to be forgotten.
867 */
868 else {
869 for (i = 0; i < 6; i ++)
870 pci_write_config_dword(dev,
871 PCI_BASE_ADDRESS_0 + (i * 4),
872 dev->resource[i].start);
873 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
874 }
875 return 0;
876}
877
878struct saved_config_tbl {
879 struct pci_dev *pci;
880 u32 config[16];
881};
882static struct saved_config_tbl saved_tbl[16];
883
884int pci_save_state(struct pci_dev *pci)
885{
886 int i;
887 /* FIXME: mutex needed for race? */
888 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
889 if (! saved_tbl[i].pci) {
890 saved_tbl[i].pci = pci;
891 pci_orig_save_state(pci, saved_tbl[i].config);
892 return 1;
893 }
894 }
895 printk(KERN_DEBUG "snd: no pci config space found!\n");
896 return 0;
897}
898
899int pci_restore_state(struct pci_dev *pci)
900{
901 int i;
902 /* FIXME: mutex needed for race? */
903 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
904 if (saved_tbl[i].pci == pci) {
905 saved_tbl[i].pci = NULL;
906 pci_orig_restore_state(pci, saved_tbl[i].config);
907 return 0;
908 }
909 }
910 printk(KERN_DEBUG "snd: no saved pci config!\n");
911 return 1;
912}
913
914void pci_disable_device(struct pci_dev *dev)
915{
916 u16 pci_command;
917
918 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
919 if (pci_command & PCI_COMMAND_MASTER) {
920 pci_command &= ~PCI_COMMAND_MASTER;
921 pci_write_config_word(dev, PCI_COMMAND, pci_command);
922 }
923}
924
925int pci_request_region(struct pci_dev *pdev, int bar, char *res_name)
926{
927 int flags;
928
929 if (pci_resource_len(pdev, bar) == 0)
930 return 0;
931 flags = pci_get_flags(pdev, bar);
932 if (flags & IORESOURCE_IO) {
933 if (check_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
934 goto err_out;
935 request_region(pci_resource_start(pdev, bar),
936 pci_resource_len(pdev, bar), res_name);
937 }
938 else if (flags & IORESOURCE_MEM) {
939 if (check_mem_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
940 goto err_out;
941 request_mem_region(pci_resource_start(pdev, bar),
942 pci_resource_len(pdev, bar), res_name);
943 }
944
945 return 0;
946
947err_out:
948 printk(KERN_WARNING "PCI: Unable to reserve %s region #%d:%lx@%lx for device %s\n",
949 flags & IORESOURCE_IO ? "I/O" : "mem",
950 bar + 1, /* PCI BAR # */
951 pci_resource_len(pdev, bar), pci_resource_start(pdev, bar),
952 res_name);
953 return -EBUSY;
954}
955
956void pci_release_region(struct pci_dev *pdev, int bar)
957{
958 int flags;
959
960 if (pci_resource_len(pdev, bar) == 0)
961 return;
962 flags = pci_get_flags(pdev, bar);
963 if (flags & IORESOURCE_IO) {
964 release_region(pci_resource_start(pdev, bar),
965 pci_resource_len(pdev, bar));
966 }
967 else if (flags & IORESOURCE_MEM) {
968 release_mem_region(pci_resource_start(pdev, bar),
969 pci_resource_len(pdev, bar));
970 }
971}
972
973int pci_request_regions(struct pci_dev *pdev, char *res_name)
974{
975 int i;
976
977 for (i = 0; i < 6; i++)
978 if (pci_request_region(pdev, i, res_name))
979 goto err;
980 return 0;
981 err:
982 while (--i >= 0)
983 pci_release_region(pdev, i);
984 return -EBUSY;
985}
986
987void pci_release_regions(struct pci_dev *pdev)
988{
989 int i;
990 for (i = 0; i < 6; i++)
991 pci_release_region(pdev, i);
992}
993
994const struct pci_device_id * pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev)
995{
996 u16 subsystem_vendor, subsystem_device;
997
998 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
999 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &subsystem_device);
1000
1001 while (ids->vendor || ids->subvendor || ids->class_mask) {
1002 if ((ids->vendor == PCI_ANY_ID || ids->vendor == dev->vendor) &&
1003 (ids->device == PCI_ANY_ID || ids->device == dev->device) &&
1004 (ids->subvendor == PCI_ANY_ID || ids->subvendor == subsystem_vendor) &&
1005 (ids->subdevice == PCI_ANY_ID || ids->subdevice == subsystem_device) &&
1006 !((ids->class ^ dev->class) & ids->class_mask))
1007 return ids;
1008 ids++;
1009 }
1010 return NULL;
1011}
1012
1013/** snd_pci_dev_present
1014 * Called by: various sound drivers
1015 */
1016int snd_pci_dev_present(const struct pci_device_id *ids)
1017{
1018 while (ids->vendor || ids->subvendor)
1019 {
1020 if (pci_find_device(ids->vendor, ids->subvendor, NULL)) return 1;
1021 ids++;
1022 }
1023 return 0;
1024}
1025
1026//******************************************************************************
1027//******************************************************************************
1028OSSRET OSS32_APMResume()
1029{
1030 int i;
1031 struct pci_driver *driver;
1032
1033 dprintf(("OSS32_APMResume"));
1034
1035 for(i=0;i<MAX_PCI_DEVICES;i++)
1036 {
1037 if(pci_devices[i].devfn)
1038 {
1039 RMSetHandles(pci_devices[i].hAdapter); /* DAZ - dirty hack */
1040 driver = pci_devices[i].pcidriver;
1041 if(driver && driver->resume) {
1042 driver->resume(&pci_devices[i]);
1043 }
1044 }
1045 }
1046
1047 return OSSERR_SUCCESS;
1048}
1049//******************************************************************************
1050//******************************************************************************
1051OSSRET OSS32_APMSuspend()
1052{
1053 int i;
1054 struct pci_driver *driver;
1055
1056 dprintf(("OSS32_APMSuspend 1"));
1057
1058 for(i=0;i<MAX_PCI_DEVICES;i++)
1059 {
1060 if(pci_devices[i].devfn)
1061 {
1062 RMSetHandles(pci_devices[i].hAdapter); /* DAZ - dirty hack */
1063 driver = pci_devices[i].pcidriver;
1064 if(driver && driver->suspend) {
1065 driver->suspend(&pci_devices[i], SNDRV_CTL_POWER_D3cold);
1066 }
1067 }
1068 }
1069
1070 dprintf(("OSS32_APMSuspend 2"));
1071 return OSSERR_SUCCESS;
1072}
1073
1074#ifdef USE_MSI
1075extern int __syscall UniMsiAlloc(USHORT usBusDevFunc, ULONG *pulCount, UCHAR *pucIrq);
1076int snd_pci_enable_msi(struct pci_dev *dev)
1077{
1078 ULONG p;
1079 UCHAR irq;
1080
1081 if (dev->irq_pin)
1082 {
1083 p = 1; /* int count */
1084 if (UniMsiAlloc((dev->bus->number<<8) | dev->devfn, &p, &irq)) return -1;
1085 /* we have an msi interrupt */
1086 dev->irq = irq;
1087 dev->irq_pin = 0;
1088 }
1089 return 0;
1090}
1091#else
1092int snd_pci_enable_msi(struct pci_dev *dev)
1093{
1094 return -1;
1095}
1096#endif
1097
1098/**
1099 * pci_status_get_and_clear_errors - return and clear error bits in PCI_STATUS
1100 * @pdev: the PCI device
1101 *
1102 * Returns error bits set in PCI_STATUS and clears them.
1103 */
1104int pci_status_get_and_clear_errors(struct pci_dev *pdev)
1105{
1106 u16 status;
1107 int ret;
1108
1109 ret = pci_read_config_word(pdev, PCI_STATUS, &status);
1110 if (ret != PCIBIOS_SUCCESSFUL)
1111 return -EIO;
1112
1113 status &= PCI_STATUS_ERROR_BITS;
1114 if (status)
1115 pci_write_config_word(pdev, PCI_STATUS, status);
1116
1117 return status;
1118}
1119
1120struct region_devres {
1121 struct resource *parent;
1122 resource_size_t start;
1123 resource_size_t n;
1124};
1125
1126static void devm_region_release(struct device *dev, void *res)
1127{
1128 struct region_devres *this = res;
1129
1130 __release_region(this->parent, this->start, this->n);
1131}
1132
1133struct resource *
1134__devm_request_region(struct device *dev, struct resource *parent,
1135 resource_size_t start, resource_size_t n, const char *name)
1136{
1137 struct region_devres *dr = NULL;
1138 struct resource *res;
1139
1140 dr = devres_alloc(devm_region_release, sizeof(struct region_devres),
1141 GFP_KERNEL);
1142 if (!dr)
1143 return NULL;
1144
1145 dr->parent = parent;
1146 dr->start = start;
1147 dr->n = n;
1148
1149 res = __request_region(parent, start, n, name);
1150 if (res)
1151 devres_add(dev, dr);
1152 else
1153 devres_free(dr);
1154
1155 return res;
1156}
1157EXPORT_SYMBOL(__devm_request_region);
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