source: GPL/branches/uniaud32-next/lib32/pci.c@ 719

Last change on this file since 719 was 719, checked in by Paul Smedley, 3 years ago

Tidy ups, and fix non-HDA hardware

File size: 34.1 KB
Line 
1/* $Id: pci.c,v 1.1.1.1 2003/07/02 13:57:02 eleph Exp $ */
2/*
3 * OS/2 implementation of Linux PCI functions (using direct port I/O)
4 *
5 * (C) 2000-2002 InnoTek Systemberatung GmbH
6 * (C) 2000-2001 Sander van Leeuwen (sandervl@xs4all.nl)
7 * Copyright (c) 2016-2017 David Azarewicz <david@88watts.net>
8 *
9 * Parts based on Linux kernel sources
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this program; if not, write to the Free
23 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
24 * USA.
25 *
26 */
27#define CONFIG_PM
28#include "linux.h"
29#include <linux/init.h>
30#include <linux/poll.h>
31#include <linux/dma-mapping.h>
32#include <asm/uaccess.h>
33#include <asm/hardirq.h>
34#include <asm/io.h>
35#include <sound/config.h>
36#include <sound/core.h>
37#include <sound/asound.h>
38
39#define LINUX
40#include <ossidc.h>
41#include <stacktoflat.h>
42#include <dbgos2.h>
43#include <osspci.h>
44
45#define MAX_PCI_BUSSES 256
46#define MAX_PCI_DEVICES 16
47
48struct pci_dev pci_devices[MAX_PCI_DEVICES] = {0};
49//struct pci_bus pci_busses[MAX_PCI_BUSSES] = {0};
50
51extern int nrCardsDetected;
52extern int iAdapterNumber;
53
54
55#define PCI_CONFIG_ENABLE 0x80000000
56#define PCI_CONFIG_ADDRESS 0xCF8
57#define PCI_CONFIG_DATA 0xCFC
58
59//******************************************************************************
60#define CONFIG_CMD(dev, where) \
61 (PCI_CONFIG_ENABLE | (dev->bus->number<<16) | (dev->devfn<<8) | (where & ~3))
62//******************************************************************************
63int pci_read_config_byte(struct pci_dev *dev, int where, u8 *value)
64{
65 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
66 *value = inb(PCI_CONFIG_DATA + (where&3));
67 return PCIBIOS_SUCCESSFUL;
68}
69//******************************************************************************
70//******************************************************************************
71int pci_read_config_word(struct pci_dev *dev, int where, u16 *value)
72{
73 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
74 *value = inw(PCI_CONFIG_DATA + (where&2));
75 return PCIBIOS_SUCCESSFUL;
76}
77//******************************************************************************
78//******************************************************************************
79int pci_read_config_dword(struct pci_dev *dev, int where, u32 *value)
80{
81 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
82 *value = inl(PCI_CONFIG_DATA);
83 return PCIBIOS_SUCCESSFUL;
84}
85//******************************************************************************
86//******************************************************************************
87int pci_write_config_byte(struct pci_dev *dev, int where, u8 value)
88{
89 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
90 outb(value, PCI_CONFIG_DATA + (where&3));
91 return PCIBIOS_SUCCESSFUL;
92}
93//******************************************************************************
94//******************************************************************************
95int pci_write_config_word(struct pci_dev *dev, int where, u16 value)
96{
97 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
98 outw(value, PCI_CONFIG_DATA + (where&2));
99 return PCIBIOS_SUCCESSFUL;
100}
101//******************************************************************************
102//******************************************************************************
103int pci_write_config_dword(struct pci_dev *dev, int where, u32 value)
104{
105 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
106 outl(value, PCI_CONFIG_DATA);
107 return PCIBIOS_SUCCESSFUL;
108}
109//******************************************************************************
110//******************************************************************************
111int pcidev_prepare(struct pci_dev *dev)
112{
113 dprintf(("pcidev_prepare %x not implemented", dev));
114 return 1; //todo: correct return value??
115}
116//******************************************************************************
117//******************************************************************************
118int pcidev_activate(struct pci_dev *dev)
119{
120 dprintf(("pcidev_activate %x not implemented", dev));
121 return 1; //todo: correct return value??
122}
123//******************************************************************************
124//******************************************************************************
125int pcidev_deactivate(struct pci_dev *dev)
126{
127 dprintf(("pcidev_deactivate %x not implemented", dev));
128 return 1; //todo: correct return value??
129}
130
131/**
132 * Called by: pci_find_device, register_driver
133 *
134 * Find the next matching PCI device starting with the device specified by ulLast
135 * Returns: the found device, pcidev filled in. Returns zero if no device found.
136 */
137 static ULONG pci_query_device(const struct pci_device_id *pIdTable, struct pci_dev near *pcidev, ULONG ulLast)
138{
139 int resNo, addr;
140 u32 devNr, busNr, funcNr, detectedId, cfgaddrreg, ulPciAdr, ulTmp1, ulTmp2;
141 u8 headerType;
142
143 busNr = (ulLast >> 8) & 0xff;
144 devNr = PCI_SLOT(ulLast);
145 funcNr = PCI_FUNC(ulLast);
146 if (ulLast) funcNr++;
147
148 cfgaddrreg = inl(PCI_CONFIG_ADDRESS);
149 for ( ; busNr<MAX_PCI_BUSSES; busNr++) //BusNumber<255
150 {
151 for( ; devNr<32; devNr++)
152 {
153 for( ; funcNr<8; funcNr++)
154 {
155 headerType = 0;
156 ulPciAdr = PCI_CONFIG_ENABLE | (busNr<<16) | (devNr<<11) | (funcNr<<8);
157 outl(ulPciAdr, PCI_CONFIG_ADDRESS);
158 detectedId = inl(PCI_CONFIG_DATA);
159
160 if ( detectedId == 0xffffffff )
161 {
162 if ( funcNr == 0 ) break; /* if func 0 isn't there, the others aren't either */
163 continue;
164 }
165
166 outl(ulPciAdr + PCI_CLASS_REVISION, PCI_CONFIG_ADDRESS);
167 ulTmp2 = inl(PCI_CONFIG_DATA) >> 8; /* get class */
168
169 //dprintf(("Found: %x Class=%x need: %x%x class=%x", detectedId, ulTmp2, pIdTable->device&0xffff, pIdTable->vendor, pIdTable->class));
170
171 if ( pIdTable->class )
172 {
173 if ( (ulTmp2 & pIdTable->class_mask) != pIdTable->class ) continue;
174 }
175
176 if ( pIdTable->vendor && (pIdTable->vendor != (detectedId & 0xffff)) ) continue;
177 if ( pIdTable->device && (pIdTable->device != PCI_ANY_ID) && (pIdTable->device != (detectedId >> 16)) ) continue;
178
179 outl(ulPciAdr | (PCI_HEADER_TYPE & ~3), PCI_CONFIG_ADDRESS);
180 headerType = inb(PCI_CONFIG_DATA + (PCI_HEADER_TYPE & 3));
181
182 if ( (headerType & 0x7f) != PCI_HEADER_TYPE_NORMAL ) continue;
183
184 memset((void near *)pcidev, 0, sizeof(struct pci_dev));
185
186 pcidev->class = ulTmp2;
187 pcidev->vendor = detectedId & 0xffff;
188 pcidev->device = detectedId >> 16;
189 //pcidev->bus = &pci_busses[busNr];
190 pcidev->bus = kmalloc(sizeof(struct pci_bus), GFP_KERNEL);
191 if (pcidev->bus == NULL) return 0;
192 memset (pcidev->bus, 0, sizeof(struct pci_bus));
193 pcidev->bus->number = busNr;
194 pcidev->devfn = PCI_DEVFN(devNr, funcNr);
195 pcidev->hdr_type = headerType & 0x7f;
196
197 pcidev->prepare = pcidev_prepare;
198 pcidev->activate = pcidev_activate;
199 pcidev->deactivate = pcidev_deactivate;
200 pcidev->active = 1;
201 pcidev->ro = 0;
202 pcidev->sibling = NULL;
203 pcidev->next = NULL;
204 pcidev->dma_mask = 0xffffffff;
205 pcidev->dev.dma_mask = &pcidev->dma_mask;
206 pcidev->dev.coherent_dma_mask = 0xffffffffull;
207 INIT_LIST_HEAD(&pcidev->dev.devres_head);
208
209 // Subsystem ID
210 pci_read_config_word(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &pcidev->subsystem_vendor);
211 pci_read_config_word(pcidev, PCI_SUBSYSTEM_ID, &pcidev->subsystem_device);
212
213 // revision
214 pci_read_config_byte(pcidev, PCI_REVISION_ID, &pcidev->revision);
215
216 // I/O and MEM
217 resNo = 0;
218 for( addr = PCI_BASE_ADDRESS_0; addr <= PCI_BASE_ADDRESS_5; addr += 4 )
219 {
220 pci_read_config_dword(pcidev, addr, &ulTmp1);
221 if( ulTmp1 != 0 && ulTmp1 != 0xffffffff )
222 {
223 pci_write_config_dword(pcidev, addr, 0xffffffff);
224 pci_read_config_dword(pcidev, addr, &ulTmp2);
225 pci_write_config_dword(pcidev, addr, ulTmp1);
226
227 if( ulTmp1 & PCI_BASE_ADDRESS_SPACE_IO )
228 {
229 pcidev->resource[resNo].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
230 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_IO_MASK;
231 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
232 ~(ulTmp2 & PCI_BASE_ADDRESS_IO_MASK) + 1;
233 }
234 else
235 {
236 pcidev->resource[resNo].flags = IORESOURCE_MEM | IORESOURCE_MEM_WRITEABLE;
237 pcidev->resource[resNo].start = ulTmp1 & PCI_BASE_ADDRESS_MEM_MASK;
238 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
239 ~(ulTmp2 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
240 }
241
242 resNo++;
243 }
244 }
245
246 // IRQ and PIN
247 pci_read_config_dword(pcidev, PCI_INTERRUPT_LINE, &ulTmp1);
248 //rprintf(("pci_query_device: PCI config IRQ=%d", ulTmp1&0xff));
249 if( (u8)ulTmp1 && (u8)ulTmp1 != 0xff )
250 {
251 pcidev->irq_resource[0].flags = IORESOURCE_IRQ;
252 pcidev->irq_resource[0].start = pcidev->irq_resource[0].end = ulTmp1 & 0xffff;
253 pcidev->irq = (u8)ulTmp1; // This is the interrupt used for init time processing
254 pcidev->irq_pin = ulTmp1>>8;
255 }
256
257 return ((busNr << 8) | PCI_DEVFN(devNr, funcNr));
258 } /* for funcNr */
259 funcNr = 0;
260 } /* for devNr */
261 devNr = 0;
262 }
263 outl(cfgaddrreg, PCI_CONFIG_ADDRESS);
264 return 0;
265}
266
267/**
268 * Called by: snd_pci_dev_present, various sound drivers
269 *
270 * Find the requested device
271 */
272struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
273{
274 int i;
275 struct pci_device_id id_table;
276
277 for(i=0; i<MAX_PCI_DEVICES; i++)
278 {
279 if ( pci_devices[i].devfn && (pci_devices[i].vendor == vendor) && (pci_devices[i].device == device) ) return &pci_devices[i];
280 }
281
282 for(i=0; i<MAX_PCI_DEVICES; i++)
283 {
284 if(pci_devices[i].devfn == 0)
285 {
286 memset(&id_table, 0, sizeof(id_table));
287 id_table.vendor = vendor;
288 id_table.device = device;
289 if( pci_query_device(&id_table, (struct pci_dev near *)&pci_devices[i], 0) ) return &pci_devices[i];
290 else break;
291 }
292 }
293
294 return NULL;
295}
296
297/** __request_region
298 */
299struct resource * __request_region(struct resource *a, unsigned long start, unsigned long n, const char *name)
300{
301 struct resource *resource;
302
303 if(a->flags & IORESOURCE_MEM) {
304 if(RMRequestMem(/*hResMgr,*/ start, n) == FALSE) {
305 printk("RMRequestIO failed for mem %x length %x\n", start, n);
306 return NULL;
307 }
308 }
309 else if(a->flags & IORESOURCE_IO) {
310 if(RMRequestIO(/*hResMgr,*/ start, n) == FALSE) {
311 printk("RMRequestIO failed for io %x length %x\n", start, n);
312 return NULL;
313 }
314 }
315
316 resource = kmalloc(sizeof(struct resource), GFP_KERNEL);
317 if (resource == NULL)
318 return NULL;
319 resource->name = name;
320 resource->start = start;
321 resource->end = start + n; // - 1;
322 resource->flags = a->flags;
323 resource->parent =
324 resource->child = NULL;
325
326 // insert in list
327 resource->sibling = a->sibling;
328 a->sibling = resource;
329
330 return resource;
331}
332
333/**
334 */
335void __release_region(struct resource *a, unsigned long start, unsigned long n)
336{
337 struct resource *resource;
338 struct resource **ppres = &a->sibling;
339 unsigned long end = start + n; // - 1;
340
341 while( *ppres )
342 {
343 resource = *ppres;
344
345 if( resource->start == start && resource->end == end )
346 {
347 // remove from list
348 *ppres = resource->sibling;
349 kfree(resource);
350 return;
351 }
352
353 ppres = &resource->sibling;
354 }
355}
356
357/**
358 */
359int pci_get_flags (struct pci_dev *dev, int n_base)
360{
361 if(n_base >= DEVICE_COUNT_RESOURCE || !dev->resource[n_base].flags) {
362 DebugInt3();
363 return 0;
364 }
365 return dev->resource[n_base].flags;
366}
367
368/**
369 */
370int pcibios_present(void)
371{
372 printk("pcibios_present -> pretend BIOS present\n");
373 return 1;
374}
375
376/**
377 */
378struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn)
379{
380 printk("pci_find_slot %d %x not implemented!!\n", bus, devfn);
381 DebugInt3();
382 return NULL;
383}
384
385/**
386 */
387int pci_dma_supported(struct pci_dev *dev, unsigned long mask)
388{
389 printk("pci_dma_supported: return TRUE\n");
390 return 1;
391}
392
393/**
394 */
395int pci_find_capability(struct pci_dev *dev, int cap)
396{
397 u16 status;
398 u8 pos, id;
399 int ttl = 48;
400
401 pci_read_config_word(dev, PCI_STATUS, &status);
402 if (!(status & PCI_STATUS_CAP_LIST))
403 return 0;
404 pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
405 while (ttl-- && pos >= 0x40) {
406 pos &= ~3;
407 pci_read_config_byte(dev, pos + PCI_CAP_LIST_ID, &id);
408 if (id == 0xff)
409 break;
410 if (id == cap)
411 return pos;
412 pci_read_config_byte(dev, pos + PCI_CAP_LIST_NEXT, &pos);
413 }
414 return 0;
415}
416
417/**
418 * Set power management state of a device. For transitions from state D3
419 * it isn't as straightforward as one could assume since many devices forget
420 * their configuration space during wakeup. Returns old power state.
421 */
422int pci_set_power_state(struct pci_dev *dev, int new_state)
423{
424 u32 base[5], romaddr;
425 u16 pci_command, pwr_command;
426 u8 pci_latency, pci_cacheline;
427 int i, old_state;
428 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
429
430 if (!pm)
431 return 0;
432 pci_read_config_word(dev, pm + PCI_PM_CTRL, &pwr_command);
433 old_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
434 if (old_state == new_state)
435 return old_state;
436 if (old_state == 3) {
437 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
438 pci_write_config_word(dev, PCI_COMMAND, pci_command & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
439 for (i = 0; i < 5; i++)
440 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, &base[i]);
441 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &romaddr);
442 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &pci_latency);
443 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_cacheline);
444 pci_write_config_word(dev, pm + PCI_PM_CTRL, new_state);
445 for (i = 0; i < 5; i++)
446 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, base[i]);
447 pci_write_config_dword(dev, PCI_ROM_ADDRESS, romaddr);
448 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
449 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cacheline);
450 pci_write_config_byte(dev, PCI_LATENCY_TIMER, pci_latency);
451 pci_write_config_word(dev, PCI_COMMAND, pci_command);
452 } else
453 pci_write_config_word(dev, pm + PCI_PM_CTRL, (pwr_command & ~PCI_PM_CTRL_STATE_MASK) | new_state);
454 return old_state;
455}
456
457/**
458 * pcim_enable_device - Managed pci_enable_device()
459 * @pdev: PCI device to be initialized
460 *
461 * Managed pci_enable_device().
462 */
463int pcim_enable_device(struct pci_dev *pdev)
464{
465 int rc;
466
467 rc = pci_enable_device(pdev);
468 return rc;
469}
470
471/**
472 * Initialize device before it's used by a driver. Ask low-level code
473 * to enable I/O and memory. Wake up the device if it was suspended.
474 * Beware, this function can fail.
475 */
476int pci_enable_device(struct pci_dev *dev)
477{
478 u16 pci_command;
479
480 dprintf(("pci_enable_device %x\n", dev));
481
482 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
483 pci_write_config_word(dev, PCI_COMMAND, pci_command | (PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
484 pci_set_power_state(dev, 0);
485 return 0;
486}
487
488/** pci_register_driver
489 *
490 * probes and registers a sound driver with RM.
491 *
492 * Returns: number of cards found.
493 */
494int pci_register_driver(struct pci_driver *driver)
495{
496 int iNumCards, iTmp;
497 ULONG ulLast;
498 struct pci_dev *pcidev;
499 struct pci_device_id IdTable;
500 USHORT usVendor, usDevice;
501 int iAdapter = 0;
502
503 if (!driver->probe) return 0;
504
505 iNumCards = 0;
506
507 /* find an empty slot */
508 for (iTmp=0; iTmp<MAX_PCI_DEVICES; iTmp++)
509 {
510 if (pci_devices[iTmp].devfn == 0) break;
511 }
512 if (iTmp >= MAX_PCI_DEVICES) return 0;
513 pcidev = &pci_devices[iTmp];
514
515 memset(&IdTable, 0, sizeof(IdTable));
516 IdTable.class = 0x000400 << 8; /* Any multimedia device */
517 IdTable.class_mask = 0xffff00 << 8;
518 ulLast = 0;
519 while( (ulLast = pci_query_device(&IdTable, pcidev, ulLast)) != 0 )
520 {
521 int iTableIx;
522
523 rprintf((__func__": query_device found %x %04x:%04x class=%x checking %s",
524 ulLast, pcidev->vendor, pcidev->device, pcidev->class, driver->name));
525
526 usVendor = 0;
527 usDevice = 0;
528
529 for( iTableIx = 0; driver->id_table[iTableIx].vendor; iTableIx++)
530 {
531 struct pci_device_id const *pDriverId = &driver->id_table[iTableIx];
532
533 if ( (pDriverId->class) && ((pcidev->class & pDriverId->class_mask) != pDriverId->class) ) continue;
534 if (pDriverId->vendor != pcidev->vendor) continue;
535 if ( (pDriverId->device != PCI_ANY_ID) && (pDriverId->device != pcidev->device) ) continue;
536
537 /* skip a duplicate device that could be matched by both and exact match and a class match */
538 if (usVendor == pcidev->vendor && usDevice == pcidev->device) continue;
539 usVendor = pcidev->vendor;
540 usDevice = pcidev->device;
541
542 rprintf((__func__": matched %d %x:%x/%x with %x:%x/%x %x (%s)", iTableIx,
543 pcidev->vendor, pcidev->device, pcidev->class,
544 pDriverId->vendor, pDriverId->device, pDriverId->class, pDriverId->class_mask, driver->name));
545
546 if ((iAdapterNumber >= 0) && (iAdapter < iAdapterNumber))
547 {
548 rprintf((__func__": AdapterNumber=%x skipping Adapter=%x", iAdapterNumber, iAdapter));
549 iAdapter++;
550 continue;
551 }
552
553 if (driver->probe(pcidev, pDriverId) == 0)
554 {
555 pcidev->pcidriver = (void *)driver;
556 pcidev->current_state = 4;
557
558 // create adapter
559 RMCreateAdapterU32((pcidev->device << 16) | pcidev->vendor, &pcidev->hAdapter, ulLast, iNumCards);
560
561 iNumCards++;
562 pcidev = NULL; /* we need a new slot */
563 break;
564 }
565 // release resources which were possibly allocated during probe()
566 RMDeallocRes();
567 } /* for id_table loop */
568
569 if (pcidev)
570 {
571 kfree(pcidev->bus);
572 pcidev->devfn = 0;
573 }
574 else
575 {
576 if (iAdapterNumber >= 0) break;
577 /* find another empty slot */
578 for (iTmp=0; iTmp<MAX_PCI_DEVICES; iTmp++)
579 {
580 if (pci_devices[iTmp].devfn == 0) break;
581 }
582 if (iTmp >= MAX_PCI_DEVICES) break;
583 pcidev = &pci_devices[iTmp];
584 }
585 } /* pci_query_device loop */
586
587 return iNumCards;
588}
589
590/**
591 */
592int pci_module_init(struct pci_driver *drv)
593{
594 int res = pci_register_driver(drv);
595 if (res == 0) return -ENODEV;
596 return res;
597}
598
599/**
600 */
601int pci_unregister_driver(struct pci_driver *driver)
602{
603 struct pci_dev *pcidev;
604 int i, j;
605
606 for (i=0; driver->id_table[i].vendor; i++) {
607 for(j=0; j<MAX_PCI_DEVICES; j++) {
608 pcidev = &pci_devices[j];
609 if (pcidev->devfn == 0) continue;
610 if (pcidev->vendor != driver->id_table[i].vendor) continue;
611 if ( (driver->id_table[i].device != PCI_ANY_ID) && (pcidev->device != driver->id_table[i].device) ) continue;
612 dprintf(("pci unreg match: %x:%x %x:%x", pci_devices[j].vendor, pci_devices[j].device, driver->id_table[i].vendor, driver->id_table[i].device));
613 if (driver->remove) driver->remove(pcidev);
614 kfree(pcidev->bus);
615 pcidev->devfn = 0;
616 }
617 }
618 return 0;
619}
620
621/**
622 */
623void pci_set_master(struct pci_dev *dev)
624{
625 u16 cmd;
626
627 pci_read_config_word(dev, PCI_COMMAND, &cmd);
628 if (! (cmd & PCI_COMMAND_MASTER)) {
629 dprintf(("pci_set_master %x", dev));
630 cmd |= PCI_COMMAND_MASTER;
631 pci_write_config_word(dev, PCI_COMMAND, cmd);
632 }
633 return;
634}
635
636/**
637 * Register a device with power management
638 */
639struct pm_dev *pm_register(pm_dev_t type, unsigned long id, pm_callback callback)
640{
641 dprintf(("pm_register STUB"));
642 DebugInt3();
643 return NULL;
644}
645
646/**
647 * Unregister a device with power management
648 */
649void pm_unregister(struct pm_dev *dev)
650{
651 dprintf(("pm_unregister STUB"));
652}
653
654/**
655 */
656int __compat_get_order(unsigned long size)
657{
658 int order;
659
660 size = (size-1) >> (PAGE_SHIFT-1);
661 order = -1;
662 do {
663 size >>= 1;
664 order++;
665 } while (size);
666 return order;
667}
668
669/**
670 */
671void *pci_alloc_consistent(struct pci_dev *hwdev,
672 long size, dma_addr_t *dma_handle)
673{
674 void *ret = NULL;
675 int gfp = GFP_ATOMIC;
676 int order;
677 dprintf(("pci_alloc_consistent %d mask %x", size, (hwdev) ? hwdev->dma_mask : 0));
678 if (hwdev == NULL || hwdev->dma_mask != 0xffffffff) {
679 //try not to exhaust low memory (< 16mb) so allocate from the high region first
680 //if that doesn't satisfy the dma mask requirement, then get it from the low
681 //region anyway
682 if(hwdev->dma_mask > 0x00ffffff) {
683 order = __compat_get_order(size);
684 ret = (void *)__get_free_pages(gfp|GFP_DMAHIGHMEM, order);
685 *dma_handle = virt_to_bus(ret);
686 if(*dma_handle > hwdev->dma_mask) {
687 free_pages((unsigned long)ret, __compat_get_order(size));
688 //be sure and allocate below 16 mb
689 gfp |= GFP_DMA;
690 ret = NULL;
691 }
692 }
693 else { //must always allocate below 16 mb
694 gfp |= GFP_DMA;
695 }
696 }
697 if(ret == NULL) {
698 ret = (void *)__get_free_pages(gfp, __compat_get_order(size));
699 }
700 if (ret != NULL) {
701 memset(ret, 0, size);
702 *dma_handle = virt_to_bus(ret);
703 }
704 return ret;
705}
706
707#if 0
708void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
709 dma_addr_t *dma_handle)
710 {
711 return dma_alloc_coherent(hwdev == NULL ? NULL : &hwdev->dev, size, dma_handle, GFP_ATOMIC);
712 }
713#endif
714#if 0
715void *dma_alloc_coherent(struct device *dev, size_t size,
716 dma_addr_t *dma_handle, gfp_t gfp)
717{
718 void *ret = NULL;
719 int order;
720
721 dprintf(("dma_alloc_coherent %d mask %x", size, (dev) ? dev->dma_mask : 0));
722 if (dev == NULL || *dev->dma_mask != 0xffffffff) {
723 dprintf(("dma_alloc_coherent"));
724 //try not to exhaust low memory (< 16mb) so allocate from the high region first
725 //if that doesn't satisfy the dma mask requirement, then get it from the low
726 //region anyway
727 if(*dev->dma_mask > 0x00ffffff) {
728 dprintf(("dma_alloc_coherent2"));
729 order = __compat_get_order(size);
730 ret = (void *)__get_free_pages(gfp|GFP_DMAHIGHMEM, order);
731 *dma_handle = virt_to_bus(ret);
732 if(*dma_handle > *dev->dma_mask) {
733 dprintf(("dma_alloc_coherent3"));
734 free_pages((unsigned long)ret, __compat_get_order(size));
735 //be sure and allocate below 16 mb
736 gfp |= GFP_DMA;
737 ret = NULL;
738 }
739 dprintf(("dma_alloc_coherent3a"));
740 }
741 else { //must always allocate below 16 mb
742 dprintf(("dma_alloc_coherent4"));
743 gfp |= GFP_DMA;
744 }
745 }
746 if(ret == NULL) {
747 dprintf(("dma_alloc_coherent5"));
748 ret = (void *)__get_free_pages(gfp, __compat_get_order(size));
749 }
750
751 if (ret != NULL) {
752 memset(ret, 0, size);
753 *dma_handle = virt_to_bus(ret);
754 }
755 return ret;
756
757}
758#endif
759
760int dma_supported(struct device *dev, u64 mask)
761{
762 return 1;
763}
764
765int dma_set_coherent_mask(struct device *dev, u64 mask)
766{
767 /*
768 * Truncate the mask to the actually supported dma_addr_t width to
769 * avoid generating unsupportable addresses.
770 */
771 mask = (dma_addr_t)mask;
772
773 if (!dma_supported(dev, mask))
774 return -EIO;
775
776 dev->coherent_dma_mask = mask;
777 return 0;
778}
779
780int dma_set_mask(struct device *dev, u64 mask)
781{
782 /*
783 * Truncate the mask to the actually supported dma_addr_t width to
784 * avoid generating unsupportable addresses.
785 */
786 mask = (dma_addr_t)mask;
787
788 if (!dev->dma_mask || !dma_supported(dev, mask))
789 return -EIO;
790
791 *dev->dma_mask = mask;
792 return 0;
793}
794
795/**
796 */
797void pci_free_consistent(struct pci_dev *hwdev, long size,
798 void *vaddr, dma_addr_t dma_handle)
799{
800 free_pages((unsigned long)vaddr, __compat_get_order(size));
801}
802
803/**
804 */
805void pci_set_driver_data (struct pci_dev *dev, void *driver_data)
806{
807 if (dev)
808 dev->driver_data = driver_data;
809}
810
811/**
812 */
813void *pci_get_driver_data (struct pci_dev *dev)
814{
815 if (dev)
816 return dev->driver_data;
817 return 0;
818}
819
820/**
821 */
822unsigned long pci_get_dma_mask (struct pci_dev *dev)
823{
824 if (dev)
825 return dev->dma_mask;
826 return 0;
827}
828
829/**
830 */
831int release_resource(struct resource *newres)
832{
833 return 0;
834}
835
836/**
837 */
838int pci_set_latency_time(struct pci_dev *dev, int latency)
839{
840 pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
841 return 0;
842}
843
844/**
845 * pci_save_state - save the PCI configuration space of a device before suspending
846 * @dev: - PCI device that we're dealing with
847 * @buffer: - buffer to hold config space context
848 *
849 * @buffer must be large enough to hold the entire PCI 2.2 config space
850 * (>= 64 bytes).
851 */
852int pci_orig_save_state(struct pci_dev *dev, u32 *buffer)
853{
854 int i;
855 if (buffer) {
856 /* XXX: 100% dword access ok here? */
857 for (i = 0; i < 16; i++)
858 pci_read_config_dword(dev, i * 4,&buffer[i]);
859 }
860 return 0;
861}
862
863/**
864 * pci_restore_state - Restore the saved state of a PCI device
865 * @dev: - PCI device that we're dealing with
866 * @buffer: - saved PCI config space
867 *
868 */
869int pci_orig_restore_state(struct pci_dev *dev, u32 *buffer)
870{
871 int i;
872
873 if (buffer) {
874 for (i = 0; i < 16; i++)
875 pci_write_config_dword(dev,i * 4, buffer[i]);
876 }
877 /*
878 * otherwise, write the context information we know from bootup.
879 * This works around a problem where warm-booting from Windows
880 * combined with a D3(hot)->D0 transition causes PCI config
881 * header data to be forgotten.
882 */
883 else {
884 for (i = 0; i < 6; i ++)
885 pci_write_config_dword(dev,
886 PCI_BASE_ADDRESS_0 + (i * 4),
887 dev->resource[i].start);
888 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
889 }
890 return 0;
891}
892
893struct saved_config_tbl {
894 struct pci_dev *pci;
895 u32 config[16];
896};
897static struct saved_config_tbl saved_tbl[16];
898
899int pci_save_state(struct pci_dev *pci)
900{
901 int i;
902 /* FIXME: mutex needed for race? */
903 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
904 if (! saved_tbl[i].pci) {
905 saved_tbl[i].pci = pci;
906 pci_orig_save_state(pci, saved_tbl[i].config);
907 return 1;
908 }
909 }
910 printk(KERN_DEBUG "snd: no pci config space found!\n");
911 return 0;
912}
913
914int pci_restore_state(struct pci_dev *pci)
915{
916 int i;
917 /* FIXME: mutex needed for race? */
918 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
919 if (saved_tbl[i].pci == pci) {
920 saved_tbl[i].pci = NULL;
921 pci_orig_restore_state(pci, saved_tbl[i].config);
922 return 0;
923 }
924 }
925 printk(KERN_DEBUG "snd: no saved pci config!\n");
926 return 1;
927}
928
929void pci_disable_device(struct pci_dev *dev)
930{
931 u16 pci_command;
932
933 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
934 if (pci_command & PCI_COMMAND_MASTER) {
935 pci_command &= ~PCI_COMMAND_MASTER;
936 pci_write_config_word(dev, PCI_COMMAND, pci_command);
937 }
938}
939
940int pci_request_region(struct pci_dev *pdev, int bar, char *res_name)
941{
942 int flags;
943
944 if (pci_resource_len(pdev, bar) == 0)
945 return 0;
946 flags = pci_get_flags(pdev, bar);
947 if (flags & IORESOURCE_IO) {
948 if (check_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
949 goto err_out;
950 request_region(pci_resource_start(pdev, bar),
951 pci_resource_len(pdev, bar), res_name);
952 }
953 else if (flags & IORESOURCE_MEM) {
954 if (check_mem_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
955 goto err_out;
956 request_mem_region(pci_resource_start(pdev, bar),
957 pci_resource_len(pdev, bar), res_name);
958 }
959
960 return 0;
961
962err_out:
963 printk(KERN_WARNING "PCI: Unable to reserve %s region #%d:%lx@%lx for device %s\n",
964 flags & IORESOURCE_IO ? "I/O" : "mem",
965 bar + 1, /* PCI BAR # */
966 pci_resource_len(pdev, bar), pci_resource_start(pdev, bar),
967 res_name);
968 return -EBUSY;
969}
970
971void pci_release_region(struct pci_dev *pdev, int bar)
972{
973 int flags;
974
975 if (pci_resource_len(pdev, bar) == 0)
976 return;
977 flags = pci_get_flags(pdev, bar);
978 if (flags & IORESOURCE_IO) {
979 release_region(pci_resource_start(pdev, bar),
980 pci_resource_len(pdev, bar));
981 }
982 else if (flags & IORESOURCE_MEM) {
983 release_mem_region(pci_resource_start(pdev, bar),
984 pci_resource_len(pdev, bar));
985 }
986}
987
988int pci_request_regions(struct pci_dev *pdev, char *res_name)
989{
990 int i;
991
992 for (i = 0; i < 6; i++)
993 if (pci_request_region(pdev, i, res_name))
994 goto err;
995 return 0;
996 err:
997 while (--i >= 0)
998 pci_release_region(pdev, i);
999 return -EBUSY;
1000}
1001
1002void pci_release_regions(struct pci_dev *pdev)
1003{
1004 int i;
1005 for (i = 0; i < 6; i++)
1006 pci_release_region(pdev, i);
1007}
1008
1009const struct pci_device_id * pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev)
1010{
1011 u16 subsystem_vendor, subsystem_device;
1012
1013 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
1014 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &subsystem_device);
1015
1016 while (ids->vendor || ids->subvendor || ids->class_mask) {
1017 if ((ids->vendor == PCI_ANY_ID || ids->vendor == dev->vendor) &&
1018 (ids->device == PCI_ANY_ID || ids->device == dev->device) &&
1019 (ids->subvendor == PCI_ANY_ID || ids->subvendor == subsystem_vendor) &&
1020 (ids->subdevice == PCI_ANY_ID || ids->subdevice == subsystem_device) &&
1021 !((ids->class ^ dev->class) & ids->class_mask))
1022 return ids;
1023 ids++;
1024 }
1025 return NULL;
1026}
1027
1028/** snd_pci_dev_present
1029 * Called by: various sound drivers
1030 */
1031int snd_pci_dev_present(const struct pci_device_id *ids)
1032{
1033 while (ids->vendor || ids->subvendor)
1034 {
1035 if (pci_find_device(ids->vendor, ids->subvendor, NULL)) return 1;
1036 ids++;
1037 }
1038 return 0;
1039}
1040
1041struct pci_driver_mapping {
1042 struct pci_dev *dev;
1043 struct pci_driver *drv;
1044 unsigned long dma_mask;
1045 void *driver_data;
1046 u32 saved_config[16];
1047};
1048
1049#define PCI_MAX_MAPPINGS 64
1050static struct pci_driver_mapping drvmap [PCI_MAX_MAPPINGS] = { { NULL, } , };
1051
1052
1053static struct pci_driver_mapping *get_pci_driver_mapping(struct pci_dev *dev)
1054{
1055 int i;
1056
1057 for (i = 0; i < PCI_MAX_MAPPINGS; i++)
1058 if (drvmap[i].dev == dev)
1059 return &drvmap[i];
1060 return NULL;
1061}
1062
1063struct pci_driver *snd_pci_compat_get_pci_driver(struct pci_dev *dev)
1064{
1065 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
1066 if (map)
1067 return map->drv;
1068 return NULL;
1069}
1070#if 0
1071void * pci_get_drvdata (struct pci_dev *dev)
1072{
1073 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
1074 if (map)
1075 return map->driver_data;
1076 return NULL;
1077}
1078
1079
1080void pci_set_drvdata (struct pci_dev *dev, void *driver_data)
1081{
1082 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
1083 if (map)
1084 map->driver_data = driver_data;
1085}
1086#endif
1087
1088
1089//******************************************************************************
1090//******************************************************************************
1091OSSRET OSS32_APMResume()
1092{
1093 int i;
1094 struct pci_driver *driver;
1095
1096 dprintf(("OSS32_APMResume"));
1097
1098 for(i=0;i<MAX_PCI_DEVICES;i++)
1099 {
1100 if(pci_devices[i].devfn)
1101 {
1102 RMSetHandles(pci_devices[i].hAdapter); /* DAZ - dirty hack */
1103 driver = pci_devices[i].pcidriver;
1104 if(driver && driver->resume) {
1105 driver->resume(&pci_devices[i]);
1106 }
1107 }
1108 }
1109
1110 return OSSERR_SUCCESS;
1111}
1112//******************************************************************************
1113//******************************************************************************
1114OSSRET OSS32_APMSuspend()
1115{
1116 int i;
1117 struct pci_driver *driver;
1118
1119 dprintf(("OSS32_APMSuspend 1"));
1120
1121 for(i=0;i<MAX_PCI_DEVICES;i++)
1122 {
1123 if(pci_devices[i].devfn)
1124 {
1125 RMSetHandles(pci_devices[i].hAdapter); /* DAZ - dirty hack */
1126 driver = pci_devices[i].pcidriver;
1127 if(driver && driver->suspend) {
1128 driver->suspend(&pci_devices[i], SNDRV_CTL_POWER_D3cold);
1129 }
1130 }
1131 }
1132
1133 dprintf(("OSS32_APMSuspend 2"));
1134 return OSSERR_SUCCESS;
1135}
1136
1137#ifdef USE_MSI
1138extern int __syscall UniMsiAlloc(USHORT usBusDevFunc, ULONG *pulCount, UCHAR *pucIrq);
1139int snd_pci_enable_msi(struct pci_dev *dev)
1140{
1141 ULONG p;
1142 UCHAR irq;
1143
1144 if (dev->irq_pin)
1145 {
1146 p = 1; /* int count */
1147 if (UniMsiAlloc((dev->bus->number<<8) | dev->devfn, &p, &irq)) return -1;
1148 /* we have an msi interrupt */
1149 dev->irq = irq;
1150 dev->irq_pin = 0;
1151 }
1152 return 0;
1153}
1154#else
1155int snd_pci_enable_msi(struct pci_dev *dev)
1156{
1157 return -1;
1158}
1159#endif
1160
1161/**
1162 * pci_status_get_and_clear_errors - return and clear error bits in PCI_STATUS
1163 * @pdev: the PCI device
1164 *
1165 * Returns error bits set in PCI_STATUS and clears them.
1166 */
1167int pci_status_get_and_clear_errors(struct pci_dev *pdev)
1168{
1169 u16 status;
1170 int ret;
1171
1172 ret = pci_read_config_word(pdev, PCI_STATUS, &status);
1173 if (ret != PCIBIOS_SUCCESSFUL)
1174 return -EIO;
1175
1176 status &= PCI_STATUS_ERROR_BITS;
1177 if (status)
1178 pci_write_config_word(pdev, PCI_STATUS, status);
1179
1180 return status;
1181}
1182
1183struct region_devres {
1184 struct resource *parent;
1185 resource_size_t start;
1186 resource_size_t n;
1187};
1188
1189static void devm_region_release(struct device *dev, void *res)
1190{
1191 struct region_devres *this = res;
1192
1193 __release_region(this->parent, this->start, this->n);
1194}
1195
1196struct resource *
1197__devm_request_region(struct device *dev, struct resource *parent,
1198 resource_size_t start, resource_size_t n, const char *name)
1199{
1200 struct region_devres *dr = NULL;
1201 struct resource *res;
1202
1203 dr = devres_alloc(devm_region_release, sizeof(struct region_devres),
1204 GFP_KERNEL);
1205 if (!dr)
1206 return NULL;
1207
1208 dr->parent = parent;
1209 dr->start = start;
1210 dr->n = n;
1211
1212 res = __request_region(parent, start, n, name);
1213 if (res)
1214 devres_add(dev, dr);
1215 else
1216 devres_free(dr);
1217
1218 return res;
1219}
1220EXPORT_SYMBOL(__devm_request_region);
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