source: GPL/branches/uniaud-2.0/lib32/pci.c@ 304

Last change on this file since 304 was 289, checked in by Brendan Oakley, 17 years ago

pci_set_dma_mask needs to be int not void
File size: 32.6 KB
Line 
1/*
2 * OS/2 implementation of Linux PCI functions (using direct port I/O)
3 *
4 * (C) 2000-2002 InnoTek Systemberatung GmbH
5 * (C) 2000-2001 Sander van Leeuwen (sandervl@xs4all.nl)
6 *
7 * Parts based on Linux kernel sources
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this program; if not, write to the Free
21 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
22 * USA.
23 *
24 */
25
26#include "linux.h"
27#include <linux/init.h>
28#include <linux/poll.h>
29#include <asm/uaccess.h>
30#include <asm/hardirq.h>
31#include <asm/io.h>
32#include <sound/config.h>
33#include <sound/driver.h>
34#include <sound/asound.h>
35
36#define LINUX
37#include <ossidc.h>
38#include <stacktoflat.h>
39#include <dbgos2.h>
40#include <osspci.h>
41
42#define MAX_PCI_BUSSES 16
43#define MAX_PCI_DEVICES 16
44
45struct pci_dev pci_devices[MAX_PCI_DEVICES] = {0};
46struct pci_bus pci_busses[MAX_PCI_BUSSES] = {0};
47
48BOOL fSuspended = FALSE;
49extern int nrCardsDetected;
50
51
52#define PCI_CONFIG_ENABLE 0x80000000
53#define PCI_CONFIG_ADDRESS 0xCF8
54#define PCI_CONFIG_DATA 0xCFC
55
56
57//******************************************************************************
58#define CONFIG_CMD(dev, where) \
59 (PCI_CONFIG_ENABLE | (dev->bus->number<<16) | (dev->devfn<<8) | (where & ~3))
60//******************************************************************************
61int pci_read_config_byte(struct pci_dev *dev, int where, u8 *value)
62{
63 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
64 *value = inb(PCI_CONFIG_DATA + (where&3));
65 return PCIBIOS_SUCCESSFUL;
66}
67//******************************************************************************
68//******************************************************************************
69int pci_read_config_word(struct pci_dev *dev, int where, u16 *value)
70{
71 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
72 *value = inw(PCI_CONFIG_DATA + (where&2));
73 return PCIBIOS_SUCCESSFUL;
74}
75//******************************************************************************
76//******************************************************************************
77int pci_read_config_dword(struct pci_dev *dev, int where, u32 *value)
78{
79 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
80 *value = inl(PCI_CONFIG_DATA);
81 return PCIBIOS_SUCCESSFUL;
82}
83//******************************************************************************
84//******************************************************************************
85int pci_write_config_byte(struct pci_dev *dev, int where, u8 value)
86{
87 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
88 outb(value, PCI_CONFIG_DATA + (where&3));
89 return PCIBIOS_SUCCESSFUL;
90}
91//******************************************************************************
92//******************************************************************************
93int pci_write_config_word(struct pci_dev *dev, int where, u16 value)
94{
95 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
96 outw(value, PCI_CONFIG_DATA + (where&2));
97 return PCIBIOS_SUCCESSFUL;
98}
99//******************************************************************************
100//******************************************************************************
101int pci_write_config_dword(struct pci_dev *dev, int where, u32 value)
102{
103 outl(CONFIG_CMD(dev,where), PCI_CONFIG_ADDRESS);
104 outl(value, PCI_CONFIG_DATA);
105 return PCIBIOS_SUCCESSFUL;
106}
107//******************************************************************************
108//******************************************************************************
109int pcidev_prepare(struct pci_dev *dev)
110{
111 dprintf(("pcidev_prepare %x not implemented", dev));
112 return 1; //todo: correct return value??
113}
114//******************************************************************************
115//******************************************************************************
116int pcidev_activate(struct pci_dev *dev)
117{
118 dprintf(("pcidev_activate %x not implemented", dev));
119 return 1; //todo: correct return value??
120}
121//******************************************************************************
122//******************************************************************************
123int pcidev_deactivate(struct pci_dev *dev)
124{
125 dprintf(("pcidev_deactivate %x not implemented", dev));
126 return 1; //todo: correct return value??
127}
128
129
130
131//******************************************************************************
132//******************************************************************************
133static int pci_query_device(unsigned int vendor, unsigned int device,
134 struct pci_dev near *pcidev, int idx)
135{
136 int resNo, addr, found = 0;
137 u32 devNr, busNr, funcNr, detectedId, pciId, cfgaddrreg, temp, temp2;
138 u8 headerType;
139
140 pciId = (device << 16) | vendor;
141
142 cfgaddrreg = inl(PCI_CONFIG_ADDRESS);
143 for(busNr=0;busNr<MAX_PCI_BUSSES;busNr++) //BusNumber<255
144 {
145 for(devNr=0;devNr<32;devNr++)
146 {
147 for(funcNr=0;funcNr<8;funcNr++)
148 {
149 headerType = 0;
150 temp = PCI_CONFIG_ENABLE | (busNr<<16) | (devNr<<11) | (funcNr<<8);
151 outl(temp, PCI_CONFIG_ADDRESS);
152 detectedId = inl(PCI_CONFIG_DATA);
153 if( detectedId != 0xffffffff )
154 {
155 outl(temp | (PCI_HEADER_TYPE & ~3), PCI_CONFIG_ADDRESS);
156 headerType = inb(PCI_CONFIG_DATA + (PCI_HEADER_TYPE & 3));
157 }
158 // printk("det: %x (%x), need: %x\n", detectedId, headerType, pciId);
159
160 if( detectedId == pciId &&
161 (headerType & 0x7f) == PCI_HEADER_TYPE_NORMAL )
162 {
163 if( found++ == idx )
164 {
165 memset((void near *)pcidev, 0, sizeof(struct pci_dev));
166
167 pcidev->vendor = vendor;
168 pcidev->device = device;
169 pcidev->bus = &pci_busses[busNr];
170 pcidev->bus->number = busNr;
171 pcidev->devfn = (devNr << 3) | funcNr;
172 pcidev->hdr_type = headerType & 0x7f;
173
174 pcidev->prepare = pcidev_prepare;
175 pcidev->activate = pcidev_activate;
176 pcidev->deactivate = pcidev_deactivate;
177 pcidev->active = 1;
178 pcidev->ro = 0;
179 pcidev->sibling = NULL;
180 pcidev->next = NULL;
181 pcidev->dma_mask = 0xFFFFFFFF;
182
183 // Subsystem ID
184 pci_read_config_word(pcidev, PCI_SUBSYSTEM_VENDOR_ID,
185 &pcidev->subsystem_vendor);
186 pci_read_config_word(pcidev, PCI_SUBSYSTEM_ID,
187 &pcidev->subsystem_device);
188
189 // I/O and MEM
190 resNo = 0;
191 for( addr = PCI_BASE_ADDRESS_0; addr <= PCI_BASE_ADDRESS_5; addr += 4 )
192 {
193 pci_read_config_dword(pcidev, addr, &temp);
194 if( temp != 0 && temp != 0xffffffff )
195 {
196 pci_write_config_dword(pcidev, addr, 0xffffffff);
197 pci_read_config_dword(pcidev, addr, &temp2);
198 pci_write_config_dword(pcidev, addr, temp);
199
200 if( temp & PCI_BASE_ADDRESS_SPACE_IO )
201 {
202 pcidev->resource[resNo].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
203 pcidev->resource[resNo].start = temp & PCI_BASE_ADDRESS_IO_MASK;
204 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
205 ~(temp2 & PCI_BASE_ADDRESS_IO_MASK) + 1;
206 }
207 else
208 {
209 pcidev->resource[resNo].flags = IORESOURCE_MEM | IORESOURCE_MEM_WRITEABLE;
210 pcidev->resource[resNo].start = temp & PCI_BASE_ADDRESS_MEM_MASK;
211 pcidev->resource[resNo].end = pcidev->resource[resNo].start +
212 ~(temp2 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
213 }
214
215 resNo++;
216
217 }
218 }
219
220 // IRQ and PIN
221 pci_read_config_dword(pcidev, PCI_INTERRUPT_LINE, &temp);
222 if( (u8)temp && (u8)temp != 0xff )
223 {
224 pcidev->irq_resource[0].flags = IORESOURCE_IRQ;
225 pcidev->irq_resource[0].start =
226 pcidev->irq_resource[0].end = temp & 0xffff;
227 pcidev->irq = (u8)temp;
228 }
229
230 return 1;
231 }
232 }
233
234 // don't need to check more, if function 0 not present or single
235 if( funcNr == 0 && !(headerType & 0x80) ) break;
236 }
237 }
238 }
239 outl(cfgaddrreg, PCI_CONFIG_ADDRESS);
240 return 0;
241
242}
243
244//******************************************************************************
245//******************************************************************************
246struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
247{
248 int i, idx;
249
250 if((int)from < 8) {
251 idx = (int)from; // dirty hack
252 // return 0;
253 } else
254 idx = 0;
255
256 for(i=0;i<MAX_PCI_DEVICES;i++)
257 {
258 if(pci_devices[i].devfn == 0)
259 {
260 if( pci_query_device(vendor, device, (struct pci_dev near *)&pci_devices[i], idx) )
261 return &pci_devices[i];
262 else
263 break;
264 }
265 }
266
267 return NULL;
268}
269//******************************************************************************
270//******************************************************************************
271struct resource * __request_region(struct resource *a, unsigned long start,
272 unsigned long n, const char *name)
273{
274 struct resource *resource;
275
276 if(a->flags & IORESOURCE_MEM) {
277 if(RMRequestMem(/*hResMgr,*/ start, n) == FALSE) {
278 printk("RMRequestIO failed for io %x, length %x\n", start, n);
279 return NULL;
280 }
281 }
282 else if(a->flags & IORESOURCE_IO) {
283 if(RMRequestIO(/*hResMgr,*/ start, n) == FALSE) {
284 printk("RMRequestIO failed for io %x, length %x\n", start, n);
285 return NULL;
286 }
287 }
288
289 resource = kmalloc(sizeof(struct resource), GFP_KERNEL);
290 if (resource == NULL)
291 return NULL;
292 resource->name = name;
293 resource->start = start;
294 resource->end = start + n; // - 1;
295 resource->flags = a->flags;
296 resource->parent =
297 resource->child = NULL;
298
299 // insert in list
300 resource->sibling = a->sibling;
301 a->sibling = resource;
302
303 return resource;
304}
305//******************************************************************************
306//******************************************************************************
307void __release_region(struct resource *a,
308 unsigned long start, unsigned long n)
309{
310 struct resource *resource;
311 struct resource **ppres = &a->sibling;
312 unsigned long end = start + n; // - 1;
313
314 while( *ppres )
315 {
316 resource = *ppres;
317
318 if( resource->start == start && resource->end == end )
319 {
320 // remove from list
321 *ppres = resource->sibling;
322 kfree(resource);
323 return;
324 }
325
326 ppres = &resource->sibling;
327 }
328}
329//******************************************************************************
330//******************************************************************************
331int pci_get_flags (struct pci_dev *dev, int n_base)
332{
333 if(n_base >= DEVICE_COUNT_RESOURCE || !dev->resource[n_base].flags) {
334 DebugInt3();
335 return 0;
336 }
337 return dev->resource[n_base].flags;
338}
339//******************************************************************************
340//******************************************************************************
341int pcibios_present(void)
342{
343 printk("pcibios_present -> pretend BIOS present\n");
344 return 1;
345}
346//******************************************************************************
347//******************************************************************************
348struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn)
349{
350 printk("pci_find_slot %d %x not implemented!!\n", bus, devfn);
351 DebugInt3();
352 return NULL;
353}
354//******************************************************************************
355//******************************************************************************
356int pci_dma_supported(struct pci_dev *dev, unsigned long mask)
357{
358 printk("pci_dma_supported: return TRUE\n");
359 return 1;
360}
361//******************************************************************************
362//******************************************************************************
363int pci_find_capability(struct pci_dev *dev, int cap)
364{
365 u16 status;
366 u8 pos, id;
367 int ttl = 48;
368
369 pci_read_config_word(dev, PCI_STATUS, &status);
370 if (!(status & PCI_STATUS_CAP_LIST))
371 return 0;
372 pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
373 while (ttl-- && pos >= 0x40) {
374 pos &= ~3;
375 pci_read_config_byte(dev, pos + PCI_CAP_LIST_ID, &id);
376 if (id == 0xff)
377 break;
378 if (id == cap)
379 return pos;
380 pci_read_config_byte(dev, pos + PCI_CAP_LIST_NEXT, &pos);
381 }
382 return 0;
383}
384//******************************************************************************
385/*
386 * Set power management state of a device. For transitions from state D3
387 * it isn't as straightforward as one could assume since many devices forget
388 * their configuration space during wakeup. Returns old power state.
389 */
390//******************************************************************************
391int pci_set_power_state(struct pci_dev *dev, int new_state)
392{
393 u32 base[5], romaddr;
394 u16 pci_command, pwr_command;
395 u8 pci_latency, pci_cacheline;
396 int i, old_state;
397 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
398
399 if (!pm)
400 return 0;
401 pci_read_config_word(dev, pm + PCI_PM_CTRL, &pwr_command);
402 old_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
403 if (old_state == new_state)
404 return old_state;
405 if (old_state == 3) {
406 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
407 pci_write_config_word(dev, PCI_COMMAND, pci_command & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
408 for (i = 0; i < 5; i++)
409 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, &base[i]);
410 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &romaddr);
411 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &pci_latency);
412 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_cacheline);
413 pci_write_config_word(dev, pm + PCI_PM_CTRL, new_state);
414 for (i = 0; i < 5; i++)
415 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + i*4, base[i]);
416 pci_write_config_dword(dev, PCI_ROM_ADDRESS, romaddr);
417 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
418 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cacheline);
419 pci_write_config_byte(dev, PCI_LATENCY_TIMER, pci_latency);
420 pci_write_config_word(dev, PCI_COMMAND, pci_command);
421 } else
422 pci_write_config_word(dev, pm + PCI_PM_CTRL, (pwr_command & ~PCI_PM_CTRL_STATE_MASK) | new_state);
423 return old_state;
424}
425//******************************************************************************
426/*
427 * Initialize device before it's used by a driver. Ask low-level code
428 * to enable I/O and memory. Wake up the device if it was suspended.
429 * Beware, this function can fail.
430 */
431//******************************************************************************
432int pci_enable_device(struct pci_dev *dev)
433{
434 u16 pci_command;
435
436 printk("pci_enable_device %x\n", dev);
437
438 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
439 pci_write_config_word(dev, PCI_COMMAND, pci_command | (PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
440 pci_set_power_state(dev, 0);
441 return 0;
442}
443//******************************************************************************
444//******************************************************************************
445int pci_register_driver(struct pci_driver *driver)
446{
447 int i, j, dev_num;
448 struct pci_dev *pcidev;
449
450 for( i = 0; driver->id_table[i].vendor; i++)
451 {
452 dev_num = 0;
453 while( (pcidev = pci_find_device(driver->id_table[i].vendor,
454 driver->id_table[i].device,
455 (struct pci_dev *)dev_num)) != NULL )
456 {
457 RMInit();
458 if( driver->probe) {
459 printk("found: %x, id: %x idx %i\n",driver->id_table[i].vendor, driver->id_table[i].device, dev_num);
460
461 if(driver->probe(pcidev, &driver->id_table[i]) == 0) {
462 pcidev->pcidriver = (void *)driver;
463 pcidev->current_state = 4;
464
465 // create adapter
466 RMDone((driver->id_table[i].device << 16) | driver->id_table[i].vendor);
467 nrCardsDetected++;
468 return 1;
469 }
470 else pcidev->devfn = 0;
471 }
472
473 RMDone(0);
474
475 dev_num++;
476
477 }
478 }
479 return 0;
480}
481//******************************************************************************
482//******************************************************************************
483int pci_module_init(struct pci_driver *drv)
484{
485 int res = pci_register_driver(drv);
486 if (res < 0)
487 return res;
488 if (res == 0)
489 return -ENODEV;
490 return 0;
491}
492//******************************************************************************
493//******************************************************************************
494int pci_unregister_driver(struct pci_driver *driver)
495{
496 struct pci_dev *pcidev;
497 int i = 0, j;
498
499 while(driver->id_table[i].vendor)
500 {
501 for(j=0;j<MAX_PCI_DEVICES;j++)
502 {
503 if(pci_devices[j].vendor == driver->id_table[i].vendor &&
504 pci_devices[j].device == driver->id_table[i].device)
505 {
506 if(driver->remove) {
507 driver->remove(&pci_devices[j]);
508 }
509 }
510 }
511 i++;
512 }
513 return 0;
514}
515//******************************************************************************
516//******************************************************************************
517void pci_set_master(struct pci_dev *dev)
518{
519 u16 cmd;
520
521 pci_read_config_word(dev, PCI_COMMAND, &cmd);
522 if (! (cmd & PCI_COMMAND_MASTER)) {
523 dprintf(("pci_set_master %x", dev));
524 cmd |= PCI_COMMAND_MASTER;
525 pci_write_config_word(dev, PCI_COMMAND, cmd);
526 }
527 return;
528}
529//******************************************************************************
530// * Register a device with power management
531//******************************************************************************
532struct pm_dev *pm_register(pm_dev_t type, unsigned long id, pm_callback callback)
533{
534 dprintf(("pm_register STUB"));
535 DebugInt3();
536 return NULL;
537}
538//******************************************************************************
539// * Unregister a device with power management
540//******************************************************************************
541void pm_unregister(struct pm_dev *dev)
542{
543 dprintf(("pm_unregister STUB"));
544}
545//******************************************************************************
546//******************************************************************************
547int __compat_get_order(unsigned long size)
548{
549 int order;
550
551 size = (size-1) >> (PAGE_SHIFT-1);
552 order = -1;
553 do {
554 size >>= 1;
555 order++;
556 } while (size);
557 return order;
558}
559//******************************************************************************
560//******************************************************************************
561void *pci_alloc_consistent(struct pci_dev *hwdev,
562 long size, dma_addr_t *dma_handle)
563{
564 void *ret = NULL;
565 int gfp = GFP_ATOMIC;
566 int order;
567#ifdef DEBUG
568 dprintf(("pci_alloc_consistent %d mask %x", size, (hwdev) ? hwdev->dma_mask : 0));
569#endif
570 if (hwdev == NULL || hwdev->dma_mask != 0xffffffff) {
571 //try not to exhaust low memory (< 16mb) so allocate from the high region first
572 //if that doesn't satisfy the dma mask requirement, then get it from the low
573 //regino anyway
574 if(hwdev->dma_mask > 0x00ffffff) {
575 order = __compat_get_order(size);
576 ret = (void *)__get_free_pages(gfp|GFP_DMAHIGHMEM, order);
577 *dma_handle = virt_to_bus(ret);
578 if(*dma_handle > hwdev->dma_mask) {
579 free_pages((unsigned long)ret, __compat_get_order(size));
580 //be sure and allocate below 16 mb
581 gfp |= GFP_DMA;
582 ret = NULL;
583 }
584 }
585 else { //must always allocate below 16 mb
586 gfp |= GFP_DMA;
587 }
588 }
589 if(ret == NULL) {
590 ret = (void *)__get_free_pages(gfp, __compat_get_order(size));
591 }
592
593 if (ret != NULL) {
594 memset(ret, 0, size);
595 *dma_handle = virt_to_bus(ret);
596 }
597 return ret;
598}
599//******************************************************************************
600//******************************************************************************
601void pci_free_consistent(struct pci_dev *hwdev, long size,
602 void *vaddr, dma_addr_t dma_handle)
603{
604 free_pages((unsigned long)vaddr, __compat_get_order(size));
605}
606//******************************************************************************
607//******************************************************************************
608void pci_set_driver_data (struct pci_dev *dev, void *driver_data)
609{
610 if (dev)
611 dev->driver_data = driver_data;
612}
613//******************************************************************************
614//******************************************************************************
615void *pci_get_driver_data (struct pci_dev *dev)
616{
617 if (dev)
618 return dev->driver_data;
619 return 0;
620}
621//******************************************************************************
622//******************************************************************************
623unsigned long pci_get_dma_mask (struct pci_dev *dev)
624{
625 if (dev)
626 return dev->dma_mask;
627 return 0;
628}
629//******************************************************************************
630//******************************************************************************
631int pci_set_dma_mask (struct pci_dev *dev, unsigned long mask)
632{
633 if (dev)
634 {
635 dev->dma_mask = mask;
636 return 0;
637 }
638 return -1;
639}
640//******************************************************************************
641//******************************************************************************
642int release_resource(struct resource *newres)
643{
644 return 0;
645}
646
647//******************************************************************************
648//******************************************************************************
649int pci_set_latency_time(struct pci_dev *dev, int latency)
650{
651 pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
652 return 0;
653}
654
655//******************************************************************************
656//******************************************************************************
657/**
658 * pci_save_state - save the PCI configuration space of a device before suspending
659 * @dev: - PCI device that we're dealing with
660 * @buffer: - buffer to hold config space context
661 *
662 * @buffer must be large enough to hold the entire PCI 2.2 config space
663 * (>= 64 bytes).
664 */
665int pci_orig_save_state(struct pci_dev *dev, u32 *buffer)
666{
667 int i;
668 if (buffer) {
669 /* XXX: 100% dword access ok here? */
670 for (i = 0; i < 16; i++)
671 pci_read_config_dword(dev, i * 4,&buffer[i]);
672 }
673 return 0;
674}
675
676/**
677 * pci_restore_state - Restore the saved state of a PCI device
678 * @dev: - PCI device that we're dealing with
679 * @buffer: - saved PCI config space
680 *
681 */
682int
683pci_orig_restore_state(struct pci_dev *dev, u32 *buffer)
684{
685 int i;
686
687 if (buffer) {
688 for (i = 0; i < 16; i++)
689 pci_write_config_dword(dev,i * 4, buffer[i]);
690 }
691 /*
692 * otherwise, write the context information we know from bootup.
693 * This works around a problem where warm-booting from Windows
694 * combined with a D3(hot)->D0 transition causes PCI config
695 * header data to be forgotten.
696 */
697 else {
698 for (i = 0; i < 6; i ++)
699 pci_write_config_dword(dev,
700 PCI_BASE_ADDRESS_0 + (i * 4),
701 dev->resource[i].start);
702 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
703 }
704 return 0;
705}
706
707struct saved_config_tbl {
708 struct pci_dev *pci;
709 u32 config[16];
710};
711static struct saved_config_tbl saved_tbl[16];
712
713void pci_save_state(struct pci_dev *pci)
714{
715 int i;
716 /* FIXME: mutex needed for race? */
717 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
718 if (! saved_tbl[i].pci) {
719 saved_tbl[i].pci = pci;
720 pci_orig_save_state(pci, saved_tbl[i].config);
721 return;
722 }
723 }
724 printk(KERN_DEBUG "snd: no pci config space found!\n");
725}
726
727void pci_restore_state(struct pci_dev *pci)
728{
729 int i;
730 /* FIXME: mutex needed for race? */
731 for (i = 0; i < ARRAY_SIZE(saved_tbl); i++) {
732 if (saved_tbl[i].pci == pci) {
733 saved_tbl[i].pci = NULL;
734 pci_orig_restore_state(pci, saved_tbl[i].config);
735 return;
736 }
737 }
738 printk(KERN_DEBUG "snd: no saved pci config!\n");
739}
740
741void pci_disable_device(struct pci_dev *dev)
742{
743 u16 pci_command;
744
745 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
746 if (pci_command & PCI_COMMAND_MASTER) {
747 pci_command &= ~PCI_COMMAND_MASTER;
748 pci_write_config_word(dev, PCI_COMMAND, pci_command);
749 }
750}
751
752int pci_request_region(struct pci_dev *pdev, int bar, char *res_name)
753{
754 int flags;
755
756 if (pci_resource_len(pdev, bar) == 0)
757 return 0;
758 flags = pci_get_flags(pdev, bar);
759 if (flags & IORESOURCE_IO) {
760 if (check_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
761 goto err_out;
762 request_region(pci_resource_start(pdev, bar),
763 pci_resource_len(pdev, bar), res_name);
764 }
765 else if (flags & IORESOURCE_MEM) {
766 if (check_mem_region(pci_resource_start(pdev, bar), pci_resource_len(pdev, bar)))
767 goto err_out;
768 request_mem_region(pci_resource_start(pdev, bar),
769 pci_resource_len(pdev, bar), res_name);
770 }
771
772 return 0;
773
774err_out:
775 printk(KERN_WARNING "PCI: Unable to reserve %s region #%d:%lx@%lx for device %s\n",
776 flags & IORESOURCE_IO ? "I/O" : "mem",
777 bar + 1, /* PCI BAR # */
778 pci_resource_len(pdev, bar), pci_resource_start(pdev, bar),
779 res_name);
780 return -EBUSY;
781}
782
783void pci_release_region(struct pci_dev *pdev, int bar)
784{
785 int flags;
786
787 if (pci_resource_len(pdev, bar) == 0)
788 return;
789 flags = pci_get_flags(pdev, bar);
790 if (flags & IORESOURCE_IO) {
791 release_region(pci_resource_start(pdev, bar),
792 pci_resource_len(pdev, bar));
793 }
794 else if (flags & IORESOURCE_MEM) {
795 release_mem_region(pci_resource_start(pdev, bar),
796 pci_resource_len(pdev, bar));
797 }
798}
799
800int pci_request_regions(struct pci_dev *pdev, char *res_name)
801{
802 int i;
803
804 for (i = 0; i < 6; i++)
805 if (pci_request_region(pdev, i, res_name))
806 goto err;
807 return 0;
808 err:
809 while (--i >= 0)
810 pci_release_region(pdev, i);
811 return -EBUSY;
812}
813
814void pci_release_regions(struct pci_dev *pdev)
815{
816 int i;
817 for (i = 0; i < 6; i++)
818 pci_release_region(pdev, i);
819}
820
821const struct pci_device_id * pci_match_device(const struct pci_device_id *ids, struct pci_dev *dev)
822{
823 u16 subsystem_vendor, subsystem_device;
824
825 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
826 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &subsystem_device);
827
828 while (ids->vendor || ids->subvendor || ids->class_mask) {
829 if ((ids->vendor == PCI_ANY_ID || ids->vendor == dev->vendor) &&
830 (ids->device == PCI_ANY_ID || ids->device == dev->device) &&
831 (ids->subvendor == PCI_ANY_ID || ids->subvendor == subsystem_vendor) &&
832 (ids->subdevice == PCI_ANY_ID || ids->subdevice == subsystem_device) &&
833 !((ids->class ^ dev->_class) & ids->class_mask))
834 return ids;
835 ids++;
836 }
837 return NULL;
838}
839
840int snd_pci_dev_present(const struct pci_device_id *ids)
841{
842 while (ids->vendor || ids->subvendor) {
843 if (pci_find_device(ids->vendor, ids->subvendor, NULL))
844 return 1;
845 ids++;
846 }
847 return 0;
848}
849
850struct pci_driver_mapping {
851 struct pci_dev *dev;
852 struct pci_driver *drv;
853 unsigned long dma_mask;
854 void *driver_data;
855 u32 saved_config[16];
856};
857
858#define PCI_MAX_MAPPINGS 64
859static struct pci_driver_mapping drvmap [PCI_MAX_MAPPINGS] = { { NULL, } , };
860
861
862static struct pci_driver_mapping *get_pci_driver_mapping(struct pci_dev *dev)
863{
864 int i;
865
866 for (i = 0; i < PCI_MAX_MAPPINGS; i++)
867 if (drvmap[i].dev == dev)
868 return &drvmap[i];
869 return NULL;
870}
871
872struct pci_driver *snd_pci_compat_get_pci_driver(struct pci_dev *dev)
873{
874 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
875 if (map)
876 return map->drv;
877 return NULL;
878}
879#if 0
880void * pci_get_drvdata (struct pci_dev *dev)
881{
882 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
883 if (map)
884 return map->driver_data;
885 return NULL;
886}
887
888
889void pci_set_drvdata (struct pci_dev *dev, void *driver_data)
890{
891 struct pci_driver_mapping *map = get_pci_driver_mapping(dev);
892 if (map)
893 map->driver_data = driver_data;
894}
895#endif
896
897
898//******************************************************************************
899//******************************************************************************
900OSSRET OSS32_APMResume()
901{
902 int i;
903 struct pci_driver *driver;
904
905 dprintf(("OSS32_APMResume"));
906
907 fSuspended = FALSE;
908
909 for(i=0;i<MAX_PCI_DEVICES;i++)
910 {
911 if(pci_devices[i].devfn)
912 {
913 driver = pci_devices[i].pcidriver;
914 if(driver && driver->resume) {
915 driver->resume(&pci_devices[i]);
916 }
917 }
918 }
919
920 return OSSERR_SUCCESS;
921}
922//******************************************************************************
923//******************************************************************************
924OSSRET OSS32_APMSuspend()
925{
926 int i;
927 struct pci_driver *driver;
928
929 dprintf(("OSS32_APMSuspend"));
930
931 fSuspended = TRUE;
932
933 for(i=0;i<MAX_PCI_DEVICES;i++)
934 {
935 if(pci_devices[i].devfn)
936 {
937 driver = pci_devices[i].pcidriver;
938 if(driver && driver->suspend) {
939 driver->suspend(&pci_devices[i], SNDRV_CTL_POWER_D3cold);
940 }
941 }
942 }
943
944 return OSSERR_SUCCESS;
945}
946
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