source: GPL/alsa-kernel/pci/emu10k1/irq.c@ 18

Last change on this file since 18 was 18, checked in by vladest, 20 years ago

initial import
File size: 9.0 KB
Line 
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Creative Labs, Inc.
4 * Routines for IRQ control of EMU10K1 chips
5 *
6 * BUGS:
7 * --
8 *
9 * TODO:
10 * --
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#define __NO_VERSION__
29#include <sound/driver.h>
30#include <linux/time.h>
31#include <sound/core.h>
32#include <sound/emu10k1.h>
33
34irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
35{
36 emu10k1_t *emu = dev_id;
37 unsigned int status, status2, orig_status, orig_status2;
38 int handled = 0;
39#ifdef TARGET_OS2
40 int fOurIrq = FALSE;
41#endif
42
43 while ((status = inl(emu->port + IPR)) != 0) {
44 // printk("irq - status = 0x%x\n", status);
45#ifdef TARGET_OS2
46#if 1
47 if (status & (IPR_CHANNELNUMBERMASK|IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2|
48 IPR_SAMPLERATETRACKER|IPR_FXDSP|IPR_FORCEINT|IPR_PCIERROR|IPR_VOLINCR|
49 IPR_VOLDECR|IPR_MUTE|IPR_MICBUFFULL|IPR_MICBUFHALFFULL|IPR_ADCBUFFULL|
50 IPR_ADCBUFHALFFULL|IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL|IPR_GPSPDIFSTATUSCHANGE|
51 IPR_CDROMSTATUSCHANGE|IPR_INTERVALTIMER|IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY|
52 IPR_CHANNELLOOP))
53#else
54 if (status)
55#endif
56 {
57 fOurIrq = TRUE;
58 }
59#endif
60 orig_status = status;
61 handled = 1;
62 if (status & IPR_PCIERROR) {
63 // snd_printk("interrupt: PCI error\n");
64 snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
65 status &= ~IPR_PCIERROR;
66 }
67 if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
68 if (emu->hwvol_interrupt)
69 emu->hwvol_interrupt(emu, status);
70 else
71 snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
72 status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
73 }
74 if (status & IPR_CHANNELLOOP) {
75 int voice;
76 int voice_max = status & IPR_CHANNELNUMBERMASK;
77 u32 val;
78 emu10k1_voice_t *pvoice = emu->voices;
79
80 val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
81 for (voice = 0; voice <= voice_max; voice++) {
82 if (voice == 0x20)
83 val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
84 if(val & 1) {
85 if (pvoice->use && pvoice->interrupt != NULL) {
86 pvoice->interrupt(emu, pvoice);
87 snd_emu10k1_voice_intr_ack(emu, voice);
88 } else {
89 snd_emu10k1_voice_intr_disable(emu, voice);
90 }
91 }
92 val >>= 1;
93 pvoice++;
94 }
95 val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
96 for (voice = 0; voice <= voice_max; voice++) {
97 if (voice == 0x20)
98 val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
99 if (val & 1) {
100 if (pvoice->use && pvoice->interrupt != NULL) {
101 pvoice->interrupt(emu, pvoice);
102 snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
103 } else {
104 snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
105 }
106 }
107 val >>= 1;
108 pvoice++;
109 }
110 status &= ~IPR_CHANNELLOOP;
111 }
112 status &= ~IPR_CHANNELNUMBERMASK;
113 if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
114 if (emu->capture_interrupt)
115 emu->capture_interrupt(emu, status);
116 else
117 snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
118 status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
119 }
120 if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
121 if (emu->capture_mic_interrupt)
122 emu->capture_mic_interrupt(emu, status);
123 else
124 snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
125 status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
126 }
127 if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
128 if (emu->capture_efx_interrupt)
129 emu->capture_efx_interrupt(emu, status);
130 else
131 snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
132 status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
133 }
134 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
135 if (emu->midi.interrupt)
136 emu->midi.interrupt(emu, status);
137 else
138 snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
139 status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
140 }
141 if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
142 if (emu->midi2.interrupt)
143 emu->midi2.interrupt(emu, status);
144 else
145 snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
146 status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
147 }
148 if (status & IPR_INTERVALTIMER) {
149 if (emu->timer)
150 snd_timer_interrupt(emu->timer, emu->timer->sticks);
151 else
152 snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
153 status &= ~IPR_INTERVALTIMER;
154 }
155 if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
156 if (emu->spdif_interrupt)
157 emu->spdif_interrupt(emu, status);
158 else
159 snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
160 status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
161 }
162 if (status & IPR_FXDSP) {
163 if (emu->dsp_interrupt)
164 emu->dsp_interrupt(emu);
165 else
166 snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
167 status &= ~IPR_FXDSP;
168 }
169 if (status & IPR_P16V) {
170 while ((status2 = inl(emu->port + IPR2)) != 0) {
171 u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
172 emu10k1_voice_t *pvoice = &(emu->p16v_voices[0]);
173 emu10k1_voice_t *cvoice = &(emu->p16v_capture_voice);
174
175 //printk(KERN_INFO "status2=0x%x\n", status2);
176 orig_status2 = status2;
177 if(status2 & mask) {
178 if(pvoice->use) {
179 snd_pcm_period_elapsed(pvoice->epcm->substream);
180 } else {
181 snd_printk(KERN_ERR "p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n", status2, mask, pvoice, pvoice->use);
182 }
183 }
184 if(status2 & 0x110000) {
185 //printk(KERN_INFO "capture int found\n");
186 if(cvoice->use) {
187 //printk(KERN_INFO "capture period_elapsed\n");
188 snd_pcm_period_elapsed(cvoice->epcm->substream);
189 }
190 }
191 outl(orig_status2, emu->port + IPR2); /* ack all */
192 }
193 status &= ~IPR_P16V;
194 }
195
196 if (status) {
197 unsigned int bits;
198 // snd_printk(KERN_ERR "emu10k1: unhandled interrupt: 0x%08x\n", status);
199 //make sure any interrupts we don't handle are disabled:
200 bits = INTE_FXDSPENABLE |
201 INTE_PCIERRORENABLE |
202 INTE_VOLINCRENABLE |
203 INTE_VOLDECRENABLE |
204 INTE_MUTEENABLE |
205 INTE_MICBUFENABLE |
206 INTE_ADCBUFENABLE |
207 INTE_EFXBUFENABLE |
208 INTE_GPSPDIFENABLE |
209 INTE_CDSPDIFENABLE |
210 INTE_INTERVALTIMERENB |
211 INTE_MIDITXENABLE |
212 INTE_MIDIRXENABLE;
213 if (emu->audigy)
214 bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
215 snd_emu10k1_intr_disable(emu, bits);
216 }
217
218 outl(orig_status, emu->port + IPR); /* ack all */
219
220 }
221
222#ifdef TARGET_OS2
223 if (fOurIrq) {
224 eoi_irq(irq);
225 }
226#endif //TARGET_OS2
227
228 return IRQ_RETVAL(handled);
229}
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