source: GPL/alsa-kernel/pci/atiixp.c@ 18

Last change on this file since 18 was 18, checked in by vladest, 20 years ago

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File size: 47.3 KB
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1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <asm/io.h>
24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/info.h>
33#include <sound/ac97_codec.h>
34#include <sound/initval.h>
35
36MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
37MODULE_DESCRIPTION("ATI IXP AC97 controller");
38MODULE_LICENSE("GPL");
39MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
44static int ac97_clock[SNDRV_CARDS] = {48000,0,0,0,0,0,0,0};
45static char *ac97_quirk[SNDRV_CARDS];
46static int spdif_aclink[SNDRV_CARDS] = {1,1,1,1,1,1,1,1};
47
48//module_param_array(index, int, NULL, 0444);
49MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
50//module_param_array(id, charp, NULL, 0444);
51MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
52//module_param_array(enable, bool, NULL, 0444);
53MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
54//module_param_array(ac97_clock, int, NULL, 0444);
55MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
56//module_param_array(ac97_quirk, charp, NULL, 0444);
57MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
58//module_param_array(spdif_aclink, bool, NULL, 0444);
59MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
60
61
62/*
63 */
64
65#define ATI_REG_ISR 0x00 /* interrupt source */
66#define ATI_REG_ISR_IN_XRUN (1U<<0)
67#define ATI_REG_ISR_IN_STATUS (1U<<1)
68#define ATI_REG_ISR_OUT_XRUN (1U<<2)
69#define ATI_REG_ISR_OUT_STATUS (1U<<3)
70#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
71#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
72#define ATI_REG_ISR_PHYS_INTR (1U<<8)
73#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
74#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
75#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
76#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
77#define ATI_REG_ISR_NEW_FRAME (1U<<13)
78
79#define ATI_REG_IER 0x04 /* interrupt enable */
80#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
81#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
82#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
83#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
84#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
85#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
86#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
87#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
88#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
89#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
90#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
91#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
92#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
93
94#define ATI_REG_CMD 0x08 /* command */
95#define ATI_REG_CMD_POWERDOWN (1U<<0)
96#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
97#define ATI_REG_CMD_SEND_EN (1U<<2)
98#define ATI_REG_CMD_STATUS_MEM (1U<<3)
99#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
100#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
101#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
102#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
103#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
104#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
105#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
106#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
107#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
108#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
109#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
110#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
111#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
112#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
113#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
114#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
115#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
116#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
117#define ATI_REG_CMD_PACKED_DIS (1U<<24)
118#define ATI_REG_CMD_BURST_EN (1U<<25)
119#define ATI_REG_CMD_PANIC_EN (1U<<26)
120#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
121#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
122#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
123#define ATI_REG_CMD_AC_SYNC (1U<<30)
124#define ATI_REG_CMD_AC_RESET (1U<<31)
125
126#define ATI_REG_PHYS_OUT_ADDR 0x0c
127#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
128#define ATI_REG_PHYS_OUT_RW (1U<<2)
129#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
130#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
131#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
132
133#define ATI_REG_PHYS_IN_ADDR 0x10
134#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
135#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
136#define ATI_REG_PHYS_IN_DATA_SHIFT 16
137
138#define ATI_REG_SLOTREQ 0x14
139
140#define ATI_REG_COUNTER 0x18
141#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
142#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
143
144#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
145
146#define ATI_REG_IN_DMA_LINKPTR 0x20
147#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
148#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
149#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
150#define ATI_REG_IN_DMA_DT_SIZE 0x30
151
152#define ATI_REG_OUT_DMA_SLOT 0x34
153#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
154#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
155#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
156#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
157
158#define ATI_REG_OUT_DMA_LINKPTR 0x38
159#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
160#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
161#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
162#define ATI_REG_OUT_DMA_DT_SIZE 0x48
163
164#define ATI_REG_SPDF_CMD 0x4c
165#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
166#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
167#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
168
169#define ATI_REG_SPDF_DMA_LINKPTR 0x50
170#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
171#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
172#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
173#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
174
175#define ATI_REG_MODEM_MIRROR 0x7c
176#define ATI_REG_AUDIO_MIRROR 0x80
177
178#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
179#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
180
181#define ATI_REG_FIFO_FLUSH 0x88
182#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
183#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
184
185/* LINKPTR */
186#define ATI_REG_LINKPTR_EN (1U<<0)
187
188/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
189#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
190#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
191#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
192#define ATI_REG_DMA_STATE (7U<<26)
193
194
195#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
196
197
198/*
199 */
200
201typedef struct snd_atiixp atiixp_t;
202typedef struct snd_atiixp_dma atiixp_dma_t;
203typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
204
205
206/*
207 * DMA packate descriptor
208 */
209
210typedef struct atiixp_dma_desc {
211 u32 addr; /* DMA buffer address */
212 u16 status; /* status bits */
213 u16 size; /* size of the packet in dwords */
214 u32 next; /* address of the next packet descriptor */
215} atiixp_dma_desc_t;
216
217/*
218 * stream enum
219 */
220enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
221enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
222enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
223
224#define NUM_ATI_CODECS 3
225
226
227/*
228 * constants and callbacks for each DMA type
229 */
230struct snd_atiixp_dma_ops {
231 int type; /* ATI_DMA_XXX */
232 unsigned int llp_offset; /* LINKPTR offset */
233 unsigned int dt_cur; /* DT_CUR offset */
234 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
235 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
236 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
237};
238
239/*
240 * DMA stream
241 */
242struct snd_atiixp_dma {
243 const atiixp_dma_ops_t *ops;
244 struct snd_dma_buffer desc_buf;
245 snd_pcm_substream_t *substream; /* assigned PCM substream */
246 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
247 unsigned int period_bytes, periods;
248 int opened;
249 int running;
250 int suspended;
251 int pcm_open_flag;
252 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
253 unsigned int saved_curptr;
254};
255
256/*
257 * ATI IXP chip
258 */
259struct snd_atiixp {
260 snd_card_t *card;
261 struct pci_dev *pci;
262
263 unsigned long addr;
264 void __iomem *remap_addr;
265 int irq;
266
267 ac97_bus_t *ac97_bus;
268 ac97_t *ac97[NUM_ATI_CODECS];
269
270 spinlock_t reg_lock;
271
272 atiixp_dma_t dmas[NUM_ATI_DMAS];
273 struct ac97_pcm *pcms[NUM_ATI_PCMS];
274 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
275
276 int max_channels; /* max. channels for PCM out */
277
278 unsigned int codec_not_ready_bits; /* for codec detection */
279
280 int spdif_over_aclink; /* passed from the module option */
281 struct semaphore open_mutex; /* playback open mutex */
282};
283
284
285/*
286 */
287static struct pci_device_id snd_atiixp_ids[] = {
288 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
289 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
290 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
291 { 0, }
292};
293
294MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
295
296
297/*
298 * lowlevel functions
299 */
300
301/*
302 * update the bits of the given register.
303 * return 1 if the bits changed.
304 */
305static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
306 unsigned int mask, unsigned int value)
307{
308 void __iomem *addr = (char *)chip->remap_addr + reg;
309 unsigned int data, old_data;
310 old_data = data = readl(addr);
311 data &= ~mask;
312 data |= value;
313 if (old_data == data)
314 return 0;
315 writel(data, addr);
316 return 1;
317}
318
319/*
320 * macros for easy use
321 */
322#define atiixp_write(chip,reg,value) \
323 writel(value, (char *)chip->remap_addr + ATI_REG_##reg)
324#define atiixp_read(chip,reg) \
325 readl((char *)chip->remap_addr + ATI_REG_##reg)
326#define atiixp_update(chip,reg,mask,val) \
327 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
328
329/*
330 * handling DMA packets
331 *
332 * we allocate a linear buffer for the DMA, and split it to each packet.
333 * in a future version, a scatter-gather buffer should be implemented.
334 */
335
336#define ATI_DESC_LIST_SIZE \
337 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
338
339/*
340 * build packets ring for the given buffer size.
341 *
342 * IXP handles the buffer descriptors, which are connected as a linked
343 * list. although we can change the list dynamically, in this version,
344 * a static RING of buffer descriptors is used.
345 *
346 * the ring is built in this function, and is set up to the hardware.
347 */
348static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
349 snd_pcm_substream_t *substream,
350 unsigned int periods,
351 unsigned int period_bytes)
352{
353 unsigned int i;
354 u32 addr, desc_addr;
355 unsigned long flags;
356
357 if (periods > ATI_MAX_DESCRIPTORS)
358 return -ENOMEM;
359
360 if (dma->desc_buf.area == NULL) {
361 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
362 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
363 return -ENOMEM;
364 dma->period_bytes = dma->periods = 0; /* clear */
365 }
366
367 if (dma->periods == periods && dma->period_bytes == period_bytes)
368 return 0;
369
370 /* reset DMA before changing the descriptor table */
371 spin_lock_irqsave(&chip->reg_lock, flags);
372 writel(0, (char *)chip->remap_addr + dma->ops->llp_offset);
373 dma->ops->enable_dma(chip, 0);
374 dma->ops->enable_dma(chip, 1);
375 spin_unlock_irqrestore(&chip->reg_lock, flags);
376
377 /* fill the entries */
378 addr = (u32)substream->runtime->dma_addr;
379 desc_addr = (u32)dma->desc_buf.addr;
380 for (i = 0; i < periods; i++) {
381 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
382 desc->addr = cpu_to_le32(addr);
383 desc->status = 0;
384 desc->size = period_bytes >> 2; /* in dwords */
385 desc_addr += sizeof(atiixp_dma_desc_t);
386 if (i == periods - 1)
387 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
388 else
389 desc->next = cpu_to_le32(desc_addr);
390 addr += period_bytes;
391 }
392
393 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
394 (char *)chip->remap_addr + dma->ops->llp_offset);
395
396 dma->period_bytes = period_bytes;
397 dma->periods = periods;
398
399 return 0;
400}
401
402/*
403 * remove the ring buffer and release it if assigned
404 */
405static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
406{
407 if (dma->desc_buf.area) {
408 writel(0, (char *)chip->remap_addr + dma->ops->llp_offset);
409 snd_dma_free_pages(&dma->desc_buf);
410 dma->desc_buf.area = NULL;
411 }
412}
413
414/*
415 * AC97 interface
416 */
417static int snd_atiixp_acquire_codec(atiixp_t *chip)
418{
419 int timeout = 1000;
420
421 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
422 if (! timeout--) {
423 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
424 return -EBUSY;
425 }
426 udelay(1);
427 }
428 return 0;
429}
430
431static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
432{
433 unsigned int data;
434 int timeout;
435
436 if (snd_atiixp_acquire_codec(chip) < 0)
437 return 0xffff;
438 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
439 ATI_REG_PHYS_OUT_ADDR_EN |
440 ATI_REG_PHYS_OUT_RW |
441 codec;
442 atiixp_write(chip, PHYS_OUT_ADDR, data);
443 if (snd_atiixp_acquire_codec(chip) < 0)
444 return 0xffff;
445 timeout = 1000;
446 do {
447 data = atiixp_read(chip, PHYS_IN_ADDR);
448 if (data & ATI_REG_PHYS_IN_READ_FLAG)
449 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
450 udelay(1);
451 } while (--timeout);
452 /* time out may happen during reset */
453 if (reg < 0x7c)
454 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
455 return 0xffff;
456}
457
458
459static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
460{
461 unsigned int data;
462
463 if (snd_atiixp_acquire_codec(chip) < 0)
464 return;
465 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
466 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
467 ATI_REG_PHYS_OUT_ADDR_EN | codec;
468 atiixp_write(chip, PHYS_OUT_ADDR, data);
469}
470
471
472static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
473{
474 atiixp_t *chip = ac97->private_data;
475 return snd_atiixp_codec_read(chip, ac97->num, reg);
476}
477
478static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
479{
480 atiixp_t *chip = ac97->private_data;
481 snd_atiixp_codec_write(chip, ac97->num, reg, val);
482}
483
484/*
485 * reset AC link
486 */
487static int snd_atiixp_aclink_reset(atiixp_t *chip)
488{
489 int timeout;
490
491 /* reset powerdoewn */
492 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
493 udelay(10);
494
495 /* perform a software reset */
496 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
497 atiixp_read(chip, CMD);
498 udelay(10);
499 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
500
501 timeout = 10;
502 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
503 /* do a hard reset */
504 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
505 ATI_REG_CMD_AC_SYNC);
506 atiixp_read(chip, CMD);
507 msleep(1);
508 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
509 if (--timeout) {
510 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
511 break;
512 }
513 }
514
515 /* deassert RESET and assert SYNC to make sure */
516 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
517 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
518
519 return 0;
520}
521
522#ifdef CONFIG_PM
523static int snd_atiixp_aclink_down(atiixp_t *chip)
524{
525 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
526 // return -EBUSY;
527 atiixp_update(chip, CMD,
528 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
529 ATI_REG_CMD_POWERDOWN);
530 return 0;
531}
532#endif
533
534/*
535 * auto-detection of codecs
536 *
537 * the IXP chip can generate interrupts for the non-existing codecs.
538 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
539 * even if all three codecs are connected.
540 */
541
542#define ALL_CODEC_NOT_READY \
543 (ATI_REG_ISR_CODEC0_NOT_READY |\
544 ATI_REG_ISR_CODEC1_NOT_READY |\
545 ATI_REG_ISR_CODEC2_NOT_READY)
546#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
547
548static int snd_atiixp_codec_detect(atiixp_t *chip)
549{
550 int timeout;
551
552 chip->codec_not_ready_bits = 0;
553 atiixp_write(chip, IER, CODEC_CHECK_BITS);
554 /* wait for the interrupts */
555 timeout = 50;
556 while (timeout-- > 0) {
557 msleep(1);
558 if (chip->codec_not_ready_bits)
559 break;
560 }
561 atiixp_write(chip, IER, 0); /* disable irqs */
562
563 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
564 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
565 return -ENXIO;
566 }
567 return 0;
568}
569
570
571/*
572 * enable DMA and irqs
573 */
574static int snd_atiixp_chip_start(atiixp_t *chip)
575{
576 unsigned int reg;
577
578 /* set up spdif, enable burst mode */
579 reg = atiixp_read(chip, CMD);
580 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
581 reg |= ATI_REG_CMD_BURST_EN;
582 atiixp_write(chip, CMD, reg);
583
584 reg = atiixp_read(chip, SPDF_CMD);
585 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
586 atiixp_write(chip, SPDF_CMD, reg);
587
588 /* clear all interrupt source */
589 atiixp_write(chip, ISR, 0xffffffff);
590 /* enable irqs */
591 atiixp_write(chip, IER,
592 ATI_REG_IER_IO_STATUS_EN |
593 ATI_REG_IER_IN_XRUN_EN |
594 ATI_REG_IER_OUT_XRUN_EN |
595 ATI_REG_IER_SPDF_XRUN_EN |
596 ATI_REG_IER_SPDF_STATUS_EN);
597 return 0;
598}
599
600
601/*
602 * disable DMA and IRQs
603 */
604static int snd_atiixp_chip_stop(atiixp_t *chip)
605{
606 /* clear interrupt source */
607 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
608 /* disable irqs */
609 atiixp_write(chip, IER, 0);
610 return 0;
611}
612
613
614/*
615 * PCM section
616 */
617
618/*
619 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
620 * position. when SG-buffer is implemented, the offset must be calculated
621 * correctly...
622 */
623static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
624{
625 atiixp_t *chip = snd_pcm_substream_chip(substream);
626 snd_pcm_runtime_t *runtime = substream->runtime;
627 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
628 unsigned int curptr;
629 int timeout = 1000;
630
631 while (timeout--) {
632 curptr = readl((char *)chip->remap_addr + dma->ops->dt_cur);
633 if (curptr < dma->buf_addr)
634 continue;
635 curptr -= dma->buf_addr;
636 if (curptr >= dma->buf_bytes)
637 continue;
638 return bytes_to_frames(runtime, curptr);
639 }
640 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
641 readl((char*)chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
642 return 0;
643}
644
645/*
646 * XRUN detected, and stop the PCM substream
647 */
648static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
649{
650 if (! dma->substream || ! dma->running)
651 return;
652 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
653 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
654}
655
656/*
657 * the period ack. update the substream.
658 */
659static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
660{
661 if (! dma->substream || ! dma->running)
662 return;
663 snd_pcm_period_elapsed(dma->substream);
664}
665
666/* set BUS_BUSY interrupt bit if any DMA is running */
667/* call with spinlock held */
668static void snd_atiixp_check_bus_busy(atiixp_t *chip)
669{
670 unsigned int bus_busy;
671 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
672 ATI_REG_CMD_RECEIVE_EN |
673 ATI_REG_CMD_SPDF_OUT_EN))
674 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
675 else
676 bus_busy = 0;
677 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
678}
679
680/* common trigger callback
681 * calling the lowlevel callbacks in it
682 */
683static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
684{
685 atiixp_t *chip = snd_pcm_substream_chip(substream);
686 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
687 int err = 0;
688
689 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
690
691 spin_lock(&chip->reg_lock);
692 switch (cmd) {
693 case SNDRV_PCM_TRIGGER_START:
694 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
695 case SNDRV_PCM_TRIGGER_RESUME:
696 dma->ops->enable_transfer(chip, 1);
697 dma->running = 1;
698 dma->suspended = 0;
699 break;
700 case SNDRV_PCM_TRIGGER_STOP:
701 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
702 case SNDRV_PCM_TRIGGER_SUSPEND:
703 dma->ops->enable_transfer(chip, 0);
704 dma->running = 0;
705 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
706 break;
707 default:
708 err = -EINVAL;
709 break;
710 }
711 if (! err) {
712 snd_atiixp_check_bus_busy(chip);
713 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
714 dma->ops->flush_dma(chip);
715 snd_atiixp_check_bus_busy(chip);
716 }
717 }
718 spin_unlock(&chip->reg_lock);
719 return err;
720}
721
722
723/*
724 * lowlevel callbacks for each DMA type
725 *
726 * every callback is supposed to be called in chip->reg_lock spinlock
727 */
728
729/* flush FIFO of analog OUT DMA */
730static void atiixp_out_flush_dma(atiixp_t *chip)
731{
732 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
733}
734
735/* enable/disable analog OUT DMA */
736static void atiixp_out_enable_dma(atiixp_t *chip, int on)
737{
738 unsigned int data;
739 data = atiixp_read(chip, CMD);
740 if (on) {
741 if (data & ATI_REG_CMD_OUT_DMA_EN)
742 return;
743 atiixp_out_flush_dma(chip);
744 data |= ATI_REG_CMD_OUT_DMA_EN;
745 } else
746 data &= ~ATI_REG_CMD_OUT_DMA_EN;
747 atiixp_write(chip, CMD, data);
748}
749
750/* start/stop transfer over OUT DMA */
751static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
752{
753 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
754 on ? ATI_REG_CMD_SEND_EN : 0);
755}
756
757/* enable/disable analog IN DMA */
758static void atiixp_in_enable_dma(atiixp_t *chip, int on)
759{
760 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
761 on ? ATI_REG_CMD_IN_DMA_EN : 0);
762}
763
764/* start/stop analog IN DMA */
765static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
766{
767 if (on) {
768 unsigned int data = atiixp_read(chip, CMD);
769 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
770 data |= ATI_REG_CMD_RECEIVE_EN;
771#if 0 /* FIXME: this causes the endless loop */
772 /* wait until slot 3/4 are finished */
773 while ((atiixp_read(chip, COUNTER) &
774 ATI_REG_COUNTER_SLOT) != 5)
775 ;
776#endif
777 atiixp_write(chip, CMD, data);
778 }
779 } else
780 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
781}
782
783/* flush FIFO of analog IN DMA */
784static void atiixp_in_flush_dma(atiixp_t *chip)
785{
786 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
787}
788
789/* enable/disable SPDIF OUT DMA */
790static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
791{
792 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
793 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
794}
795
796/* start/stop SPDIF OUT DMA */
797static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
798{
799 unsigned int data;
800 data = atiixp_read(chip, CMD);
801 if (on)
802 data |= ATI_REG_CMD_SPDF_OUT_EN;
803 else
804 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
805 atiixp_write(chip, CMD, data);
806}
807
808/* flush FIFO of SPDIF OUT DMA */
809static void atiixp_spdif_flush_dma(atiixp_t *chip)
810{
811 int timeout;
812
813 /* DMA off, transfer on */
814 atiixp_spdif_enable_dma(chip, 0);
815 atiixp_spdif_enable_transfer(chip, 1);
816
817 timeout = 100;
818 do {
819 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
820 break;
821 udelay(1);
822 } while (timeout-- > 0);
823
824 atiixp_spdif_enable_transfer(chip, 0);
825}
826
827/* set up slots and formats for SPDIF OUT */
828static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
829{
830 atiixp_t *chip = snd_pcm_substream_chip(substream);
831
832 spin_lock_irq(&chip->reg_lock);
833 if (chip->spdif_over_aclink) {
834 unsigned int data;
835 /* enable slots 10/11 */
836 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
837 ATI_REG_CMD_SPDF_CONFIG_01);
838 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
839 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
840 ATI_REG_OUT_DMA_SLOT_BIT(11);
841 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
842 atiixp_write(chip, OUT_DMA_SLOT, data);
843 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
844 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
845 ATI_REG_CMD_INTERLEAVE_OUT : 0);
846 } else {
847 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
848 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
849 }
850 spin_unlock_irq(&chip->reg_lock);
851 return 0;
852}
853
854/* set up slots and formats for analog OUT */
855static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
856{
857 atiixp_t *chip = snd_pcm_substream_chip(substream);
858 unsigned int data;
859
860 spin_lock_irq(&chip->reg_lock);
861 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
862 switch (substream->runtime->channels) {
863 case 8:
864 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
865 ATI_REG_OUT_DMA_SLOT_BIT(11);
866 /* fallthru */
867 case 6:
868 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
869 ATI_REG_OUT_DMA_SLOT_BIT(8);
870 /* fallthru */
871 case 4:
872 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
873 ATI_REG_OUT_DMA_SLOT_BIT(9);
874 /* fallthru */
875 default:
876 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
877 ATI_REG_OUT_DMA_SLOT_BIT(4);
878 break;
879 }
880
881 /* set output threshold */
882 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
883 atiixp_write(chip, OUT_DMA_SLOT, data);
884
885 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
886 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
887 ATI_REG_CMD_INTERLEAVE_OUT : 0);
888
889 /*
890 * enable 6 channel re-ordering bit if needed
891 */
892 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
893 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
894
895 spin_unlock_irq(&chip->reg_lock);
896 return 0;
897}
898
899/* set up slots and formats for analog IN */
900static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
901{
902 atiixp_t *chip = snd_pcm_substream_chip(substream);
903
904 spin_lock_irq(&chip->reg_lock);
905 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
906 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
907 ATI_REG_CMD_INTERLEAVE_IN : 0);
908 spin_unlock_irq(&chip->reg_lock);
909 return 0;
910}
911
912/*
913 * hw_params - allocate the buffer and set up buffer descriptors
914 */
915static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
916 snd_pcm_hw_params_t *hw_params)
917{
918 atiixp_t *chip = snd_pcm_substream_chip(substream);
919 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
920 int err;
921
922 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
923 if (err < 0)
924 return err;
925 dma->buf_addr = substream->runtime->dma_addr;
926 dma->buf_bytes = params_buffer_bytes(hw_params);
927
928 err = atiixp_build_dma_packets(chip, dma, substream,
929 params_periods(hw_params),
930 params_period_bytes(hw_params));
931 if (err < 0)
932 return err;
933
934 if (dma->ac97_pcm_type >= 0) {
935 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
936 /* PCM is bound to AC97 codec(s)
937 * set up the AC97 codecs
938 */
939 if (dma->pcm_open_flag) {
940 snd_ac97_pcm_close(pcm);
941 dma->pcm_open_flag = 0;
942 }
943 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
944 params_channels(hw_params),
945 pcm->r[0].slots);
946 if (err >= 0)
947 dma->pcm_open_flag = 1;
948 }
949
950 return err;
951}
952
953static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
954{
955 atiixp_t *chip = snd_pcm_substream_chip(substream);
956 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
957
958 if (dma->pcm_open_flag) {
959 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
960 snd_ac97_pcm_close(pcm);
961 dma->pcm_open_flag = 0;
962 }
963 atiixp_clear_dma_packets(chip, dma, substream);
964 snd_pcm_lib_free_pages(substream);
965 return 0;
966}
967
968
969/*
970 * pcm hardware definition, identical for all DMA types
971 */
972static snd_pcm_hardware_t snd_atiixp_pcm_hw =
973{
974 /*.info = */ (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
975 SNDRV_PCM_INFO_BLOCK_TRANSFER |
976 SNDRV_PCM_INFO_PAUSE |
977 SNDRV_PCM_INFO_RESUME |
978 SNDRV_PCM_INFO_MMAP_VALID),
979 /*.formats = */SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
980 /*.rates = */SNDRV_PCM_RATE_48000,
981 /*.rate_min = */48000,
982 /*.rate_max = */48000,
983 /*.channels_min = */ 2,
984 /*.channels_max = */ 2,
985 /*.buffer_bytes_max = */256 * 1024,
986 /*.period_bytes_min = */32,
987 /*.period_bytes_max = */128 * 1024,
988 /*.periods_min = */ 2,
989 /*.periods_max = */ ATI_MAX_DESCRIPTORS,
990 0
991};
992
993static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
994{
995 atiixp_t *chip = snd_pcm_substream_chip(substream);
996 snd_pcm_runtime_t *runtime = substream->runtime;
997 int err;
998
999 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1000
1001 if (dma->opened)
1002 return -EBUSY;
1003 dma->substream = substream;
1004 runtime->hw = snd_atiixp_pcm_hw;
1005 dma->ac97_pcm_type = pcm_type;
1006 if (pcm_type >= 0) {
1007 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1008 snd_pcm_limit_hw_rates(runtime);
1009 } else {
1010 /* direct SPDIF */
1011 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1012 }
1013 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1014 return err;
1015 runtime->private_data = dma;
1016
1017 /* enable DMA bits */
1018 spin_lock_irq(&chip->reg_lock);
1019 dma->ops->enable_dma(chip, 1);
1020 spin_unlock_irq(&chip->reg_lock);
1021 dma->opened = 1;
1022
1023 return 0;
1024}
1025
1026static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1027{
1028 atiixp_t *chip = snd_pcm_substream_chip(substream);
1029 /* disable DMA bits */
1030 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1031 spin_lock_irq(&chip->reg_lock);
1032 dma->ops->enable_dma(chip, 0);
1033 spin_unlock_irq(&chip->reg_lock);
1034 dma->substream = NULL;
1035 dma->opened = 0;
1036 return 0;
1037}
1038
1039/*
1040 */
1041static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1042{
1043 atiixp_t *chip = snd_pcm_substream_chip(substream);
1044 int err;
1045
1046 down(&chip->open_mutex);
1047 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1048 up(&chip->open_mutex);
1049 if (err < 0)
1050 return err;
1051 substream->runtime->hw.channels_max = chip->max_channels;
1052 if (chip->max_channels > 2)
1053 /* channels must be even */
1054 snd_pcm_hw_constraint_step(substream->runtime, 0,
1055 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1056 return 0;
1057}
1058
1059static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1060{
1061 atiixp_t *chip = snd_pcm_substream_chip(substream);
1062 int err;
1063 down(&chip->open_mutex);
1064 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1065 up(&chip->open_mutex);
1066 return err;
1067}
1068
1069static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1070{
1071 atiixp_t *chip = snd_pcm_substream_chip(substream);
1072 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1073}
1074
1075static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1076{
1077 atiixp_t *chip = snd_pcm_substream_chip(substream);
1078 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1079}
1080
1081static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1082{
1083 atiixp_t *chip = snd_pcm_substream_chip(substream);
1084 int err;
1085 down(&chip->open_mutex);
1086 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1087 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1088 else
1089 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1090 up(&chip->open_mutex);
1091 return err;
1092}
1093
1094static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1095{
1096 atiixp_t *chip = snd_pcm_substream_chip(substream);
1097 int err;
1098 down(&chip->open_mutex);
1099 if (chip->spdif_over_aclink)
1100 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1101 else
1102 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1103 up(&chip->open_mutex);
1104 return err;
1105}
1106
1107/* AC97 playback */
1108static snd_pcm_ops_t snd_atiixp_playback_ops = {
1109 /*.open = */ snd_atiixp_playback_open,
1110 /*.close = */ snd_atiixp_playback_close,
1111 /*.ioctl = */ snd_pcm_lib_ioctl,
1112 /*.hw_params = */ snd_atiixp_pcm_hw_params,
1113 /*.hw_free = */ snd_atiixp_pcm_hw_free,
1114 /*.prepare = */ snd_atiixp_playback_prepare,
1115 /*.trigger = */ snd_atiixp_pcm_trigger,
1116 /*.pointer = */ snd_atiixp_pcm_pointer,
1117 0,0,0,0
1118};
1119
1120/* AC97 capture */
1121static snd_pcm_ops_t snd_atiixp_capture_ops = {
1122 /*.open = */ snd_atiixp_capture_open,
1123 /*.close = */ snd_atiixp_capture_close,
1124 /*.ioctl = */ snd_pcm_lib_ioctl,
1125 /*.hw_params = */ snd_atiixp_pcm_hw_params,
1126 /*.hw_free = */ snd_atiixp_pcm_hw_free,
1127 /*.prepare = */ snd_atiixp_capture_prepare,
1128 /*.trigger = */ snd_atiixp_pcm_trigger,
1129 /*.pointer = */ snd_atiixp_pcm_pointer,
1130 0,0,0,0
1131};
1132
1133/* SPDIF playback */
1134static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1135 /*.open = */ snd_atiixp_spdif_open,
1136 /*.close = */ snd_atiixp_spdif_close,
1137 /*.ioctl = */ snd_pcm_lib_ioctl,
1138 /*.hw_params = */ snd_atiixp_pcm_hw_params,
1139 /*.hw_free = */ snd_atiixp_pcm_hw_free,
1140 /*.prepare = */ snd_atiixp_spdif_prepare,
1141 /*.trigger = */ snd_atiixp_pcm_trigger,
1142 /*.pointer = */ snd_atiixp_pcm_pointer,
1143 0,0,0,0
1144};
1145
1146static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1147 /* front PCM */
1148 {
1149 0,0,
1150 /*.exclusive = */1,
1151 0,0,0,0,
1152 /*.r = */{{
1153 /*.slots = */(1 << AC97_SLOT_PCM_LEFT) |
1154 (1 << AC97_SLOT_PCM_RIGHT) |
1155 (1 << AC97_SLOT_PCM_CENTER) |
1156 (1 << AC97_SLOT_PCM_SLEFT) |
1157 (1 << AC97_SLOT_PCM_SRIGHT) |
1158 (1 << AC97_SLOT_LFE),
1159 {0},
1160 {0},
1161 0
1162 }, {0}
1163 },
1164 0
1165 },
1166 /* PCM IN #1 */
1167 {
1168 0,
1169 /*.stream = */1,
1170 /*.exclusive = */1,
1171 0,0,0,0,
1172 /*.r = */{ {
1173 /*.slots =*/ (1 << AC97_SLOT_PCM_LEFT) |
1174 (1 << AC97_SLOT_PCM_RIGHT),
1175 {0},
1176 {0},
1177 0
1178 },{0}
1179 }, 0
1180 },
1181 /* S/PDIF OUT (optional) */
1182 {
1183 0, 0,
1184 /*.exclusive = */1,
1185 0,
1186 /*.spdif = */1,
1187 0,0,
1188 /*.r = */{ {
1189 /*.slots =*/ (1 << AC97_SLOT_SPDIF_LEFT2) |
1190 (1 << AC97_SLOT_SPDIF_RIGHT2),
1191 {0},
1192 {0},
1193 0
1194
1195 }, {0}
1196 }, 0
1197 },
1198};
1199
1200static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1201 /*.type = */ATI_DMA_PLAYBACK,
1202 /*.llp_offset = */ATI_REG_OUT_DMA_LINKPTR,
1203 /*.dt_cur = */ATI_REG_OUT_DMA_DT_CUR,
1204 /*.enable_dma = */atiixp_out_enable_dma,
1205 /*.enable_transfer = */atiixp_out_enable_transfer,
1206 /*.flush_dma = */atiixp_out_flush_dma,
1207};
1208
1209static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1210 /*.type = */ATI_DMA_CAPTURE,
1211 /*.llp_offset = */ATI_REG_IN_DMA_LINKPTR,
1212 /*.dt_cur = */ATI_REG_IN_DMA_DT_CUR,
1213 /*.enable_dma = */atiixp_in_enable_dma,
1214 /*.enable_transfer = */atiixp_in_enable_transfer,
1215 /*.flush_dma = */atiixp_in_flush_dma,
1216};
1217
1218static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1219 /*.type = */ATI_DMA_SPDIF,
1220 /*.llp_offset = */ATI_REG_SPDF_DMA_LINKPTR,
1221 /*.dt_cur = */ATI_REG_SPDF_DMA_DT_CUR,
1222 /*.enable_dma = */atiixp_spdif_enable_dma,
1223 /*.enable_transfer = */atiixp_spdif_enable_transfer,
1224 /*.flush_dma = */atiixp_spdif_flush_dma,
1225};
1226
1227
1228static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1229{
1230 snd_pcm_t *pcm;
1231 ac97_bus_t *pbus = chip->ac97_bus;
1232 int err, i, num_pcms;
1233
1234 /* initialize constants */
1235 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1236 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1237 if (! chip->spdif_over_aclink)
1238 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1239
1240 /* assign AC97 pcm */
1241 if (chip->spdif_over_aclink)
1242 num_pcms = 3;
1243 else
1244 num_pcms = 2;
1245 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1246 if (err < 0)
1247 return err;
1248 for (i = 0; i < num_pcms; i++)
1249 chip->pcms[i] = &pbus->pcms[i];
1250
1251 chip->max_channels = 2;
1252 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1253 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1254 chip->max_channels = 6;
1255 else
1256 chip->max_channels = 4;
1257 }
1258
1259 /* PCM #0: analog I/O */
1260 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1261 if (err < 0)
1262 return err;
1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1264 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1265 pcm->private_data = chip;
1266 strcpy(pcm->name, "ATI IXP AC97");
1267 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1268
1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1270 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1271
1272 /* no SPDIF support on codec? */
1273 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1274 return 0;
1275
1276 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1277 if (chip->pcms[ATI_PCM_SPDIF])
1278 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1279
1280 /* PCM #1: spdif playback */
1281 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1282 if (err < 0)
1283 return err;
1284 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1285 pcm->private_data = chip;
1286 if (chip->spdif_over_aclink)
1287 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1288 else
1289 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1290 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1291
1292 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1293 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1294
1295 /* pre-select AC97 SPDIF slots 10/11 */
1296 for (i = 0; i < NUM_ATI_CODECS; i++) {
1297 if (chip->ac97[i])
1298 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1299 }
1300
1301 return 0;
1302}
1303
1304
1305
1306/*
1307 * interrupt handler
1308 */
1309static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1310{
1311 atiixp_t *chip = dev_id;
1312 unsigned int status;
1313
1314 status = atiixp_read(chip, ISR);
1315
1316 if (! status)
1317 return IRQ_NONE;
1318
1319 /* process audio DMA */
1320 if (status & ATI_REG_ISR_OUT_XRUN)
1321 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1322 else if (status & ATI_REG_ISR_OUT_STATUS)
1323 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1324 if (status & ATI_REG_ISR_IN_XRUN)
1325 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1326 else if (status & ATI_REG_ISR_IN_STATUS)
1327 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1328 if (! chip->spdif_over_aclink) {
1329 if (status & ATI_REG_ISR_SPDF_XRUN)
1330 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1331 else if (status & ATI_REG_ISR_SPDF_STATUS)
1332 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1333 }
1334
1335 /* for codec detection */
1336 if (status & CODEC_CHECK_BITS) {
1337 unsigned int detected;
1338 detected = status & CODEC_CHECK_BITS;
1339 spin_lock(&chip->reg_lock);
1340 chip->codec_not_ready_bits |= detected;
1341 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1342 spin_unlock(&chip->reg_lock);
1343 }
1344
1345 /* ack */
1346 atiixp_write(chip, ISR, status);
1347
1348#ifdef TARGET_OS2
1349 eoi_irq(irq);
1350#endif //TARGET_OS2
1351
1352 return IRQ_HANDLED;
1353}
1354
1355
1356/*
1357 * ac97 mixer section
1358 */
1359
1360static struct ac97_quirk ac97_quirks[] __devinitdata = {
1361 {
1362 0x103c,
1363 0x006b,0,0,
1364 "HP Pavilion ZV5030US",
1365 AC97_TUNE_MUTE_LED
1366 },
1367 {0} /* terminator */
1368};
1369
1370static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock, const char *quirk_override)
1371{
1372 ac97_bus_t *pbus;
1373 ac97_template_t ac97;
1374 int i, err;
1375 int codec_count;
1376 static ac97_bus_ops_t ops = {
1377 0,
1378 /*.write = */snd_atiixp_ac97_write,
1379 /*.read = */snd_atiixp_ac97_read, 0,0
1380 };
1381 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1382 ATI_REG_ISR_CODEC0_NOT_READY,
1383 ATI_REG_ISR_CODEC1_NOT_READY,
1384 ATI_REG_ISR_CODEC2_NOT_READY,
1385 };
1386
1387 if (snd_atiixp_codec_detect(chip) < 0)
1388 return -ENXIO;
1389
1390 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1391 return err;
1392 pbus->clock = clock;
1393 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with modem driver */
1394 chip->ac97_bus = pbus;
1395
1396 codec_count = 0;
1397 for (i = 0; i < NUM_ATI_CODECS; i++) {
1398 if (chip->codec_not_ready_bits & codec_skip[i])
1399 continue;
1400 memset(&ac97, 0, sizeof(ac97));
1401 ac97.private_data = chip;
1402 ac97.pci = chip->pci;
1403 ac97.num = i;
1404 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1405 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1406 chip->ac97[i] = NULL; /* to be sure */
1407 snd_printdd("atiixp: codec %d not available for audio\n", i);
1408 continue;
1409 }
1410 codec_count++;
1411 }
1412
1413 if (! codec_count) {
1414 snd_printk(KERN_ERR "atiixp: no codec available\n");
1415 return -ENODEV;
1416 }
1417
1418 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1419
1420 return 0;
1421}
1422
1423
1424#ifdef CONFIG_PM
1425/*
1426 * power management
1427 */
1428static int snd_atiixp_suspend(snd_card_t *card, unsigned int state)
1429{
1430 atiixp_t *chip = card->pm_private_data;
1431 int i;
1432
1433 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1434 if (chip->pcmdevs[i]) {
1435 atiixp_dma_t *dma = &chip->dmas[i];
1436 if (dma->substream && dma->running)
1437 dma->saved_curptr = readl((char*)chip->remap_addr + dma->ops->dt_cur);
1438 snd_pcm_suspend_all(chip->pcmdevs[i]);
1439 }
1440 for (i = 0; i < NUM_ATI_CODECS; i++)
1441 if (chip->ac97[i])
1442 snd_ac97_suspend(chip->ac97[i]);
1443 snd_atiixp_aclink_down(chip);
1444 snd_atiixp_chip_stop(chip);
1445
1446 pci_set_power_state(chip->pci, 3);
1447 pci_disable_device(chip->pci);
1448 return 0;
1449}
1450
1451static int snd_atiixp_resume(snd_card_t *card, unsigned int state)
1452{
1453 atiixp_t *chip = card->pm_private_data;
1454 int i;
1455
1456 pci_enable_device(chip->pci);
1457 pci_set_power_state(chip->pci, 0);
1458 pci_set_master(chip->pci);
1459
1460 snd_atiixp_aclink_reset(chip);
1461 snd_atiixp_chip_start(chip);
1462
1463 for (i = 0; i < NUM_ATI_CODECS; i++)
1464 if (chip->ac97[i])
1465 snd_ac97_resume(chip->ac97[i]);
1466 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1467 if (chip->pcmdevs[i]) {
1468 atiixp_dma_t *dma = &chip->dmas[i];
1469 if (dma->substream && dma->suspended) {
1470 dma->ops->enable_dma(chip, 1);
1471 dma->substream->ops->prepare(dma->substream);
1472 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1473 (char*)chip->remap_addr + dma->ops->llp_offset);
1474 writel(dma->saved_curptr, (char*)chip->remap_addr + dma->ops->dt_cur);
1475 }
1476 }
1477
1478 return 0;
1479}
1480#endif /* CONFIG_PM */
1481
1482
1483/*
1484 * proc interface for register dump
1485 */
1486
1487static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1488{
1489 atiixp_t *chip = entry->private_data;
1490 int i;
1491
1492 for (i = 0; i < 256; i += 4)
1493 snd_iprintf(buffer, "%02x: %08x\n", i, readl((char*)chip->remap_addr + i));
1494}
1495
1496static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1497{
1498 snd_info_entry_t *entry;
1499
1500 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1501 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1502}
1503
1504
1505
1506/*
1507 * destructor
1508 */
1509
1510static int snd_atiixp_free(atiixp_t *chip)
1511{
1512 if (chip->irq < 0)
1513 goto __hw_end;
1514 snd_atiixp_chip_stop(chip);
1515 synchronize_irq(chip->irq);
1516 __hw_end:
1517 if (chip->irq >= 0)
1518 free_irq(chip->irq, (void *)chip);
1519 if (chip->remap_addr)
1520 iounmap(chip->remap_addr);
1521 pci_release_regions(chip->pci);
1522 pci_disable_device(chip->pci);
1523 kfree(chip);
1524 return 0;
1525}
1526
1527static int snd_atiixp_dev_free(snd_device_t *device)
1528{
1529 atiixp_t *chip = device->device_data;
1530 return snd_atiixp_free(chip);
1531}
1532
1533/*
1534 * constructor for chip instance
1535 */
1536static int __devinit snd_atiixp_create(snd_card_t *card,
1537 struct pci_dev *pci,
1538 atiixp_t **r_chip)
1539{
1540 static snd_device_ops_t ops = {
1541 snd_atiixp_dev_free,0,0,0
1542 };
1543 atiixp_t *chip;
1544 int err;
1545
1546 if ((err = pci_enable_device(pci)) < 0)
1547 return err;
1548
1549 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1550 if (chip == NULL) {
1551 pci_disable_device(pci);
1552 return -ENOMEM;
1553 }
1554
1555 spin_lock_init(&chip->reg_lock);
1556 init_MUTEX(&chip->open_mutex);
1557 chip->card = card;
1558 chip->pci = pci;
1559 chip->irq = -1;
1560 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1561 pci_disable_device(pci);
1562 kfree(chip);
1563 return err;
1564 }
1565 chip->addr = pci_resource_start(pci, 0);
1566 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1567 if (chip->remap_addr == NULL) {
1568 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1569 snd_atiixp_free(chip);
1570 return -EIO;
1571 }
1572
1573 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1574 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1575 snd_atiixp_free(chip);
1576 return -EBUSY;
1577 }
1578 chip->irq = pci->irq;
1579 pci_set_master(pci);
1580 synchronize_irq(chip->irq);
1581
1582 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1583 snd_atiixp_free(chip);
1584 return err;
1585 }
1586
1587 snd_card_set_dev(card, &pci->dev);
1588
1589 *r_chip = chip;
1590 return 0;
1591}
1592
1593
1594static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1595 const struct pci_device_id *pci_id)
1596{
1597 static int dev;
1598 snd_card_t *card;
1599 atiixp_t *chip;
1600 unsigned char revision;
1601 int err;
1602
1603 if (dev >= SNDRV_CARDS)
1604 return -ENODEV;
1605 if (!enable[dev]) {
1606 dev++;
1607 return -ENOENT;
1608 }
1609
1610 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1611 if (card == NULL)
1612 return -ENOMEM;
1613
1614 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1615
1616 strcpy(card->driver, spdif_aclink[dev] ? "ATIIXP" : "ATIIXP-SPDMA");
1617 strcpy(card->shortname, "ATI IXP");
1618 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1619 goto __error;
1620
1621 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1622 goto __error;
1623
1624 chip->spdif_over_aclink = spdif_aclink[dev];
1625
1626 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev], ac97_quirk[dev])) < 0)
1627 goto __error;
1628
1629 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1630 goto __error;
1631
1632 snd_atiixp_proc_init(chip);
1633
1634 snd_atiixp_chip_start(chip);
1635
1636 sprintf(card->longname,
1637 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
1638 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1639 chip->addr, chip->irq);
1640
1641 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1642
1643 if ((err = snd_card_register(card)) < 0)
1644 goto __error;
1645
1646 pci_set_drvdata(pci, card);
1647 dev++;
1648 return 0;
1649
1650 __error:
1651 snd_card_free(card);
1652 return err;
1653}
1654
1655static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1656{
1657 snd_card_free(pci_get_drvdata(pci));
1658 pci_set_drvdata(pci, NULL);
1659}
1660
1661static struct pci_driver driver = {
1662 0,0,0,
1663 "ATI IXP AC97 controller",
1664 snd_atiixp_ids,
1665 snd_atiixp_probe,
1666 snd_atiixp_remove,
1667 SND_PCI_PM_CALLBACKS
1668};
1669
1670
1671static int __init alsa_card_atiixp_init(void)
1672{
1673 return pci_module_init(&driver);
1674}
1675
1676static void __exit alsa_card_atiixp_exit(void)
1677{
1678 pci_unregister_driver(&driver);
1679}
1680
1681module_init(alsa_card_atiixp_init)
1682module_exit(alsa_card_atiixp_exit)
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