source: GPL/alsa-kernel/include/sound/ymfpci.h@ 18

Last change on this file since 18 was 18, checked in by vladest, 20 years ago

initial import
File size: 12.2 KB
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1#ifndef __SOUND_YMFPCI_H
2#define __SOUND_YMFPCI_H
3
4/*
5 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
6 * Definitions for Yahama YMF724/740/744/754 chips
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include "pcm.h"
26#include "rawmidi.h"
27#include "ac97_codec.h"
28
29#ifndef PCI_VENDOR_ID_YAMAHA
30#define PCI_VENDOR_ID_YAMAHA 0x1073
31#endif
32#ifndef PCI_DEVICE_ID_YAMAHA_724
33#define PCI_DEVICE_ID_YAMAHA_724 0x0004
34#endif
35#ifndef PCI_DEVICE_ID_YAMAHA_724F
36#define PCI_DEVICE_ID_YAMAHA_724F 0x000d
37#endif
38#ifndef PCI_DEVICE_ID_YAMAHA_740
39#define PCI_DEVICE_ID_YAMAHA_740 0x000a
40#endif
41#ifndef PCI_DEVICE_ID_YAMAHA_740C
42#define PCI_DEVICE_ID_YAMAHA_740C 0x000c
43#endif
44#ifndef PCI_DEVICE_ID_YAMAHA_744
45#define PCI_DEVICE_ID_YAMAHA_744 0x0010
46#endif
47#ifndef PCI_DEVICE_ID_YAMAHA_754
48#define PCI_DEVICE_ID_YAMAHA_754 0x0012
49#endif
50
51/*
52 * Direct registers
53 */
54
55#define YMFREG(chip, reg) (chip->port + YDSXGR_##reg)
56
57#define YDSXGR_INTFLAG 0x0004
58#define YDSXGR_ACTIVITY 0x0006
59#define YDSXGR_GLOBALCTRL 0x0008
60#define YDSXGR_ZVCTRL 0x000A
61#define YDSXGR_TIMERCTRL 0x0010
62#define YDSXGR_TIMERCOUNT 0x0012
63#define YDSXGR_SPDIFOUTCTRL 0x0018
64#define YDSXGR_SPDIFOUTSTATUS 0x001C
65#define YDSXGR_EEPROMCTRL 0x0020
66#define YDSXGR_SPDIFINCTRL 0x0034
67#define YDSXGR_SPDIFINSTATUS 0x0038
68#define YDSXGR_DSPPROGRAMDL 0x0048
69#define YDSXGR_DLCNTRL 0x004C
70#define YDSXGR_GPIOININTFLAG 0x0050
71#define YDSXGR_GPIOININTENABLE 0x0052
72#define YDSXGR_GPIOINSTATUS 0x0054
73#define YDSXGR_GPIOOUTCTRL 0x0056
74#define YDSXGR_GPIOFUNCENABLE 0x0058
75#define YDSXGR_GPIOTYPECONFIG 0x005A
76#define YDSXGR_AC97CMDDATA 0x0060
77#define YDSXGR_AC97CMDADR 0x0062
78#define YDSXGR_PRISTATUSDATA 0x0064
79#define YDSXGR_PRISTATUSADR 0x0066
80#define YDSXGR_SECSTATUSDATA 0x0068
81#define YDSXGR_SECSTATUSADR 0x006A
82#define YDSXGR_SECCONFIG 0x0070
83#define YDSXGR_LEGACYOUTVOL 0x0080
84#define YDSXGR_LEGACYOUTVOLL 0x0080
85#define YDSXGR_LEGACYOUTVOLR 0x0082
86#define YDSXGR_NATIVEDACOUTVOL 0x0084
87#define YDSXGR_NATIVEDACOUTVOLL 0x0084
88#define YDSXGR_NATIVEDACOUTVOLR 0x0086
89#define YDSXGR_ZVOUTVOL 0x0088
90#define YDSXGR_ZVOUTVOLL 0x0088
91#define YDSXGR_ZVOUTVOLR 0x008A
92#define YDSXGR_SECADCOUTVOL 0x008C
93#define YDSXGR_SECADCOUTVOLL 0x008C
94#define YDSXGR_SECADCOUTVOLR 0x008E
95#define YDSXGR_PRIADCOUTVOL 0x0090
96#define YDSXGR_PRIADCOUTVOLL 0x0090
97#define YDSXGR_PRIADCOUTVOLR 0x0092
98#define YDSXGR_LEGACYLOOPVOL 0x0094
99#define YDSXGR_LEGACYLOOPVOLL 0x0094
100#define YDSXGR_LEGACYLOOPVOLR 0x0096
101#define YDSXGR_NATIVEDACLOOPVOL 0x0098
102#define YDSXGR_NATIVEDACLOOPVOLL 0x0098
103#define YDSXGR_NATIVEDACLOOPVOLR 0x009A
104#define YDSXGR_ZVLOOPVOL 0x009C
105#define YDSXGR_ZVLOOPVOLL 0x009E
106#define YDSXGR_ZVLOOPVOLR 0x009E
107#define YDSXGR_SECADCLOOPVOL 0x00A0
108#define YDSXGR_SECADCLOOPVOLL 0x00A0
109#define YDSXGR_SECADCLOOPVOLR 0x00A2
110#define YDSXGR_PRIADCLOOPVOL 0x00A4
111#define YDSXGR_PRIADCLOOPVOLL 0x00A4
112#define YDSXGR_PRIADCLOOPVOLR 0x00A6
113#define YDSXGR_NATIVEADCINVOL 0x00A8
114#define YDSXGR_NATIVEADCINVOLL 0x00A8
115#define YDSXGR_NATIVEADCINVOLR 0x00AA
116#define YDSXGR_NATIVEDACINVOL 0x00AC
117#define YDSXGR_NATIVEDACINVOLL 0x00AC
118#define YDSXGR_NATIVEDACINVOLR 0x00AE
119#define YDSXGR_BUF441OUTVOL 0x00B0
120#define YDSXGR_BUF441OUTVOLL 0x00B0
121#define YDSXGR_BUF441OUTVOLR 0x00B2
122#define YDSXGR_BUF441LOOPVOL 0x00B4
123#define YDSXGR_BUF441LOOPVOLL 0x00B4
124#define YDSXGR_BUF441LOOPVOLR 0x00B6
125#define YDSXGR_SPDIFOUTVOL 0x00B8
126#define YDSXGR_SPDIFOUTVOLL 0x00B8
127#define YDSXGR_SPDIFOUTVOLR 0x00BA
128#define YDSXGR_SPDIFLOOPVOL 0x00BC
129#define YDSXGR_SPDIFLOOPVOLL 0x00BC
130#define YDSXGR_SPDIFLOOPVOLR 0x00BE
131#define YDSXGR_ADCSLOTSR 0x00C0
132#define YDSXGR_RECSLOTSR 0x00C4
133#define YDSXGR_ADCFORMAT 0x00C8
134#define YDSXGR_RECFORMAT 0x00CC
135#define YDSXGR_P44SLOTSR 0x00D0
136#define YDSXGR_STATUS 0x0100
137#define YDSXGR_CTRLSELECT 0x0104
138#define YDSXGR_MODE 0x0108
139#define YDSXGR_SAMPLECOUNT 0x010C
140#define YDSXGR_NUMOFSAMPLES 0x0110
141#define YDSXGR_CONFIG 0x0114
142#define YDSXGR_PLAYCTRLSIZE 0x0140
143#define YDSXGR_RECCTRLSIZE 0x0144
144#define YDSXGR_EFFCTRLSIZE 0x0148
145#define YDSXGR_WORKSIZE 0x014C
146#define YDSXGR_MAPOFREC 0x0150
147#define YDSXGR_MAPOFEFFECT 0x0154
148#define YDSXGR_PLAYCTRLBASE 0x0158
149#define YDSXGR_RECCTRLBASE 0x015C
150#define YDSXGR_EFFCTRLBASE 0x0160
151#define YDSXGR_WORKBASE 0x0164
152#define YDSXGR_DSPINSTRAM 0x1000
153#define YDSXGR_CTRLINSTRAM 0x4000
154
155#define YDSXG_AC97READCMD 0x8000
156#define YDSXG_AC97WRITECMD 0x0000
157
158#define PCIR_DSXG_LEGACY 0x40
159#define PCIR_DSXG_ELEGACY 0x42
160#define PCIR_DSXG_CTRL 0x48
161#define PCIR_DSXG_PWRCTRL1 0x4a
162#define PCIR_DSXG_PWRCTRL2 0x4e
163#define PCIR_DSXG_FMBASE 0x60
164#define PCIR_DSXG_SBBASE 0x62
165#define PCIR_DSXG_MPU401BASE 0x64
166#define PCIR_DSXG_JOYBASE 0x66
167
168#define YDSXG_DSPLENGTH 0x0080
169#define YDSXG_CTRLLENGTH 0x3000
170
171#define YDSXG_DEFAULT_WORK_SIZE 0x0400
172
173#define YDSXG_PLAYBACK_VOICES 64
174#define YDSXG_CAPTURE_VOICES 2
175#define YDSXG_EFFECT_VOICES 5
176
177#define YMFPCI_LEGACY_SBEN (1 << 0) /* soundblaster enable */
178#define YMFPCI_LEGACY_FMEN (1 << 1) /* OPL3 enable */
179#define YMFPCI_LEGACY_JPEN (1 << 2) /* joystick enable */
180#define YMFPCI_LEGACY_MEN (1 << 3) /* MPU401 enable */
181#define YMFPCI_LEGACY_MIEN (1 << 4) /* MPU RX irq enable */
182#define YMFPCI_LEGACY_IOBITS (1 << 5) /* i/o bits range, 0 = 16bit, 1 =10bit */
183#define YMFPCI_LEGACY_SDMA (3 << 6) /* SB DMA select */
184#define YMFPCI_LEGACY_SBIRQ (7 << 8) /* SB IRQ select */
185#define YMFPCI_LEGACY_MPUIRQ (7 << 11) /* MPU IRQ select */
186#define YMFPCI_LEGACY_SIEN (1 << 14) /* serialized IRQ */
187#define YMFPCI_LEGACY_LAD (1 << 15) /* legacy audio disable */
188
189#define YMFPCI_LEGACY2_FMIO (3 << 0) /* OPL3 i/o address (724/740) */
190#define YMFPCI_LEGACY2_SBIO (3 << 2) /* SB i/o address (724/740) */
191#define YMFPCI_LEGACY2_MPUIO (3 << 4) /* MPU401 i/o address (724/740) */
192#define YMFPCI_LEGACY2_JSIO (3 << 6) /* joystick i/o address (724/740) */
193#define YMFPCI_LEGACY2_MAIM (1 << 8) /* MPU401 ack intr mask */
194#define YMFPCI_LEGACY2_SMOD (3 << 11) /* SB DMA mode */
195#define YMFPCI_LEGACY2_SBVER (3 << 13) /* SB version select */
196#define YMFPCI_LEGACY2_IMOD (1 << 15) /* legacy IRQ mode */
197/* SIEN:IMOD 0:0 = legacy irq, 0:1 = INTA, 1:0 = serialized IRQ */
198
199/*
200 *
201 */
202
203typedef struct _snd_ymfpci_playback_bank {
204 u32 format;
205 u32 loop_default;
206 u32 base; /* 32-bit address */
207 u32 loop_start; /* 32-bit offset */
208 u32 loop_end; /* 32-bit offset */
209 u32 loop_frac; /* 8-bit fraction - loop_start */
210 u32 delta_end; /* pitch delta end */
211 u32 lpfK_end;
212 u32 eg_gain_end;
213 u32 left_gain_end;
214 u32 right_gain_end;
215 u32 eff1_gain_end;
216 u32 eff2_gain_end;
217 u32 eff3_gain_end;
218 u32 lpfQ;
219 u32 status;
220 u32 num_of_frames;
221 u32 loop_count;
222 u32 start;
223 u32 start_frac;
224 u32 delta;
225 u32 lpfK;
226 u32 eg_gain;
227 u32 left_gain;
228 u32 right_gain;
229 u32 eff1_gain;
230 u32 eff2_gain;
231 u32 eff3_gain;
232 u32 lpfD1;
233 u32 lpfD2;
234} snd_ymfpci_playback_bank_t;
235
236typedef struct _snd_ymfpci_capture_bank {
237 u32 base; /* 32-bit address */
238 u32 loop_end; /* 32-bit offset */
239 u32 start; /* 32-bit offset */
240 u32 num_of_loops; /* counter */
241} snd_ymfpci_capture_bank_t;
242
243typedef struct _snd_ymfpci_effect_bank {
244 u32 base; /* 32-bit address */
245 u32 loop_end; /* 32-bit offset */
246 u32 start; /* 32-bit offset */
247 u32 temp;
248} snd_ymfpci_effect_bank_t;
249
250typedef struct _snd_ymfpci_voice ymfpci_voice_t;
251typedef struct _snd_ymfpci_pcm ymfpci_pcm_t;
252typedef struct _snd_ymfpci ymfpci_t;
253
254typedef enum {
255 YMFPCI_PCM,
256 YMFPCI_SYNTH,
257 YMFPCI_MIDI
258} ymfpci_voice_type_t;
259
260struct _snd_ymfpci_voice {
261 ymfpci_t *chip;
262 int number;
263 int use: 1,
264 pcm: 1,
265 synth: 1,
266 midi: 1;
267 snd_ymfpci_playback_bank_t *bank;
268 dma_addr_t bank_addr;
269 void (*interrupt)(ymfpci_t *chip, ymfpci_voice_t *voice);
270 ymfpci_pcm_t *ypcm;
271};
272
273typedef enum {
274 PLAYBACK_VOICE,
275 CAPTURE_REC,
276 CAPTURE_AC97,
277 EFFECT_DRY_LEFT,
278 EFFECT_DRY_RIGHT,
279 EFFECT_EFF1,
280 EFFECT_EFF2,
281 EFFECT_EFF3
282} snd_ymfpci_pcm_type_t;
283
284struct _snd_ymfpci_pcm {
285 ymfpci_t *chip;
286 snd_ymfpci_pcm_type_t type;
287 snd_pcm_substream_t *substream;
288 ymfpci_voice_t *voices[2]; /* playback only */
289 int running: 1;
290 int output_front: 1;
291 int output_rear: 1;
292 unsigned int update_pcm_vol;
293 u32 period_size; /* cached from runtime->period_size */
294 u32 buffer_size; /* cached from runtime->buffer_size */
295 u32 period_pos;
296 u32 last_pos;
297 u32 capture_bank_number;
298 u32 shift;
299};
300
301struct _snd_ymfpci {
302 int irq;
303
304 unsigned int device_id; /* PCI device ID */
305 unsigned int rev; /* PCI revision */
306 unsigned long reg_area_phys;
307 unsigned long reg_area_virt;
308 struct resource *res_reg_area;
309 struct resource *fm_res;
310 struct resource *mpu_res;
311
312 unsigned short old_legacy_ctrl;
313#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
314 unsigned int joystick_port;
315 struct semaphore joystick_mutex;
316 struct resource *joystick_res;
317 struct gameport gameport;
318#endif
319
320 struct snd_dma_buffer work_ptr;
321
322 unsigned int bank_size_playback;
323 unsigned int bank_size_capture;
324 unsigned int bank_size_effect;
325 unsigned int work_size;
326
327 void *bank_base_playback;
328 void *bank_base_capture;
329 void *bank_base_effect;
330 void *work_base;
331 dma_addr_t bank_base_playback_addr;
332 dma_addr_t bank_base_capture_addr;
333 dma_addr_t bank_base_effect_addr;
334 dma_addr_t work_base_addr;
335
336 struct snd_dma_buffer ac3_tmp_base;
337
338 u32 *ctrl_playback;
339 snd_ymfpci_playback_bank_t *bank_playback[YDSXG_PLAYBACK_VOICES][2];
340 snd_ymfpci_capture_bank_t *bank_capture[YDSXG_CAPTURE_VOICES][2];
341 snd_ymfpci_effect_bank_t *bank_effect[YDSXG_EFFECT_VOICES][2];
342
343 int start_count;
344
345 u32 active_bank;
346 ymfpci_voice_t voices[64];
347
348 ac97_bus_t *ac97_bus;
349 ac97_t *ac97;
350 snd_rawmidi_t *rawmidi;
351 snd_timer_t *timer;
352
353 struct pci_dev *pci;
354 snd_card_t *card;
355 snd_pcm_t *pcm;
356 snd_pcm_t *pcm2;
357 snd_pcm_t *pcm_spdif;
358 snd_pcm_t *pcm_4ch;
359 snd_pcm_substream_t *capture_substream[YDSXG_CAPTURE_VOICES];
360 snd_pcm_substream_t *effect_substream[YDSXG_EFFECT_VOICES];
361 snd_kcontrol_t *ctl_vol_recsrc;
362 snd_kcontrol_t *ctl_vol_adcrec;
363 snd_kcontrol_t *ctl_vol_spdifrec;
364 unsigned short spdif_bits, spdif_pcm_bits;
365 snd_kcontrol_t *spdif_pcm_ctl;
366 int mode_dup4ch;
367 int rear_opened;
368 int spdif_opened;
369 struct {
370 u16 left;
371 u16 right;
372 snd_kcontrol_t *ctl;
373 } pcm_mixer[32];
374
375 spinlock_t reg_lock;
376 spinlock_t voice_lock;
377 wait_queue_head_t interrupt_sleep;
378 atomic_t interrupt_sleep_count;
379 snd_info_entry_t *proc_entry;
380
381#ifdef CONFIG_PM
382 u32 *saved_regs;
383 u32 saved_ydsxgr_mode;
384#endif
385};
386
387int snd_ymfpci_create(snd_card_t * card,
388 struct pci_dev *pci,
389 unsigned short old_legacy_ctrl,
390 ymfpci_t ** rcodec);
391
392int snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
393int snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
394int snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
395int snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
396int snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch);
397int snd_ymfpci_timer(ymfpci_t *chip, int device);
398#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
399int snd_ymfpci_joystick(ymfpci_t *chip);
400#endif
401
402int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice);
403int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice);
404
405#endif /* __SOUND_YMFPCI_H */
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