| 1 | /*
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| 2 | * Driver for PowerMac AWACS onboard soundchips
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| 3 | * Copyright (c) 2001 by Takashi Iwai <tiwai@suse.de>
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| 4 | * based on dmasound.c.
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| 5 | *
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| 6 | * This program is free software; you can redistribute it and/or modify
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| 7 | * it under the terms of the GNU General Public License as published by
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| 8 | * the Free Software Foundation; either version 2 of the License, or
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| 9 | * (at your option) any later version.
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| 10 | *
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| 11 | * This program is distributed in the hope that it will be useful,
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 14 | * GNU General Public License for more details.
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| 15 | *
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| 16 | * You should have received a copy of the GNU General Public License
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| 17 | * along with this program; if not, write to the Free Software
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| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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| 19 | */
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| 20 |
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| 21 |
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| 22 | #ifndef __AWACS_H
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| 23 | #define __AWACS_H
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| 24 |
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| 25 | /*******************************/
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| 26 | /* AWACs Audio Register Layout */
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| 27 | /*******************************/
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| 28 |
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| 29 | struct awacs_regs {
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| 30 | unsigned control; /* Audio control register */
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| 31 | unsigned pad0[3];
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| 32 | unsigned codec_ctrl; /* Codec control register */
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| 33 | unsigned pad1[3];
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| 34 | unsigned codec_stat; /* Codec status register */
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| 35 | unsigned pad2[3];
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| 36 | unsigned clip_count; /* Clipping count register */
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| 37 | unsigned pad3[3];
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| 38 | unsigned byteswap; /* Data is little-endian if 1 */
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| 39 | };
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| 40 |
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| 41 | /*******************/
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| 42 | /* Audio Bit Masks */
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| 43 | /*******************/
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| 44 |
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| 45 | /* Audio Control Reg Bit Masks */
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| 46 | /* ----- ------- --- --- ----- */
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| 47 | #define MASK_ISFSEL (0xf) /* Input SubFrame Select */
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| 48 | #define MASK_OSFSEL (0xf << 4) /* Output SubFrame Select */
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| 49 | #define MASK_RATE (0x7 << 8) /* Sound Rate */
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| 50 | #define MASK_CNTLERR (0x1 << 11) /* Error */
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| 51 | #define MASK_PORTCHG (0x1 << 12) /* Port Change */
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| 52 | #define MASK_IEE (0x1 << 13) /* Enable Interrupt on Error */
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| 53 | #define MASK_IEPC (0x1 << 14) /* Enable Interrupt on Port Change */
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| 54 | #define MASK_SSFSEL (0x3 << 15) /* Status SubFrame Select */
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| 55 |
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| 56 | /* Audio Codec Control Reg Bit Masks */
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| 57 | /* ----- ----- ------- --- --- ----- */
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| 58 | #define MASK_NEWECMD (0x1 << 24) /* Lock: don't write to reg when 1 */
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| 59 | #define MASK_EMODESEL (0x3 << 22) /* Send info out on which frame? */
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| 60 | #define MASK_EXMODEADDR (0x3ff << 12) /* Extended Mode Address -- 10 bits */
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| 61 | #define MASK_EXMODEDATA (0xfff) /* Extended Mode Data -- 12 bits */
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| 62 |
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| 63 | /* Audio Codec Control Address Values / Masks */
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| 64 | /* ----- ----- ------- ------- ------ - ----- */
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| 65 | #define MASK_ADDR0 (0x0 << 12) /* Expanded Data Mode Address 0 */
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| 66 | #define MASK_ADDR_MUX MASK_ADDR0 /* Mux Control */
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| 67 | #define MASK_ADDR_GAIN MASK_ADDR0
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| 68 |
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| 69 | #define MASK_ADDR1 (0x1 << 12) /* Expanded Data Mode Address 1 */
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| 70 | #define MASK_ADDR_MUTE MASK_ADDR1
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| 71 | #define MASK_ADDR_RATE MASK_ADDR1
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| 72 |
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| 73 | #define MASK_ADDR2 (0x2 << 12) /* Expanded Data Mode Address 2 */
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| 74 | #define MASK_ADDR_VOLA MASK_ADDR2 /* Volume Control A -- Headphones */
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| 75 | #define MASK_ADDR_VOLHD MASK_ADDR2
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| 76 |
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| 77 | #define MASK_ADDR4 (0x4 << 12) /* Expanded Data Mode Address 4 */
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| 78 | #define MASK_ADDR_VOLC MASK_ADDR4 /* Volume Control C -- Speaker */
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| 79 | #define MASK_ADDR_VOLSPK MASK_ADDR4
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| 80 |
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| 81 | /* additional registers of screamer */
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| 82 | #define MASK_ADDR5 (0x5 << 12) /* Expanded Data Mode Address 5 */
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| 83 | #define MASK_ADDR6 (0x6 << 12) /* Expanded Data Mode Address 6 */
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| 84 | #define MASK_ADDR7 (0x7 << 12) /* Expanded Data Mode Address 7 */
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| 85 |
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| 86 | /* Address 0 Bit Masks & Macros */
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| 87 | /* ------- - --- ----- - ------ */
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| 88 | #define MASK_GAINRIGHT (0xf) /* Gain Right Mask */
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| 89 | #define MASK_GAINLEFT (0xf << 4) /* Gain Left Mask */
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| 90 | #define MASK_GAINLINE (0x1 << 8) /* Disable Mic preamp */
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| 91 | #define MASK_GAINMIC (0x0 << 8) /* Enable Mic preamp */
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| 92 |
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| 93 | #define MASK_MUX_CD (0x1 << 9) /* Select CD in MUX */
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| 94 | #define MASK_MUX_MIC (0x1 << 10) /* Select Mic in MUX */
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| 95 | #define MASK_MUX_AUDIN (0x1 << 11) /* Select Audio In in MUX */
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| 96 | #define MASK_MUX_LINE MASK_MUX_AUDIN
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| 97 |
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| 98 | #define GAINRIGHT(x) ((x) & MASK_GAINRIGHT)
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| 99 | #define GAINLEFT(x) (((x) << 4) & MASK_GAINLEFT)
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| 100 |
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| 101 | /* Address 1 Bit Masks */
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| 102 | /* ------- - --- ----- */
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| 103 | #define MASK_ADDR1RES1 (0x3) /* Reserved */
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| 104 | #define MASK_RECALIBRATE (0x1 << 2) /* Recalibrate */
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| 105 | #define MASK_SAMPLERATE (0x7 << 3) /* Sample Rate: */
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| 106 | #define MASK_LOOPTHRU (0x1 << 6) /* Loopthrough Enable */
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| 107 | #define MASK_CMUTE (0x1 << 7) /* Output C (Speaker) Mute when 1 */
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| 108 | #define MASK_SPKMUTE MASK_CMUTE
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| 109 | #define MASK_ADDR1RES2 (0x1 << 8) /* Reserved */
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| 110 | #define MASK_AMUTE (0x1 << 9) /* Output A (Headphone) Mute when 1 */
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| 111 | #define MASK_HDMUTE MASK_AMUTE
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| 112 | #define MASK_PAROUT (0x3 << 10) /* Parallel Out (???) */
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| 113 |
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| 114 | #define SAMPLERATE_48000 (0x0 << 3) /* 48 or 44.1 kHz */
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| 115 | #define SAMPLERATE_32000 (0x1 << 3) /* 32 or 29.4 kHz */
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| 116 | #define SAMPLERATE_24000 (0x2 << 3) /* 24 or 22.05 kHz */
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| 117 | #define SAMPLERATE_19200 (0x3 << 3) /* 19.2 or 17.64 kHz */
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| 118 | #define SAMPLERATE_16000 (0x4 << 3) /* 16 or 14.7 kHz */
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| 119 | #define SAMPLERATE_12000 (0x5 << 3) /* 12 or 11.025 kHz */
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| 120 | #define SAMPLERATE_9600 (0x6 << 3) /* 9.6 or 8.82 kHz */
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| 121 | #define SAMPLERATE_8000 (0x7 << 3) /* 8 or 7.35 kHz */
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| 122 |
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| 123 | /* Address 2 & 4 Bit Masks & Macros */
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| 124 | /* ------- - - - --- ----- - ------ */
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| 125 | #define MASK_OUTVOLRIGHT (0xf) /* Output Right Volume */
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| 126 | #define MASK_ADDR2RES1 (0x2 << 4) /* Reserved */
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| 127 | #define MASK_ADDR4RES1 MASK_ADDR2RES1
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| 128 | #define MASK_OUTVOLLEFT (0xf << 6) /* Output Left Volume */
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| 129 | #define MASK_ADDR2RES2 (0x2 << 10) /* Reserved */
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| 130 | #define MASK_ADDR4RES2 MASK_ADDR2RES2
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| 131 |
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| 132 | #define VOLRIGHT(x) (((~(x)) & MASK_OUTVOLRIGHT))
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| 133 | #define VOLLEFT(x) (((~(x)) << 6) & MASK_OUTVOLLEFT)
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| 134 |
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| 135 | /* Audio Codec Status Reg Bit Masks */
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| 136 | /* ----- ----- ------ --- --- ----- */
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| 137 | #define MASK_EXTEND (0x1 << 23) /* Extend */
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| 138 | #define MASK_VALID (0x1 << 22) /* Valid Data? */
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| 139 | #define MASK_OFLEFT (0x1 << 21) /* Overflow Left */
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| 140 | #define MASK_OFRIGHT (0x1 << 20) /* Overflow Right */
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| 141 | #define MASK_ERRCODE (0xf << 16) /* Error Code */
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| 142 | #define MASK_REVISION (0xf << 12) /* Revision Number */
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| 143 | #define MASK_MFGID (0xf << 8) /* Mfg. ID */
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| 144 | #define MASK_CODSTATRES (0xf << 4) /* bits 4 - 7 reserved */
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| 145 | #define MASK_INPPORT (0xf) /* Input Port */
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| 146 | #define MASK_HDPCONN 8 /* headphone plugged in */
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| 147 |
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| 148 | /* Clipping Count Reg Bit Masks */
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| 149 | /* -------- ----- --- --- ----- */
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| 150 | #define MASK_CLIPLEFT (0xff << 7) /* Clipping Count, Left Channel */
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| 151 | #define MASK_CLIPRIGHT (0xff) /* Clipping Count, Right Channel */
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| 152 |
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| 153 | /* DBDMA ChannelStatus Bit Masks */
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| 154 | /* ----- ------------- --- ----- */
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| 155 | #define MASK_CSERR (0x1 << 7) /* Error */
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| 156 | #define MASK_EOI (0x1 << 6) /* End of Input -- only for Input Channel */
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| 157 | #define MASK_CSUNUSED (0x1f << 1) /* bits 1-5 not used */
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| 158 | #define MASK_WAIT (0x1) /* Wait */
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| 159 |
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| 160 | /* Various Rates */
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| 161 | /* ------- ----- */
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| 162 | #define RATE_48000 (0x0 << 8) /* 48 kHz */
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| 163 | #define RATE_44100 (0x0 << 8) /* 44.1 kHz */
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| 164 | #define RATE_32000 (0x1 << 8) /* 32 kHz */
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| 165 | #define RATE_29400 (0x1 << 8) /* 29.4 kHz */
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| 166 | #define RATE_24000 (0x2 << 8) /* 24 kHz */
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| 167 | #define RATE_22050 (0x2 << 8) /* 22.05 kHz */
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| 168 | #define RATE_19200 (0x3 << 8) /* 19.2 kHz */
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| 169 | #define RATE_17640 (0x3 << 8) /* 17.64 kHz */
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| 170 | #define RATE_16000 (0x4 << 8) /* 16 kHz */
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| 171 | #define RATE_14700 (0x4 << 8) /* 14.7 kHz */
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| 172 | #define RATE_12000 (0x5 << 8) /* 12 kHz */
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| 173 | #define RATE_11025 (0x5 << 8) /* 11.025 kHz */
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| 174 | #define RATE_9600 (0x6 << 8) /* 9.6 kHz */
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| 175 | #define RATE_8820 (0x6 << 8) /* 8.82 kHz */
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| 176 | #define RATE_8000 (0x7 << 8) /* 8 kHz */
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| 177 | #define RATE_7350 (0x7 << 8) /* 7.35 kHz */
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| 178 |
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| 179 | #define RATE_LOW 1 /* HIGH = 48kHz, etc; LOW = 44.1kHz, etc. */
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| 180 |
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| 181 |
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| 182 | #endif /* __AWACS_H */
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