source: GPL/alsa-kernel/include/sound/asound.old@ 18

Last change on this file since 18 was 18, checked in by vladest, 20 years ago

initial import
File size: 38.3 KB
Line 
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
26#if defined(LINUX) || defined(__LINUX__) || defined(__linux__)
27#include <linux/ioctl.h>
28#include <endian.h>
29#if __BYTE_ORDER == __LITTLE_ENDIAN
30#define SNDRV_LITTLE_ENDIAN
31#elif __BYTE_ORDER == __BIG_ENDIAN
32#define SNDRV_BIG_ENDIAN
33#else
34#error "Unsupported endian..."
35#endif
36#endif
37#ifndef __KERNEL__
38#include <sys/time.h>
39#include <sys/types.h>
40#endif
41
42struct iovec {
43 char *iov_base; /* Base address. */
44#ifdef __32BIT__
45 size_t iov_len; /* Length. */
46#else
47 long iov_len; /* Length. */
48#endif
49};
50
51/*
52 * protocol version
53 */
54
55#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
56#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
57#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
58#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
59#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
60 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
61 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
62 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
63
64/****************************************************************************
65 * *
66 * Digital audio interface *
67 * *
68 ****************************************************************************/
69
70struct sndrv_aes_iec958 {
71 unsigned char status[24]; /* AES/IEC958 channel status bits */
72 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
73 unsigned char pad; /* nothing */
74 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
75};
76
77/****************************************************************************
78 * *
79 * Section for driver hardware dependent interface - /dev/snd/hw? *
80 * *
81 ****************************************************************************/
82
83#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
84
85enum sndrv_hwdep_iface {
86 SNDRV_HWDEP_IFACE_OPL2 = 0,
87 SNDRV_HWDEP_IFACE_OPL3,
88 SNDRV_HWDEP_IFACE_OPL4,
89 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
90 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
91 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
92 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
93 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
94 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
95 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
96 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
97 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
98 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
99 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
100 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
101
102 /* Don't forget to change the following: */
103 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_PCXHR
104};
105
106struct sndrv_hwdep_info {
107 unsigned int device; /* WR: device number */
108 int card; /* R: card number */
109 unsigned char id[64]; /* ID (user selectable) */
110 unsigned char name[80]; /* hwdep name */
111 enum sndrv_hwdep_iface iface; /* hwdep interface */
112 unsigned char reserved[64]; /* reserved for future */
113};
114
115/* generic DSP loader */
116struct sndrv_hwdep_dsp_status {
117 unsigned int version; /* R: driver-specific version */
118 unsigned char id[32]; /* R: driver-specific ID string */
119 unsigned int num_dsps; /* R: number of DSP images to transfer */
120 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
121 unsigned int chip_ready; /* R: 1 = initialization finished */
122 unsigned char reserved[16]; /* reserved for future use */
123};
124
125struct sndrv_hwdep_dsp_image {
126 unsigned int index; /* W: DSP index */
127 unsigned char name[64]; /* W: ID (e.g. file name) */
128 unsigned char *image; /* W: binary image */
129 size_t length; /* W: size of image in bytes */
130 unsigned long driver_data; /* W: driver-specific data */
131};
132
133enum {
134 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
135 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct sndrv_hwdep_info),
136 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct sndrv_hwdep_dsp_status),
137 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct sndrv_hwdep_dsp_image)
138};
139
140/*****************************************************************************
141 * *
142 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
143 * *
144 *****************************************************************************/
145
146#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
147
148typedef unsigned long sndrv_pcm_uframes_t;
149typedef long sndrv_pcm_sframes_t;
150
151enum sndrv_pcm_class {
152 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
153 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
154 SNDRV_PCM_CLASS_MODEM, /* software modem class */
155 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
156 /* Don't forget to change the following: */
157 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
158};
159
160enum sndrv_pcm_subclass {
161 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
162 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
163 /* Don't forget to change the following: */
164 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
165};
166
167enum sndrv_pcm_stream {
168 SNDRV_PCM_STREAM_PLAYBACK = 0,
169 SNDRV_PCM_STREAM_CAPTURE,
170 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
171};
172
173enum sndrv_pcm_access {
174 SNDRV_PCM_ACCESS_MMAP_INTERLEAVED = 0, /* interleaved mmap */
175 SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED, /* noninterleaved mmap */
176 SNDRV_PCM_ACCESS_MMAP_COMPLEX, /* complex mmap */
177 SNDRV_PCM_ACCESS_RW_INTERLEAVED, /* readi/writei */
178 SNDRV_PCM_ACCESS_RW_NONINTERLEAVED, /* readn/writen */
179 SNDRV_PCM_ACCESS_LAST = SNDRV_PCM_ACCESS_RW_NONINTERLEAVED,
180};
181
182enum sndrv_pcm_format {
183 SNDRV_PCM_FORMAT_S8 = 0,
184 SNDRV_PCM_FORMAT_U8,
185 SNDRV_PCM_FORMAT_S16_LE,
186 SNDRV_PCM_FORMAT_S16_BE,
187 SNDRV_PCM_FORMAT_U16_LE,
188 SNDRV_PCM_FORMAT_U16_BE,
189 SNDRV_PCM_FORMAT_S24_LE, /* low three bytes */
190 SNDRV_PCM_FORMAT_S24_BE, /* low three bytes */
191 SNDRV_PCM_FORMAT_U24_LE, /* low three bytes */
192 SNDRV_PCM_FORMAT_U24_BE, /* low three bytes */
193 SNDRV_PCM_FORMAT_S32_LE,
194 SNDRV_PCM_FORMAT_S32_BE,
195 SNDRV_PCM_FORMAT_U32_LE,
196 SNDRV_PCM_FORMAT_U32_BE,
197 SNDRV_PCM_FORMAT_FLOAT_LE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
198 SNDRV_PCM_FORMAT_FLOAT_BE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
199 SNDRV_PCM_FORMAT_FLOAT64_LE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
200 SNDRV_PCM_FORMAT_FLOAT64_BE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
201 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE, /* IEC-958 subframe, Little Endian */
202 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE, /* IEC-958 subframe, Big Endian */
203 SNDRV_PCM_FORMAT_MU_LAW,
204 SNDRV_PCM_FORMAT_A_LAW,
205 SNDRV_PCM_FORMAT_IMA_ADPCM,
206 SNDRV_PCM_FORMAT_MPEG,
207 SNDRV_PCM_FORMAT_GSM,
208 SNDRV_PCM_FORMAT_SPECIAL = 31,
209 SNDRV_PCM_FORMAT_S24_3LE = 32, /* in three bytes */
210 SNDRV_PCM_FORMAT_S24_3BE, /* in three bytes */
211 SNDRV_PCM_FORMAT_U24_3LE, /* in three bytes */
212 SNDRV_PCM_FORMAT_U24_3BE, /* in three bytes */
213 SNDRV_PCM_FORMAT_S20_3LE, /* in three bytes */
214 SNDRV_PCM_FORMAT_S20_3BE, /* in three bytes */
215 SNDRV_PCM_FORMAT_U20_3LE, /* in three bytes */
216 SNDRV_PCM_FORMAT_U20_3BE, /* in three bytes */
217 SNDRV_PCM_FORMAT_S18_3LE, /* in three bytes */
218 SNDRV_PCM_FORMAT_S18_3BE, /* in three bytes */
219 SNDRV_PCM_FORMAT_U18_3LE, /* in three bytes */
220 SNDRV_PCM_FORMAT_U18_3BE, /* in three bytes */
221 SNDRV_PCM_FORMAT_LAST = SNDRV_PCM_FORMAT_U18_3BE,
222
223#ifdef SNDRV_LITTLE_ENDIAN
224 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_LE,
225 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_LE,
226 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_LE,
227 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_LE,
228 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_LE,
229 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_LE,
230 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_LE,
231 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_LE,
232 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE,
233#endif
234#ifdef SNDRV_BIG_ENDIAN
235 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_BE,
236 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_BE,
237 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_BE,
238 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_BE,
239 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_BE,
240 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_BE,
241 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_BE,
242 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_BE,
243 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE,
244#endif
245};
246
247enum sndrv_pcm_subformat {
248 SNDRV_PCM_SUBFORMAT_STD = 0,
249 SNDRV_PCM_SUBFORMAT_LAST = SNDRV_PCM_SUBFORMAT_STD,
250};
251
252#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
253#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
254#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
255#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
256#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
257#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
258#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
259#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
260#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
261#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
262#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
263#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
264#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
265#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
266#define SNDRV_PCM_INFO_NONATOMIC_OPS 0x00800000 /* non-atomic prepare callback */
267
268enum sndrv_pcm_state {
269 SNDRV_PCM_STATE_OPEN = 0, /* stream is open */
270 SNDRV_PCM_STATE_SETUP, /* stream has a setup */
271 SNDRV_PCM_STATE_PREPARED, /* stream is ready to start */
272 SNDRV_PCM_STATE_RUNNING, /* stream is running */
273 SNDRV_PCM_STATE_XRUN, /* stream reached an xrun */
274 SNDRV_PCM_STATE_DRAINING, /* stream is draining */
275 SNDRV_PCM_STATE_PAUSED, /* stream is paused */
276 SNDRV_PCM_STATE_SUSPENDED, /* hardware is suspended */
277 SNDRV_PCM_STATE_DISCONNECTED, /* hardware is disconnected */
278 SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED,
279};
280
281enum {
282 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
283 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
284 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
285};
286
287union sndrv_pcm_sync_id {
288 unsigned char id[16];
289 unsigned short id16[8];
290 unsigned int id32[4];
291};
292
293struct sndrv_pcm_info {
294 unsigned int device; /* RO/WR (control): device number */
295 unsigned int subdevice; /* RO/WR (control): subdevice number */
296 enum sndrv_pcm_stream stream; /* RO/WR (control): stream number */
297 int card; /* R: card number */
298 unsigned char id[64]; /* ID (user selectable) */
299 unsigned char name[80]; /* name of this device */
300 unsigned char subname[32]; /* subdevice name */
301 enum sndrv_pcm_class dev_class; /* SNDRV_PCM_CLASS_* */
302 enum sndrv_pcm_subclass dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
303 unsigned int subdevices_count;
304 unsigned int subdevices_avail;
305 union sndrv_pcm_sync_id sync; /* hardware synchronization ID */
306 unsigned char reserved[64]; /* reserved for future... */
307};
308
309enum sndrv_pcm_hw_param {
310 SNDRV_PCM_HW_PARAM_ACCESS = 0, /* Access type */
311 SNDRV_PCM_HW_PARAM_FIRST_MASK = SNDRV_PCM_HW_PARAM_ACCESS,
312#ifdef TARGET_OS2
313 SNDRV_PCM_HW_PARAM_RATE_MASK,
314#endif
315 SNDRV_PCM_HW_PARAM_FORMAT, /* Format */
316 SNDRV_PCM_HW_PARAM_SUBFORMAT, /* Subformat */
317 SNDRV_PCM_HW_PARAM_LAST_MASK = SNDRV_PCM_HW_PARAM_SUBFORMAT,
318
319 SNDRV_PCM_HW_PARAM_SAMPLE_BITS = 8, /* Bits per sample */
320 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL = SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
321 SNDRV_PCM_HW_PARAM_FRAME_BITS, /* Bits per frame */
322 SNDRV_PCM_HW_PARAM_CHANNELS, /* Channels */
323 SNDRV_PCM_HW_PARAM_RATE, /* Approx rate */
324 SNDRV_PCM_HW_PARAM_PERIOD_TIME, /* Approx distance between interrupts
325 in us */
326 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, /* Approx frames between interrupts */
327 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, /* Approx bytes between interrupts */
328 SNDRV_PCM_HW_PARAM_PERIODS, /* Approx interrupts per buffer */
329 SNDRV_PCM_HW_PARAM_BUFFER_TIME, /* Approx duration of buffer in us */
330 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, /* Size of buffer in frames */
331 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, /* Size of buffer in bytes */
332 SNDRV_PCM_HW_PARAM_TICK_TIME, /* Approx tick duration in us */
333 SNDRV_PCM_HW_PARAM_LAST_INTERVAL = SNDRV_PCM_HW_PARAM_TICK_TIME
334};
335
336//#define SNDRV_PCM_HW_PARAMS_RUNTIME (1<<0)
337#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
338
339struct sndrv_interval {
340 unsigned int min, max;
341 unsigned int openmin:1,
342 openmax:1,
343 integer:1,
344 empty:1;
345};
346
347#define SNDRV_MASK_MAX 256
348
349struct sndrv_mask {
350 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
351};
352
353struct sndrv_pcm_hw_params {
354 unsigned int flags;
355 struct sndrv_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
356 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
357 struct sndrv_mask mres[5]; /* reserved masks */
358 struct sndrv_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
359 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
360 struct sndrv_interval ires[9]; /* reserved intervals */
361 unsigned int rmask; /* W: requested masks */
362 unsigned int cmask; /* R: changed masks */
363 unsigned int info; /* R: Info flags for returned setup */
364 unsigned int msbits; /* R: used most significant bits */
365 unsigned int rate_num; /* R: rate numerator */
366 unsigned int rate_den; /* R: rate denominator */
367 sndrv_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
368 unsigned char reserved[64]; /* reserved for future */
369};
370
371enum sndrv_pcm_tstamp {
372 SNDRV_PCM_TSTAMP_NONE = 0,
373 SNDRV_PCM_TSTAMP_MMAP,
374 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
375};
376
377struct sndrv_pcm_sw_params {
378 enum sndrv_pcm_tstamp tstamp_mode; /* timestamp mode */
379 unsigned int period_step;
380 unsigned int sleep_min; /* min ticks to sleep */
381 sndrv_pcm_uframes_t avail_min; /* min avail frames for wakeup */
382 sndrv_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
383 sndrv_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
384 sndrv_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
385 sndrv_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
386 sndrv_pcm_uframes_t silence_size; /* silence block size */
387 sndrv_pcm_uframes_t boundary; /* pointers wrap point */
388 unsigned char reserved[64]; /* reserved for future */
389};
390
391struct sndrv_pcm_channel_info {
392 unsigned int channel;
393 off_t offset; /* mmap offset */
394 unsigned int first; /* offset to first sample in bits */
395 unsigned int step; /* samples distance in bits */
396};
397
398struct sndrv_pcm_status {
399 enum sndrv_pcm_state state; /* stream state */
400 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
401 struct timespec tstamp; /* reference timestamp */
402 sndrv_pcm_uframes_t appl_ptr; /* appl ptr */
403 sndrv_pcm_uframes_t hw_ptr; /* hw ptr */
404 sndrv_pcm_sframes_t delay; /* current delay in frames */
405 sndrv_pcm_uframes_t avail; /* number of frames available */
406 sndrv_pcm_uframes_t avail_max; /* max frames available on hw since last status */
407 sndrv_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
408 enum sndrv_pcm_state suspended_state; /* suspended stream state */
409 unsigned char reserved[60]; /* must be filled with zero */
410};
411
412struct sndrv_pcm_mmap_status {
413 enum sndrv_pcm_state state; /* RO: state - SNDRV_PCM_STATE_XXXX */
414 int pad1; /* Needed for 64 bit alignment */
415 sndrv_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
416 struct timespec tstamp; /* Timestamp */
417 enum sndrv_pcm_state suspended_state; /* RO: suspended stream state */
418};
419
420struct sndrv_pcm_mmap_control {
421 sndrv_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
422 sndrv_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
423};
424
425#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
426#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
427#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
428
429struct sndrv_pcm_sync_ptr {
430 unsigned int flags;
431 union {
432 struct sndrv_pcm_mmap_status status;
433 unsigned char reserved[64];
434 } s;
435 union {
436 struct sndrv_pcm_mmap_control control;
437 unsigned char reserved[64];
438 } c;
439};
440
441struct sndrv_xferi {
442 sndrv_pcm_sframes_t result;
443 void *buf;
444 sndrv_pcm_uframes_t frames;
445};
446
447struct sndrv_xfern {
448 sndrv_pcm_sframes_t result;
449 void **bufs;
450 sndrv_pcm_uframes_t frames;
451};
452
453#ifdef TARGET_OS2
454#define SNDRV_PCM_VOL_FRONT_LEFT 0
455#define SNDRV_PCM_VOL_FRONT_RIGHT 1
456#define SNDRV_PCM_VOL_REAR_LEFT 2
457#define SNDRV_PCM_VOL_REAR_RIGHT 3
458#define SNDRV_PCM_VOL_CENTER 4
459#define SNDRV_PCM_VOL_LFE 5
460
461#define SNDRV_PCM_VOL_MAX 100
462
463struct snd_pcm_volume {
464 int nrchannels;
465 int volume[6];
466};
467#endif
468
469enum {
470 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
471 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct sndrv_pcm_info),
472 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
473 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct sndrv_pcm_hw_params),
474 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct sndrv_pcm_hw_params),
475 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
476 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct sndrv_pcm_sw_params),
477 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct sndrv_pcm_status),
478 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, sndrv_pcm_sframes_t),
479 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
480 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct sndrv_pcm_sync_ptr),
481 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct sndrv_pcm_channel_info),
482 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
483 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
484 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
485 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
486 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
487 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
488 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, sndrv_pcm_uframes_t),
489 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
490 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
491 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, sndrv_pcm_uframes_t),
492 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct sndrv_xferi),
493 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct sndrv_xferi),
494 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct sndrv_xfern),
495 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct sndrv_xfern),
496 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
497 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
498#ifdef TARGET_OS2
499 SNDRV_PCM_IOCTL_SETVOLUME = _IOW('A', 0x62, struct snd_pcm_volume),
500 SNDRV_PCM_IOCTL_GETVOLUME = _IOR('A', 0x63, struct snd_pcm_volume),
501#endif
502};
503
504/* Trick to make alsa-lib/acinclude.m4 happy */
505#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
506
507/*****************************************************************************
508 * *
509 * MIDI v1.0 interface *
510 * *
511 *****************************************************************************/
512
513/*
514 * Raw MIDI section - /dev/snd/midi??
515 */
516
517#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
518
519enum sndrv_rawmidi_stream {
520 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
521 SNDRV_RAWMIDI_STREAM_INPUT,
522 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
523};
524
525#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
526#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
527#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
528
529struct sndrv_rawmidi_info {
530 unsigned int device; /* RO/WR (control): device number */
531 unsigned int subdevice; /* RO/WR (control): subdevice number */
532 enum sndrv_rawmidi_stream stream; /* WR: stream */
533 int card; /* R: card number */
534 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
535 unsigned char id[64]; /* ID (user selectable) */
536 unsigned char name[80]; /* name of device */
537 unsigned char subname[32]; /* name of active or selected subdevice */
538 unsigned int subdevices_count;
539 unsigned int subdevices_avail;
540 unsigned char reserved[64]; /* reserved for future use */
541};
542
543struct sndrv_rawmidi_params {
544 enum sndrv_rawmidi_stream stream;
545 size_t buffer_size; /* queue size in bytes */
546 size_t avail_min; /* minimum avail bytes for wakeup */
547 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
548 unsigned char reserved[16]; /* reserved for future use */
549};
550
551struct sndrv_rawmidi_status {
552 enum sndrv_rawmidi_stream stream;
553 struct timespec tstamp; /* Timestamp */
554 size_t avail; /* available bytes */
555 size_t xruns; /* count of overruns since last status (in bytes) */
556 unsigned char reserved[16]; /* reserved for future use */
557};
558
559enum {
560 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
561 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct sndrv_rawmidi_info),
562 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct sndrv_rawmidi_params),
563 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct sndrv_rawmidi_status),
564 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
565 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
566};
567
568/*
569 * Timer section - /dev/snd/timer
570 */
571
572#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
573
574enum sndrv_timer_class {
575 SNDRV_TIMER_CLASS_NONE = -1,
576 SNDRV_TIMER_CLASS_SLAVE = 0,
577 SNDRV_TIMER_CLASS_GLOBAL,
578 SNDRV_TIMER_CLASS_CARD,
579 SNDRV_TIMER_CLASS_PCM,
580 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
581};
582
583/* slave timer classes */
584enum sndrv_timer_slave_class {
585 SNDRV_TIMER_SCLASS_NONE = 0,
586 SNDRV_TIMER_SCLASS_APPLICATION,
587 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
588 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
589 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
590};
591
592/* global timers (device member) */
593#define SNDRV_TIMER_GLOBAL_SYSTEM 0
594#define SNDRV_TIMER_GLOBAL_RTC 1
595#define SNDRV_TIMER_GLOBAL_HPET 2
596
597/* info flags */
598#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
599
600struct sndrv_timer_id {
601 enum sndrv_timer_class dev_class;
602 enum sndrv_timer_slave_class dev_sclass;
603 int card;
604 int device;
605 int subdevice;
606};
607
608struct sndrv_timer_ginfo {
609 struct sndrv_timer_id tid; /* requested timer ID */
610 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
611 int card; /* card number */
612 unsigned char id[64]; /* timer identification */
613 unsigned char name[80]; /* timer name */
614 unsigned long reserved0; /* reserved for future use */
615 unsigned long resolution; /* average period resolution in ns */
616 unsigned long resolution_min; /* minimal period resolution in ns */
617 unsigned long resolution_max; /* maximal period resolution in ns */
618 unsigned int clients; /* active timer clients */
619 unsigned char reserved[32];
620};
621
622struct sndrv_timer_gparams {
623 struct sndrv_timer_id tid; /* requested timer ID */
624 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
625 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
626 unsigned char reserved[32];
627};
628
629struct sndrv_timer_gstatus {
630 struct sndrv_timer_id tid; /* requested timer ID */
631 unsigned long resolution; /* current period resolution in ns */
632 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
633 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
634 unsigned char reserved[32];
635};
636
637struct sndrv_timer_select {
638 struct sndrv_timer_id id; /* bind to timer ID */
639 unsigned char reserved[32]; /* reserved */
640};
641
642struct sndrv_timer_info {
643 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
644 int card; /* card number */
645 unsigned char id[64]; /* timer identificator */
646 unsigned char name[80]; /* timer name */
647 unsigned long reserved0; /* reserved for future use */
648 unsigned long resolution; /* average period resolution in ns */
649 unsigned char reserved[64]; /* reserved */
650};
651
652#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
653#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
654#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
655
656struct sndrv_timer_params {
657 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
658 unsigned int ticks; /* requested resolution in ticks */
659 unsigned int queue_size; /* total size of queue (32-1024) */
660 unsigned int reserved0; /* reserved, was: failure locations */
661 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
662 unsigned char reserved[60]; /* reserved */
663};
664
665struct sndrv_timer_status {
666 struct timespec tstamp; /* Timestamp - last update */
667 unsigned int resolution; /* current period resolution in ns */
668 unsigned int lost; /* counter of master tick lost */
669 unsigned int overrun; /* count of read queue overruns */
670 unsigned int queue; /* used queue size */
671 unsigned char reserved[64]; /* reserved */
672};
673
674enum {
675 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
676 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct sndrv_timer_id),
677 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
678 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct sndrv_timer_ginfo),
679 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct sndrv_timer_gparams),
680 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct sndrv_timer_gstatus),
681 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct sndrv_timer_select),
682 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct sndrv_timer_info),
683 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct sndrv_timer_params),
684 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct sndrv_timer_status),
685 SNDRV_TIMER_IOCTL_START = _IO('T', 0x20),
686 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0x21),
687 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0x22),
688 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0x23),
689};
690
691struct sndrv_timer_read {
692 unsigned int resolution;
693 unsigned int ticks;
694};
695
696enum sndrv_timer_event {
697 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
698 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
699 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
700 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
701 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
702 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
703 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
704 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
705 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
706 /* master timer events for slave timer instances */
707 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
708 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
709 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
710 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
711 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
712 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
713};
714
715struct sndrv_timer_tread {
716 enum sndrv_timer_event event;
717 struct timespec tstamp;
718 unsigned int val;
719};
720
721/****************************************************************************
722 * *
723 * Section for driver control interface - /dev/snd/control? *
724 * *
725 ****************************************************************************/
726
727#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 3)
728
729struct sndrv_ctl_card_info {
730 int card; /* card number */
731 int pad; /* reserved for future (was type) */
732 unsigned char id[16]; /* ID of card (user selectable) */
733 unsigned char driver[16]; /* Driver name */
734 unsigned char name[32]; /* Short name of soundcard */
735 unsigned char longname[80]; /* name + info text about soundcard */
736 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
737 unsigned char mixername[80]; /* visual mixer identification */
738 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
739 unsigned char reserved[48]; /* reserved for future */
740};
741
742enum sndrv_ctl_elem_type {
743 SNDRV_CTL_ELEM_TYPE_NONE = 0, /* invalid */
744 SNDRV_CTL_ELEM_TYPE_BOOLEAN, /* boolean type */
745 SNDRV_CTL_ELEM_TYPE_INTEGER, /* integer type */
746 SNDRV_CTL_ELEM_TYPE_ENUMERATED, /* enumerated type */
747 SNDRV_CTL_ELEM_TYPE_BYTES, /* byte array */
748 SNDRV_CTL_ELEM_TYPE_IEC958, /* IEC958 (S/PDIF) setup */
749 SNDRV_CTL_ELEM_TYPE_INTEGER64, /* 64-bit integer type */
750 SNDRV_CTL_ELEM_TYPE_LAST = SNDRV_CTL_ELEM_TYPE_INTEGER64,
751};
752
753enum sndrv_ctl_elem_iface {
754 SNDRV_CTL_ELEM_IFACE_CARD = 0, /* global control */
755 SNDRV_CTL_ELEM_IFACE_HWDEP, /* hardware dependent device */
756 SNDRV_CTL_ELEM_IFACE_MIXER, /* virtual mixer device */
757 SNDRV_CTL_ELEM_IFACE_PCM, /* PCM device */
758 SNDRV_CTL_ELEM_IFACE_RAWMIDI, /* RawMidi device */
759 SNDRV_CTL_ELEM_IFACE_TIMER, /* timer device */
760 SNDRV_CTL_ELEM_IFACE_SEQUENCER, /* sequencer client */
761 SNDRV_CTL_ELEM_IFACE_LAST = SNDRV_CTL_ELEM_IFACE_SEQUENCER,
762};
763
764#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
765#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
766#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
767#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
768#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<2) /* when was control changed */
769#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
770#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
771#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
772#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
773#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
774#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
775
776/* for further details see the ACPI and PCI power management specification */
777#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
778#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
779#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
780#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
781#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
782#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
783
784struct sndrv_ctl_elem_id {
785 unsigned int numid; /* numeric identifier, zero = invalid */
786 enum sndrv_ctl_elem_iface iface; /* interface identifier */
787 unsigned int device; /* device/client number */
788 unsigned int subdevice; /* subdevice (substream) number */
789 unsigned char name[44]; /* ASCII name of item */
790 unsigned int index; /* index of item */
791};
792
793struct sndrv_ctl_elem_list {
794 unsigned int offset; /* W: first element ID to get */
795 unsigned int space; /* W: count of element IDs to get */
796 unsigned int used; /* R: count of element IDs set */
797 unsigned int count; /* R: count of all elements */
798 struct sndrv_ctl_elem_id *pids; /* R: IDs */
799 unsigned char reserved[50];
800};
801
802struct sndrv_ctl_elem_info {
803 struct sndrv_ctl_elem_id id; /* W: element ID */
804 enum sndrv_ctl_elem_type type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
805 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
806 unsigned int count; /* count of values */
807 pid_t owner; /* owner's PID of this control */
808 union {
809 struct {
810 long min; /* R: minimum value */
811 long max; /* R: maximum value */
812 long step; /* R: step (0 variable) */
813 } integer;
814 struct {
815 long long min; /* R: minimum value */
816 long long max; /* R: maximum value */
817 long long step; /* R: step (0 variable) */
818 } integer64;
819 struct {
820 unsigned int items; /* R: number of items */
821 unsigned int item; /* W: item number */
822 char name[64]; /* R: value name */
823 } enumerated;
824 unsigned char reserved[128];
825 } value;
826 union {
827 unsigned short d[4]; /* dimensions */
828 unsigned short *d_ptr; /* indirect */
829 } dimen;
830 unsigned char reserved[64-4*sizeof(unsigned short)];
831};
832
833struct sndrv_ctl_elem_value {
834 struct sndrv_ctl_elem_id id; /* W: element ID */
835 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
836 union {
837 union {
838 long value[128];
839 long *value_ptr;
840 } integer;
841 union {
842 long long value[64];
843 long long *value_ptr;
844 } integer64;
845 union {
846 unsigned int item[128];
847 unsigned int *item_ptr;
848 } enumerated;
849 union {
850 unsigned char data[512];
851 unsigned char *data_ptr;
852 } bytes;
853 struct sndrv_aes_iec958 iec958;
854 } value; /* RO */
855 struct timespec tstamp;
856 unsigned char reserved[128-sizeof(struct timespec)];
857};
858
859enum {
860 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
861 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct sndrv_ctl_card_info),
862 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct sndrv_ctl_elem_list),
863 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct sndrv_ctl_elem_info),
864 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct sndrv_ctl_elem_value),
865 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct sndrv_ctl_elem_value),
866 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct sndrv_ctl_elem_id),
867 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct sndrv_ctl_elem_id),
868 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
869 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct sndrv_ctl_elem_info),
870 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct sndrv_ctl_elem_info),
871 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct sndrv_ctl_elem_id),
872 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
873 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct sndrv_hwdep_info),
874 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
875 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct sndrv_pcm_info),
876 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
877 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
878 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct sndrv_rawmidi_info),
879 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
880 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
881 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
882};
883
884/*
885 * Read interface.
886 */
887
888enum sndrv_ctl_event_type {
889 SNDRV_CTL_EVENT_ELEM = 0,
890 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
891};
892
893#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
894#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
895#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
896#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
897
898struct sndrv_ctl_event {
899 enum sndrv_ctl_event_type type; /* event type - SNDRV_CTL_EVENT_* */
900 union {
901 struct {
902 unsigned int mask;
903 struct sndrv_ctl_elem_id id;
904 } elem;
905 unsigned char data8[60];
906 } data;
907};
908
909/*
910 * Control names
911 */
912
913#define SNDRV_CTL_NAME_NONE ""
914#define SNDRV_CTL_NAME_PLAYBACK "Playback "
915#define SNDRV_CTL_NAME_CAPTURE "Capture "
916
917#define SNDRV_CTL_NAME_IEC958_NONE ""
918#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
919#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
920#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
921#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
922#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
923#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
924#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
925#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
926
927/*
928 *
929 */
930
931struct sndrv_xferv {
932 const struct iovec *vector;
933 unsigned long count;
934};
935
936enum {
937 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct sndrv_xferv),
938 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct sndrv_xferv),
939};
940
941#define msleep(msecs) \
942 do { \
943 set_current_state(TASK_UNINTERRUPTIBLE); \
944 schedule_timeout(((msecs) * HZ + 999) / 1000); \
945 } while (0)
946
947//#define need_resched() (current->need_resched)
948
949#ifndef __iomem
950#define __iomem
951#endif
952
953#ifndef cond_resched
954#define cond_resched() \
955 do { \
956 if (1) { \
957 set_current_state(TASK_RUNNING); \
958 schedule(); \
959 } \
960 } while (0)
961#endif
962
963#endif /* __SOUND_ASOUND_H */
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