source: GPL/alsa-kernel/include/sound/asound.h@ 18

Last change on this file since 18 was 18, checked in by vladest, 20 years ago

initial import
File size: 39.3 KB
Line 
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
26#if defined(LINUX) || defined(__LINUX__) || defined(__linux__)
27#include <linux/ioctl.h>
28#include <endian.h>
29#if __BYTE_ORDER == __LITTLE_ENDIAN
30#define SNDRV_LITTLE_ENDIAN
31#elif __BYTE_ORDER == __BIG_ENDIAN
32#define SNDRV_BIG_ENDIAN
33#else
34#error "Unsupported endian..."
35#endif
36#endif
37#ifndef __KERNEL__
38#include <sys/time.h>
39#include <sys/types.h>
40#endif
41
42struct iovec {
43 char *iov_base; /* Base address. */
44#ifdef __32BIT__
45 size_t iov_len; /* Length. */
46#else
47 long iov_len; /* Length. */
48#endif
49};
50
51#ifndef __force
52#define __force
53#endif
54
55#ifndef __bitwise
56#define __bitwise
57#endif
58
59/*
60 * protocol version
61 */
62
63#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
64#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
65#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
66#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
67#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
68 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
69 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
70 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
71
72/****************************************************************************
73 * *
74 * Digital audio interface *
75 * *
76 ****************************************************************************/
77
78struct snd_aes_iec958 {
79 unsigned char status[24]; /* AES/IEC958 channel status bits */
80 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
81 unsigned char pad; /* nothing */
82 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
83};
84
85/****************************************************************************
86 * *
87 * Section for driver hardware dependent interface - /dev/snd/hw? *
88 * *
89 ****************************************************************************/
90
91#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
92
93enum {
94 SNDRV_HWDEP_IFACE_OPL2 = 0,
95 SNDRV_HWDEP_IFACE_OPL3,
96 SNDRV_HWDEP_IFACE_OPL4,
97 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
98 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
99 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
100 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
101 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
102 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
103 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
104 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
105 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
106 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
107 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
108 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
109 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
110
111 /* Don't forget to change the following: */
112 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_SB_RC
113};
114
115struct snd_hwdep_info {
116 unsigned int device; /* WR: device number */
117 int card; /* R: card number */
118 unsigned char id[64]; /* ID (user selectable) */
119 unsigned char name[80]; /* hwdep name */
120 int iface; /* hwdep interface */
121 unsigned char reserved[64]; /* reserved for future */
122};
123
124/* generic DSP loader */
125struct snd_hwdep_dsp_status {
126 unsigned int version; /* R: driver-specific version */
127 unsigned char id[32]; /* R: driver-specific ID string */
128 unsigned int num_dsps; /* R: number of DSP images to transfer */
129 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
130 unsigned int chip_ready; /* R: 1 = initialization finished */
131 unsigned char reserved[16]; /* reserved for future use */
132};
133
134struct snd_hwdep_dsp_image {
135 unsigned int index; /* W: DSP index */
136 unsigned char name[64]; /* W: ID (e.g. file name) */
137 unsigned char __user *image; /* W: binary image */
138 size_t length; /* W: size of image in bytes */
139 unsigned long driver_data; /* W: driver-specific data */
140};
141
142enum {
143 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
144 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct snd_hwdep_info),
145 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct snd_hwdep_dsp_status),
146 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct snd_hwdep_dsp_image)
147};
148
149/*****************************************************************************
150 * *
151 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
152 * *
153 *****************************************************************************/
154
155#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
156
157typedef unsigned long snd_pcm_uframes_t;
158typedef signed long snd_pcm_sframes_t;
159
160enum {
161 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
162 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
163 SNDRV_PCM_CLASS_MODEM, /* software modem class */
164 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
165 /* Don't forget to change the following: */
166 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
167};
168
169enum {
170 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
171 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
172 /* Don't forget to change the following: */
173 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
174};
175
176enum {
177 SNDRV_PCM_STREAM_PLAYBACK = 0,
178 SNDRV_PCM_STREAM_CAPTURE,
179 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
180};
181
182typedef int __bitwise snd_pcm_access_t;
183#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
184#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
185#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
186#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
187#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
188#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
189
190typedef int __bitwise snd_pcm_format_t;
191#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
192#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
193#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
194#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
195#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
196#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
197#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
198#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
199#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
200#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
201#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
202#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
203#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
204#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
205#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
206#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
207#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
208#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
209#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
210#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
211#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
212#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
213#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
214#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
215#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
216#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
217#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
218#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
219#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
220#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
221#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
222#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
223#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
224#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
225#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
226#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
227#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
228#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
229#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_U18_3BE
230
231#ifdef SNDRV_LITTLE_ENDIAN
232#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
233#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
234#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
235#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
236#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
237#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
238#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
239#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
240#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
241#endif
242#ifdef SNDRV_BIG_ENDIAN
243#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
244#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
245#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
246#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
247#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
248#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
249#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
250#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
251#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
252#endif
253
254typedef int __bitwise snd_pcm_subformat_t;
255#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
256#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
257
258#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
259#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
260#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
261#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
262#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
263#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
264#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
265#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
266#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
267#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
268#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
269#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
270#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
271#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
272
273typedef int __bitwise snd_pcm_state_t;
274#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
275#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
276#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
277#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
278#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
279#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
280#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
281#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
282#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
283#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
284
285enum {
286 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
287 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
288 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
289};
290
291union snd_pcm_sync_id {
292 unsigned char id[16];
293 unsigned short id16[8];
294 unsigned int id32[4];
295};
296
297struct snd_pcm_info {
298 unsigned int device; /* RO/WR (control): device number */
299 unsigned int subdevice; /* RO/WR (control): subdevice number */
300 int stream; /* RO/WR (control): stream direction */
301 int card; /* R: card number */
302 unsigned char id[64]; /* ID (user selectable) */
303 unsigned char name[80]; /* name of this device */
304 unsigned char subname[32]; /* subdevice name */
305 int dev_class; /* SNDRV_PCM_CLASS_* */
306 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
307 unsigned int subdevices_count;
308 unsigned int subdevices_avail;
309 union snd_pcm_sync_id sync; /* hardware synchronization ID */
310 unsigned char reserved[64]; /* reserved for future... */
311};
312
313typedef int __bitwise snd_pcm_hw_param_t;
314#define SNDRV_PCM_HW_PARAM_ACCESS ((__force snd_pcm_hw_param_t) 0) /* Access type */
315#define SNDRV_PCM_HW_PARAM_FORMAT ((__force snd_pcm_hw_param_t) 1) /* Format */
316#define SNDRV_PCM_HW_PARAM_SUBFORMAT ((__force snd_pcm_hw_param_t) 2) /* Subformat */
317#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
318#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
319
320#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS ((__force snd_pcm_hw_param_t) 8) /* Bits per sample */
321#define SNDRV_PCM_HW_PARAM_FRAME_BITS ((__force snd_pcm_hw_param_t) 9) /* Bits per frame */
322#define SNDRV_PCM_HW_PARAM_CHANNELS ((__force snd_pcm_hw_param_t) 10) /* Channels */
323#define SNDRV_PCM_HW_PARAM_RATE ((__force snd_pcm_hw_param_t) 11) /* Approx rate */
324#define SNDRV_PCM_HW_PARAM_PERIOD_TIME ((__force snd_pcm_hw_param_t) 12) /* Approx distance between interrupts in us */
325#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE ((__force snd_pcm_hw_param_t) 13) /* Approx frames between interrupts */
326#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES ((__force snd_pcm_hw_param_t) 14) /* Approx bytes between interrupts */
327#define SNDRV_PCM_HW_PARAM_PERIODS ((__force snd_pcm_hw_param_t) 15) /* Approx interrupts per buffer */
328#define SNDRV_PCM_HW_PARAM_BUFFER_TIME ((__force snd_pcm_hw_param_t) 16) /* Approx duration of buffer in us */
329#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE ((__force snd_pcm_hw_param_t) 17) /* Size of buffer in frames */
330#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES ((__force snd_pcm_hw_param_t) 18) /* Size of buffer in bytes */
331#define SNDRV_PCM_HW_PARAM_TICK_TIME ((__force snd_pcm_hw_param_t) 19) /* Approx tick duration in us */
332#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
333#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
334
335#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
336
337struct snd_interval {
338 unsigned int min, max;
339 unsigned int openmin:1,
340 openmax:1,
341 integer:1,
342 empty:1;
343};
344
345#define SNDRV_MASK_MAX 256
346
347struct snd_mask {
348 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
349};
350
351struct snd_pcm_hw_params {
352 unsigned int flags;
353 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
354 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
355 struct snd_mask mres[5]; /* reserved masks */
356 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
357 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
358 struct snd_interval ires[9]; /* reserved intervals */
359 unsigned int rmask; /* W: requested masks */
360 unsigned int cmask; /* R: changed masks */
361 unsigned int info; /* R: Info flags for returned setup */
362 unsigned int msbits; /* R: used most significant bits */
363 unsigned int rate_num; /* R: rate numerator */
364 unsigned int rate_den; /* R: rate denominator */
365 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
366 unsigned char reserved[64]; /* reserved for future */
367};
368
369enum {
370 SNDRV_PCM_TSTAMP_NONE = 0,
371 SNDRV_PCM_TSTAMP_MMAP,
372 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
373};
374
375struct snd_pcm_sw_params {
376 int tstamp_mode; /* timestamp mode */
377 unsigned int period_step;
378 unsigned int sleep_min; /* min ticks to sleep */
379 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
380 snd_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
381 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
382 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
383 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
384 snd_pcm_uframes_t silence_size; /* silence block size */
385 snd_pcm_uframes_t boundary; /* pointers wrap point */
386 unsigned char reserved[64]; /* reserved for future */
387};
388
389struct snd_pcm_channel_info {
390 unsigned int channel;
391 off_t offset; /* mmap offset */
392 unsigned int first; /* offset to first sample in bits */
393 unsigned int step; /* samples distance in bits */
394};
395
396struct snd_pcm_status {
397 snd_pcm_state_t state; /* stream state */
398 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
399 struct timespec tstamp; /* reference timestamp */
400 snd_pcm_uframes_t appl_ptr; /* appl ptr */
401 snd_pcm_uframes_t hw_ptr; /* hw ptr */
402 snd_pcm_sframes_t delay; /* current delay in frames */
403 snd_pcm_uframes_t avail; /* number of frames available */
404 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
405 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
406 snd_pcm_state_t suspended_state; /* suspended stream state */
407 unsigned char reserved[60]; /* must be filled with zero */
408};
409
410struct snd_pcm_mmap_status {
411 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
412 int pad1; /* Needed for 64 bit alignment */
413 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
414 struct timespec tstamp; /* Timestamp */
415 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
416};
417
418struct snd_pcm_mmap_control {
419 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
420 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
421};
422
423#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
424#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
425#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
426
427struct snd_pcm_sync_ptr {
428 unsigned int flags;
429 union {
430 struct snd_pcm_mmap_status status;
431 unsigned char reserved[64];
432 } s;
433 union {
434 struct snd_pcm_mmap_control control;
435 unsigned char reserved[64];
436 } c;
437};
438
439struct snd_xferi {
440 snd_pcm_sframes_t result;
441 void __user *buf;
442 snd_pcm_uframes_t frames;
443};
444
445struct snd_xfern {
446 snd_pcm_sframes_t result;
447 void __user * __user *bufs;
448 snd_pcm_uframes_t frames;
449};
450
451enum {
452 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
453 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct snd_pcm_info),
454 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
455 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct snd_pcm_hw_params),
456 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct snd_pcm_hw_params),
457 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
458 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct snd_pcm_sw_params),
459 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct snd_pcm_status),
460 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, snd_pcm_sframes_t),
461 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
462 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct snd_pcm_sync_ptr),
463 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct snd_pcm_channel_info),
464 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
465 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
466 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
467 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
468 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
469 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
470 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, snd_pcm_uframes_t),
471 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
472 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
473 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, snd_pcm_uframes_t),
474 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct snd_xferi),
475 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct snd_xferi),
476 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct snd_xfern),
477 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct snd_xfern),
478 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
479 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
480};
481
482/* Trick to make alsa-lib/acinclude.m4 happy */
483#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
484
485/*****************************************************************************
486 * *
487 * MIDI v1.0 interface *
488 * *
489 *****************************************************************************/
490
491/*
492 * Raw MIDI section - /dev/snd/midi??
493 */
494
495#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
496
497enum {
498 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
499 SNDRV_RAWMIDI_STREAM_INPUT,
500 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
501};
502
503#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
504#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
505#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
506
507struct snd_rawmidi_info {
508 unsigned int device; /* RO/WR (control): device number */
509 unsigned int subdevice; /* RO/WR (control): subdevice number */
510 int stream; /* WR: stream */
511 int card; /* R: card number */
512 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
513 unsigned char id[64]; /* ID (user selectable) */
514 unsigned char name[80]; /* name of device */
515 unsigned char subname[32]; /* name of active or selected subdevice */
516 unsigned int subdevices_count;
517 unsigned int subdevices_avail;
518 unsigned char reserved[64]; /* reserved for future use */
519};
520
521struct snd_rawmidi_params {
522 int stream;
523 size_t buffer_size; /* queue size in bytes */
524 size_t avail_min; /* minimum avail bytes for wakeup */
525 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
526 unsigned char reserved[16]; /* reserved for future use */
527};
528
529struct snd_rawmidi_status {
530 int stream;
531 struct timespec tstamp; /* Timestamp */
532 size_t avail; /* available bytes */
533 size_t xruns; /* count of overruns since last status (in bytes) */
534 unsigned char reserved[16]; /* reserved for future use */
535};
536
537enum {
538 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
539 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct snd_rawmidi_info),
540 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct snd_rawmidi_params),
541 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct snd_rawmidi_status),
542 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
543 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
544};
545
546/*
547 * Timer section - /dev/snd/timer
548 */
549
550#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
551
552enum {
553 SNDRV_TIMER_CLASS_NONE = -1,
554 SNDRV_TIMER_CLASS_SLAVE = 0,
555 SNDRV_TIMER_CLASS_GLOBAL,
556 SNDRV_TIMER_CLASS_CARD,
557 SNDRV_TIMER_CLASS_PCM,
558 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
559};
560
561/* slave timer classes */
562enum {
563 SNDRV_TIMER_SCLASS_NONE = 0,
564 SNDRV_TIMER_SCLASS_APPLICATION,
565 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
566 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
567 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
568};
569
570/* global timers (device member) */
571#define SNDRV_TIMER_GLOBAL_SYSTEM 0
572#define SNDRV_TIMER_GLOBAL_RTC 1
573#define SNDRV_TIMER_GLOBAL_HPET 2
574
575/* info flags */
576#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
577
578struct snd_timer_id {
579 int dev_class;
580 int dev_sclass;
581 int card;
582 int device;
583 int subdevice;
584};
585
586struct snd_timer_ginfo {
587 struct snd_timer_id tid; /* requested timer ID */
588 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
589 int card; /* card number */
590 unsigned char id[64]; /* timer identification */
591 unsigned char name[80]; /* timer name */
592 unsigned long reserved0; /* reserved for future use */
593 unsigned long resolution; /* average period resolution in ns */
594 unsigned long resolution_min; /* minimal period resolution in ns */
595 unsigned long resolution_max; /* maximal period resolution in ns */
596 unsigned int clients; /* active timer clients */
597 unsigned char reserved[32];
598};
599
600struct snd_timer_gparams {
601 struct snd_timer_id tid; /* requested timer ID */
602 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
603 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
604 unsigned char reserved[32];
605};
606
607struct snd_timer_gstatus {
608 struct snd_timer_id tid; /* requested timer ID */
609 unsigned long resolution; /* current period resolution in ns */
610 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
611 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
612 unsigned char reserved[32];
613};
614
615struct snd_timer_select {
616 struct snd_timer_id id; /* bind to timer ID */
617 unsigned char reserved[32]; /* reserved */
618};
619
620struct snd_timer_info {
621 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
622 int card; /* card number */
623 unsigned char id[64]; /* timer identificator */
624 unsigned char name[80]; /* timer name */
625 unsigned long reserved0; /* reserved for future use */
626 unsigned long resolution; /* average period resolution in ns */
627 unsigned char reserved[64]; /* reserved */
628};
629
630#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
631#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
632#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
633
634struct snd_timer_params {
635 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
636 unsigned int ticks; /* requested resolution in ticks */
637 unsigned int queue_size; /* total size of queue (32-1024) */
638 unsigned int reserved0; /* reserved, was: failure locations */
639 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
640 unsigned char reserved[60]; /* reserved */
641};
642
643struct snd_timer_status {
644 struct timespec tstamp; /* Timestamp - last update */
645 unsigned int resolution; /* current period resolution in ns */
646 unsigned int lost; /* counter of master tick lost */
647 unsigned int overrun; /* count of read queue overruns */
648 unsigned int queue; /* used queue size */
649 unsigned char reserved[64]; /* reserved */
650};
651
652enum {
653 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
654 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct snd_timer_id),
655 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
656 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct snd_timer_ginfo),
657 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct snd_timer_gparams),
658 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct snd_timer_gstatus),
659 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct snd_timer_select),
660 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct snd_timer_info),
661 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct snd_timer_params),
662 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct snd_timer_status),
663 /* The following four ioctls are changed since 1.0.9 due to confliction */
664 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
665 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
666 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
667 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
668};
669
670struct snd_timer_read {
671 unsigned int resolution;
672 unsigned int ticks;
673};
674
675enum {
676 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
677 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
678 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
679 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
680 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
681 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
682 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
683 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
684 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
685 /* master timer events for slave timer instances */
686 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
687 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
688 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
689 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
690 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
691 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
692};
693
694struct snd_timer_tread {
695 int event;
696 struct timespec tstamp;
697 unsigned int val;
698};
699
700/****************************************************************************
701 * *
702 * Section for driver control interface - /dev/snd/control? *
703 * *
704 ****************************************************************************/
705
706#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 3)
707
708struct snd_ctl_card_info {
709 int card; /* card number */
710 int pad; /* reserved for future (was type) */
711 unsigned char id[16]; /* ID of card (user selectable) */
712 unsigned char driver[16]; /* Driver name */
713 unsigned char name[32]; /* Short name of soundcard */
714 unsigned char longname[80]; /* name + info text about soundcard */
715 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
716 unsigned char mixername[80]; /* visual mixer identification */
717 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
718 unsigned char reserved[48]; /* reserved for future */
719};
720
721typedef int __bitwise snd_ctl_elem_type_t;
722#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
723#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
724#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
725#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
726#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
727#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
728#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
729#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
730
731typedef int __bitwise snd_ctl_elem_iface_t;
732#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
733#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
734#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
735#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
736#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
737#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
738#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
739#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
740
741#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
742#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
743#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
744#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
745#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<2) /* when was control changed */
746#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
747#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
748#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
749#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
750#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
751#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
752
753/* for further details see the ACPI and PCI power management specification */
754#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
755#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
756#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
757#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
758#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
759#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
760
761struct snd_ctl_elem_id {
762 unsigned int numid; /* numeric identifier, zero = invalid */
763 snd_ctl_elem_iface_t iface; /* interface identifier */
764 unsigned int device; /* device/client number */
765 unsigned int subdevice; /* subdevice (substream) number */
766 unsigned char name[44]; /* ASCII name of item */
767 unsigned int index; /* index of item */
768};
769
770struct snd_ctl_elem_list {
771 unsigned int offset; /* W: first element ID to get */
772 unsigned int space; /* W: count of element IDs to get */
773 unsigned int used; /* R: count of element IDs set */
774 unsigned int count; /* R: count of all elements */
775 struct snd_ctl_elem_id __user *pids; /* R: IDs */
776 unsigned char reserved[50];
777};
778
779struct snd_ctl_elem_info {
780 struct snd_ctl_elem_id id; /* W: element ID */
781 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
782 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
783 unsigned int count; /* count of values */
784 pid_t owner; /* owner's PID of this control */
785 union {
786 struct {
787 long min; /* R: minimum value */
788 long max; /* R: maximum value */
789 long step; /* R: step (0 variable) */
790 } integer;
791 struct {
792 long long min; /* R: minimum value */
793 long long max; /* R: maximum value */
794 long long step; /* R: step (0 variable) */
795 } integer64;
796 struct {
797 unsigned int items; /* R: number of items */
798 unsigned int item; /* W: item number */
799 char name[64]; /* R: value name */
800 } enumerated;
801 unsigned char reserved[128];
802 } value;
803 union {
804 unsigned short d[4]; /* dimensions */
805 unsigned short *d_ptr; /* indirect */
806 } dimen;
807 unsigned char reserved[64-4*sizeof(unsigned short)];
808};
809
810struct snd_ctl_elem_value {
811 struct snd_ctl_elem_id id; /* W: element ID */
812 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
813 union {
814 union {
815 long value[128];
816 long *value_ptr;
817 } integer;
818 union {
819 long long value[64];
820 long long *value_ptr;
821 } integer64;
822 union {
823 unsigned int item[128];
824 unsigned int *item_ptr;
825 } enumerated;
826 union {
827 unsigned char data[512];
828 unsigned char *data_ptr;
829 } bytes;
830 struct snd_aes_iec958 iec958;
831 } value; /* RO */
832 struct timespec tstamp;
833 unsigned char reserved[128-sizeof(struct timespec)];
834};
835
836enum {
837 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
838 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct snd_ctl_card_info),
839 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct snd_ctl_elem_list),
840 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct snd_ctl_elem_info),
841 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct snd_ctl_elem_value),
842 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct snd_ctl_elem_value),
843 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct snd_ctl_elem_id),
844 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct snd_ctl_elem_id),
845 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
846 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct snd_ctl_elem_info),
847 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct snd_ctl_elem_info),
848 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct snd_ctl_elem_id),
849 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
850 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct snd_hwdep_info),
851 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
852 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct snd_pcm_info),
853 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
854 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
855 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct snd_rawmidi_info),
856 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
857 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
858 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
859};
860
861/*
862 * Read interface.
863 */
864
865enum sndrv_ctl_event_type {
866 SNDRV_CTL_EVENT_ELEM = 0,
867 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
868};
869
870#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
871#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
872#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
873#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
874
875struct snd_ctl_event {
876 int type; /* event type - SNDRV_CTL_EVENT_* */
877 union {
878 struct {
879 unsigned int mask;
880 struct snd_ctl_elem_id id;
881 } elem;
882 unsigned char data8[60];
883 } data;
884};
885
886/*
887 * Control names
888 */
889
890#define SNDRV_CTL_NAME_NONE ""
891#define SNDRV_CTL_NAME_PLAYBACK "Playback "
892#define SNDRV_CTL_NAME_CAPTURE "Capture "
893
894#define SNDRV_CTL_NAME_IEC958_NONE ""
895#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
896#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
897#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
898#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
899#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
900#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
901#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
902#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
903
904/*
905 *
906 */
907
908struct snd_xferv {
909 const struct iovec *vector;
910 unsigned long count;
911};
912
913enum {
914 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct snd_xferv),
915 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct snd_xferv),
916};
917
918#endif /* __SOUND_ASOUND_H */
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