| 1 | /*
|
|---|
| 2 | ** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
|
|---|
| 3 | ** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
|
|---|
| 4 | ** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
|
|---|
| 5 | ** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
|
|---|
| 6 | ** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
|
|---|
| 7 | ** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
|
|---|
| 8 | ** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
|
|---|
| 9 | ** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
|
|---|
| 10 | **
|
|---|
| 11 | ** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
|
|---|
| 12 | ** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
|
|---|
| 13 | ** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
|
|---|
| 14 | ** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
|
|---|
| 15 | ** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
|
|---|
| 16 | ** THE UNITED STATES.
|
|---|
| 17 | **
|
|---|
| 18 | ** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
|
|---|
| 19 | **
|
|---|
| 20 | **
|
|---|
| 21 | ** $Revision: 1.2 $
|
|---|
| 22 | ** $Date: 2000-03-02 13:22:03 $
|
|---|
| 23 | **
|
|---|
| 24 | */
|
|---|
| 25 |
|
|---|
| 26 | #ifndef _PCILIB_H_
|
|---|
| 27 | #define _PCILIB_H_
|
|---|
| 28 |
|
|---|
| 29 | #define CONFIG_ADDRESS_PORT 0xCF8
|
|---|
| 30 | #define CONFIG_DATA_PORT 0xCFC
|
|---|
| 31 | #define CONFIG_ADDRESS_ENABLE_BIT 0x80000000UL
|
|---|
| 32 |
|
|---|
| 33 | #define CONFIG_MAPPING_ENABLE_BYTE 0x80
|
|---|
| 34 | #define CONFIG_MAPPING_DISABLE_BYTE 0x00
|
|---|
| 35 |
|
|---|
| 36 | #define CONFIG_SPACE_ENABLE_PORT 0xCF8
|
|---|
| 37 | #define FORWARD_REGISTER_PORT 0xCFA
|
|---|
| 38 | #define CONFIG_MAPPING_OFFSET 0xC000
|
|---|
| 39 |
|
|---|
| 40 | #define PCI_INTERRUPT 0x1A
|
|---|
| 41 | #define PCI_FUNC_CODE 0xB1
|
|---|
| 42 | #define PCI_PHYS_ADDR 0x000FFE6E
|
|---|
| 43 |
|
|---|
| 44 | #define BYTE0(a) ((a) & 0xff)
|
|---|
| 45 | #define BYTE1(a) (((a) >> 8) & 0xff)
|
|---|
| 46 | #define VXDREFCOUNT(a) (((a) >> 16) & 0xff)
|
|---|
| 47 |
|
|---|
| 48 | typedef struct {
|
|---|
| 49 | FxU32
|
|---|
| 50 | msrNum, /* Which MSR? */
|
|---|
| 51 | msrLo, msrHi; /* MSR Values */
|
|---|
| 52 | } MSRInfo;
|
|---|
| 53 |
|
|---|
| 54 | /* PRIVATE DATA */
|
|---|
| 55 | extern FxU32 pciVxdVer;
|
|---|
| 56 | extern FxU32 pciErrorCode;
|
|---|
| 57 | extern FxBool pciLibraryInitialized;
|
|---|
| 58 | extern PciHwcCallbacks pciHwcCallbacks;
|
|---|
| 59 |
|
|---|
| 60 | typedef struct {
|
|---|
| 61 | /* Platform specific init/shutdown stuff. */
|
|---|
| 62 | FxBool (*ioInit)(void);
|
|---|
| 63 | FxBool (*ioShutdown)(void);
|
|---|
| 64 | const char* (*ioIdent)(void);
|
|---|
| 65 |
|
|---|
| 66 | /* Port i/o */
|
|---|
| 67 | FxU8 (*portInByte)(FxU16 port);
|
|---|
| 68 | FxU16 (*portInWord)(FxU16 port);
|
|---|
| 69 | FxU32 (*portInLong)(FxU16 port);
|
|---|
| 70 |
|
|---|
| 71 | FxBool (*portOutByte)(FxU16 port, FxU8 data);
|
|---|
| 72 | FxBool (*portOutWord)(FxU16 port, FxU16 data);
|
|---|
| 73 | FxBool (*portOutLong)(FxU16 port, FxU32 data);
|
|---|
| 74 |
|
|---|
| 75 | /* Platform device address management */
|
|---|
| 76 | FxBool (*addrMap)(FxU32 busNumber, FxU32 physAddr,
|
|---|
| 77 | FxU32* linearAddr, FxU32* length);
|
|---|
| 78 | FxBool (*addrUnmap)(FxU32 linearAddr, FxU32 length);
|
|---|
| 79 |
|
|---|
| 80 | /* Optional things that a platform may or maynot support and clients
|
|---|
| 81 | * should not rely on the call to suceed.
|
|---|
| 82 | */
|
|---|
| 83 | FxBool (*addrSetPermission)(const FxU32 addrBase, const FxU32 addrLen,
|
|---|
| 84 | const FxBool writePermP);
|
|---|
| 85 |
|
|---|
| 86 | FxBool (*msrGet)(MSRInfo* in, MSRInfo* out);
|
|---|
| 87 | FxBool (*msrSet)(MSRInfo* in, MSRInfo* out);
|
|---|
| 88 |
|
|---|
| 89 | FxBool (*utilOutputString)(const char* msg);
|
|---|
| 90 | FxBool (*utilSetPassThroughBase)(FxU32* baseAddr, FxU32 baseAddrLen);
|
|---|
| 91 | } FxPlatformIOProcs;
|
|---|
| 92 |
|
|---|
| 93 | extern const FxPlatformIOProcs* gCurPlatformIO;
|
|---|
| 94 |
|
|---|
| 95 | #define pciInitializeDDio (*gCurPlatformIO->ioInit)
|
|---|
| 96 | #define pciCloseDDio (*gCurPlatformIO->ioShutdown)
|
|---|
| 97 | #define pciPlatformIdentifier (*gCurPlatformIO->ioIdent)
|
|---|
| 98 |
|
|---|
| 99 | #define pciMapLinearDD (*gCurPlatformIO->addrMap)
|
|---|
| 100 | #define pciUnmapLinearDD (*gCurPlatformIO->addrUnmap)
|
|---|
| 101 | #define pciLinearRangeSetPermissionDD (*gCurPlatformIO->addrSetPermission)
|
|---|
| 102 |
|
|---|
| 103 | #define pciOutputDebugStringDD (*gCurPlatformIO->utilOutputString)
|
|---|
| 104 | #define pciSetPassThroughBaseDD (*gCurPlatformIO->utilSetPassThroughBase)
|
|---|
| 105 |
|
|---|
| 106 | #define _pioInByte (*gCurPlatformIO->portInByte)
|
|---|
| 107 | #define _pioInWord (*gCurPlatformIO->portInWord)
|
|---|
| 108 | #define _pioInLong (*gCurPlatformIO->portInLong)
|
|---|
| 109 |
|
|---|
| 110 | #define _pioOutByte (*gCurPlatformIO->portOutByte)
|
|---|
| 111 | #define _pioOutWord (*gCurPlatformIO->portOutWord)
|
|---|
| 112 | #define _pioOutLong (*gCurPlatformIO->portOutLong)
|
|---|
| 113 |
|
|---|
| 114 | #define DOGETMSR(__in, __out) (*gCurPlatformIO->msrGet)(&(__in), &(__out))
|
|---|
| 115 | #define DOSETMSR(__in, __out) (*gCurPlatformIO->msrSet)(&(__in), &(__out))
|
|---|
| 116 |
|
|---|
| 117 | /* One should be defined per real platform (currently dos/win32) to
|
|---|
| 118 | * setup the platform function pointer struct.
|
|---|
| 119 | */
|
|---|
| 120 |
|
|---|
| 121 | #ifdef __cplusplus
|
|---|
| 122 | extern "C" {
|
|---|
| 123 | #endif
|
|---|
| 124 |
|
|---|
| 125 | FxBool pciPlatformInit(void);
|
|---|
| 126 |
|
|---|
| 127 | #ifdef __cplusplus
|
|---|
| 128 | }
|
|---|
| 129 | #endif
|
|---|
| 130 |
|
|---|
| 131 | #endif /* _PCILIB_H_ */
|
|---|
