source: trunk/src/opengl/glide/cvg/incsrc/cvginfo.h

Last change on this file was 2888, checked in by sandervl, 26 years ago

Created Voodoo 2 dir
File size: 5.8 KB
Line 
1/*-*-c++-*-*/
2#ifndef __CVGINFO_H__
3#define __CVGINFO_H__
4
5/*
6** THIS SOFTWARE IS SUBJECT TO COPYRIGHT PROTECTION AND IS OFFERED ONLY
7** PURSUANT TO THE 3DFX GLIDE GENERAL PUBLIC LICENSE. THERE IS NO RIGHT
8** TO USE THE GLIDE TRADEMARK WITHOUT PRIOR WRITTEN PERMISSION OF 3DFX
9** INTERACTIVE, INC. A COPY OF THIS LICENSE MAY BE OBTAINED FROM THE
10** DISTRIBUTOR OR BY CONTACTING 3DFX INTERACTIVE INC(info@3dfx.com).
11** THIS PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
12** EXPRESSED OR IMPLIED. SEE THE 3DFX GLIDE GENERAL PUBLIC LICENSE FOR A
13** FULL TEXT OF THE NON-WARRANTY PROVISIONS.
14**
15** USE, DUPLICATION OR DISCLOSURE BY THE GOVERNMENT IS SUBJECT TO
16** RESTRICTIONS AS SET FORTH IN SUBDIVISION (C)(1)(II) OF THE RIGHTS IN
17** TECHNICAL DATA AND COMPUTER SOFTWARE CLAUSE AT DFARS 252.227-7013,
18** AND/OR IN SIMILAR OR SUCCESSOR CLAUSES IN THE FAR, DOD OR NASA FAR
19** SUPPLEMENT. UNPUBLISHED RIGHTS RESERVED UNDER THE COPYRIGHT LAWS OF
20** THE UNITED STATES.
21**
22** COPYRIGHT 3DFX INTERACTIVE, INC. 1999, ALL RIGHTS RESERVED
23**
24** $Revision: 1.1 $
25** $Date: 2000-02-25 00:37:49 $
26*/
27
28#if defined(__unix__) && ! defined(__CVGREGS_H__)
29// basic data types
30#define FxU32 unsigned long
31#define FxBool int
32// defn of registers not reqd, treat (SstRegs *) as (void *)
33typedef void SstRegs;
34#endif
35
36#define MAX_NUM_TMUS 3
37
38// Video timing data structure
39typedef struct {
40 FxU32 hSyncOn;
41 FxU32 hSyncOff;
42 FxU32 vSyncOn;
43 FxU32 vSyncOff;
44 FxU32 hBackPorch;
45 FxU32 vBackPorch;
46 FxU32 xDimension;
47 FxU32 yDimension;
48 FxU32 refreshRate;
49 FxU32 miscCtrl;
50 FxU32 memOffset;
51 FxU32 tilesInX;
52 FxU32 vFifoThreshold;
53 FxBool video16BPPIsOK;
54 FxBool video24BPPIsOK;
55 float clkFreq16bpp;
56 float clkFreq24bpp;
57} sst1VideoTimingStruct;
58
59/* Init code client callbacks to allow the init code to use the client
60 * command fifo management code to do writes etc.
61 */
62typedef void (*FxSet32Proc)(volatile FxU32* const addr, const FxU32 val);
63
64/*
65** CVG Device Information Structure
66**
67*/
68// Initialization and configuration data structure
69typedef struct {
70 FxU32 size; // size of this structure
71 SstRegs *virtAddr[2]; // virtual memory base address
72 FxU32 physAddr[2]; // physical memory base address
73 FxU32 deviceNumber; // PCI device number
74 FxU32 vendorID; // PCI vendor ID
75 FxU32 deviceID; // PCI device ID
76
77 FxU32 fbiRevision; // FBI revision number
78 FxU32 fbiFab; // FBI Fab ID
79 FxU32 fbiBoardID; // FBI board ID (poweron strapping bits)
80 FxU32 fbiVideo16BPP; // FBI video display mode
81 FxU32 fbiVideoWidth; // FBI video display X-resolution
82 FxU32 fbiVideoHeight; // FBI video display Y-resolution
83 FxU32 fbiVideoRefresh; // FBI video refresh rate
84 FxU32 fbiVideoColBuffs; // FBI video number of color buffers
85 FxU32 fbiVideoAuxBuffs; // FBI video number of Aux buffers
86 FxU32 fbiVideoMemOffset; // FBI video memory offset (in pages)
87 FxU32 fbiVideoTilesInX; // FBI video memory 32x32 tiles-in-X
88 sst1VideoTimingStruct // FBI video resolution
89 *fbiVideoStruct; // data structure
90 FxU32 fbiVideoDacType; // FBI video dac type detected
91 FxU32 fbiMemoryFifoEn; // FBI Memory Fifo enabled
92 FxU32 fbiCmdFifoEn; // FBI Command Fifo enabled
93 FxU32 fbiLfbLocked; // FBI frame buffer is locked
94 FxU32 fbiConfig; // FBI strapping pins
95 FxU32 fbiGrxClkFreq; // FBI graphics clock frequency
96 FxU32 fbiMemSize; // FBI frame buffer memory (in MBytes)
97 FxU32 fbiInitGammaDone; // FBI gamma table initialized
98 double fbiGammaRed; // FBI Red gamma value
99 double fbiGammaGreen; // FBI Green gamma value
100 double fbiGammaBlue; // FBI Blue gamma value
101 FxU32 fbiNandTree; // FBI Nand tree delay value
102 FxU32 fbiNorTree; // FBI Nor tree delay value
103
104 FxU32 tmuRevision; // TMU revision number (for all TMUs)
105 FxU32 tmuFab[MAX_NUM_TMUS]; // TMU Fab ID (for all TMUs)
106 FxU32 numberTmus; // Number of TMUs installed
107 FxU32 tmuConfig; // TMU configuration bits
108 FxU32 tmuGrxClkFreq; // TMU graphics clock frequency
109 FxU32 tmuMemSize[MAX_NUM_TMUS]; // TMU texture memory (in MBytes)
110
111 // Registers which cannot be read from the hardware, so we shadow them here
112 FxU32 tmuInit0[MAX_NUM_TMUS]; // TMU initialization registers
113 FxU32 tmuInit1[MAX_NUM_TMUS]; // TMU initialization registers
114 FxU32 fbiInit6; // FBI initialization register
115 FxU32 fbiInitEnable; // FBI PCI Configuration register initEnable
116
117 // Misc
118 FxU32 sliDetected; // Scanline interleave detected
119 FxU32 sliPaired; // Board part of an sli pair
120 FxU32 monitorDetected; // Monitor connection detected
121 FxU32 *sliSlaveVirtAddr; // Slave virtual address
122 // Set to 0 if SLI is not enabled...
123 FxU32 initGrxClkDone; // Grapics clock has been initializated
124 FxU32 vgaPassthruDisable; // Value to force SST-1 control of monitor
125 FxU32 vgaPassthruEnable; // Value to force VGA control of monitor
126 FxU32 memFifoStatusLwm;
127
128 // Client setter callbacks
129 FxSet32Proc set32;
130
131 // PCI library stuff
132 FxU32 mtrrUncacheable; /* 3d register space (all wraps) */
133 FxU32 mtrrWriteCombine; /* command fifo/3d lfb */
134
135 SstRegs *sstCSIM;
136 SstRegs *sstHW; // pointer to HW
137} sst1DeviceInfoStruct;
138
139typedef sst1DeviceInfoStruct FxDeviceInfo;
140
141#endif /* !__CVGINFO_H__ */
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