| 1 | /*****************************************************************************
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| 2 | *
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| 3 | * SOURCE FILE NAME = SVGADEFS.H
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| 4 | *
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| 5 | * DESCRIPTIVE NAME =
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| 6 | *
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| 7 | * Copyright : COPYRIGHT IBM CORPORATION, 1991, 1992
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| 8 | * Copyright Microsoft Corporation, 1990
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| 9 | * LICENSED MATERIAL - PROGRAM PROPERTY OF IBM
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| 10 | * REFER TO COPYRIGHT INSTRUCTION FORM#G120-2083
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| 11 | * RESTRICTED MATERIALS OF IBM
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| 12 | * IBM CONFIDENTIAL
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| 13 | *
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| 14 | * VERSION = V2.0
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| 15 | *
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| 16 | * DATE
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| 17 | *
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| 18 | * DESCRIPTION Contains SVGA definitions.
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| 19 | *
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| 20 | * FUNCTIONS
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| 21 | *
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| 22 | * NOTES When included into VVID sources, #ifdef SVGA
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| 23 | * must be used before #include!
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| 24 | *
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| 25 | * STRUCTURES
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| 26 | *
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| 27 | * EXTERNAL REFERENCES
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| 28 | *
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| 29 | * EXTERNAL FUNCTIONS
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| 30 | *
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| 31 | * CHANGE ACTIVITY =
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| 32 | * DATE FLAG APAR CHANGE DESCRIPTION
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| 33 | * -------- ---------- ----- --------------------------------------
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| 34 | * mm/dd/yy @Vr.mpppxx xxxxx xxxxxxx
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| 35 | * 12/29/92 @V2.0SEN00 Created.
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| 36 | * 03/12/93 @V2.0SEN01 OEMINFO structure changed.
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| 37 | * 08/31/93 @V2.1YEE02 Recognize Cirrus Logic GD5428 chip
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| 38 | * 10/28/93 @V2.1MNH00 Recognize Additional Adapters
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| 39 | * 12/06/93 @V2.1YEE05 D 76476 Add ID for Chips & Technologies
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| 40 | * 12/15/93 @V2.1YEE06 D 76685 Add Artist Graphics manufacturer
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| 41 | * 02/21/94 @V2.1MNH01 D 79562 Recognize Additional Adapters/Chips
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| 42 | * 04/14/94 @V2.1MNH05 D 81883 WD90C24 allow more unlocks
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| 43 | * 04/26/94 @V2.1MNH08 D 82003 WD90C24 preserve locks for BIOS setmodes
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| 44 | * 05/12/94 @V2.1YEE08 Add more Cirrus chipsets
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| 45 | * 05/13/94 @V2.1MNH13 F 74819 ATI Mach8/32 check in files
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| 46 | * 05/18/94 @V2.1MNH14 WD90C33 Parse new style PMI
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| 47 | * 06/22/94 @V2.1JWK02 D 87347 Define Tseng Chip Names for consistant use
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| 48 | * 07/25/94 @V2.1JWK03 D 89911 Define Tseng W32xD Revisions
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| 49 | * 07/28/94 @V2.1YEE09 D 88172 Define a Chips and Technologies chiptype
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| 50 | * 08/02/94 @V2.1MNH25 D 91551 Fix various DAC programming problems
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| 51 | * 08/19/94 @V2.1MNH37 D 94209 Add more DAC detection
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| 52 | * 09/01/94 @V2.1YEE10 D 89853 Add support for S3864 with ICD2061 clock chip
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| 53 | * 09/10/94 @V2.2TSU00 D 86373 Weitek: PCI screen01 incorrect
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| 54 | * 09/15/94 @V2.1YEE11 Identify DAC as RGB (blue first) or BGR (red first)
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| 55 | * 09/17/94 @V2.2DAI01 D 92593 Adding monitor configuration enhancements.
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| 56 | * 09/26/94 @V2.2SEN05 D 97637 Changing Music DAC 4910 from BGR to RGB.
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| 57 | * 10/05/94 @V2.1MNH51 D101610 Increase size of CLEANDATA for MACH32
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| 58 | * 10/25/94 @V2.2JWK23 D103192 TSENG Rev D wont install
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| 59 | * 11/30/94 @V3.0YEE01 D105950 Support S3 964
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| 60 | * 01/20/95 @V3.0YEE02 D 99391 Support TBird-Enhanced (800x600 flat panel)
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| 61 | * 01/16/95 @V3.0YEE03 D114992 Add new chip manufacturers
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| 62 | * 01/24/95 @V3.0ITO01 ThinkPad 230 Support (IBM-J local)
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| 63 | * 04/19/95 @V3.0DAI01 D119247 Add DevEscape functions and structures for extra capability support
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| 64 | * 04/28/95 @V3.0YEE04 D120303 Treat ICS5342 unique from ICS5341
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| 65 | * 05/17/95 @V3.0JWK04 D113889 Add Toshiba manufacturer and models
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| 66 | * 05/30/95 @V3.0JWK11 D123835 allow displayless machines to init. Requires
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| 67 | * /nodisplay on device driver statement in config.sys
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| 68 | * 07/25/95 @IBMJ-S3GEN D386 More S3 chips support
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| 69 | * 07/27/95 @V3.0JWK18 D131213 fix AT&T 408/409/499 DAC programming
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| 70 | * 08/02/95 @V3.0JWK21 D131829 Identify and Support ATI MACH64 version 'CT'
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| 71 | * 09/11/95 @V3.2SEN01 D133791 Adding real mode software interrupt support to
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| 72 | * VIDEOPMI.
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| 73 | * 09/14/95 @V3.0JWK25 D126118 NEC C24 prevent 800x600x64k. Add NEC Manufacturer and model
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| 74 | * 11/10/95 @V3.2JWK09 D143505 provide compatability with new VIDEO_ADAPTER structures
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| 75 | * 12/15/95 @V3.0TSU00 Make videopmi backward compatible
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| 76 | * 02/12/96 @V3.1MNH01 D148203 Merge DBCS-J source w/SBCS source
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| 77 | * 02/14/96 @V3.2TSU00 D148283 Merlin PBE, support linear aperture
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| 78 | * 02/16/96 @V3.0YEE06 D148329 APM support
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| 79 | * 05/14/96 @V3.1MNH10 D151513 S3 Trio Chips Identification
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| 80 | *****************************************************************************/
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| 81 |
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| 82 | /* NOINC */
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| 83 |
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| 84 | #include <svgapmi.h>
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| 85 |
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| 86 | /* INC */
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| 87 |
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| 88 | #define INCL_DOSERRORS
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| 89 | #define MAX_LOCKUNLOCKCMD 40 /*@V2.1MNH08*/
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| 90 | #define MAX_CLEANDATA 200 /* Includes DACs */ /*@V3.0YEE01*/
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| 91 | #define MAX_SETBANK_CMD 25 /*@V2.1MNH14*/
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| 92 | #define MAX_GETBANK_CMD 20 /*@V2.1MNH14*/
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| 93 | #define MAX_MODESET_CMD 84 /*@V2.1MNH14*/
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| 94 |
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| 95 |
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| 96 | #define DEFAULT_ADAPTER (-1)
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| 97 | #define UNKNOWN_ADAPTER 0
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| 98 | #define VIDEO7_ADAPTER 1 /* bugbug line up with cleanups! */
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| 99 | #define TRIDENT_ADAPTER 2
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| 100 | #define TSENG_ADAPTER 3
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| 101 | #define WESTERNDIG_ADAPTER 4
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| 102 | #define ATI_ADAPTER 5
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| 103 | #define IBM_ADAPTER 6
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| 104 | #define CIRRUS_ADAPTER 7
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| 105 | #define S3_ADAPTER 8
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| 106 | #define CHIPS_ADAPTER 9 /* @V2.1YEE05 */
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| 107 | #define WEITEK_ADAPTER 10 /* @V2.1MNH00 */
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| 108 | #define NUMBER9_ADAPTER 11 /* @V2.1YEE10 */
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| 109 | #define GENERIC_PCISVGA_ADAPTER 12 //@senja
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| 110 | #define OAK_ADAPTER 13 /* @V3.0YEE03 */
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| 111 | #define MATROX_ADAPTER 14 /* @V3.0YEE03 */
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| 112 | #define BROOKTREE_ADAPTER 15 /* @V3.0YEE03 */
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| 113 | #define NVIDIA_ADAPTER 16 /* @V3.0YEE03 */
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| 114 | #define ALLIANCE_ADAPTER 17 /* @V3.0YEE03 */
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| 115 | #define AVANCE_ADAPTER 18 /* @V3.0YEE03 */
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| 116 | #define MEDIAVISION_ADAPTER 19 /* @V3.0YEE03 */
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| 117 | #define ARKLOGIC_ADAPTER 20 /* @V3.0YEE03 */
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| 118 | #define RADIUS_ADAPTER 21 /* @V3.0YEE03 */
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| 119 | #define THREE_D_LABS_ADAPTER 22 /* @V3.0YEE03 */
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| 120 | #define NCR_ADAPTER 23 /* @V3.0YEE03 */
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| 121 | #define IIT_ADAPTER 24 /* @V3.0YEE03 */
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| 122 | #define APPIAN_ADAPTER 25 /* @V3.0YEE03 */
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| 123 | #define SIERRA_ADAPTER 26 /* @V3.0YEE03 */
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| 124 | #define CORNERSTONE_ADAPTER 27 /* @V3.0YEE03 */
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| 125 | #define DIGITAL_ADAPTER 28 /* @V3.0YEE03 */
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| 126 | #define COMPAQ_ADAPTER 29 /* @V3.0YEE03 */
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| 127 | #define INFOTRONIC_ADAPTER 30 /* @V3.0YEE03 */
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| 128 | #define OPTI_ADAPTER 31 /* @V3.0YEE03 */
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| 129 | #define NULL_ADAPTER 32 /* @V3.0JWK11 */
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| 130 | /* remember to update SVGA_LASTADAPTER when adding new adapter support */
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| 131 |
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| 132 | #define SVGA_FIRSTADAPTER VIDEO7_ADAPTER /* @V2.1YEE03 */
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| 133 | #define SVGA_LASTADAPTER NULL_ADAPTER /* @V3.0JWK11 */
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| 134 |
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| 135 | /* @V2.1MNH13 start */
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| 136 | #ifdef FAMILY2
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| 137 | #define ORCHID_MC_ADAPTER 2 /* @V2.0SEN06 */
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| 138 | #define ORCHID_MC_ID 0x86 /* @V2.0SEN06 */
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| 139 | #endif
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| 140 |
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| 141 | /*
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| 142 | ** DAC types
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| 143 | */
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| 144 |
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| 145 | #define VGA_DAC 0 /*@V2.1MNH23*/
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| 146 | #define DEFAULT_DAC VGA_DAC /*@V2.1MNH23*/
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| 147 | #define HICOLOR_DAC 1 /* Unidentified */ /*@V2.1MNH17*/
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| 148 | #define WINBOND_DAC HICOLOR_DAC /*@V2.1MNH23*/
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| 149 | #define BT485_DAC 2 /* Brooktree 485 */ /*@V2.1MNH20*/
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| 150 | #define Weitek_BT485DAC 3 /* BT485 used by Weitek */
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| 151 | #define SC15025_DAC 4 /* SC15025 */
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| 152 | #define SierraDAC SC15025_DAC /* Use more specific name! */
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| 153 | #define ATT490_DAC 5
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| 154 | #define ATTDAC ATT490_DAC /* Use more specific name! */
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| 155 | #define MU9C1880_DAC 6 /* MU9C4870, MU9C1880, SS2410*/
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| 156 | #define MU9C4870_DAC MU9C1880_DAC /*@V2.1MNH23*/
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| 157 |
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| 158 | #define TRUECOLOR_DAC 7 /*@V2.1MNH17*/
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| 159 | #define IMSG173_DAC 8 /*These DACS identified, but not programmed*/
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| 160 | #define InmosDAC IMSG173_DAC /* Use more specific name! */
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| 161 | #define CH8398_DAC 9
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| 162 | #define ChrontelDAC CH8398_DAC /* Use more specific name! */
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| 163 | #define CIRRUS_DAC 10
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| 164 | #define ICS5341_DAC 11
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| 165 | #define SGS1702_DAC 12
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| 166 | #define SGSThomsonDAC16 SGS1702_DAC /* Use more specific name! */
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| 167 | #define SGS1703_DAC 13 /*@V2.1MNH23*/
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| 168 | #define MU9C4910_DAC 14 /* MU9C4910 (blue byte first) */
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| 169 | /* note that the MU9C1880 is also true color, but */
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| 170 | /* it does not need to be identified because */
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| 171 | /* behaves like the others in its group */
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| 172 | #define MusicDAC16RGB MU9C4910_DAC /* Use more specific name! */
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| 173 | #define ATI68830_DAC 15 /* ATI 68830 & compatible @V2.1MNH29 */
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| 174 | #define S3SDAC_DAC 16 /* S3 SDAC @V2.1MNH29 */
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| 175 | #define ATT498_DAC 17 /* AT&T 498 CLOCKDAC ID=$98 no programmable clocks @V2.1MNH29 */
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| 176 | #define SGS1700_DAC 18 /* SGS 1700 DAC @V2.1MNH29 */
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| 177 | #define TLC34075_DAC 19 /* Texas Instruments TLC34075*/
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| 178 | #define ATI68875_DAC TLC34075_DAC
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| 179 | #define BT476_DAC 20 /* Brooktree 476/478 @V2.1MNH29 */
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| 180 | #define BT478_DAC BT476_DAC
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| 181 | #define BT481_DAC 21 /* Brooktree 481/482 @V2.1MNH29 */
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| 182 | #define BT482_DAC BT481_DAC
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| 183 | #define ATI68860_DAC 22 /* ATI 68860/68880 @V2.1MNH29 */
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| 184 | #define MU9CBUG_DAC 23
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| 185 | #define CH8391_DAC 24
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| 186 | #define W82C490_DAC 25
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| 187 | #define ATT491_DAC 26
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| 188 | #define ATT492_DAC 27
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| 189 | #define ATT493_DAC 28
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| 190 | #define ATT497_DAC 29
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| 191 | #define WD90C24_DAC 30
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| 192 | #define MU9C9910_DAC 31 /* (blue byte first) */
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| 193 | #define ATT409_DAC 32 //ID=$09 16 bit pixel I/O
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| 194 | #define ATT499_DAC 33 //ID=$99 24 bit Pixel I/0 /*@V3.0YEE03*/
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| 195 | #define TI3025_DAC 34 /* TI Viewpoint 3025 CLOCKDAC*//*@V3.0YEE01*/
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| 196 | #define TI3020_DAC 35 /* TI Viewpoint 3020 CLOCKDAC*//*@V3.0YEE03*/
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| 197 | #define ICS5342_DAC 36 /*@V3.0YEE04*/
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| 198 | #define ATT408_DAC ATT409_DAC //ID=$09 HW pinouts diff /*@V3.0JWK18*/
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| 199 | #define NULL_DAC 37 /*@V3.0JWK11*/
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| 200 | #define IMBEDDED_DAC 38 //ATI MACH64 'CT' /*@V3.0JWK21*/
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| 201 | #define S3TRIO_DAC 39 /* S3 TRIO DAC *//*@V3.0YEE05*/
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| 202 | #define MAX_DAC 40 /*@V3.0JWK21*/
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| 203 |
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| 204 | #define VGADAC_NAME "VGA_RGB" /*@V2.1MNH23*/
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| 205 | #define HICOLOR_NAME "HICOLOR_RGB" /*@V2.1MNH17*/
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| 206 | #define BT485_NAME "BT485_RGB" /*@V2.1MNH20*/
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| 207 | #define VIPER_NAME "BT485_RGB"
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| 208 | #define SC15025_NAME "SC15025_RGB"
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| 209 | #define ATT490_NAME "ATT20C490_RGB" /*@V2.1MNH29*/
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| 210 | #define MU9C1880_NAME "MU9C1880_BGR"
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| 211 | #define TRUECOLOR_NAME "TRUECOLOR_RGB" /*@V2.1MNH17*/
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| 212 | #define IMSG173_NAME "IMSG173_RGB"
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| 213 | #define CH8398_NAME "CH8398_RGB"
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| 214 | #define CIRRUS_NAME "CIRRUS_RGB"
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| 215 | #define ICS5341_NAME "ICS5341_RGB"
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| 216 | #define SGS1702_NAME "SGS1702_RGB"
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| 217 | #define SGS1703_NAME "SGS1703_RGB" /*@V2.1MNH23*/
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| 218 | #define MU9C4910_NAME "MU9C4910_RGB" /* was BGR */ /*@V2.2SEN05*/
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| 219 | #define ATI68830_NAME "ATI68830_RGB" /*@V2.1MNH20*/
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| 220 | #define S3SDAC_NAME "S3SDAC_RGB" /*@V2.1YEE02*/
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| 221 | #define ATT498_NAME "ATT20C498_RGB" /*@V2.1MNH29*/
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| 222 | #define SGS1700_NAME "SGS1700_RGB" /*@V2.1YEE02*/
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| 223 | #define TLC34075_NAME "TLC34075_RGB" /*@V2.1MNH20*/
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| 224 | #define ATI68875_NAME "ATI68875_RGB" /*@V2.1MNH20*/
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| 225 | #define BT476_NAME "BT476_RGB" /*@V2.1MNH20*/
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| 226 | #define BT481_NAME "BT481_RGB" /*@V2.1MNH20*/
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| 227 | #define ATI68860_NAME "ATI68860_RGB" /*@V2.1MNH20*/
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| 228 | #define MU9CBUG_NAME "MU9C1880BUG_BGR" /*@V2.1MNH29*/
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| 229 | #define CH8391_NAME "CH8391_RGB" /*@V2.1MNH29*/
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| 230 | #define W82C490_NAME "W82C490_RGB" /*@V2.1MNH29*/
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| 231 | #define ATT491_NAME "ATT20C491_RGB" /*@V2.1MNH29*/
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| 232 | #define ATT492_NAME "ATT20C492_RGB" /*@V2.1MNH29*/
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| 233 | #define ATT493_NAME "ATT20C493_RGB" /*@V2.1MNH29*/
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| 234 | #define ATT497_NAME "ATT20C497_RGB" /*@V2.1MNH29*/
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| 235 | #define WD90C24_NAME "WD90C24_RGB" /*@V2.1MNH35*/
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| 236 | #define MU9C9910_NAME "MU9C9910_RGB" /*@V2.1MNH37*/
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| 237 | #define ATT499_NAME "ATT20C499_RGB" /*@V3.0JWK18*/
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| 238 | #define ATT498_NAME "ATT20C498_RGB" /*@V3.0JWK18*/
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| 239 | #define ATT409_NAME "ATT20C409_RGB" /*@V2.1YEE10*/
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| 240 | #define TI3025_NAME "TVP3025_RGB" /* TI Viewpoint 3025 DAC*//*@V3.0YEE01*/
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| 241 | #define TI3020_NAME "TVP3020_RGB" /* TI Viewpoint 3020 DAC*//*@V3.0YEE03*/
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| 242 | #define ICS5342_NAME "ICS5342_RGB" /*@V3.0YEE04*/
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| 243 | #define NULL_DAC_NAME "NULLDAC_RGB" /*@V3.0JWK11*/
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| 244 | #define IMBEDDED_NAME "IMBEDDED_RGB"/*ATI MACH64CT internal *//*@V3.0JWK21*/
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| 245 | #define S3TRIODAC_NAME "S3_RGB" /* S3 TRIO DAC *//*@V3.0YEE05*/
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| 246 |
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| 247 | /* NOINC */
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| 248 | typedef struct _DACINFO { /* dac */
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| 249 | USHORT DACFamily;
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| 250 | USHORT DACType;
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| 251 | } DACINFO;
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| 252 |
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| 253 | /* INC */
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| 254 |
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| 255 | #define WEITEK_P9000_INCREMENT 0x0040 //Spacing between potential bases.
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| 256 | #define WEITEK_P9000_REGISTERS 0x0010 //Base address offset for registers.
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| 257 | #define WEITEK_P9000_VRAM 0x0020 //Base address offset for VRAM.
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| 258 | #define WEITEK_P9000_SYSCONFIG 0x0004 //Offset for config reg
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| 259 | #define WEITEK_P9000_INTERRUPT 0x0008 //Offset for interrupt reg
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| 260 | #define WEITEK_P9000_ENABLE 0x000c //Offset for interrupt enable reg
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| 261 | #define WEITEK_P9000_MEMCONFIG 0x0184 //Offset for memory config reg
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| 262 | #define WEITEK_P9000_REGLENGTH 0x2000 //Length for register addressability
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| 263 | /* @V2.1MNH13 end */
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| 264 |
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| 265 | #define UNKNOWN_CHIP 0
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| 266 |
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| 267 | #define VIDEO7_HT205_CHIP 1
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| 268 | #define VIDEO7_HT208_CHIP 2
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| 269 | #define VIDEO7_HT209_CHIP 3
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| 270 | #define MAX_VIDEO7_CHIP VIDEO7_HT209_CHIP /*@V2.1MNH01*/
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| 271 |
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| 272 | #define VIDEO7_HT205_NAME "HT205" /*@V2.1MNH20*/
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| 273 | #define VIDEO7_HT208_NAME "HT208" /*@V2.1MNH20*/
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| 274 | #define VIDEO7_HT209_NAME "HT209" /*@V2.1MNH20*/
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| 275 |
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| 276 | #define TRIDENT_8800_CHIP 1
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| 277 | #define TRIDENT_8900_CHIP 2
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| 278 | #define MAX_TRIDENT_CHIP TRIDENT_8900_CHIP /*@V2.1MNH01*/
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| 279 |
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| 280 | #define TRIDENT_8800_NAME "TR8800" /*@V2.1MNH20*/
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| 281 | #define TRIDENT_8900_NAME "TR8900" /*@V2.1MNH20*/
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| 282 |
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| 283 |
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| 284 | #define TSENG_ET3000_CHIP 1
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| 285 | #define TSENG_ET4000_CHIP 2
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| 286 | #define TSENG_ET4000W32_CHIP 3 /* w32 @V2.1MNH01*/
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| 287 | #define TSENG_ET4000W32I_CHIP 4 /* w32i (level a) @V2.1JWK01*/
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| 288 | #define TSENG_ET4000W32IB_CHIP 5 /* w32i level b @V2.1JWK01*/
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| 289 | #define TSENG_ET4000W32IC_CHIP 6 /* w32i level c @V2.1JWK01*/
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| 290 | #define TSENG_ET4000W32PA_CHIP 7 /* w32p level a @V2.1JWK01*/
|
|---|
| 291 | #define TSENG_ET4000W32PB_CHIP 8 /* w32p level b @V2.1JWK01*/
|
|---|
| 292 | #define TSENG_ET4000W32PC_CHIP 9 /* w32p level c @V2.1JWK01*/
|
|---|
| 293 | #define TSENG_ET4000W32ID_CHIP 10 /* w32i level d @V2.1JWK03*/
|
|---|
| 294 | #define TSENG_ET4000W32PD_CHIP 11 /* w32p level d @V2.1JWK03*/
|
|---|
| 295 | #define TSENG_ET4000W32PX_CHIP 12 /* all others @V2.1JWK23*/
|
|---|
| 296 | #define MAX_TSENG_CHIP 12
|
|---|
| 297 |
|
|---|
| 298 | #define TSENG_ET3000_NAME "ET3000" /*@V2.1JWK02*/
|
|---|
| 299 | #define TSENG_ET4000_NAME "ET4000" /*@V2.1JWK02*/
|
|---|
| 300 | #define TSENG_ET4000W32_NAME "ET4000W32" /*@V2.1JWK02*/
|
|---|
| 301 | #define TSENG_ET4000W32I_NAME "ET4000W32IREVA" /*@V2.1JWK02*/
|
|---|
| 302 | #define TSENG_ET4000W32IB_NAME "ET4000W32IREVB" /*@V2.1JWK02*/
|
|---|
| 303 | #define TSENG_ET4000W32IC_NAME "ET4000W32IREVC" /*@V2.1JWK02*/
|
|---|
| 304 | #define TSENG_ET4000W32PA_NAME "ET4000W32PREVA" /*@V2.1JWK02*/
|
|---|
| 305 | #define TSENG_ET4000W32PB_NAME "ET4000W32PREVB" /*@V2.1JWK02*/
|
|---|
| 306 | #define TSENG_ET4000W32PC_NAME "ET4000W32PREVC" /*@V2.1JWK02*/
|
|---|
| 307 | #define TSENG_ET4000W32ID_NAME "ET4000W32IREVD" /*@V2.1JWK03*/
|
|---|
| 308 | #define TSENG_ET4000W32PD_NAME "ET4000W32PREVD" /*@V2.1JWK03*/
|
|---|
| 309 | #define TSENG_ET4000W32PX_NAME "ET4000W32PREVC_COMPATABLE" /*@V2.1JWK23*/
|
|---|
| 310 |
|
|---|
| 311 | #define WESTERNDIG_PVGA1A_CHIP 1
|
|---|
| 312 | #define WESTERNDIG_WD9000_CHIP 2 /* PVGA1B */
|
|---|
| 313 | #define WESTERNDIG_WD9011_CHIP 3 /* PVGA1C */
|
|---|
| 314 | #define WESTERNDIG_WD9030_CHIP 4 /* PVGA1D */
|
|---|
| 315 | #define WESTERNDIG_WD9026_CHIP 5 /* PVGA1F */ /*@V2.1MNH01*/
|
|---|
| 316 | #define WESTERNDIG_WD9027_CHIP 6 /*@V2.1MNH01*/
|
|---|
| 317 | #define WESTERNDIG_WD9031_CHIP 7 /* PVGA1DW */ /*@V2.1MNH01*/
|
|---|
| 318 | #define WESTERNDIG_WD9024_CHIP 8 /*@V2.1MNH01*/
|
|---|
| 319 | #define WESTERNDIG_WD9033_CHIP 9 /* PVGA2DW */ /*@V2.1MNH01*/
|
|---|
| 320 | #define MAX_WESTERNDIG_CHIP WESTERNDIG_WD9033_CHIP /*@V2.1MNH01*/
|
|---|
| 321 |
|
|---|
| 322 | #define WESTERNDIG_PVGA1A_NAME "PVGA1A" /*@V2.1MNH20*/
|
|---|
| 323 | #define WESTERNDIG_WD9000_NAME "PVGA1B" /*@V2.1MNH20*/
|
|---|
| 324 | #define WESTERNDIG_WD9011_NAME "PVGA1C" /*@V2.1MNH20*/
|
|---|
| 325 | #define WESTERNDIG_WD9030_NAME "PVGA1D" /*@V2.1MNH20*/
|
|---|
| 326 | #define WESTERNDIG_WD9026_NAME "WD90C26" /*@V2.1MNH20*/
|
|---|
| 327 | #define WESTERNDIG_WD9027_NAME "WD90C27" /*@V2.1MNH20*/
|
|---|
| 328 | #define WESTERNDIG_WD9031_NAME "WD90C31" /*@V2.1MNH20*/
|
|---|
| 329 | #define WESTERNDIG_WD9024_NAME "WD90C24" /*@V2.1MNH20*/
|
|---|
| 330 | #define WESTERNDIG_WD9033_NAME "WD90C33" /*@V2.1MNH20*/
|
|---|
| 331 |
|
|---|
| 332 | #define ATI_18800_CHIP 1 /*VGAWONDER*/
|
|---|
| 333 | #define ATI_28800_CHIP 2 /*VGAWONDER+/XL*/
|
|---|
| 334 | #define ATI_38800_CHIP 3 /*MACH8/GraphicsUltra*/ /*@V2.1MNH01*/
|
|---|
| 335 | #define ATI_68800_CHIP 4 /*MACH32/GraphicsUltraPro*/ /*@V2.1MNH01*/
|
|---|
| 336 | #define ATI_88800_CHIP 5 /*MACH64*/ /*@V2.1MNH01*/
|
|---|
| 337 | #define ATI_88800CT_CHIP 6 /*MACH64CT*/ /*@V3.0JWK21*/
|
|---|
| 338 | #define MAX_ATI_CHIP ATI_88800CT_CHIP /*@V3.0JWK21*/
|
|---|
| 339 |
|
|---|
| 340 | #define ATI_18800_NAME "ATI18800" /*@V2.1MNH20*/
|
|---|
| 341 | #define ATI_28800_NAME "ATI28800" /*@V2.1MNH20*/
|
|---|
| 342 | #define ATI_38800_NAME "ATI38800MACH8" /*@V2.1MNH21*/
|
|---|
| 343 | #define ATI_68800_NAME "ATI68800MACH32" /*@V2.1MNH21*/
|
|---|
| 344 | #define ATI_88800_NAME "ATI88800MACH64" /*@V2.1MNH21*/
|
|---|
| 345 | #define ATI_88800CT_NAME "ATI88800MACH64CT" /*@V3.0JWK21*/
|
|---|
| 346 |
|
|---|
| 347 | #define IBM_SVGA_CHIP 1
|
|---|
| 348 | #define MAX_IBM_CHIP IBM_SVGA_CHIP /*@V2.1MNH01*/
|
|---|
| 349 |
|
|---|
| 350 | #define IBM_SVGA_NAME "IBMSVGA" /*@V2.1MNH20*/
|
|---|
| 351 |
|
|---|
| 352 | #define CIRRUS_5420_CHIP 1 /*@V2.1YEE08*/
|
|---|
| 353 | #define CIRRUS_5422_CHIP 2
|
|---|
| 354 | #define CIRRUS_5424_CHIP 3
|
|---|
| 355 | #define CIRRUS_5426_CHIP 4
|
|---|
| 356 | #define CIRRUS_5428_CHIP 5 /*@V2.1YEE02*/
|
|---|
| 357 | #define CIRRUS_5429_CHIP 6 /*@V2.1YEE08*/
|
|---|
| 358 | #define CIRRUS_543X_CHIP 7 /*@V2.1YEE08*/
|
|---|
| 359 | #define CIRRUS_5434_CHIP 8 /*@V2.1YEE08*/
|
|---|
| 360 | #define CIRRUS_6235_CHIP 9 /*@V3.0ITO01*/
|
|---|
| 361 | #define MAX_CIRRUS_CHIP CIRRUS_6235_CHIP /*@V3.0ITO01*/
|
|---|
| 362 |
|
|---|
| 363 | #define CIRRUS_5420_NAME "GD5420" /*@V2.1MNH20*/
|
|---|
| 364 | #define CIRRUS_5422_NAME "GD5422" /*@V2.1MNH20*/
|
|---|
| 365 | #define CIRRUS_5424_NAME "GD5424" /*@V2.1MNH20*/
|
|---|
| 366 | #define CIRRUS_5426_NAME "GD5426" /*@V2.1MNH20*/
|
|---|
| 367 | #define CIRRUS_5428_NAME "GD5428" /*@V2.1MNH20*/
|
|---|
| 368 | #define CIRRUS_5429_NAME "GD5429" /*@V2.1MNH20*/
|
|---|
| 369 | #define CIRRUS_543X_NAME "GD543X" /*@V2.1MNH20*/
|
|---|
| 370 | #define CIRRUS_5434_NAME "GD5434" /*@V2.1MNH20*/
|
|---|
| 371 | #define CIRRUS_6235_NAME "GD6235" /*@V3.0ITO01*/
|
|---|
| 372 |
|
|---|
| 373 | #define S3_86C805_CHIP 1 /* 801 or 805 */
|
|---|
| 374 | #define S3_86C928_CHIP 2
|
|---|
| 375 | #define S3_86C911_CHIP 3 /* @V2.1YEE04 */
|
|---|
| 376 | #define S3_86C864_CHIP 4 /*@V2.1MNH01*/
|
|---|
| 377 | //#define S3_DXP_CHIP S3_86C864_CHIP /*@IBMJ-S3GEN*/
|
|---|
| 378 | #define S3_86C964_CHIP 5 /*@V2.1MNH01*/
|
|---|
| 379 | //#define S3_VXP_CHIP S3_86C964_CHIP /*@IBMJ-S3GEN*/
|
|---|
| 380 |
|
|---|
| 381 | /* These chip IDs added by S3 */ /*@V3.1MNH10*/
|
|---|
| 382 | #define S3_86C868_CHIP 6 /*@V3.1MNH10*/
|
|---|
| 383 | //#define S3_V868_CHIP S3_86C868_CHIP /*@V3.1MNH10*/
|
|---|
| 384 | #define S3_86C968_CHIP 7 /*@V3.1MNH10*/
|
|---|
| 385 | //#define S3_V968_CHIP S3_86C968_CHIP /*@V3.1MNH10*/
|
|---|
| 386 | #define S3_86C732_CHIP 8 /*@V3.1MNH10*/
|
|---|
| 387 | //#define S3_Trio32_CHIP S3_86C732_CHIP /*@V3.1MNH10*/
|
|---|
| 388 | #define S3_86C764_CHIP 9 /*@V3.1MNH10*/
|
|---|
| 389 | //#define S3_Trio64_CHIP S3_86C764_CHIP /*@V3.1MNH10*/
|
|---|
| 390 | #define S3_86C765_CHIP 10 /*@V3.1MNH10*/
|
|---|
| 391 | //#define S3_V765_CHIP S3_86C765_CHIP /*@V3.1MNH10*/
|
|---|
| 392 | #define S3_86CM65_CHIP 11 /* Aurora64V */ /*@V3.1MNH10*/
|
|---|
| 393 | #define S3_86C325_CHIP 12 /* ViRGE */ /*@V3.1MNH10*/
|
|---|
| 394 | #define S3_86C988_CHIP 13 /* ViRGE/vX chip */ /*@V3.1MNH10*/
|
|---|
| 395 | #define S3_86C767_CHIP 14 /* Trio64UV+ */ /*@V3.1MNH10*/
|
|---|
| 396 | #define S3_86C765_FAMILY 15 /* Trio65V+ family compat */ /*@V3.1MNH10*/
|
|---|
| 397 |
|
|---|
| 398 | #define S3_86C924_CHIP 16 /*@V3.1MNH10*/
|
|---|
| 399 | #define S3_86C866_CHIP 17 /*@V3.1MNH10*/
|
|---|
| 400 | //#define S3_V866_CHIP S3_86C866_CHIP /*@V3.1MNH10*/
|
|---|
| 401 | #define S3_86C928PCI_CHIP 18 /*@V3.1MNH10*/
|
|---|
| 402 | #define MAX_S3_CHIP S3_86C928PCI_CHIP /*@V3.1MNH10*/
|
|---|
| 403 |
|
|---|
| 404 | #define S3_86C805_NAME "S386C80X" /*@V2.1MNH20*/
|
|---|
| 405 | #define S3_86C928_NAME "S386C928" /*@V2.1MNH20*/
|
|---|
| 406 | #define S3_86C911_NAME "S386C911" /*@V2.1MNH20*/
|
|---|
| 407 | #define S3_86C864_NAME "VISION864" /* S386C864 *//*@V3.1MNH10*/
|
|---|
| 408 | #define S3_86C964_NAME "VISION964" /* S386C964 *//*@V3.1MNH10*/
|
|---|
| 409 |
|
|---|
| 410 | #define S3_86C868_NAME "VISION868" /*@V3.1MNH10*/
|
|---|
| 411 | //#define S3_V868_NAME S3_86C868_NAME /*@V3.1MNH10*/
|
|---|
| 412 | #define S3_86C968_NAME "VISION968" /*@V3.1MNH10*/
|
|---|
| 413 | //#define S3_V968_NAME S3_86C968_NAME /*@V3.1MNH10*/
|
|---|
| 414 | #define S3_86C732_NAME "S3TRIO32" /*@V3.1MNH10*/
|
|---|
| 415 | //#define S3_Trio32_NAME S3_86C764_NAME /*@V3.1MNH10*/
|
|---|
| 416 | #define S3_86C764_NAME "S3TRIO64" /*@V3.1MNH10*/
|
|---|
| 417 | //#define S3_Trio64_NAME S3_86C732_NAME /*@V3.1MNH10*/
|
|---|
| 418 | #define S3_86C765_NAME "S3TRIO64V+" /*@V3.1MNH10*/
|
|---|
| 419 | //#define S3_V765_NAME S3_86C765_NAME /*@V3.1MNH10*/
|
|---|
| 420 | #define S3_86CM65_NAME "S3AURORA64V+" /*@V3.1MNH10*/
|
|---|
| 421 | #define S3_86C325_NAME "S3VIRGE" /*@V3.1MNH10*/
|
|---|
| 422 | #define S3_86C988_NAME "S3VIRGE/VX" /*@V3.1MNH10*/
|
|---|
| 423 | #define S3_86C767_NAME "S3TRIO64UV+" /*@V3.1MNH10*/
|
|---|
| 424 | #define S3_86C765_FAMILY_NAME "S3TRIO64V+COMPATIBLE" /*@V3.1MNH10*/
|
|---|
| 425 |
|
|---|
| 426 | #define S3_86C924_NAME "S386C924" /*@IBMJ-S3GEN*/
|
|---|
| 427 | #define S3_86C866_NAME "S386C866" /*@V3.1MNH10*/
|
|---|
| 428 | //#define S3_V866_NAME S3_86C866_NAME /*@V3.1MNH10*/
|
|---|
| 429 |
|
|---|
| 430 | #define S3_86C928PCI_NAME "S386C928PCI" /*@IBMJ-S3GEN*/
|
|---|
| 431 |
|
|---|
| 432 | #define CHIPS_FIRST_CHIP 1 /* bogus chip @V2.1YEE09*/
|
|---|
| 433 | #define MAX_CHIPS_CHIP 1 /*@V2.1YEE09*/
|
|---|
| 434 |
|
|---|
| 435 | #define WEITEK_P9000_CHIP 1 /*@V2.1MNH01*/
|
|---|
| 436 | #define WEITEK_W5186_CHIP 2 /*@V2.1MNH01*/
|
|---|
| 437 | #define WEITEK_W5286_CHIP 3 /*@V2.1MNH01*/
|
|---|
| 438 | #define WEITEK_P9100_CHIP 4 /*@V2.2TSU00*/
|
|---|
| 439 | #define MAX_WEITEK_CHIP WEITEK_P9100_CHIP /*@V2.2TSU00*/
|
|---|
| 440 |
|
|---|
| 441 | #define WEITEK_P9000_NAME "P9000" /*@V2.1MNH20*/
|
|---|
| 442 | #define WEITEK_W5186_NAME "W5186" /*@V2.1MNH20*/
|
|---|
| 443 | #define WEITEK_W5286_NAME "W5286" /*@V2.1MNH20*/
|
|---|
| 444 |
|
|---|
| 445 | #define NULL_CHIP 1 /*@V3.0JWK11*/
|
|---|
| 446 | #define MAX_NULL_CHIP NULL_CHIP /*@V3.0JWK11*/
|
|---|
| 447 | /*@V3.0JWK11*/
|
|---|
| 448 | #define NULL_NAME "NULL" /*@V3.0JWK11*/
|
|---|
| 449 |
|
|---|
| 450 | /*
|
|---|
| 451 | ** OEM manufacturer defines.
|
|---|
| 452 | */
|
|---|
| 453 |
|
|---|
| 454 | #define UNKNOWN_MANUFACTURER 0 /*@V2.1MNH13*/
|
|---|
| 455 | #define DIAMOND_MANUFACTURER 1 /*@V2.1YEE01*/
|
|---|
| 456 | #define ORCHID_MANUFACTURER 2 /*@V2.1MNH01*/
|
|---|
| 457 | #define NUMBER9_MANUFACTURER 3 /*@V2.1YEE04*/
|
|---|
| 458 | #define ARTIST_MANUFACTURER 4 /*@V2.1YEE07*/
|
|---|
| 459 | #define LACUNA_MANUFACTURER 5 /*@V2.1YEE07*/
|
|---|
| 460 | #define STB_MANUFACTURER 6 /*@V2.2SEN02*/
|
|---|
| 461 | #define S3_MANUFACTURER 7 /*@V2.1YEE10*/
|
|---|
| 462 | #define CIRRUS_MANUFACTURER 8
|
|---|
| 463 | #define MIROCRYSTAL_MANUFACTURER 9 /*@V2.1YEE11*/
|
|---|
| 464 | #define VIDEOLOGIC_MANUFACTURER 10 /*@V2.1YEE11*/
|
|---|
| 465 | #define THINKPAD_MANUFACTURER 11 /*@V3.0YEE02*/
|
|---|
| 466 | #define TOSHIBA_MANUFACTURER 12 /*@V3.0JWK04*/
|
|---|
| 467 | #define NEC_MANUFACTURER 13 /*@V3.0JWK25*/
|
|---|
| 468 | #define IBM_VISION_MANUFACTURER 14 /*@V3.1MNH01*/
|
|---|
| 469 | #define MANUFACTURER_MAX IBM_VISION_MANUFACTURER /*@V3.0MUT02*/
|
|---|
| 470 | #define DEFAULT_MANUFACTURER UNKNOWN_MANUFACTURER /*@V2.2SEN02*/
|
|---|
| 471 |
|
|---|
| 472 | /*
|
|---|
| 473 | ** OEM manufacturer MODEL defines.
|
|---|
| 474 | */
|
|---|
| 475 |
|
|---|
| 476 | #define UNKNOWN_MODEL 0 /*@V3.0JWK04*/
|
|---|
| 477 | #define TOSHIBA_6600_MODEL 1 /*@V3.0JWK04*/
|
|---|
| 478 | #define TOSHIBA_2100_MODEL 2 /*@V3.0JWK04*/
|
|---|
| 479 | #define TOSHIBA_2100CS_MODEL 3 /*@V3.0JWK04*/
|
|---|
| 480 | #define TOSHIBA_2100CT_MODEL 4 /*@V3.0JWK04*/
|
|---|
| 481 | #define TOSHIBA_4700CS_MODEL 5 /*@V3.0JWK04*/
|
|---|
| 482 | #define TOSHIBA_4700CT_MODEL 6 /*@V3.0JWK04*/
|
|---|
| 483 | #define TOSHIBA_4800CT_MODEL 7 /*@V3.0JWK04*/
|
|---|
| 484 | #define TOSHIBA_4850CT_MODEL 8 /*@V3.0JWK04*/
|
|---|
| 485 |
|
|---|
| 486 | #define NEC_VERSA_MODEL 1 /*@V3.0JWK25*/
|
|---|
| 487 |
|
|---|
| 488 |
|
|---|
| 489 | /* NOINC */
|
|---|
| 490 | typedef struct _ADAPTERS { /* adp */
|
|---|
| 491 | CHAR *Name;
|
|---|
| 492 | CHAR *Manufacturer;
|
|---|
| 493 | INT ID;
|
|---|
| 494 | }ADAPTERS;
|
|---|
| 495 |
|
|---|
| 496 | typedef CHAR *CHIPNAMES;
|
|---|
| 497 | typedef CHIPNAMES *PCHIPNAMES;
|
|---|
| 498 |
|
|---|
| 499 | /*
|
|---|
| 500 | * define CHIPS_INCL to include the following definitions.
|
|---|
| 501 | */
|
|---|
| 502 | #ifdef CHIPS_INCL
|
|---|
| 503 | /*
|
|---|
| 504 | ** This table contains adapter ID's as not to depend on the changes to
|
|---|
| 505 | ** the ID's and their order. The ChipsetName table should be kept in sync
|
|---|
| 506 | ** with the Adapters table.
|
|---|
| 507 | */
|
|---|
| 508 | ADAPTERS Adapters [SVGA_LASTADAPTER + 0x01] = /* @V2.2SENJA */
|
|---|
| 509 | {
|
|---|
| 510 | {"UNKNOWN","Unknown", UNKNOWN_ADAPTER},
|
|---|
| 511 | {"VIDEO7","Headland Technology, Inc.", VIDEO7_ADAPTER},
|
|---|
| 512 | {"TRIDENT","Trident Microsystems, Inc.", TRIDENT_ADAPTER},
|
|---|
| 513 | {"TSENG","Tseng Labs, Inc.", TSENG_ADAPTER},
|
|---|
| 514 | {"WESTERNDIGITAL","Western Digital Corporation",WESTERNDIG_ADAPTER},
|
|---|
| 515 | {"ATI","ATI Technologies Inc.", ATI_ADAPTER},
|
|---|
| 516 | {"IBM","IBM Corporation", IBM_ADAPTER},
|
|---|
| 517 | {"CIRRUS","Cirrus Logic, Inc.", CIRRUS_ADAPTER},
|
|---|
| 518 | {"S3","S3 Incorporated", S3_ADAPTER},
|
|---|
| 519 | {"CHIPS","Chips and Techologies", CHIPS_ADAPTER},
|
|---|
| 520 | {"WEITEK","WEITEK Corporation", WEITEK_ADAPTER},
|
|---|
| 521 | {"NUMBER9","Number Nine Corporation", NUMBER9_ADAPTER},
|
|---|
| 522 | {"GENERICPCI","Unknown", GENERIC_PCISVGA_ADAPTER},
|
|---|
| 523 | {"OAK","Oak Technology, Inc", OAK_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 524 | {"MATROX","Matrox", MATROX_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 525 | {"BROOKTREE","Brooktree Corporation", BROOKTREE_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 526 | {"NVIDIA","nVIDIA", NVIDIA_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 527 | {"ALLIANCE","Alliance Semiconductor Corporation", ALLIANCE_ADAPTER},/* @V3.0YEE03 */
|
|---|
| 528 | {"AVANCE","Avance Logic", AVANCE_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 529 | {"MEDIAVISION","Media Vision", MEDIAVISION_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 530 | {"ARKLOGIC","Ark Logic, Inc.", ARKLOGIC_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 531 | {"RADIUS","Radius", RADIUS_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 532 | {"3DLABS","3D Labs Inc.", THREE_D_LABS_ADAPTER},/* @V3.0YEE03 */
|
|---|
| 533 | {"NCR","NCR Corporation", NCR_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 534 | {"IIT","IIT", IIT_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 535 | {"APPIAN","Appian Technology", APPIAN_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 536 | {"SIERRA","Sierra Semiconductor Inc.", SIERRA_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 537 | {"CORNERSTONE","Cornerstone Technology", CORNERSTONE_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 538 | {"DIGITAL","Digital Equipment Corporation", DIGITAL_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 539 | {"COMPAQ","Compaq Computer Corporation", COMPAQ_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 540 | {"INFOTRONIC","INFOTRONIC", INFOTRONIC_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 541 | {"OPTI","OPTi, Inc.", OPTI_ADAPTER}, /* @V3.0YEE03 */
|
|---|
| 542 | {"NULL","null", NULL_ADAPTER}, /* @V3.0JWK11 */
|
|---|
| 543 | };
|
|---|
| 544 | CHIPNAMES ppszUnknownChipNames [1] =
|
|---|
| 545 | {
|
|---|
| 546 | "UNKNOWN",
|
|---|
| 547 | };
|
|---|
| 548 | CHIPNAMES ppszVideo7ChipNames [MAX_VIDEO7_CHIP] = /*@V2.1MNH20*/
|
|---|
| 549 | { /* Video 7==Headland Technology */ /*@V2.1MNH01*/
|
|---|
| 550 | VIDEO7_HT205_NAME, /*@V2.1MNH20*/
|
|---|
| 551 | VIDEO7_HT208_NAME, /*@V2.1MNH20*/
|
|---|
| 552 | VIDEO7_HT209_NAME, /*@V2.1MNH20*/
|
|---|
| 553 | };
|
|---|
| 554 | CHIPNAMES ppszTridentChipNames [MAX_TRIDENT_CHIP] = /*@V2.1MNH20*/
|
|---|
| 555 | { /* Trident */ /*@V2.1MNH01*/
|
|---|
| 556 | TRIDENT_8800_NAME, /*@V2.1MNH20*/
|
|---|
| 557 | TRIDENT_8900_NAME, /*@V2.1MNH20*/
|
|---|
| 558 | };
|
|---|
| 559 | CHIPNAMES ppszTsengChipNames [MAX_TSENG_CHIP] = /*@V2.1MNH20*/
|
|---|
| 560 | { /* Tseng */
|
|---|
| 561 | TSENG_ET3000_NAME, /*@V2.1MNH01*/
|
|---|
| 562 | TSENG_ET4000_NAME,
|
|---|
| 563 | TSENG_ET4000W32_NAME,
|
|---|
| 564 | TSENG_ET4000W32I_NAME,
|
|---|
| 565 | TSENG_ET4000W32IB_NAME,
|
|---|
| 566 | TSENG_ET4000W32IC_NAME, /*@V2.1JWK01*/
|
|---|
| 567 | TSENG_ET4000W32PA_NAME, /*@V2.1JWK01*/
|
|---|
| 568 | TSENG_ET4000W32PB_NAME, /*@V2.1JWK01*/
|
|---|
| 569 | TSENG_ET4000W32PC_NAME, /*@V2.2JWK03*/
|
|---|
| 570 | TSENG_ET4000W32ID_NAME, /*@V2.2JWK03*/
|
|---|
| 571 | TSENG_ET4000W32PD_NAME, /*@V2.2JWK03*/
|
|---|
| 572 | TSENG_ET4000W32PX_NAME, /*@V3.0JWK23*/
|
|---|
| 573 | };
|
|---|
| 574 | CHIPNAMES ppszWDChipNames [MAX_WESTERNDIG_CHIP] = /*@V2.1MNH20*/
|
|---|
| 575 | { /* Western Digital */ /*@V2.1MNH01*/
|
|---|
| 576 | WESTERNDIG_PVGA1A_NAME, /*@V2.1MNH20*/
|
|---|
| 577 | WESTERNDIG_WD9000_NAME, /*@V2.1MNH20*/
|
|---|
| 578 | WESTERNDIG_WD9011_NAME, /*@V2.1MNH20*/
|
|---|
| 579 | WESTERNDIG_WD9030_NAME, /*@V2.1MNH20*/
|
|---|
| 580 | WESTERNDIG_WD9026_NAME, /*@V2.1MNH20*/
|
|---|
| 581 | WESTERNDIG_WD9027_NAME, /*@V2.1MNH20*/
|
|---|
| 582 | WESTERNDIG_WD9031_NAME, /*@V2.1MNH20*/
|
|---|
| 583 | WESTERNDIG_WD9024_NAME, /*@V2.1MNH20*/
|
|---|
| 584 | WESTERNDIG_WD9033_NAME, /*@V2.1MNH20*/
|
|---|
| 585 | };
|
|---|
| 586 | CHIPNAMES ppszATIChipNames [MAX_ATI_CHIP] = /*@V2.1MNH20*/
|
|---|
| 587 | { /* ATI */ /*@V2.1MNH01*/
|
|---|
| 588 | ATI_18800_NAME, /*@V2.1MNH20*/
|
|---|
| 589 | ATI_28800_NAME, /*@V2.1MNH20*/
|
|---|
| 590 | ATI_38800_NAME, /*@V2.1MNH20*/
|
|---|
| 591 | ATI_68800_NAME, /*@V2.1MNH20*/
|
|---|
| 592 | ATI_88800_NAME, /*@V2.1MNH20*/
|
|---|
| 593 | ATI_88800CT_NAME, /*@V3.0JWK21*/
|
|---|
| 594 | };
|
|---|
| 595 | CHIPNAMES ppszIBMChipNames [MAX_IBM_CHIP] = /*@V2.1MNH20*/
|
|---|
| 596 | { /* IBM */ /*@V2.1MNH01*/
|
|---|
| 597 | IBM_SVGA_NAME, /*@V2.1MNH20*/
|
|---|
| 598 | };
|
|---|
| 599 | CHIPNAMES ppszCirrusChipNames [MAX_CIRRUS_CHIP] = /*@V2.1MNH20*/
|
|---|
| 600 | { /* Cirrus Logic */ /*@V2.1MNH01*/
|
|---|
| 601 | CIRRUS_5420_NAME, /*@V2.1YEE31*/
|
|---|
| 602 | CIRRUS_5422_NAME,
|
|---|
| 603 | CIRRUS_5424_NAME,
|
|---|
| 604 | CIRRUS_5426_NAME,
|
|---|
| 605 | CIRRUS_5428_NAME, /*@V2.1MNH01*/
|
|---|
| 606 | CIRRUS_5429_NAME, /*@V2.1YEE31*/
|
|---|
| 607 | CIRRUS_543X_NAME, /*@V2.1YEE31*/
|
|---|
| 608 | CIRRUS_5434_NAME,
|
|---|
| 609 | CIRRUS_6235_NAME, /*@V3.0ITO01*/
|
|---|
| 610 | };
|
|---|
| 611 | CHIPNAMES ppszS3ChipNames [MAX_S3_CHIP] = /*@V2.1MNH20*/
|
|---|
| 612 | { /* S3 */ /*@V2.1MNH01*/
|
|---|
| 613 | S3_86C805_NAME, /*@V2.1MNH20*/
|
|---|
| 614 | S3_86C928_NAME, /*@V2.1MNH20*/
|
|---|
| 615 | S3_86C911_NAME, /*@V2.1MNH20*/
|
|---|
| 616 | S3_86C864_NAME, /*@V2.1MNH20*/
|
|---|
| 617 | S3_86C964_NAME, /*@V2.1MNH20*/
|
|---|
| 618 |
|
|---|
| 619 | S3_86C868_NAME, /*@V3.1MNH10*/
|
|---|
| 620 | S3_86C968_NAME, /*@V3.1MNH10*/
|
|---|
| 621 | S3_86C732_NAME, /*@V3.1MNH10*/
|
|---|
| 622 | S3_86C764_NAME, /*@V3.1MNH10*/
|
|---|
| 623 | S3_86C765_NAME, /*@V3.1MNH10*/
|
|---|
| 624 | S3_86CM65_NAME, /*@V3.1MNH10*/
|
|---|
| 625 | S3_86C325_NAME, /*@V3.1MNH10*/
|
|---|
| 626 | S3_86C988_NAME, /*@V3.1MNH10*/
|
|---|
| 627 | S3_86C767_NAME, /*@V3.1MNH10*/
|
|---|
| 628 | S3_86C765_FAMILY_NAME, /*@V3.1MNH10*/
|
|---|
| 629 |
|
|---|
| 630 | S3_86C924_NAME, /*@IBMJ-S3GEN*/
|
|---|
| 631 | S3_86C928PCI_NAME, /*@IBMJ-S3GEN*/
|
|---|
| 632 | };
|
|---|
| 633 | CHIPNAMES ppszWeitekChipNames [MAX_WEITEK_CHIP] = /*@V2.1MNH20*/
|
|---|
| 634 | { /* Weitek */ /*@V2.1MNH01*/
|
|---|
| 635 | WEITEK_P9000_NAME, /*@V2.1MNH20*/
|
|---|
| 636 | WEITEK_W5186_NAME, /*@V2.1MNH20*/
|
|---|
| 637 | WEITEK_W5286_NAME, /*@V2.1MNH20*/
|
|---|
| 638 | };
|
|---|
| 639 | PCHIPNAMES ChipsetName [SVGA_LASTADAPTER + 0x01] = /*@V2.1MNH20*/
|
|---|
| 640 | {
|
|---|
| 641 | ppszUnknownChipNames, /*@V2.1MNH20*/
|
|---|
| 642 | ppszVideo7ChipNames, /*@V2.1MNH20*/
|
|---|
| 643 | ppszTridentChipNames, /*@V2.1MNH20*/
|
|---|
| 644 | ppszTsengChipNames, /*@V2.1MNH20*/
|
|---|
| 645 | ppszWDChipNames, /*@V2.1MNH20*/
|
|---|
| 646 | ppszATIChipNames, /*@V2.1MNH20*/
|
|---|
| 647 | ppszIBMChipNames, /*@V2.1MNH20*/
|
|---|
| 648 | ppszCirrusChipNames, /*@V2.1MNH20*/
|
|---|
| 649 | ppszS3ChipNames, /*@V2.1MNH20*/
|
|---|
| 650 | ppszUnknownChipNames, /*@V2.1MNH20*/
|
|---|
| 651 | ppszWeitekChipNames, /*@V2.1MNH20*/
|
|---|
| 652 | };
|
|---|
| 653 | #endif
|
|---|
| 654 | /*
|
|---|
| 655 | ** DIF subsystem defines
|
|---|
| 656 | */
|
|---|
| 657 | typedef struct _MONMODEINFO { /* mmi */
|
|---|
| 658 | USHORT usXResolution;
|
|---|
| 659 | USHORT usYResolution;
|
|---|
| 660 | BYTE bVertRefresh;
|
|---|
| 661 | BYTE bHorizRefresh;
|
|---|
| 662 | BYTE bVPolarityPos;
|
|---|
| 663 | BYTE bHPolarityPos;
|
|---|
| 664 | } MONMODEINFO;
|
|---|
| 665 | #define MAX_PATH_NAME 256
|
|---|
| 666 | #define MAX_MONITOR_LEN 128 /* length of name string */
|
|---|
| 667 | #define MAX_MONITOR_MODES 10 /* up to 10 modes per monitor */
|
|---|
| 668 | typedef struct _MonInfo { /* mi */
|
|---|
| 669 | CHAR szMonitor[MAX_MONITOR_LEN];
|
|---|
| 670 | MONMODEINFO ModeInfo[MAX_MONITOR_MODES];
|
|---|
| 671 | } MONITORINFO, FAR *PMONITORINFO;
|
|---|
| 672 |
|
|---|
| 673 | #define DIF_SERVICE_DLL_NAME "VIDEOCFG"
|
|---|
| 674 | #define VCFG_RESOURCE_DLL_NAME "VCFGMRI"
|
|---|
| 675 |
|
|---|
| 676 | #define SVGA_DATAFNAME "svgadata.pmi"
|
|---|
| 677 | #define VIDEO_CFGFNAME "video.cfg"
|
|---|
| 678 | #define MONITOR_FNAME "monitor.dif"
|
|---|
| 679 | #define PRIVATE_MONITOR_FNAME "private.dif" /*@V3.0DAI01*/
|
|---|
| 680 |
|
|---|
| 681 | /*
|
|---|
| 682 | ** DevEscape functions and structure for driver extra capabilities that need
|
|---|
| 683 | ** to be configured by VIDEOCFG.DLL
|
|---|
| 684 | */
|
|---|
| 685 |
|
|---|
| 686 | #define DEVESC_QUERYDRIVERCAPS 40010L /*@V3.0DAI01*/
|
|---|
| 687 | #define DEVESC_QUERYDRIVERCAPSLIST 40011L /*@V3.0DAI01*/
|
|---|
| 688 | #define DEVESC_SETDRIVERCAPSVALUE 40012L /*@V3.0DAI01*/
|
|---|
| 689 | /*@V3.0DAI01*/
|
|---|
| 690 | #define CAPSTYPE_BOOLEAN 1L /*@V3.0DAI01*/
|
|---|
| 691 | #define CAPSTYPE_AGGREGATE_INT 2L /*@V3.0DAI01*/
|
|---|
| 692 | #define CAPSTYPE_AGGREGATE_STRING 3L /*@V3.0DAI01*/
|
|---|
| 693 | /*@V3.0DAI01*/
|
|---|
| 694 | typedef struct _DRIVERCAPS /*@V3.0DAI01*/
|
|---|
| 695 | { /*@V3.0DAI01*/
|
|---|
| 696 | ULONG ulCb; /*@V3.0DAI01*/
|
|---|
| 697 | CHAR szCapsDesc[256]; /*@V3.0DAI01*/
|
|---|
| 698 | CHAR szHelpFileName[256]; /*@V3.0DAI01*/
|
|---|
| 699 | ULONG ulHelpId; /*@V3.0DAI01*/
|
|---|
| 700 | ULONG ulCapsType; /*@V3.0DAI01*/
|
|---|
| 701 | ULONG ulValueMemberSize; /*@V3.0DAI01*/
|
|---|
| 702 | ULONG ulNumValueMember; /*@V3.0DAI01*/
|
|---|
| 703 | PVOID pValueList; /*@V3.0DAI01*/
|
|---|
| 704 | PVOID pCurrentValue; /*@V3.0DAI01*/
|
|---|
| 705 | PVOID pDefaultValue; /*@V3.0DAI01*/
|
|---|
| 706 | BOOL bDefaultValueSupported; /*@V3.0DAI01*/
|
|---|
| 707 | BOOL bStaticCaps; /*@V3.0DAI01*/
|
|---|
| 708 | } DRIVERCAPS, *PDRIVERCAPS; /*@V3.0DAI01*/
|
|---|
| 709 |
|
|---|
| 710 | /*
|
|---|
| 711 | ** Functions exported by VIDEOCFG.DLL.
|
|---|
| 712 | */
|
|---|
| 713 |
|
|---|
| 714 | /* Begin @V2.2DAI01 */
|
|---|
| 715 | /* These functions are exported only to PM aware apps. Include PMWIN.H */
|
|---|
| 716 | #ifdef MRESULT
|
|---|
| 717 | BOOL EXPENTRY QueryScreenPageData(PHMODULE phmodResourceMRI,
|
|---|
| 718 | PUSHORT pusDlgId,
|
|---|
| 719 | PSZ pszName,
|
|---|
| 720 | PUSHORT pusHelpId,
|
|---|
| 721 | PSZ pszDlgProcName,
|
|---|
| 722 | BOOL bPaletteManagedDisplay);
|
|---|
| 723 | BOOL EXPENTRY QueryDisplayTypePageData(PHMODULE phmodResourceMRI,
|
|---|
| 724 | PUSHORT pusDlgId,
|
|---|
| 725 | PSZ pszName,
|
|---|
| 726 | PUSHORT pusHelpId,
|
|---|
| 727 | PSZ pszDlgProcName);
|
|---|
| 728 | MRESULT EXPENTRY ScreenDlgProc(HWND hwndDlg, USHORT msg, MPARAM mp1, MPARAM mp2);
|
|---|
| 729 | MRESULT EXPENTRY DIF_DisplayTypeDlgProc(HWND hwndDlg, USHORT msg, MPARAM mp1, MPARAM mp2);
|
|---|
| 730 | MRESULT EXPENTRY DMQS_DisplayTypeDlgProc(HWND hwndDlg, USHORT msg, MPARAM mp1, MPARAM mp2);
|
|---|
| 731 | #endif
|
|---|
| 732 | /* End @V2.2DAI01 */
|
|---|
| 733 |
|
|---|
| 734 | APIRET EXPENTRY QueryNumMonitors(ULONG *pulNumMonitors);
|
|---|
| 735 | APIRET EXPENTRY GetAllMonitors(MONITORINFO *pMonitors);
|
|---|
| 736 | APIRET EXPENTRY AddMonitorData(PSZ pszMonitorFileName, MONITORINFO *pNewMonitor); /* @V3.0DAI01 */
|
|---|
| 737 | APIRET EXPENTRY GetCurrentCfg(ADAPTERINFO *pAdapter,MONITORINFO *pMonitor);
|
|---|
| 738 | APIRET EXPENTRY SetCurrentCfg(ADAPTERINFO *pAdapter,MONITORINFO *pMonitor);
|
|---|
| 739 | BOOL EXPENTRY GetCurrentDesktopMode(PVIDEO_ADAPTER pVideoAdapter); /* @V3.0DAI01 */
|
|---|
| 740 | /*
|
|---|
| 741 | ** 16 entry point into the VIDEOCFG.DLL
|
|---|
| 742 | */
|
|---|
| 743 | APIRET VIDEOAPI VCFG16Request(PVOID pIn,ULONG function,PVOID pOut1,PVOID pOut2);
|
|---|
| 744 | typedef APIRET (VIDEOAPI FNCFG16REQUEST)(PVOID, ULONG, PVOID, PVOID);
|
|---|
| 745 | typedef FNCFG16REQUEST *PFNCFG16REQUEST;
|
|---|
| 746 | /*
|
|---|
| 747 | ** functions exported to 16 bit
|
|---|
| 748 | */
|
|---|
| 749 | #define VCFG_GET_CURRENT_CONFIG 0 //pIn = NULL, pOut1 = pAdapter, pOut2 = pMonitor
|
|---|
| 750 |
|
|---|
| 751 | /* INC */
|
|---|
| 752 |
|
|---|
| 753 |
|
|---|
| 754 | /*
|
|---|
| 755 | ** APM constants @V3.0YEE06
|
|---|
| 756 | */
|
|---|
| 757 | #define APM_RESUME 1
|
|---|
| 758 | #define APM_SUSPEND 2
|
|---|
| 759 | #define APM_DISABLED 4
|
|---|
| 760 |
|
|---|
| 761 | /* this IOCTL is used internally between videopmi and screendd @V3.0YEE06 */
|
|---|
| 762 | #define SCREENDD_SVGA_APM 0x10 /* Wait for APM @V3.0YEE06 */
|
|---|
| 763 |
|
|---|
| 764 | #ifndef INCL_DOSDEVIOCTL //@senja: bsedev.h can't be used by vvid
|
|---|
| 765 | #ifndef BSEDEV_INCLUDED //don't define if bsedev already included
|
|---|
| 766 | #define SCREENDD_SVGA_ID 0x08 /* Get SVGA info IOCTL */
|
|---|
| 767 | #define SCREENDD_SVGA_OEM 0x09 /* Get OEM info IOCTL */
|
|---|
| 768 | /* #define SCREENDD_SVGA_APM 0x10 Wait for APM @V3.0YEE06 */
|
|---|
| 769 | #define SCREENDD_CATEGORY 0x80
|
|---|
| 770 | #define SCREENDD_NAME "SCREEN$"
|
|---|
| 771 | /* SCREENDD_SVGA_ID */
|
|---|
| 772 | typedef struct _OEMSVGAINFO { /* */
|
|---|
| 773 | USHORT AdapterType;
|
|---|
| 774 | USHORT ChipType;
|
|---|
| 775 | ULONG Memory;
|
|---|
| 776 | } OEMSVGAINFO;
|
|---|
| 777 | /* SCREENDD_SVGA_OEM */
|
|---|
| 778 | typedef struct _OEMINFO { /* */
|
|---|
| 779 | ULONG OEMLength;
|
|---|
| 780 | USHORT Manufacturer;
|
|---|
| 781 | ULONG ManufacturerData;
|
|---|
| 782 | USHORT ManufacturerModel; /*@V3.0JWK04*/
|
|---|
| 783 | } OEMINFO;
|
|---|
| 784 | #endif
|
|---|
| 785 | #endif
|
|---|
