Changeset 380

Timestamp:

Jul 15, 2003, 4:51:29 PM (22 years ago)

Author:

bird

Message:

#563: mask fpu exceptions and clear exceptions after doing the trunction. OS/2 feature so to speak.

File:

• trunk/src/gcc/gcc/config/i386/i386.c (modified) (24 diffs, 1 prop)

trunk/src/gcc/gcc/config/i386/i386.c

@@ -49 +49 @@
 
 /* Processor costs (relative to an add) */
-static const 
+static const
 struct processor_costs size_cost = {    /* costs for tunning for size */
   2,                                    /* cost of an add instruction */
@@ -86 +86 @@
 };
 /* Processor costs (relative to an add) */
-static const 
+static const
 struct processor_costs i386_cost = {    /* 386 specific costs */
   1,                                    /* cost of an add instruction */
@@ -123 +123 @@
 };
 
-static const 
+static const
 struct processor_costs i486_cost = {    /* 486 specific costs */
   1,                                    /* cost of an add instruction */
@@ -160 +160 @@
 };
 
-static const 
+static const
 struct processor_costs pentium_cost = {
   1,                                    /* cost of an add instruction */
@@ -197 +197 @@
 };
 
-static const 
+static const
 struct processor_costs pentiumpro_cost = {
   1,                                    /* cost of an add instruction */
@@ -234 +234 @@
 };
 
-static const 
+static const
 struct processor_costs k6_cost = {
   1,                                    /* cost of an add instruction */
@@ -271 +271 @@
 };
 
-static const 
+static const
 struct processor_costs athlon_cost = {
   1,                                    /* cost of an add instruction */
@@ -308 +308 @@
 };
 
-static const 
+static const
 struct processor_costs pentium4_cost = {
   1,                                    /* cost of an add instruction */
@@ -1209 +1209 @@
             ix86_fpmath = FPMATH_SSE | FPMATH_387;
         }
-      else 
+      else
         error ("bad value (%s) for -mfpmath= switch", ix86_fpmath_string);
     }
@@ -2451 +2451 @@
   type_decl = build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
 
-  f_gpr = build_decl (FIELD_DECL, get_identifier ("gp_offset"), 
+  f_gpr = build_decl (FIELD_DECL, get_identifier ("gp_offset"),
                       unsigned_type_node);
-  f_fpr = build_decl (FIELD_DECL, get_identifier ("fp_offset"), 
+  f_fpr = build_decl (FIELD_DECL, get_identifier ("fp_offset"),
                       unsigned_type_node);
   f_ovf = build_decl (FIELD_DECL, get_identifier ("overflow_arg_area"),
@@ -2479 +2479 @@
 
 /* Perform any needed actions needed for a function that is receiving a
-   variable number of arguments. 
+   variable number of arguments.
 
    CUM is as above.
@@ -3061 +3061 @@
         return 1;
     }
-  else 
+  else
     {
       if (GET_CODE (op) == UNSPEC)
@@ -3099 +3099 @@
 
   /* There is, however, a not insubstantial body of code in the rest of
-     the compiler that assumes it can just stick the results of 
+     the compiler that assumes it can just stick the results of
      ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done.  */
   /* ??? This is a hack.  Should update the body of the compiler to
@@ -4865 +4865 @@
       return local_symbolic_operand (XVECEXP (disp, 0, 0), Pmode);
     }
-    
+
   return 0;
 }
@@ -6056 +6056 @@
           /* Like above, but reverse condition */
         case 'c':
-          /* Check to see if argument to %c is really a constant 
+          /* Check to see if argument to %c is really a constant
              and not a condition code which needs to be reversed.  */
           if (GET_RTX_CLASS (GET_CODE (x)) != '<')
@@ -6645 +6645 @@
   emit_insn (gen_x86_fnstcw_1 (normal));
   emit_move_insn (reg, normal);
+#ifdef EMX /* #563: On OS/2 we need to mask exceptions. */
+  emit_insn (gen_iorhi3 (reg, reg, GEN_INT (0xc3f)));
+#else
   if (!TARGET_PARTIAL_REG_STALL && !optimize_size
       && !TARGET_64BIT)
@@ -6650 +6653 @@
   else
     emit_insn (gen_iorhi3 (reg, reg, GEN_INT (0xc00)));
+#endif
   emit_move_insn (round_down, reg);
 }
@@ -6682 +6686 @@
   else
     output_asm_insn ("fist%z0\t%0", operands);
+#ifdef EMX /* #563: On OS/2 we need to clear exception flags. */
+  output_asm_insn ("fnclex", operands);
+#endif
   output_asm_insn ("fldcw\t%2", operands);
 
@@ -6976 +6983 @@
 
   emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
-}  
+}
 
 /* Attempt to expand a binary operator.  Make the expansion closer to the
@@ -11633 +11640 @@
 }
 
-/* In type_for_mode we restrict the ability to create TImode types 
+/* In type_for_mode we restrict the ability to create TImode types
    to hosts with 64-bit H_W_I.  So we've defined the SSE logicals
    to have a V4SFmode signature.  Convert them in-place to TImode.  */
@@ -11763 +11770 @@
   if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
     op0 = copy_to_mode_reg (mode0, op0);
-  
+
   op1 = op0;
   if (! (*insn_data[icode].operand[2].predicate) (op1, mode0))
     op1 = copy_to_mode_reg (mode0, op1);
-  
+
   pat = GEN_FCN (icode) (target, op0, op1);
   if (! pat)
@@ -12470 +12477 @@
 {
   /* In case we require secondary memory, compute cost of the store followed
-     by load.  In order to avoid bad register allocation choices, we need 
+     by load.  In order to avoid bad register allocation choices, we need
      for this to be *at least* as high as the symmetric MEMORY_MOVE_COST.  */
 
@@ -12481 +12488 @@
       cost += MAX (MEMORY_MOVE_COST (mode, class2, 0),
                    MEMORY_MOVE_COST (mode, class2, 1));
-      
+
       /* In case of copying from general_purpose_register we may emit multiple
          stores followed by single load causing memory size mismatch stall.
@@ -12669 +12676 @@
      for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
        reg_alloc_order [pos++] = i;
-   
+
    /* SSE registers.  */
    for (i = FIRST_SSE_REG; i <= LAST_SSE_REG; i++)