source: vendor/binutils/current/opcodes/ip2k-opc.c

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1/* Instruction opcode table for ip2k.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "ip2k-desc.h"
30#include "ip2k-opc.h"
31#include "libiberty.h"
32
33/* -- opc.c */
34
35#include "safe-ctype.h"
36
37/* A better hash function for instruction mnemonics. */
38unsigned int
39ip2k_asm_hash (insn)
40 const char* insn;
41{
42 unsigned int hash;
43 const char* m = insn;
44
45 for (hash = 0; *m && !ISSPACE(*m); m++)
46 hash = (hash * 23) ^ (0x1F & TOLOWER(*m));
47
48 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
49
50 return hash % CGEN_ASM_HASH_SIZE;
51}
52
53
54/* Special check to ensure that instruction exists for given machine. */
55int
56ip2k_cgen_insn_supported (cd, insn)
57 CGEN_CPU_DESC cd;
58 const CGEN_INSN *insn;
59{
60 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
61
62 /* No mach attribute? Assume it's supported for all machs. */
63 if (machs == 0)
64 return 1;
65
66 return ((machs & cd->machs) != 0);
67}
68
69
70
71/* -- asm.c */
72/* The hash functions are recorded here to help keep assembler code out of
73 the disassembler and vice versa. */
74
75static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
76static unsigned int asm_hash_insn PARAMS ((const char *));
77static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
78static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
79
80/* Instruction formats. */
81
82#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
83#define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
84#else
85#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
86#endif
87static const CGEN_IFMT ifmt_empty = {
88 0, 0, 0x0, { { 0 } }
89};
90
91static const CGEN_IFMT ifmt_jmp = {
92 16, 16, 0xe000, { { F (F_OP3) }, { F (F_ADDR16CJP) }, { 0 } }
93};
94
95static const CGEN_IFMT ifmt_sb = {
96 16, 16, 0xf000, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
97};
98
99static const CGEN_IFMT ifmt_xorw_l = {
100 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
101};
102
103static const CGEN_IFMT ifmt_loadl_a = {
104 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
105};
106
107static const CGEN_IFMT ifmt_loadh_a = {
108 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
109};
110
111static const CGEN_IFMT ifmt_addcfr_w = {
112 16, 16, 0xfe00, { { F (F_OP6) }, { F (F_DIR) }, { F (F_REG) }, { 0 } }
113};
114
115static const CGEN_IFMT ifmt_speed = {
116 16, 16, 0xff00, { { F (F_OP8) }, { F (F_IMM8) }, { 0 } }
117};
118
119static const CGEN_IFMT ifmt_ireadi = {
120 16, 16, 0xffff, { { F (F_OP6) }, { F (F_OP6_10LOW) }, { 0 } }
121};
122
123static const CGEN_IFMT ifmt_page = {
124 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_PAGE3) }, { 0 } }
125};
126
127static const CGEN_IFMT ifmt_reti = {
128 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_RETI3) }, { 0 } }
129};
130
131#undef F
132
133#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
134#define A(a) (1 << CGEN_INSN_##a)
135#else
136#define A(a) (1 << CGEN_INSN_/**/a)
137#endif
138#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
139#define OPERAND(op) IP2K_OPERAND_##op
140#else
141#define OPERAND(op) IP2K_OPERAND_/**/op
142#endif
143#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
144#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
145
146/* The instruction table. */
147
148static const CGEN_OPCODE ip2k_cgen_insn_opcode_table[MAX_INSNS] =
149{
150 /* Special null first entry.
151 A `num' value of zero is thus invalid.
152 Also, the special `invalid' insn resides here. */
153 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
154/* jmp $addr16cjp */
155 {
156 { 0, 0, 0, 0 },
157 { { MNEM, ' ', OP (ADDR16CJP), 0 } },
158 & ifmt_jmp, { 0xe000 }
159 },
160/* call $addr16cjp */
161 {
162 { 0, 0, 0, 0 },
163 { { MNEM, ' ', OP (ADDR16CJP), 0 } },
164 & ifmt_jmp, { 0xc000 }
165 },
166/* sb $fr,$bitno */
167 {
168 { 0, 0, 0, 0 },
169 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
170 & ifmt_sb, { 0xb000 }
171 },
172/* snb $fr,$bitno */
173 {
174 { 0, 0, 0, 0 },
175 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
176 & ifmt_sb, { 0xa000 }
177 },
178/* setb $fr,$bitno */
179 {
180 { 0, 0, 0, 0 },
181 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
182 & ifmt_sb, { 0x9000 }
183 },
184/* clrb $fr,$bitno */
185 {
186 { 0, 0, 0, 0 },
187 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
188 & ifmt_sb, { 0x8000 }
189 },
190/* xor W,#$lit8 */
191 {
192 { 0, 0, 0, 0 },
193 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
194 & ifmt_xorw_l, { 0x7f00 }
195 },
196/* and W,#$lit8 */
197 {
198 { 0, 0, 0, 0 },
199 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
200 & ifmt_xorw_l, { 0x7e00 }
201 },
202/* or W,#$lit8 */
203 {
204 { 0, 0, 0, 0 },
205 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
206 & ifmt_xorw_l, { 0x7d00 }
207 },
208/* add W,#$lit8 */
209 {
210 { 0, 0, 0, 0 },
211 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
212 & ifmt_xorw_l, { 0x7b00 }
213 },
214/* sub W,#$lit8 */
215 {
216 { 0, 0, 0, 0 },
217 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
218 & ifmt_xorw_l, { 0x7a00 }
219 },
220/* cmp W,#$lit8 */
221 {
222 { 0, 0, 0, 0 },
223 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
224 & ifmt_xorw_l, { 0x7900 }
225 },
226/* retw #$lit8 */
227 {
228 { 0, 0, 0, 0 },
229 { { MNEM, ' ', '#', OP (LIT8), 0 } },
230 & ifmt_xorw_l, { 0x7800 }
231 },
232/* cse W,#$lit8 */
233 {
234 { 0, 0, 0, 0 },
235 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
236 & ifmt_xorw_l, { 0x7700 }
237 },
238/* csne W,#$lit8 */
239 {
240 { 0, 0, 0, 0 },
241 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
242 & ifmt_xorw_l, { 0x7600 }
243 },
244/* push #$lit8 */
245 {
246 { 0, 0, 0, 0 },
247 { { MNEM, ' ', '#', OP (LIT8), 0 } },
248 & ifmt_xorw_l, { 0x7400 }
249 },
250/* muls W,#$lit8 */
251 {
252 { 0, 0, 0, 0 },
253 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
254 & ifmt_xorw_l, { 0x7300 }
255 },
256/* mulu W,#$lit8 */
257 {
258 { 0, 0, 0, 0 },
259 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
260 & ifmt_xorw_l, { 0x7200 }
261 },
262/* loadl #$lit8 */
263 {
264 { 0, 0, 0, 0 },
265 { { MNEM, ' ', '#', OP (LIT8), 0 } },
266 & ifmt_xorw_l, { 0x7100 }
267 },
268/* loadh #$lit8 */
269 {
270 { 0, 0, 0, 0 },
271 { { MNEM, ' ', '#', OP (LIT8), 0 } },
272 & ifmt_xorw_l, { 0x7000 }
273 },
274/* loadl $addr16l */
275 {
276 { 0, 0, 0, 0 },
277 { { MNEM, ' ', OP (ADDR16L), 0 } },
278 & ifmt_loadl_a, { 0x7100 }
279 },
280/* loadh $addr16h */
281 {
282 { 0, 0, 0, 0 },
283 { { MNEM, ' ', OP (ADDR16H), 0 } },
284 & ifmt_loadh_a, { 0x7000 }
285 },
286/* addc $fr,W */
287 {
288 { 0, 0, 0, 0 },
289 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
290 & ifmt_addcfr_w, { 0x5e00 }
291 },
292/* addc W,$fr */
293 {
294 { 0, 0, 0, 0 },
295 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
296 & ifmt_addcfr_w, { 0x5c00 }
297 },
298/* incsnz $fr */
299 {
300 { 0, 0, 0, 0 },
301 { { MNEM, ' ', OP (FR), 0 } },
302 & ifmt_addcfr_w, { 0x5a00 }
303 },
304/* incsnz W,$fr */
305 {
306 { 0, 0, 0, 0 },
307 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
308 & ifmt_addcfr_w, { 0x5800 }
309 },
310/* muls W,$fr */
311 {
312 { 0, 0, 0, 0 },
313 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
314 & ifmt_addcfr_w, { 0x5400 }
315 },
316/* mulu W,$fr */
317 {
318 { 0, 0, 0, 0 },
319 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
320 & ifmt_addcfr_w, { 0x5000 }
321 },
322/* decsnz $fr */
323 {
324 { 0, 0, 0, 0 },
325 { { MNEM, ' ', OP (FR), 0 } },
326 & ifmt_addcfr_w, { 0x4e00 }
327 },
328/* decsnz W,$fr */
329 {
330 { 0, 0, 0, 0 },
331 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
332 & ifmt_addcfr_w, { 0x4c00 }
333 },
334/* subc W,$fr */
335 {
336 { 0, 0, 0, 0 },
337 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
338 & ifmt_addcfr_w, { 0x4800 }
339 },
340/* subc $fr,W */
341 {
342 { 0, 0, 0, 0 },
343 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
344 & ifmt_addcfr_w, { 0x4a00 }
345 },
346/* pop $fr */
347 {
348 { 0, 0, 0, 0 },
349 { { MNEM, ' ', OP (FR), 0 } },
350 & ifmt_addcfr_w, { 0x4600 }
351 },
352/* push $fr */
353 {
354 { 0, 0, 0, 0 },
355 { { MNEM, ' ', OP (FR), 0 } },
356 & ifmt_addcfr_w, { 0x4400 }
357 },
358/* cse W,$fr */
359 {
360 { 0, 0, 0, 0 },
361 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
362 & ifmt_addcfr_w, { 0x4200 }
363 },
364/* csne W,$fr */
365 {
366 { 0, 0, 0, 0 },
367 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
368 & ifmt_addcfr_w, { 0x4000 }
369 },
370/* incsz $fr */
371 {
372 { 0, 0, 0, 0 },
373 { { MNEM, ' ', OP (FR), 0 } },
374 & ifmt_addcfr_w, { 0x3e00 }
375 },
376/* incsz W,$fr */
377 {
378 { 0, 0, 0, 0 },
379 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
380 & ifmt_addcfr_w, { 0x3c00 }
381 },
382/* swap $fr */
383 {
384 { 0, 0, 0, 0 },
385 { { MNEM, ' ', OP (FR), 0 } },
386 & ifmt_addcfr_w, { 0x3a00 }
387 },
388/* swap W,$fr */
389 {
390 { 0, 0, 0, 0 },
391 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
392 & ifmt_addcfr_w, { 0x3800 }
393 },
394/* rl $fr */
395 {
396 { 0, 0, 0, 0 },
397 { { MNEM, ' ', OP (FR), 0 } },
398 & ifmt_addcfr_w, { 0x3600 }
399 },
400/* rl W,$fr */
401 {
402 { 0, 0, 0, 0 },
403 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
404 & ifmt_addcfr_w, { 0x3400 }
405 },
406/* rr $fr */
407 {
408 { 0, 0, 0, 0 },
409 { { MNEM, ' ', OP (FR), 0 } },
410 & ifmt_addcfr_w, { 0x3200 }
411 },
412/* rr W,$fr */
413 {
414 { 0, 0, 0, 0 },
415 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
416 & ifmt_addcfr_w, { 0x3000 }
417 },
418/* decsz $fr */
419 {
420 { 0, 0, 0, 0 },
421 { { MNEM, ' ', OP (FR), 0 } },
422 & ifmt_addcfr_w, { 0x2e00 }
423 },
424/* decsz W,$fr */
425 {
426 { 0, 0, 0, 0 },
427 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
428 & ifmt_addcfr_w, { 0x2c00 }
429 },
430/* inc $fr */
431 {
432 { 0, 0, 0, 0 },
433 { { MNEM, ' ', OP (FR), 0 } },
434 & ifmt_addcfr_w, { 0x2a00 }
435 },
436/* inc W,$fr */
437 {
438 { 0, 0, 0, 0 },
439 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
440 & ifmt_addcfr_w, { 0x2800 }
441 },
442/* not $fr */
443 {
444 { 0, 0, 0, 0 },
445 { { MNEM, ' ', OP (FR), 0 } },
446 & ifmt_addcfr_w, { 0x2600 }
447 },
448/* not W,$fr */
449 {
450 { 0, 0, 0, 0 },
451 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
452 & ifmt_addcfr_w, { 0x2400 }
453 },
454/* test $fr */
455 {
456 { 0, 0, 0, 0 },
457 { { MNEM, ' ', OP (FR), 0 } },
458 & ifmt_addcfr_w, { 0x2200 }
459 },
460/* mov W,#$lit8 */
461 {
462 { 0, 0, 0, 0 },
463 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
464 & ifmt_xorw_l, { 0x7c00 }
465 },
466/* mov $fr,W */
467 {
468 { 0, 0, 0, 0 },
469 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
470 & ifmt_addcfr_w, { 0x200 }
471 },
472/* mov W,$fr */
473 {
474 { 0, 0, 0, 0 },
475 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
476 & ifmt_addcfr_w, { 0x2000 }
477 },
478/* add $fr,W */
479 {
480 { 0, 0, 0, 0 },
481 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
482 & ifmt_addcfr_w, { 0x1e00 }
483 },
484/* add W,$fr */
485 {
486 { 0, 0, 0, 0 },
487 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
488 & ifmt_addcfr_w, { 0x1c00 }
489 },
490/* xor $fr,W */
491 {
492 { 0, 0, 0, 0 },
493 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
494 & ifmt_addcfr_w, { 0x1a00 }
495 },
496/* xor W,$fr */
497 {
498 { 0, 0, 0, 0 },
499 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
500 & ifmt_addcfr_w, { 0x1800 }
501 },
502/* and $fr,W */
503 {
504 { 0, 0, 0, 0 },
505 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
506 & ifmt_addcfr_w, { 0x1600 }
507 },
508/* and W,$fr */
509 {
510 { 0, 0, 0, 0 },
511 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
512 & ifmt_addcfr_w, { 0x1400 }
513 },
514/* or $fr,W */
515 {
516 { 0, 0, 0, 0 },
517 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
518 & ifmt_addcfr_w, { 0x1200 }
519 },
520/* or W,$fr */
521 {
522 { 0, 0, 0, 0 },
523 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
524 & ifmt_addcfr_w, { 0x1000 }
525 },
526/* dec $fr */
527 {
528 { 0, 0, 0, 0 },
529 { { MNEM, ' ', OP (FR), 0 } },
530 & ifmt_addcfr_w, { 0xe00 }
531 },
532/* dec W,$fr */
533 {
534 { 0, 0, 0, 0 },
535 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
536 & ifmt_addcfr_w, { 0xc00 }
537 },
538/* sub $fr,W */
539 {
540 { 0, 0, 0, 0 },
541 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
542 & ifmt_addcfr_w, { 0xa00 }
543 },
544/* sub W,$fr */
545 {
546 { 0, 0, 0, 0 },
547 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
548 & ifmt_addcfr_w, { 0x800 }
549 },
550/* clr $fr */
551 {
552 { 0, 0, 0, 0 },
553 { { MNEM, ' ', OP (FR), 0 } },
554 & ifmt_addcfr_w, { 0x600 }
555 },
556/* cmp W,$fr */
557 {
558 { 0, 0, 0, 0 },
559 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
560 & ifmt_addcfr_w, { 0x400 }
561 },
562/* speed #$lit8 */
563 {
564 { 0, 0, 0, 0 },
565 { { MNEM, ' ', '#', OP (LIT8), 0 } },
566 & ifmt_speed, { 0x100 }
567 },
568/* ireadi */
569 {
570 { 0, 0, 0, 0 },
571 { { MNEM, 0 } },
572 & ifmt_ireadi, { 0x1d }
573 },
574/* iwritei */
575 {
576 { 0, 0, 0, 0 },
577 { { MNEM, 0 } },
578 & ifmt_ireadi, { 0x1c }
579 },
580/* fread */
581 {
582 { 0, 0, 0, 0 },
583 { { MNEM, 0 } },
584 & ifmt_ireadi, { 0x1b }
585 },
586/* fwrite */
587 {
588 { 0, 0, 0, 0 },
589 { { MNEM, 0 } },
590 & ifmt_ireadi, { 0x1a }
591 },
592/* iread */
593 {
594 { 0, 0, 0, 0 },
595 { { MNEM, 0 } },
596 & ifmt_ireadi, { 0x19 }
597 },
598/* iwrite */
599 {
600 { 0, 0, 0, 0 },
601 { { MNEM, 0 } },
602 & ifmt_ireadi, { 0x18 }
603 },
604/* page $addr16p */
605 {
606 { 0, 0, 0, 0 },
607 { { MNEM, ' ', OP (ADDR16P), 0 } },
608 & ifmt_page, { 0x10 }
609 },
610/* system */
611 {
612 { 0, 0, 0, 0 },
613 { { MNEM, 0 } },
614 & ifmt_ireadi, { 0xff }
615 },
616/* reti #$reti3 */
617 {
618 { 0, 0, 0, 0 },
619 { { MNEM, ' ', '#', OP (RETI3), 0 } },
620 & ifmt_reti, { 0x8 }
621 },
622/* ret */
623 {
624 { 0, 0, 0, 0 },
625 { { MNEM, 0 } },
626 & ifmt_ireadi, { 0x7 }
627 },
628/* int */
629 {
630 { 0, 0, 0, 0 },
631 { { MNEM, 0 } },
632 & ifmt_ireadi, { 0x6 }
633 },
634/* breakx */
635 {
636 { 0, 0, 0, 0 },
637 { { MNEM, 0 } },
638 & ifmt_ireadi, { 0x5 }
639 },
640/* cwdt */
641 {
642 { 0, 0, 0, 0 },
643 { { MNEM, 0 } },
644 & ifmt_ireadi, { 0x4 }
645 },
646/* ferase */
647 {
648 { 0, 0, 0, 0 },
649 { { MNEM, 0 } },
650 & ifmt_ireadi, { 0x3 }
651 },
652/* retnp */
653 {
654 { 0, 0, 0, 0 },
655 { { MNEM, 0 } },
656 & ifmt_ireadi, { 0x2 }
657 },
658/* break */
659 {
660 { 0, 0, 0, 0 },
661 { { MNEM, 0 } },
662 & ifmt_ireadi, { 0x1 }
663 },
664/* nop */
665 {
666 { 0, 0, 0, 0 },
667 { { MNEM, 0 } },
668 & ifmt_ireadi, { 0x0 }
669 },
670};
671
672#undef A
673#undef OPERAND
674#undef MNEM
675#undef OP
676
677/* Formats for ALIAS macro-insns. */
678
679#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
680#define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
681#else
682#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
683#endif
684static const CGEN_IFMT ifmt_sc = {
685 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
686};
687
688static const CGEN_IFMT ifmt_snc = {
689 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
690};
691
692static const CGEN_IFMT ifmt_sz = {
693 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
694};
695
696static const CGEN_IFMT ifmt_snz = {
697 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
698};
699
700static const CGEN_IFMT ifmt_skip = {
701 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
702};
703
704static const CGEN_IFMT ifmt_skipb = {
705 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
706};
707
708#undef F
709
710/* Each non-simple macro entry points to an array of expansion possibilities. */
711
712#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
713#define A(a) (1 << CGEN_INSN_##a)
714#else
715#define A(a) (1 << CGEN_INSN_/**/a)
716#endif
717#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
718#define OPERAND(op) IP2K_OPERAND_##op
719#else
720#define OPERAND(op) IP2K_OPERAND_/**/op
721#endif
722#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
723#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
724
725/* The macro instruction table. */
726
727static const CGEN_IBASE ip2k_cgen_macro_insn_table[] =
728{
729/* sc */
730 {
731 -1, "sc", "sc", 16,
732 { 0|A(ALIAS), { (1<<MACH_BASE) } }
733 },
734/* snc */
735 {
736 -1, "snc", "snc", 16,
737 { 0|A(ALIAS), { (1<<MACH_BASE) } }
738 },
739/* sz */
740 {
741 -1, "sz", "sz", 16,
742 { 0|A(ALIAS), { (1<<MACH_BASE) } }
743 },
744/* snz */
745 {
746 -1, "snz", "snz", 16,
747 { 0|A(ALIAS), { (1<<MACH_BASE) } }
748 },
749/* skip */
750 {
751 -1, "skip", "skip", 16,
752 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } }
753 },
754/* skip */
755 {
756 -1, "skipb", "skip", 16,
757 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } }
758 },
759};
760
761/* The macro instruction opcode table. */
762
763static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table[] =
764{
765/* sc */
766 {
767 { 0, 0, 0, 0 },
768 { { MNEM, 0 } },
769 & ifmt_sc, { 0xb00b }
770 },
771/* snc */
772 {
773 { 0, 0, 0, 0 },
774 { { MNEM, 0 } },
775 & ifmt_snc, { 0xa00b }
776 },
777/* sz */
778 {
779 { 0, 0, 0, 0 },
780 { { MNEM, 0 } },
781 & ifmt_sz, { 0xb40b }
782 },
783/* snz */
784 {
785 { 0, 0, 0, 0 },
786 { { MNEM, 0 } },
787 & ifmt_snz, { 0xa40b }
788 },
789/* skip */
790 {
791 { 0, 0, 0, 0 },
792 { { MNEM, 0 } },
793 & ifmt_skip, { 0xa009 }
794 },
795/* skip */
796 {
797 { 0, 0, 0, 0 },
798 { { MNEM, 0 } },
799 & ifmt_skipb, { 0xb009 }
800 },
801};
802
803#undef A
804#undef OPERAND
805#undef MNEM
806#undef OP
807
808#ifndef CGEN_ASM_HASH_P
809#define CGEN_ASM_HASH_P(insn) 1
810#endif
811
812#ifndef CGEN_DIS_HASH_P
813#define CGEN_DIS_HASH_P(insn) 1
814#endif
815
816/* Return non-zero if INSN is to be added to the hash table.
817 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
818
819static int
820asm_hash_insn_p (insn)
821 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
822{
823 return CGEN_ASM_HASH_P (insn);
824}
825
826static int
827dis_hash_insn_p (insn)
828 const CGEN_INSN *insn;
829{
830 /* If building the hash table and the NO-DIS attribute is present,
831 ignore. */
832 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
833 return 0;
834 return CGEN_DIS_HASH_P (insn);
835}
836
837#ifndef CGEN_ASM_HASH
838#define CGEN_ASM_HASH_SIZE 127
839#ifdef CGEN_MNEMONIC_OPERANDS
840#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
841#else
842#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
843#endif
844#endif
845
846/* It doesn't make much sense to provide a default here,
847 but while this is under development we do.
848 BUFFER is a pointer to the bytes of the insn, target order.
849 VALUE is the first base_insn_bitsize bits as an int in host order. */
850
851#ifndef CGEN_DIS_HASH
852#define CGEN_DIS_HASH_SIZE 256
853#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
854#endif
855
856/* The result is the hash value of the insn.
857 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
858
859static unsigned int
860asm_hash_insn (mnem)
861 const char * mnem;
862{
863 return CGEN_ASM_HASH (mnem);
864}
865
866/* BUF is a pointer to the bytes of the insn, target order.
867 VALUE is the first base_insn_bitsize bits as an int in host order. */
868
869static unsigned int
870dis_hash_insn (buf, value)
871 const char * buf ATTRIBUTE_UNUSED;
872 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
873{
874 return CGEN_DIS_HASH (buf, value);
875}
876
877static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int));
878
879/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
880
881static void
882set_fields_bitsize (fields, size)
883 CGEN_FIELDS *fields;
884 int size;
885{
886 CGEN_FIELDS_BITSIZE (fields) = size;
887}
888
889/* Function to call before using the operand instance table.
890 This plugs the opcode entries and macro instructions into the cpu table. */
891
892void
893ip2k_cgen_init_opcode_table (cd)
894 CGEN_CPU_DESC cd;
895{
896 int i;
897 int num_macros = (sizeof (ip2k_cgen_macro_insn_table) /
898 sizeof (ip2k_cgen_macro_insn_table[0]));
899 const CGEN_IBASE *ib = & ip2k_cgen_macro_insn_table[0];
900 const CGEN_OPCODE *oc = & ip2k_cgen_macro_insn_opcode_table[0];
901 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
902 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
903 for (i = 0; i < num_macros; ++i)
904 {
905 insns[i].base = &ib[i];
906 insns[i].opcode = &oc[i];
907 ip2k_cgen_build_insn_regex (& insns[i]);
908 }
909 cd->macro_insn_table.init_entries = insns;
910 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
911 cd->macro_insn_table.num_init_entries = num_macros;
912
913 oc = & ip2k_cgen_insn_opcode_table[0];
914 insns = (CGEN_INSN *) cd->insn_table.init_entries;
915 for (i = 0; i < MAX_INSNS; ++i)
916 {
917 insns[i].opcode = &oc[i];
918 ip2k_cgen_build_insn_regex (& insns[i]);
919 }
920
921 cd->sizeof_fields = sizeof (CGEN_FIELDS);
922 cd->set_fields_bitsize = set_fields_bitsize;
923
924 cd->asm_hash_p = asm_hash_insn_p;
925 cd->asm_hash = asm_hash_insn;
926 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
927
928 cd->dis_hash_p = dis_hash_insn_p;
929 cd->dis_hash = dis_hash_insn;
930 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
931}
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