source: trunk/src/binutils/opcodes/m32r-asm.c@ 490

Last change on this file since 490 was 10, checked in by bird, 23 years ago

Initial revision
  • Property cvs2svn:cvs-rev set to 1.1
  • Property svn:eol-style set to native
  • Property svn:executable set to *
File size: 17.2 KB
Line 
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <ctype.h>
30#include <stdio.h>
31#include "ansidecl.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32r-desc.h"
35#include "m32r-opc.h"
36#include "opintl.h"
37
38#undef min
39#define min(a,b) ((a) < (b) ? (a) : (b))
40#undef max
41#define max(a,b) ((a) > (b) ? (a) : (b))
42
43static const char * parse_insn_normal
44 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
45
46
47/* -- assembler routines inserted here */
48
49/* -- asm.c */
50
51/* Handle '#' prefixes (i.e. skip over them). */
52
53static const char *
54parse_hash (cd, strp, opindex, valuep)
55 CGEN_CPU_DESC cd;
56 const char **strp;
57 int opindex;
58 unsigned long *valuep;
59{
60 if (**strp == '#')
61 ++*strp;
62 return NULL;
63}
64
65/* Handle shigh(), high(). */
66
67static const char *
68parse_hi16 (cd, strp, opindex, valuep)
69 CGEN_CPU_DESC cd;
70 const char **strp;
71 int opindex;
72 unsigned long *valuep;
73{
74 const char *errmsg;
75 enum cgen_parse_operand_result result_type;
76 bfd_vma value;
77
78 if (**strp == '#')
79 ++*strp;
80
81 if (strncasecmp (*strp, "high(", 5) == 0)
82 {
83 *strp += 5;
84 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
85 &result_type, &value);
86 if (**strp != ')')
87 return "missing `)'";
88 ++*strp;
89 if (errmsg == NULL
90 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
91 value >>= 16;
92 *valuep = value;
93 return errmsg;
94 }
95 else if (strncasecmp (*strp, "shigh(", 6) == 0)
96 {
97 *strp += 6;
98 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
99 &result_type, &value);
100 if (**strp != ')')
101 return "missing `)'";
102 ++*strp;
103 if (errmsg == NULL
104 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
105 value = (value >> 16) + (value & 0x8000 ? 1 : 0);
106 *valuep = value;
107 return errmsg;
108 }
109
110 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
111}
112
113/* Handle low() in a signed context. Also handle sda().
114 The signedness of the value doesn't matter to low(), but this also
115 handles the case where low() isn't present. */
116
117static const char *
118parse_slo16 (cd, strp, opindex, valuep)
119 CGEN_CPU_DESC cd;
120 const char **strp;
121 int opindex;
122 long *valuep;
123{
124 const char *errmsg;
125 enum cgen_parse_operand_result result_type;
126 bfd_vma value;
127
128 if (**strp == '#')
129 ++*strp;
130
131 if (strncasecmp (*strp, "low(", 4) == 0)
132 {
133 *strp += 4;
134 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
135 &result_type, &value);
136 if (**strp != ')')
137 return "missing `)'";
138 ++*strp;
139 if (errmsg == NULL
140 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
141 value &= 0xffff;
142 *valuep = value;
143 return errmsg;
144 }
145
146 if (strncasecmp (*strp, "sda(", 4) == 0)
147 {
148 *strp += 4;
149 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
150 NULL, &value);
151 if (**strp != ')')
152 return "missing `)'";
153 ++*strp;
154 *valuep = value;
155 return errmsg;
156 }
157
158 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
159}
160
161/* Handle low() in an unsigned context.
162 The signedness of the value doesn't matter to low(), but this also
163 handles the case where low() isn't present. */
164
165static const char *
166parse_ulo16 (cd, strp, opindex, valuep)
167 CGEN_CPU_DESC cd;
168 const char **strp;
169 int opindex;
170 unsigned long *valuep;
171{
172 const char *errmsg;
173 enum cgen_parse_operand_result result_type;
174 bfd_vma value;
175
176 if (**strp == '#')
177 ++*strp;
178
179 if (strncasecmp (*strp, "low(", 4) == 0)
180 {
181 *strp += 4;
182 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
183 &result_type, &value);
184 if (**strp != ')')
185 return "missing `)'";
186 ++*strp;
187 if (errmsg == NULL
188 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
189 value &= 0xffff;
190 *valuep = value;
191 return errmsg;
192 }
193
194 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
195}
196
197/* -- */
198
199/* Main entry point for operand parsing.
200
201 This function is basically just a big switch statement. Earlier versions
202 used tables to look up the function to use, but
203 - if the table contains both assembler and disassembler functions then
204 the disassembler contains much of the assembler and vice-versa,
205 - there's a lot of inlining possibilities as things grow,
206 - using a switch statement avoids the function call overhead.
207
208 This function could be moved into `parse_insn_normal', but keeping it
209 separate makes clear the interface between `parse_insn_normal' and each of
210 the handlers.
211*/
212
213const char *
214m32r_cgen_parse_operand (cd, opindex, strp, fields)
215 CGEN_CPU_DESC cd;
216 int opindex;
217 const char ** strp;
218 CGEN_FIELDS * fields;
219{
220 const char * errmsg = NULL;
221 /* Used by scalar operands that still need to be parsed. */
222 long junk;
223
224 switch (opindex)
225 {
226 case M32R_OPERAND_ACC :
227 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
228 break;
229 case M32R_OPERAND_ACCD :
230 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
231 break;
232 case M32R_OPERAND_ACCS :
233 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
234 break;
235 case M32R_OPERAND_DCR :
236 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
237 break;
238 case M32R_OPERAND_DISP16 :
239 {
240 bfd_vma value;
241 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
242 fields->f_disp16 = value;
243 }
244 break;
245 case M32R_OPERAND_DISP24 :
246 {
247 bfd_vma value;
248 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
249 fields->f_disp24 = value;
250 }
251 break;
252 case M32R_OPERAND_DISP8 :
253 {
254 bfd_vma value;
255 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
256 fields->f_disp8 = value;
257 }
258 break;
259 case M32R_OPERAND_DR :
260 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
261 break;
262 case M32R_OPERAND_HASH :
263 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
264 break;
265 case M32R_OPERAND_HI16 :
266 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
267 break;
268 case M32R_OPERAND_IMM1 :
269 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
270 break;
271 case M32R_OPERAND_SCR :
272 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
273 break;
274 case M32R_OPERAND_SIMM16 :
275 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
276 break;
277 case M32R_OPERAND_SIMM8 :
278 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
279 break;
280 case M32R_OPERAND_SLO16 :
281 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
282 break;
283 case M32R_OPERAND_SR :
284 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
285 break;
286 case M32R_OPERAND_SRC1 :
287 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
288 break;
289 case M32R_OPERAND_SRC2 :
290 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
291 break;
292 case M32R_OPERAND_UIMM16 :
293 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
294 break;
295 case M32R_OPERAND_UIMM24 :
296 {
297 bfd_vma value;
298 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
299 fields->f_uimm24 = value;
300 }
301 break;
302 case M32R_OPERAND_UIMM4 :
303 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
304 break;
305 case M32R_OPERAND_UIMM5 :
306 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
307 break;
308 case M32R_OPERAND_ULO16 :
309 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
310 break;
311
312 default :
313 /* xgettext:c-format */
314 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
315 abort ();
316 }
317
318 return errmsg;
319}
320
321cgen_parse_fn * const m32r_cgen_parse_handlers[] =
322{
323 parse_insn_normal,
324};
325
326void
327m32r_cgen_init_asm (cd)
328 CGEN_CPU_DESC cd;
329{
330 m32r_cgen_init_opcode_table (cd);
331 m32r_cgen_init_ibld_table (cd);
332 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
333 cd->parse_operand = m32r_cgen_parse_operand;
334}
335
336
337
338/* Default insn parser.
339
340 The syntax string is scanned and operands are parsed and stored in FIELDS.
341 Relocs are queued as we go via other callbacks.
342
343 ??? Note that this is currently an all-or-nothing parser. If we fail to
344 parse the instruction, we return 0 and the caller will start over from
345 the beginning. Backtracking will be necessary in parsing subexpressions,
346 but that can be handled there. Not handling backtracking here may get
347 expensive in the case of the m68k. Deal with later.
348
349 Returns NULL for success, an error message for failure.
350*/
351
352static const char *
353parse_insn_normal (cd, insn, strp, fields)
354 CGEN_CPU_DESC cd;
355 const CGEN_INSN *insn;
356 const char **strp;
357 CGEN_FIELDS *fields;
358{
359 /* ??? Runtime added insns not handled yet. */
360 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
361 const char *str = *strp;
362 const char *errmsg;
363 const char *p;
364 const unsigned char * syn;
365#ifdef CGEN_MNEMONIC_OPERANDS
366 /* FIXME: wip */
367 int past_opcode_p;
368#endif
369
370 /* For now we assume the mnemonic is first (there are no leading operands).
371 We can parse it without needing to set up operand parsing.
372 GAS's input scrubber will ensure mnemonics are lowercase, but we may
373 not be called from GAS. */
374 p = CGEN_INSN_MNEMONIC (insn);
375 while (*p && tolower (*p) == tolower (*str))
376 ++p, ++str;
377
378 if (* p)
379 return _("unrecognized instruction");
380
381#ifndef CGEN_MNEMONIC_OPERANDS
382 if (* str && !isspace (* str))
383 return _("unrecognized instruction");
384#endif
385
386 CGEN_INIT_PARSE (cd);
387 cgen_init_parse_operand (cd);
388#ifdef CGEN_MNEMONIC_OPERANDS
389 past_opcode_p = 0;
390#endif
391
392 /* We don't check for (*str != '\0') here because we want to parse
393 any trailing fake arguments in the syntax string. */
394 syn = CGEN_SYNTAX_STRING (syntax);
395
396 /* Mnemonics come first for now, ensure valid string. */
397 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
398 abort ();
399
400 ++syn;
401
402 while (* syn != 0)
403 {
404 /* Non operand chars must match exactly. */
405 if (CGEN_SYNTAX_CHAR_P (* syn))
406 {
407 /* FIXME: While we allow for non-GAS callers above, we assume the
408 first char after the mnemonic part is a space. */
409 /* FIXME: We also take inappropriate advantage of the fact that
410 GAS's input scrubber will remove extraneous blanks. */
411 if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn)))
412 {
413#ifdef CGEN_MNEMONIC_OPERANDS
414 if (* syn == ' ')
415 past_opcode_p = 1;
416#endif
417 ++ syn;
418 ++ str;
419 }
420 else
421 {
422 /* Syntax char didn't match. Can't be this insn. */
423 static char msg [80];
424 /* xgettext:c-format */
425 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
426 *syn, *str);
427 return msg;
428 }
429 continue;
430 }
431
432 /* We have an operand of some sort. */
433 errmsg = m32r_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
434 &str, fields);
435 if (errmsg)
436 return errmsg;
437
438 /* Done with this operand, continue with next one. */
439 ++ syn;
440 }
441
442 /* If we're at the end of the syntax string, we're done. */
443 if (* syn == '\0')
444 {
445 /* FIXME: For the moment we assume a valid `str' can only contain
446 blanks now. IE: We needn't try again with a longer version of
447 the insn and it is assumed that longer versions of insns appear
448 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
449 while (isspace (* str))
450 ++ str;
451
452 if (* str != '\0')
453 return _("junk at end of line"); /* FIXME: would like to include `str' */
454
455 return NULL;
456 }
457
458 /* We couldn't parse it. */
459 return _("unrecognized instruction");
460}
461
462
463/* Main entry point.
464 This routine is called for each instruction to be assembled.
465 STR points to the insn to be assembled.
466 We assume all necessary tables have been initialized.
467 The assembled instruction, less any fixups, is stored in BUF.
468 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
469 still needs to be converted to target byte order, otherwise BUF is an array
470 of bytes in target byte order.
471 The result is a pointer to the insn's entry in the opcode table,
472 or NULL if an error occured (an error message will have already been
473 printed).
474
475 Note that when processing (non-alias) macro-insns,
476 this function recurses.
477
478 ??? It's possible to make this cpu-independent.
479 One would have to deal with a few minor things.
480 At this point in time doing so would be more of a curiosity than useful
481 [for example this file isn't _that_ big], but keeping the possibility in
482 mind helps keep the design clean. */
483
484const CGEN_INSN *
485m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
486 CGEN_CPU_DESC cd;
487 const char *str;
488 CGEN_FIELDS *fields;
489 CGEN_INSN_BYTES_PTR buf;
490 char **errmsg;
491{
492 const char *start;
493 CGEN_INSN_LIST *ilist;
494 const char *tmp_errmsg = NULL;
495
496 /* Skip leading white space. */
497 while (isspace (* str))
498 ++ str;
499
500 /* The instructions are stored in hashed lists.
501 Get the first in the list. */
502 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
503
504 /* Keep looking until we find a match. */
505
506 start = str;
507 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
508 {
509 const CGEN_INSN *insn = ilist->insn;
510
511#ifdef CGEN_VALIDATE_INSN_SUPPORTED
512 /* not usually needed as unsupported opcodes shouldn't be in the hash lists */
513 /* Is this insn supported by the selected cpu? */
514 if (! m32r_cgen_insn_supported (cd, insn))
515 continue;
516#endif
517
518 /* If the RELAX attribute is set, this is an insn that shouldn't be
519 chosen immediately. Instead, it is used during assembler/linker
520 relaxation if possible. */
521 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
522 continue;
523
524 str = start;
525
526 /* Allow parse/insert handlers to obtain length of insn. */
527 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
528
529 tmp_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
530 if (tmp_errmsg != NULL)
531 continue;
532
533 /* ??? 0 is passed for `pc' */
534 tmp_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
535 (bfd_vma) 0);
536 if (tmp_errmsg != NULL)
537 continue;
538
539 /* It is up to the caller to actually output the insn and any
540 queued relocs. */
541 return insn;
542 }
543
544 /* Make sure we leave this with something at this point. */
545 if (tmp_errmsg == NULL)
546 tmp_errmsg = "unknown mnemonic";
547
548 {
549 static char errbuf[150];
550
551#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
552 /* if verbose error messages, use errmsg from CGEN_PARSE_FN */
553 if (strlen (start) > 50)
554 /* xgettext:c-format */
555 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
556 else
557 /* xgettext:c-format */
558 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
559#else
560 if (strlen (start) > 50)
561 /* xgettext:c-format */
562 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
563 else
564 /* xgettext:c-format */
565 sprintf (errbuf, _("bad instruction `%.50s'"), start);
566#endif
567
568 *errmsg = errbuf;
569 return NULL;
570 }
571}
572
573
574#if 0 /* This calls back to GAS which we can't do without care. */
575
576/* Record each member of OPVALS in the assembler's symbol table.
577 This lets GAS parse registers for us.
578 ??? Interesting idea but not currently used. */
579
580/* Record each member of OPVALS in the assembler's symbol table.
581 FIXME: Not currently used. */
582
583void
584m32r_cgen_asm_hash_keywords (cd, opvals)
585 CGEN_CPU_DESC cd;
586 CGEN_KEYWORD *opvals;
587{
588 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
589 const CGEN_KEYWORD_ENTRY * ke;
590
591 while ((ke = cgen_keyword_search_next (& search)) != NULL)
592 {
593#if 0 /* Unnecessary, should be done in the search routine. */
594 if (! m32r_cgen_opval_supported (ke))
595 continue;
596#endif
597 cgen_asm_record_register (cd, ke->name, ke->value);
598 }
599}
600
601#endif /* 0 */
Note: See TracBrowser for help on using the repository browser.