1 | /* ia64-opc.h -- IA-64 opcode table.
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2 | Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
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3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
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4 |
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5 | This file is part of GDB, GAS, and the GNU binutils.
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6 |
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7 | GDB, GAS, and the GNU binutils are free software; you can redistribute
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8 | them and/or modify them under the terms of the GNU General Public
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9 | License as published by the Free Software Foundation; either version
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10 | 2, or (at your option) any later version.
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11 |
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12 | GDB, GAS, and the GNU binutils are distributed in the hope that they
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13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied
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14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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15 | the GNU General Public License for more details.
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16 |
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17 | You should have received a copy of the GNU General Public License
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18 | along with this file; see the file COPYING. If not, write to the
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19 | Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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20 | 02111-1307, USA. */
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21 |
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22 | #ifndef IA64_OPC_H
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23 | #define IA64_OPC_H
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24 |
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25 | #include "opcode/ia64.h"
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26 |
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27 | /* define a couple of abbreviations: */
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28 |
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29 | #define bOp(x) (((ia64_insn) ((x) & 0xf)) << 37)
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30 | #define mOp bOp (-1)
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31 | #define Op(x) bOp (x), mOp
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32 |
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33 | #define FIRST IA64_OPCODE_FIRST
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34 | #define X_IN_MLX IA64_OPCODE_X_IN_MLX
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35 | #define LAST IA64_OPCODE_LAST
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36 | #define PRIV IA64_OPCODE_PRIV
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37 | #define NO_PRED IA64_OPCODE_NO_PRED
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38 | #define SLOT2 IA64_OPCODE_SLOT2
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39 | #define PSEUDO IA64_OPCODE_PSEUDO
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40 | #define F2_EQ_F3 IA64_OPCODE_F2_EQ_F3
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41 | #define LEN_EQ_64MCNT IA64_OPCODE_LEN_EQ_64MCNT
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42 | #define MOD_RRBS IA64_OPCODE_MOD_RRBS
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43 | #define POSTINC IA64_OPCODE_POSTINC
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44 |
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45 | #define AR_CCV IA64_OPND_AR_CCV
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46 | #define AR_PFS IA64_OPND_AR_PFS
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47 | #define AR_CSD IA64_OPND_AR_CSD
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48 | #define C1 IA64_OPND_C1
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49 | #define C8 IA64_OPND_C8
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50 | #define C16 IA64_OPND_C16
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51 | #define GR0 IA64_OPND_GR0
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52 | #define IP IA64_OPND_IP
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53 | #define PR IA64_OPND_PR
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54 | #define PR_ROT IA64_OPND_PR_ROT
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55 | #define PSR IA64_OPND_PSR
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56 | #define PSR_L IA64_OPND_PSR_L
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57 | #define PSR_UM IA64_OPND_PSR_UM
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58 |
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59 | #define AR3 IA64_OPND_AR3
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60 | #define B1 IA64_OPND_B1
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61 | #define B2 IA64_OPND_B2
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62 | #define CR3 IA64_OPND_CR3
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63 | #define F1 IA64_OPND_F1
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64 | #define F2 IA64_OPND_F2
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65 | #define F3 IA64_OPND_F3
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66 | #define F4 IA64_OPND_F4
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67 | #define P1 IA64_OPND_P1
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68 | #define P2 IA64_OPND_P2
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69 | #define R1 IA64_OPND_R1
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70 | #define R2 IA64_OPND_R2
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71 | #define R3 IA64_OPND_R3
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72 | #define R3_2 IA64_OPND_R3_2
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73 |
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74 | #define CPUID_R3 IA64_OPND_CPUID_R3
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75 | #define DBR_R3 IA64_OPND_DBR_R3
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76 | #define DTR_R3 IA64_OPND_DTR_R3
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77 | #define ITR_R3 IA64_OPND_ITR_R3
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78 | #define IBR_R3 IA64_OPND_IBR_R3
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79 | #define MR3 IA64_OPND_MR3
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80 | #define MSR_R3 IA64_OPND_MSR_R3
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81 | #define PKR_R3 IA64_OPND_PKR_R3
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82 | #define PMC_R3 IA64_OPND_PMC_R3
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83 | #define PMD_R3 IA64_OPND_PMD_R3
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84 | #define RR_R3 IA64_OPND_RR_R3
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85 |
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86 | #define CCNT5 IA64_OPND_CCNT5
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87 | #define CNT2a IA64_OPND_CNT2a
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88 | #define CNT2b IA64_OPND_CNT2b
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89 | #define CNT2c IA64_OPND_CNT2c
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90 | #define CNT5 IA64_OPND_CNT5
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91 | #define CNT6 IA64_OPND_CNT6
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92 | #define CPOS6a IA64_OPND_CPOS6a
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93 | #define CPOS6b IA64_OPND_CPOS6b
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94 | #define CPOS6c IA64_OPND_CPOS6c
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95 | #define IMM1 IA64_OPND_IMM1
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96 | #define IMM14 IA64_OPND_IMM14
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97 | #define IMM17 IA64_OPND_IMM17
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98 | #define IMM22 IA64_OPND_IMM22
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99 | #define IMM44 IA64_OPND_IMM44
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100 | #define SOF IA64_OPND_SOF
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101 | #define SOL IA64_OPND_SOL
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102 | #define SOR IA64_OPND_SOR
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103 | #define IMM8 IA64_OPND_IMM8
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104 | #define IMM8U4 IA64_OPND_IMM8U4
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105 | #define IMM8M1 IA64_OPND_IMM8M1
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106 | #define IMM8M1U4 IA64_OPND_IMM8M1U4
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107 | #define IMM8M1U8 IA64_OPND_IMM8M1U8
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108 | #define IMM9a IA64_OPND_IMM9a
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109 | #define IMM9b IA64_OPND_IMM9b
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110 | #define IMMU2 IA64_OPND_IMMU2
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111 | #define IMMU21 IA64_OPND_IMMU21
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112 | #define IMMU24 IA64_OPND_IMMU24
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113 | #define IMMU62 IA64_OPND_IMMU62
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114 | #define IMMU64 IA64_OPND_IMMU64
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115 | #define IMMU7a IA64_OPND_IMMU7a
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116 | #define IMMU7b IA64_OPND_IMMU7b
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117 | #define IMMU9 IA64_OPND_IMMU9
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118 | #define INC3 IA64_OPND_INC3
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119 | #define LEN4 IA64_OPND_LEN4
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120 | #define LEN6 IA64_OPND_LEN6
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121 | #define MBTYPE4 IA64_OPND_MBTYPE4
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122 | #define MHTYPE8 IA64_OPND_MHTYPE8
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123 | #define POS6 IA64_OPND_POS6
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124 | #define TAG13 IA64_OPND_TAG13
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125 | #define TAG13b IA64_OPND_TAG13b
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126 | #define TGT25 IA64_OPND_TGT25
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127 | #define TGT25b IA64_OPND_TGT25b
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128 | #define TGT25c IA64_OPND_TGT25c
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129 | #define TGT64 IA64_OPND_TGT64
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130 |
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131 | #endif
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