| 1 | /* This file defines the interface between the d10v simulator and gdb.
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| 2 | Copyright 1999 Free Software Foundation, Inc.
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| 3 |
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| 4 | This file is part of GDB.
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| 5 |
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| 6 | This program is free software; you can redistribute it and/or modify
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| 7 | it under the terms of the GNU General Public License as published by
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| 8 | the Free Software Foundation; either version 2 of the License, or
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| 9 | (at your option) any later version.
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| 10 |
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| 11 | This program is distributed in the hope that it will be useful,
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| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 14 | GNU General Public License for more details.
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| 15 |
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| 16 | You should have received a copy of the GNU General Public License
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| 17 | along with this program; if not, write to the Free Software
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| 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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| 19 |
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| 20 | #if !defined (SIM_D10V_H)
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| 21 | #define SIM_D10V_H
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| 22 |
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| 23 | #ifdef __cplusplus
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| 24 | extern "C" { // }
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| 25 | #endif
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| 26 |
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| 27 | /* GDB interprets addresses as:
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| 28 |
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| 29 | 0x00xxxxxx: Physical unified memory segment (Unified memory)
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| 30 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
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| 31 | 0x02xxxxxx: Physical data memory segment (On-chip data memory)
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| 32 | 0x10xxxxxx: Logical data address segment (DMAP translated memory)
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| 33 | 0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
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| 34 |
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| 35 | The remote d10v board interprets addresses as:
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| 36 |
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| 37 | 0x00xxxxxx: Physical unified memory segment (Unified memory)
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| 38 | 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
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| 39 | 0x02xxxxxx: Physical data memory segment (On-chip data memory)
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| 40 |
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| 41 | The following translate a virtual DMAP/IMAP offset into a physical
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| 42 | memory segment assigning the translated address to PHYS. Since a
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| 43 | memory access may cross a page boundrary the number of bytes for
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| 44 | which the translation is applicable (or 0 for an invalid virtual
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| 45 | offset) is returned. */
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| 46 |
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| 47 | enum
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| 48 | {
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| 49 | SIM_D10V_MEMORY_UNIFIED = 0x00000000,
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| 50 | SIM_D10V_MEMORY_INSN = 0x01000000,
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| 51 | SIM_D10V_MEMORY_DATA = 0x02000000,
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| 52 | SIM_D10V_MEMORY_DMAP = 0x10000000,
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| 53 | SIM_D10V_MEMORY_IMAP = 0x11000000
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| 54 | };
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| 55 |
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| 56 | extern unsigned long sim_d10v_translate_dmap_addr
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| 57 | (unsigned long offset,
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| 58 | int nr_bytes,
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| 59 | unsigned long *phys,
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| 60 | unsigned long (*dmap_register) (int reg_nr));
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| 61 |
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| 62 | extern unsigned long sim_d10v_translate_imap_addr
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| 63 | (unsigned long offset,
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| 64 | int nr_bytes,
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| 65 | unsigned long *phys,
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| 66 | unsigned long (*imap_register) (int reg_nr));
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| 67 |
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| 68 | extern unsigned long sim_d10v_translate_addr
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| 69 | (unsigned long vaddr,
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| 70 | int nr_bytes,
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| 71 | unsigned long *phys,
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| 72 | unsigned long (*dmap_register) (int reg_nr),
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| 73 | unsigned long (*imap_register) (int reg_nr));
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| 74 |
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| 75 |
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| 76 | /* The simulator makes use of the following register information. */
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| 77 |
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| 78 | enum
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| 79 | {
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| 80 | SIM_D10V_R0_REGNUM = 0,
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| 81 | SIM_D10V_CR0_REGNUM = 16,
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| 82 | SIM_D10V_A0_REGNUM = 32,
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| 83 | SIM_D10V_SPI_REGNUM = 34,
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| 84 | SIM_D10V_SPU_REGNUM = 35,
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| 85 | SIM_D10V_IMAP0_REGNUM = 36,
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| 86 | SIM_D10V_DMAP0_REGNUM = 38,
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| 87 | SIM_D10V_TS2_DMAP_REGNUM = 40
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| 88 | };
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| 89 |
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| 90 | enum
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| 91 | {
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| 92 | SIM_D10V_NR_R_REGS = 16,
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| 93 | SIM_D10V_NR_A_REGS = 2,
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| 94 | SIM_D10V_NR_IMAP_REGS = 2,
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| 95 | SIM_D10V_NR_DMAP_REGS = 4,
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| 96 | SIM_D10V_NR_CR_REGS = 16
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| 97 | };
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| 98 |
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| 99 | #ifdef __cplusplus
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| 100 | }
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| 101 | #endif
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| 102 |
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| 103 | #endif
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