source: trunk/binutils/opcodes/m32r-asm.c@ 3466

Last change on this file since 3466 was 610, checked in by bird, 22 years ago

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1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "bfd.h"
32#include "symcat.h"
33#include "m32r-desc.h"
34#include "m32r-opc.h"
35#include "opintl.h"
36#include "xregex.h"
37#include "libiberty.h"
38#include "safe-ctype.h"
39
40#undef min
41#define min(a,b) ((a) < (b) ? (a) : (b))
42#undef max
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45static const char * parse_insn_normal
46 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
47
48
49/* -- assembler routines inserted here. */
50
51/* -- asm.c */
52static const char * parse_hash
53 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
54static const char * parse_hi16
55 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
56static const char * parse_slo16
57 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
58static const char * parse_ulo16
59 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
60
61/* Handle '#' prefixes (i.e. skip over them). */
62
63static const char *
64parse_hash (cd, strp, opindex, valuep)
65 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
66 const char **strp;
67 int opindex ATTRIBUTE_UNUSED;
68 unsigned long *valuep ATTRIBUTE_UNUSED;
69{
70 if (**strp == '#')
71 ++*strp;
72 return NULL;
73}
74
75/* Handle shigh(), high(). */
76
77static const char *
78parse_hi16 (cd, strp, opindex, valuep)
79 CGEN_CPU_DESC cd;
80 const char **strp;
81 int opindex;
82 unsigned long *valuep;
83{
84 const char *errmsg;
85 enum cgen_parse_operand_result result_type;
86 bfd_vma value;
87
88 if (**strp == '#')
89 ++*strp;
90
91 if (strncasecmp (*strp, "high(", 5) == 0)
92 {
93 *strp += 5;
94 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
95 &result_type, &value);
96 if (**strp != ')')
97 return "missing `)'";
98 ++*strp;
99 if (errmsg == NULL
100 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
101 value >>= 16;
102 *valuep = value;
103 return errmsg;
104 }
105 else if (strncasecmp (*strp, "shigh(", 6) == 0)
106 {
107 *strp += 6;
108 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
109 &result_type, &value);
110 if (**strp != ')')
111 return "missing `)'";
112 ++*strp;
113 if (errmsg == NULL
114 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
115 value = (value >> 16) + (value & 0x8000 ? 1 : 0);
116 *valuep = value;
117 return errmsg;
118 }
119
120 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
121}
122
123/* Handle low() in a signed context. Also handle sda().
124 The signedness of the value doesn't matter to low(), but this also
125 handles the case where low() isn't present. */
126
127static const char *
128parse_slo16 (cd, strp, opindex, valuep)
129 CGEN_CPU_DESC cd;
130 const char **strp;
131 int opindex;
132 long *valuep;
133{
134 const char *errmsg;
135 enum cgen_parse_operand_result result_type;
136 bfd_vma value;
137
138 if (**strp == '#')
139 ++*strp;
140
141 if (strncasecmp (*strp, "low(", 4) == 0)
142 {
143 *strp += 4;
144 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
145 &result_type, &value);
146 if (**strp != ')')
147 return "missing `)'";
148 ++*strp;
149 if (errmsg == NULL
150 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
151 value &= 0xffff;
152 *valuep = value;
153 return errmsg;
154 }
155
156 if (strncasecmp (*strp, "sda(", 4) == 0)
157 {
158 *strp += 4;
159 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
160 NULL, &value);
161 if (**strp != ')')
162 return "missing `)'";
163 ++*strp;
164 *valuep = value;
165 return errmsg;
166 }
167
168 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
169}
170
171/* Handle low() in an unsigned context.
172 The signedness of the value doesn't matter to low(), but this also
173 handles the case where low() isn't present. */
174
175static const char *
176parse_ulo16 (cd, strp, opindex, valuep)
177 CGEN_CPU_DESC cd;
178 const char **strp;
179 int opindex;
180 unsigned long *valuep;
181{
182 const char *errmsg;
183 enum cgen_parse_operand_result result_type;
184 bfd_vma value;
185
186 if (**strp == '#')
187 ++*strp;
188
189 if (strncasecmp (*strp, "low(", 4) == 0)
190 {
191 *strp += 4;
192 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
193 &result_type, &value);
194 if (**strp != ')')
195 return "missing `)'";
196 ++*strp;
197 if (errmsg == NULL
198 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
199 value &= 0xffff;
200 *valuep = value;
201 return errmsg;
202 }
203
204 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
205}
206
207/* -- */
208
209const char * m32r_cgen_parse_operand
210 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
211
212/* Main entry point for operand parsing.
213
214 This function is basically just a big switch statement. Earlier versions
215 used tables to look up the function to use, but
216 - if the table contains both assembler and disassembler functions then
217 the disassembler contains much of the assembler and vice-versa,
218 - there's a lot of inlining possibilities as things grow,
219 - using a switch statement avoids the function call overhead.
220
221 This function could be moved into `parse_insn_normal', but keeping it
222 separate makes clear the interface between `parse_insn_normal' and each of
223 the handlers. */
224
225const char *
226m32r_cgen_parse_operand (cd, opindex, strp, fields)
227 CGEN_CPU_DESC cd;
228 int opindex;
229 const char ** strp;
230 CGEN_FIELDS * fields;
231{
232 const char * errmsg = NULL;
233 /* Used by scalar operands that still need to be parsed. */
234 long junk ATTRIBUTE_UNUSED;
235
236 switch (opindex)
237 {
238 case M32R_OPERAND_ACC :
239 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
240 break;
241 case M32R_OPERAND_ACCD :
242 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
243 break;
244 case M32R_OPERAND_ACCS :
245 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
246 break;
247 case M32R_OPERAND_DCR :
248 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
249 break;
250 case M32R_OPERAND_DISP16 :
251 {
252 bfd_vma value;
253 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
254 fields->f_disp16 = value;
255 }
256 break;
257 case M32R_OPERAND_DISP24 :
258 {
259 bfd_vma value;
260 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
261 fields->f_disp24 = value;
262 }
263 break;
264 case M32R_OPERAND_DISP8 :
265 {
266 bfd_vma value;
267 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
268 fields->f_disp8 = value;
269 }
270 break;
271 case M32R_OPERAND_DR :
272 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
273 break;
274 case M32R_OPERAND_HASH :
275 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
276 break;
277 case M32R_OPERAND_HI16 :
278 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
279 break;
280 case M32R_OPERAND_IMM1 :
281 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
282 break;
283 case M32R_OPERAND_SCR :
284 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
285 break;
286 case M32R_OPERAND_SIMM16 :
287 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
288 break;
289 case M32R_OPERAND_SIMM8 :
290 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
291 break;
292 case M32R_OPERAND_SLO16 :
293 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
294 break;
295 case M32R_OPERAND_SR :
296 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
297 break;
298 case M32R_OPERAND_SRC1 :
299 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
300 break;
301 case M32R_OPERAND_SRC2 :
302 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
303 break;
304 case M32R_OPERAND_UIMM16 :
305 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
306 break;
307 case M32R_OPERAND_UIMM24 :
308 {
309 bfd_vma value;
310 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
311 fields->f_uimm24 = value;
312 }
313 break;
314 case M32R_OPERAND_UIMM4 :
315 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
316 break;
317 case M32R_OPERAND_UIMM5 :
318 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
319 break;
320 case M32R_OPERAND_ULO16 :
321 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
322 break;
323
324 default :
325 /* xgettext:c-format */
326 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
327 abort ();
328 }
329
330 return errmsg;
331}
332
333cgen_parse_fn * const m32r_cgen_parse_handlers[] =
334{
335 parse_insn_normal,
336};
337
338void
339m32r_cgen_init_asm (cd)
340 CGEN_CPU_DESC cd;
341{
342 m32r_cgen_init_opcode_table (cd);
343 m32r_cgen_init_ibld_table (cd);
344 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
345 cd->parse_operand = m32r_cgen_parse_operand;
346}
347
348
349
350
351/* Regex construction routine.
352
353 This translates an opcode syntax string into a regex string,
354 by replacing any non-character syntax element (such as an
355 opcode) with the pattern '.*'
356
357 It then compiles the regex and stores it in the opcode, for
358 later use by m32r_cgen_assemble_insn
359
360 Returns NULL for success, an error message for failure. */
361
362char *
363m32r_cgen_build_insn_regex (insn)
364 CGEN_INSN *insn;
365{
366 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
367 const char *mnem = CGEN_INSN_MNEMONIC (insn);
368 char rxbuf[CGEN_MAX_RX_ELEMENTS];
369 char *rx = rxbuf;
370 const CGEN_SYNTAX_CHAR_TYPE *syn;
371 int reg_err;
372
373 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
374
375 /* Mnemonics come first in the syntax string. */
376 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
377 return _("missing mnemonic in syntax string");
378 ++syn;
379
380 /* Generate a case sensitive regular expression that emulates case
381 insensitive matching in the "C" locale. We cannot generate a case
382 insensitive regular expression because in Turkish locales, 'i' and 'I'
383 are not equal modulo case conversion. */
384
385 /* Copy the literal mnemonic out of the insn. */
386 for (; *mnem; mnem++)
387 {
388 char c = *mnem;
389
390 if (ISALPHA (c))
391 {
392 *rx++ = '[';
393 *rx++ = TOLOWER (c);
394 *rx++ = TOUPPER (c);
395 *rx++ = ']';
396 }
397 else
398 *rx++ = c;
399 }
400
401 /* Copy any remaining literals from the syntax string into the rx. */
402 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
403 {
404 if (CGEN_SYNTAX_CHAR_P (* syn))
405 {
406 char c = CGEN_SYNTAX_CHAR (* syn);
407
408 switch (c)
409 {
410 /* Escape any regex metacharacters in the syntax. */
411 case '.': case '[': case '\\':
412 case '*': case '^': case '$':
413
414#ifdef CGEN_ESCAPE_EXTENDED_REGEX
415 case '?': case '{': case '}':
416 case '(': case ')': case '*':
417 case '|': case '+': case ']':
418#endif
419 *rx++ = '\\';
420 *rx++ = c;
421 break;
422
423 default:
424 if (ISALPHA (c))
425 {
426 *rx++ = '[';
427 *rx++ = TOLOWER (c);
428 *rx++ = TOUPPER (c);
429 *rx++ = ']';
430 }
431 else
432 *rx++ = c;
433 break;
434 }
435 }
436 else
437 {
438 /* Replace non-syntax fields with globs. */
439 *rx++ = '.';
440 *rx++ = '*';
441 }
442 }
443
444 /* Trailing whitespace ok. */
445 * rx++ = '[';
446 * rx++ = ' ';
447 * rx++ = '\t';
448 * rx++ = ']';
449 * rx++ = '*';
450
451 /* But anchor it after that. */
452 * rx++ = '$';
453 * rx = '\0';
454
455 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
456 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
457
458 if (reg_err == 0)
459 return NULL;
460 else
461 {
462 static char msg[80];
463
464 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
465 regfree ((regex_t *) CGEN_INSN_RX (insn));
466 free (CGEN_INSN_RX (insn));
467 (CGEN_INSN_RX (insn)) = NULL;
468 return msg;
469 }
470}
471
472
473
474/* Default insn parser.
475
476 The syntax string is scanned and operands are parsed and stored in FIELDS.
477 Relocs are queued as we go via other callbacks.
478
479 ??? Note that this is currently an all-or-nothing parser. If we fail to
480 parse the instruction, we return 0 and the caller will start over from
481 the beginning. Backtracking will be necessary in parsing subexpressions,
482 but that can be handled there. Not handling backtracking here may get
483 expensive in the case of the m68k. Deal with later.
484
485 Returns NULL for success, an error message for failure. */
486
487static const char *
488parse_insn_normal (cd, insn, strp, fields)
489 CGEN_CPU_DESC cd;
490 const CGEN_INSN *insn;
491 const char **strp;
492 CGEN_FIELDS *fields;
493{
494 /* ??? Runtime added insns not handled yet. */
495 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
496 const char *str = *strp;
497 const char *errmsg;
498 const char *p;
499 const CGEN_SYNTAX_CHAR_TYPE * syn;
500#ifdef CGEN_MNEMONIC_OPERANDS
501 /* FIXME: wip */
502 int past_opcode_p;
503#endif
504
505 /* For now we assume the mnemonic is first (there are no leading operands).
506 We can parse it without needing to set up operand parsing.
507 GAS's input scrubber will ensure mnemonics are lowercase, but we may
508 not be called from GAS. */
509 p = CGEN_INSN_MNEMONIC (insn);
510 while (*p && TOLOWER (*p) == TOLOWER (*str))
511 ++p, ++str;
512
513 if (* p)
514 return _("unrecognized instruction");
515
516#ifndef CGEN_MNEMONIC_OPERANDS
517 if (* str && ! ISSPACE (* str))
518 return _("unrecognized instruction");
519#endif
520
521 CGEN_INIT_PARSE (cd);
522 cgen_init_parse_operand (cd);
523#ifdef CGEN_MNEMONIC_OPERANDS
524 past_opcode_p = 0;
525#endif
526
527 /* We don't check for (*str != '\0') here because we want to parse
528 any trailing fake arguments in the syntax string. */
529 syn = CGEN_SYNTAX_STRING (syntax);
530
531 /* Mnemonics come first for now, ensure valid string. */
532 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
533 abort ();
534
535 ++syn;
536
537 while (* syn != 0)
538 {
539 /* Non operand chars must match exactly. */
540 if (CGEN_SYNTAX_CHAR_P (* syn))
541 {
542 /* FIXME: While we allow for non-GAS callers above, we assume the
543 first char after the mnemonic part is a space. */
544 /* FIXME: We also take inappropriate advantage of the fact that
545 GAS's input scrubber will remove extraneous blanks. */
546 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
547 {
548#ifdef CGEN_MNEMONIC_OPERANDS
549 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
550 past_opcode_p = 1;
551#endif
552 ++ syn;
553 ++ str;
554 }
555 else if (*str)
556 {
557 /* Syntax char didn't match. Can't be this insn. */
558 static char msg [80];
559
560 /* xgettext:c-format */
561 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
562 CGEN_SYNTAX_CHAR(*syn), *str);
563 return msg;
564 }
565 else
566 {
567 /* Ran out of input. */
568 static char msg [80];
569
570 /* xgettext:c-format */
571 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
572 CGEN_SYNTAX_CHAR(*syn));
573 return msg;
574 }
575 continue;
576 }
577
578 /* We have an operand of some sort. */
579 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
580 &str, fields);
581 if (errmsg)
582 return errmsg;
583
584 /* Done with this operand, continue with next one. */
585 ++ syn;
586 }
587
588 /* If we're at the end of the syntax string, we're done. */
589 if (* syn == 0)
590 {
591 /* FIXME: For the moment we assume a valid `str' can only contain
592 blanks now. IE: We needn't try again with a longer version of
593 the insn and it is assumed that longer versions of insns appear
594 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
595 while (ISSPACE (* str))
596 ++ str;
597
598 if (* str != '\0')
599 return _("junk at end of line"); /* FIXME: would like to include `str' */
600
601 return NULL;
602 }
603
604 /* We couldn't parse it. */
605 return _("unrecognized instruction");
606}
607
608
609/* Main entry point.
610 This routine is called for each instruction to be assembled.
611 STR points to the insn to be assembled.
612 We assume all necessary tables have been initialized.
613 The assembled instruction, less any fixups, is stored in BUF.
614 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
615 still needs to be converted to target byte order, otherwise BUF is an array
616 of bytes in target byte order.
617 The result is a pointer to the insn's entry in the opcode table,
618 or NULL if an error occured (an error message will have already been
619 printed).
620
621 Note that when processing (non-alias) macro-insns,
622 this function recurses.
623
624 ??? It's possible to make this cpu-independent.
625 One would have to deal with a few minor things.
626 At this point in time doing so would be more of a curiosity than useful
627 [for example this file isn't _that_ big], but keeping the possibility in
628 mind helps keep the design clean. */
629
630const CGEN_INSN *
631m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
632 CGEN_CPU_DESC cd;
633 const char *str;
634 CGEN_FIELDS *fields;
635 CGEN_INSN_BYTES_PTR buf;
636 char **errmsg;
637{
638 const char *start;
639 CGEN_INSN_LIST *ilist;
640 const char *parse_errmsg = NULL;
641 const char *insert_errmsg = NULL;
642 int recognized_mnemonic = 0;
643
644 /* Skip leading white space. */
645 while (ISSPACE (* str))
646 ++ str;
647
648 /* The instructions are stored in hashed lists.
649 Get the first in the list. */
650 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
651
652 /* Keep looking until we find a match. */
653 start = str;
654 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
655 {
656 const CGEN_INSN *insn = ilist->insn;
657 recognized_mnemonic = 1;
658
659#ifdef CGEN_VALIDATE_INSN_SUPPORTED
660 /* Not usually needed as unsupported opcodes
661 shouldn't be in the hash lists. */
662 /* Is this insn supported by the selected cpu? */
663 if (! m32r_cgen_insn_supported (cd, insn))
664 continue;
665#endif
666 /* If the RELAX attribute is set, this is an insn that shouldn't be
667 chosen immediately. Instead, it is used during assembler/linker
668 relaxation if possible. */
669 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
670 continue;
671
672 str = start;
673
674 /* Skip this insn if str doesn't look right lexically. */
675 if (CGEN_INSN_RX (insn) != NULL &&
676 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
677 continue;
678
679 /* Allow parse/insert handlers to obtain length of insn. */
680 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
681
682 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
683 if (parse_errmsg != NULL)
684 continue;
685
686 /* ??? 0 is passed for `pc'. */
687 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
688 (bfd_vma) 0);
689 if (insert_errmsg != NULL)
690 continue;
691
692 /* It is up to the caller to actually output the insn and any
693 queued relocs. */
694 return insn;
695 }
696
697 {
698 static char errbuf[150];
699#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
700 const char *tmp_errmsg;
701
702 /* If requesting verbose error messages, use insert_errmsg.
703 Failing that, use parse_errmsg. */
704 tmp_errmsg = (insert_errmsg ? insert_errmsg :
705 parse_errmsg ? parse_errmsg :
706 recognized_mnemonic ?
707 _("unrecognized form of instruction") :
708 _("unrecognized instruction"));
709
710 if (strlen (start) > 50)
711 /* xgettext:c-format */
712 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
713 else
714 /* xgettext:c-format */
715 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
716#else
717 if (strlen (start) > 50)
718 /* xgettext:c-format */
719 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
720 else
721 /* xgettext:c-format */
722 sprintf (errbuf, _("bad instruction `%.50s'"), start);
723#endif
724
725 *errmsg = errbuf;
726 return NULL;
727 }
728}
729
730
731#if 0 /* This calls back to GAS which we can't do without care. */
732
733/* Record each member of OPVALS in the assembler's symbol table.
734 This lets GAS parse registers for us.
735 ??? Interesting idea but not currently used. */
736
737/* Record each member of OPVALS in the assembler's symbol table.
738 FIXME: Not currently used. */
739
740void
741m32r_cgen_asm_hash_keywords (cd, opvals)
742 CGEN_CPU_DESC cd;
743 CGEN_KEYWORD *opvals;
744{
745 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
746 const CGEN_KEYWORD_ENTRY * ke;
747
748 while ((ke = cgen_keyword_search_next (& search)) != NULL)
749 {
750#if 0 /* Unnecessary, should be done in the search routine. */
751 if (! m32r_cgen_opval_supported (ke))
752 continue;
753#endif
754 cgen_asm_record_register (cd, ke->name, ke->value);
755 }
756}
757
758#endif /* 0 */
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