source: trunk/binutils/opcodes/iq2000-asm.c@ 3677

Last change on this file since 3677 was 607, checked in by bird, 22 years ago

Initial revision
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File size: 25.3 KB
Line 
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "bfd.h"
32#include "symcat.h"
33#include "iq2000-desc.h"
34#include "iq2000-opc.h"
35#include "opintl.h"
36#include "xregex.h"
37#include "libiberty.h"
38#include "safe-ctype.h"
39
40#undef min
41#define min(a,b) ((a) < (b) ? (a) : (b))
42#undef max
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45static const char * parse_insn_normal
46 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
47
48
49/* -- assembler routines inserted here. */
50
51/* -- asm.c */
52static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
53static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
54static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
55static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
56
57/* Special check to ensure that instruction exists for given machine */
58int
59iq2000_cgen_insn_supported (cd, insn)
60 CGEN_CPU_DESC cd;
61 CGEN_INSN *insn;
62{
63 int machs = cd->machs;
64
65 return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
66}
67
68static int iq2000_cgen_isa_register (strp)
69 const char **strp;
70{
71 int len;
72 int ch1, ch2;
73 if (**strp == 'r' || **strp == 'R')
74 {
75 len = strlen (*strp);
76 if (len == 2)
77 {
78 ch1 = (*strp)[1];
79 if ('0' <= ch1 && ch1 <= '9')
80 return 1;
81 }
82 else if (len == 3)
83 {
84 ch1 = (*strp)[1];
85 ch2 = (*strp)[2];
86 if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
87 return 1;
88 if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
89 return 1;
90 }
91 }
92 if (**strp == '%' && tolower((*strp)[1]) != 'l' && tolower((*strp)[1]) != 'h')
93 return 1;
94 return 0;
95}
96
97/* Handle negated literal. */
98
99static const char *
100parse_mimm (cd, strp, opindex, valuep)
101 CGEN_CPU_DESC cd;
102 const char **strp;
103 int opindex;
104 long *valuep;
105{
106 const char *errmsg;
107 long value;
108
109 /* Verify this isn't a register */
110 if (iq2000_cgen_isa_register (strp))
111 errmsg = _("immediate value cannot be register");
112 else
113 {
114 long value;
115
116 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
117 if (errmsg == NULL)
118 {
119 long x = (-value) & 0xFFFF0000;
120 if (x != 0 && x != 0xFFFF0000)
121 errmsg = _("immediate value out of range");
122 else
123 *valuep = (-value & 0xFFFF);
124 }
125 }
126 return errmsg;
127}
128
129/* Handle signed/unsigned literal. */
130
131static const char *
132parse_imm (cd, strp, opindex, valuep)
133 CGEN_CPU_DESC cd;
134 const char **strp;
135 int opindex;
136 unsigned long *valuep;
137{
138 const char *errmsg;
139 long value;
140
141 if (iq2000_cgen_isa_register (strp))
142 errmsg = _("immediate value cannot be register");
143 else
144 {
145 long value;
146
147 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
148 if (errmsg == NULL)
149 {
150 long x = value & 0xFFFF0000;
151 if (x != 0 && x != 0xFFFF0000)
152 errmsg = _("immediate value out of range");
153 else
154 *valuep = (value & 0xFFFF);
155 }
156 }
157 return errmsg;
158}
159
160/* Handle iq10 21-bit jmp offset. */
161
162static const char *
163parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
164 CGEN_CPU_DESC cd;
165 const char **strp;
166 int opindex;
167 int reloc;
168 enum cgen_parse_operand_result *type_addr;
169 unsigned long *valuep;
170{
171 const char *errmsg;
172 bfd_vma value;
173 enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
174
175 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
176 &result_type, &value);
177 if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
178 {
179 /* check value is within 23-bits (remembering that 2-bit shift right will occur) */
180 if (value > 0x7fffff)
181 return _("21-bit offset out of range");
182 }
183 *valuep = (value & 0x7FFFFF);
184 return errmsg;
185}
186
187/* Handle high(). */
188
189static const char *
190parse_hi16 (cd, strp, opindex, valuep)
191 CGEN_CPU_DESC cd;
192 const char **strp;
193 int opindex;
194 unsigned long *valuep;
195{
196 if (strncasecmp (*strp, "%hi(", 4) == 0)
197 {
198 enum cgen_parse_operand_result result_type;
199 bfd_vma value;
200 const char *errmsg;
201
202 *strp += 4;
203 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
204 &result_type, &value);
205 if (**strp != ')')
206 return _("missing `)'");
207
208 ++*strp;
209 if (errmsg == NULL
210 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
211 {
212 /* if value has top-bit of %lo on, then it will
213 sign-propagate and so we compensate by adding
214 1 to the resultant %hi value */
215 if (value & 0x8000)
216 value += 0x10000;
217 value >>= 16;
218 }
219 *valuep = value;
220
221 return errmsg;
222 }
223
224 /* we add %uhi in case a user just wants the high 16-bits or is using
225 an insn like ori for %lo which does not sign-propagate */
226 if (strncasecmp (*strp, "%uhi(", 5) == 0)
227 {
228 enum cgen_parse_operand_result result_type;
229 bfd_vma value;
230 const char *errmsg;
231
232 *strp += 5;
233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
234 &result_type, &value);
235 if (**strp != ')')
236 return _("missing `)'");
237
238 ++*strp;
239 if (errmsg == NULL
240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
241 {
242 value >>= 16;
243 }
244 *valuep = value;
245
246 return errmsg;
247 }
248
249 return parse_imm (cd, strp, opindex, valuep);
250}
251
252/* Handle %lo in a signed context.
253 The signedness of the value doesn't matter to %lo(), but this also
254 handles the case where %lo() isn't present. */
255
256static const char *
257parse_lo16 (cd, strp, opindex, valuep)
258 CGEN_CPU_DESC cd;
259 const char **strp;
260 int opindex;
261 long *valuep;
262{
263 if (strncasecmp (*strp, "%lo(", 4) == 0)
264 {
265 const char *errmsg;
266 enum cgen_parse_operand_result result_type;
267 bfd_vma value;
268
269 *strp += 4;
270 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
271 &result_type, &value);
272 if (**strp != ')')
273 return _("missing `)'");
274 ++*strp;
275 if (errmsg == NULL
276 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
277 value &= 0xffff;
278 *valuep = value;
279 return errmsg;
280 }
281
282 return parse_imm (cd, strp, opindex, valuep);
283}
284
285/* Handle %lo in a negated signed context.
286 The signedness of the value doesn't matter to %lo(), but this also
287 handles the case where %lo() isn't present. */
288
289static const char *
290parse_mlo16 (cd, strp, opindex, valuep)
291 CGEN_CPU_DESC cd;
292 const char **strp;
293 int opindex;
294 long *valuep;
295{
296 if (strncasecmp (*strp, "%lo(", 4) == 0)
297 {
298 const char *errmsg;
299 enum cgen_parse_operand_result result_type;
300 bfd_vma value;
301
302 *strp += 4;
303 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
304 &result_type, &value);
305 if (**strp != ')')
306 return _("missing `)'");
307 ++*strp;
308 if (errmsg == NULL
309 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
310 value = (-value) & 0xffff;
311 *valuep = value;
312 return errmsg;
313 }
314
315 return parse_mimm (cd, strp, opindex, valuep);
316}
317
318/* -- */
319
320const char * iq2000_cgen_parse_operand
321 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
322
323/* Main entry point for operand parsing.
324
325 This function is basically just a big switch statement. Earlier versions
326 used tables to look up the function to use, but
327 - if the table contains both assembler and disassembler functions then
328 the disassembler contains much of the assembler and vice-versa,
329 - there's a lot of inlining possibilities as things grow,
330 - using a switch statement avoids the function call overhead.
331
332 This function could be moved into `parse_insn_normal', but keeping it
333 separate makes clear the interface between `parse_insn_normal' and each of
334 the handlers. */
335
336const char *
337iq2000_cgen_parse_operand (cd, opindex, strp, fields)
338 CGEN_CPU_DESC cd;
339 int opindex;
340 const char ** strp;
341 CGEN_FIELDS * fields;
342{
343 const char * errmsg = NULL;
344 /* Used by scalar operands that still need to be parsed. */
345 long junk ATTRIBUTE_UNUSED;
346
347 switch (opindex)
348 {
349 case IQ2000_OPERAND_BASE :
350 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
351 break;
352 case IQ2000_OPERAND_BASEOFF :
353 {
354 bfd_vma value;
355 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
356 fields->f_imm = value;
357 }
358 break;
359 case IQ2000_OPERAND_BITNUM :
360 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt);
361 break;
362 case IQ2000_OPERAND_BYTECOUNT :
363 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount);
364 break;
365 case IQ2000_OPERAND_CAM_Y :
366 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y);
367 break;
368 case IQ2000_OPERAND_CAM_Z :
369 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z);
370 break;
371 case IQ2000_OPERAND_CM_3FUNC :
372 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func);
373 break;
374 case IQ2000_OPERAND_CM_3Z :
375 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z);
376 break;
377 case IQ2000_OPERAND_CM_4FUNC :
378 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func);
379 break;
380 case IQ2000_OPERAND_CM_4Z :
381 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z);
382 break;
383 case IQ2000_OPERAND_COUNT :
384 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count);
385 break;
386 case IQ2000_OPERAND_EXECODE :
387 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode);
388 break;
389 case IQ2000_OPERAND_HI16 :
390 errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm);
391 break;
392 case IQ2000_OPERAND_IMM :
393 errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm);
394 break;
395 case IQ2000_OPERAND_INDEX :
396 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_INDEX, &fields->f_index);
397 break;
398 case IQ2000_OPERAND_JMPTARG :
399 {
400 bfd_vma value;
401 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
402 fields->f_jtarg = value;
403 }
404 break;
405 case IQ2000_OPERAND_JMPTARGQ10 :
406 {
407 bfd_vma value;
408 errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
409 fields->f_jtargq10 = value;
410 }
411 break;
412 case IQ2000_OPERAND_LO16 :
413 errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm);
414 break;
415 case IQ2000_OPERAND_MASK :
416 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask);
417 break;
418 case IQ2000_OPERAND_MASKL :
419 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl);
420 break;
421 case IQ2000_OPERAND_MASKQ10 :
422 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10);
423 break;
424 case IQ2000_OPERAND_MASKR :
425 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs);
426 break;
427 case IQ2000_OPERAND_MLO16 :
428 errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm);
429 break;
430 case IQ2000_OPERAND_OFFSET :
431 {
432 bfd_vma value;
433 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
434 fields->f_offset = value;
435 }
436 break;
437 case IQ2000_OPERAND_RD :
438 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
439 break;
440 case IQ2000_OPERAND_RD_RS :
441 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
442 break;
443 case IQ2000_OPERAND_RD_RT :
444 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
445 break;
446 case IQ2000_OPERAND_RS :
447 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
448 break;
449 case IQ2000_OPERAND_RT :
450 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
451 break;
452 case IQ2000_OPERAND_RT_RS :
453 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
454 break;
455 case IQ2000_OPERAND_SHAMT :
456 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt);
457 break;
458
459 default :
460 /* xgettext:c-format */
461 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
462 abort ();
463 }
464
465 return errmsg;
466}
467
468cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
469{
470 parse_insn_normal,
471};
472
473void
474iq2000_cgen_init_asm (cd)
475 CGEN_CPU_DESC cd;
476{
477 iq2000_cgen_init_opcode_table (cd);
478 iq2000_cgen_init_ibld_table (cd);
479 cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
480 cd->parse_operand = iq2000_cgen_parse_operand;
481#ifdef CGEN_ASM_INIT_HOOK
482CGEN_ASM_INIT_HOOK
483#endif
484}
485
486
487
488
489/* Regex construction routine.
490
491 This translates an opcode syntax string into a regex string,
492 by replacing any non-character syntax element (such as an
493 opcode) with the pattern '.*'
494
495 It then compiles the regex and stores it in the opcode, for
496 later use by iq2000_cgen_assemble_insn
497
498 Returns NULL for success, an error message for failure. */
499
500char *
501iq2000_cgen_build_insn_regex (insn)
502 CGEN_INSN *insn;
503{
504 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
505 const char *mnem = CGEN_INSN_MNEMONIC (insn);
506 char rxbuf[CGEN_MAX_RX_ELEMENTS];
507 char *rx = rxbuf;
508 const CGEN_SYNTAX_CHAR_TYPE *syn;
509 int reg_err;
510
511 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
512
513 /* Mnemonics come first in the syntax string. */
514 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
515 return _("missing mnemonic in syntax string");
516 ++syn;
517
518 /* Generate a case sensitive regular expression that emulates case
519 insensitive matching in the "C" locale. We cannot generate a case
520 insensitive regular expression because in Turkish locales, 'i' and 'I'
521 are not equal modulo case conversion. */
522
523 /* Copy the literal mnemonic out of the insn. */
524 for (; *mnem; mnem++)
525 {
526 char c = *mnem;
527
528 if (ISALPHA (c))
529 {
530 *rx++ = '[';
531 *rx++ = TOLOWER (c);
532 *rx++ = TOUPPER (c);
533 *rx++ = ']';
534 }
535 else
536 *rx++ = c;
537 }
538
539 /* Copy any remaining literals from the syntax string into the rx. */
540 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
541 {
542 if (CGEN_SYNTAX_CHAR_P (* syn))
543 {
544 char c = CGEN_SYNTAX_CHAR (* syn);
545
546 switch (c)
547 {
548 /* Escape any regex metacharacters in the syntax. */
549 case '.': case '[': case '\\':
550 case '*': case '^': case '$':
551
552#ifdef CGEN_ESCAPE_EXTENDED_REGEX
553 case '?': case '{': case '}':
554 case '(': case ')': case '*':
555 case '|': case '+': case ']':
556#endif
557 *rx++ = '\\';
558 *rx++ = c;
559 break;
560
561 default:
562 if (ISALPHA (c))
563 {
564 *rx++ = '[';
565 *rx++ = TOLOWER (c);
566 *rx++ = TOUPPER (c);
567 *rx++ = ']';
568 }
569 else
570 *rx++ = c;
571 break;
572 }
573 }
574 else
575 {
576 /* Replace non-syntax fields with globs. */
577 *rx++ = '.';
578 *rx++ = '*';
579 }
580 }
581
582 /* Trailing whitespace ok. */
583 * rx++ = '[';
584 * rx++ = ' ';
585 * rx++ = '\t';
586 * rx++ = ']';
587 * rx++ = '*';
588
589 /* But anchor it after that. */
590 * rx++ = '$';
591 * rx = '\0';
592
593 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
594 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
595
596 if (reg_err == 0)
597 return NULL;
598 else
599 {
600 static char msg[80];
601
602 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
603 regfree ((regex_t *) CGEN_INSN_RX (insn));
604 free (CGEN_INSN_RX (insn));
605 (CGEN_INSN_RX (insn)) = NULL;
606 return msg;
607 }
608}
609
610
611
612/* Default insn parser.
613
614 The syntax string is scanned and operands are parsed and stored in FIELDS.
615 Relocs are queued as we go via other callbacks.
616
617 ??? Note that this is currently an all-or-nothing parser. If we fail to
618 parse the instruction, we return 0 and the caller will start over from
619 the beginning. Backtracking will be necessary in parsing subexpressions,
620 but that can be handled there. Not handling backtracking here may get
621 expensive in the case of the m68k. Deal with later.
622
623 Returns NULL for success, an error message for failure. */
624
625static const char *
626parse_insn_normal (cd, insn, strp, fields)
627 CGEN_CPU_DESC cd;
628 const CGEN_INSN *insn;
629 const char **strp;
630 CGEN_FIELDS *fields;
631{
632 /* ??? Runtime added insns not handled yet. */
633 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
634 const char *str = *strp;
635 const char *errmsg;
636 const char *p;
637 const CGEN_SYNTAX_CHAR_TYPE * syn;
638#ifdef CGEN_MNEMONIC_OPERANDS
639 /* FIXME: wip */
640 int past_opcode_p;
641#endif
642
643 /* For now we assume the mnemonic is first (there are no leading operands).
644 We can parse it without needing to set up operand parsing.
645 GAS's input scrubber will ensure mnemonics are lowercase, but we may
646 not be called from GAS. */
647 p = CGEN_INSN_MNEMONIC (insn);
648 while (*p && TOLOWER (*p) == TOLOWER (*str))
649 ++p, ++str;
650
651 if (* p)
652 return _("unrecognized instruction");
653
654#ifndef CGEN_MNEMONIC_OPERANDS
655 if (* str && ! ISSPACE (* str))
656 return _("unrecognized instruction");
657#endif
658
659 CGEN_INIT_PARSE (cd);
660 cgen_init_parse_operand (cd);
661#ifdef CGEN_MNEMONIC_OPERANDS
662 past_opcode_p = 0;
663#endif
664
665 /* We don't check for (*str != '\0') here because we want to parse
666 any trailing fake arguments in the syntax string. */
667 syn = CGEN_SYNTAX_STRING (syntax);
668
669 /* Mnemonics come first for now, ensure valid string. */
670 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
671 abort ();
672
673 ++syn;
674
675 while (* syn != 0)
676 {
677 /* Non operand chars must match exactly. */
678 if (CGEN_SYNTAX_CHAR_P (* syn))
679 {
680 /* FIXME: While we allow for non-GAS callers above, we assume the
681 first char after the mnemonic part is a space. */
682 /* FIXME: We also take inappropriate advantage of the fact that
683 GAS's input scrubber will remove extraneous blanks. */
684 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
685 {
686#ifdef CGEN_MNEMONIC_OPERANDS
687 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
688 past_opcode_p = 1;
689#endif
690 ++ syn;
691 ++ str;
692 }
693 else if (*str)
694 {
695 /* Syntax char didn't match. Can't be this insn. */
696 static char msg [80];
697
698 /* xgettext:c-format */
699 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
700 CGEN_SYNTAX_CHAR(*syn), *str);
701 return msg;
702 }
703 else
704 {
705 /* Ran out of input. */
706 static char msg [80];
707
708 /* xgettext:c-format */
709 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
710 CGEN_SYNTAX_CHAR(*syn));
711 return msg;
712 }
713 continue;
714 }
715
716 /* We have an operand of some sort. */
717 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
718 &str, fields);
719 if (errmsg)
720 return errmsg;
721
722 /* Done with this operand, continue with next one. */
723 ++ syn;
724 }
725
726 /* If we're at the end of the syntax string, we're done. */
727 if (* syn == 0)
728 {
729 /* FIXME: For the moment we assume a valid `str' can only contain
730 blanks now. IE: We needn't try again with a longer version of
731 the insn and it is assumed that longer versions of insns appear
732 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
733 while (ISSPACE (* str))
734 ++ str;
735
736 if (* str != '\0')
737 return _("junk at end of line"); /* FIXME: would like to include `str' */
738
739 return NULL;
740 }
741
742 /* We couldn't parse it. */
743 return _("unrecognized instruction");
744}
745
746
747/* Main entry point.
748 This routine is called for each instruction to be assembled.
749 STR points to the insn to be assembled.
750 We assume all necessary tables have been initialized.
751 The assembled instruction, less any fixups, is stored in BUF.
752 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
753 still needs to be converted to target byte order, otherwise BUF is an array
754 of bytes in target byte order.
755 The result is a pointer to the insn's entry in the opcode table,
756 or NULL if an error occured (an error message will have already been
757 printed).
758
759 Note that when processing (non-alias) macro-insns,
760 this function recurses.
761
762 ??? It's possible to make this cpu-independent.
763 One would have to deal with a few minor things.
764 At this point in time doing so would be more of a curiosity than useful
765 [for example this file isn't _that_ big], but keeping the possibility in
766 mind helps keep the design clean. */
767
768const CGEN_INSN *
769iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg)
770 CGEN_CPU_DESC cd;
771 const char *str;
772 CGEN_FIELDS *fields;
773 CGEN_INSN_BYTES_PTR buf;
774 char **errmsg;
775{
776 const char *start;
777 CGEN_INSN_LIST *ilist;
778 const char *parse_errmsg = NULL;
779 const char *insert_errmsg = NULL;
780 int recognized_mnemonic = 0;
781
782 /* Skip leading white space. */
783 while (ISSPACE (* str))
784 ++ str;
785
786 /* The instructions are stored in hashed lists.
787 Get the first in the list. */
788 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
789
790 /* Keep looking until we find a match. */
791 start = str;
792 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
793 {
794 const CGEN_INSN *insn = ilist->insn;
795 recognized_mnemonic = 1;
796
797#ifdef CGEN_VALIDATE_INSN_SUPPORTED
798 /* Not usually needed as unsupported opcodes
799 shouldn't be in the hash lists. */
800 /* Is this insn supported by the selected cpu? */
801 if (! iq2000_cgen_insn_supported (cd, insn))
802 continue;
803#endif
804 /* If the RELAX attribute is set, this is an insn that shouldn't be
805 chosen immediately. Instead, it is used during assembler/linker
806 relaxation if possible. */
807 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
808 continue;
809
810 str = start;
811
812 /* Skip this insn if str doesn't look right lexically. */
813 if (CGEN_INSN_RX (insn) != NULL &&
814 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
815 continue;
816
817 /* Allow parse/insert handlers to obtain length of insn. */
818 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
819
820 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
821 if (parse_errmsg != NULL)
822 continue;
823
824 /* ??? 0 is passed for `pc'. */
825 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
826 (bfd_vma) 0);
827 if (insert_errmsg != NULL)
828 continue;
829
830 /* It is up to the caller to actually output the insn and any
831 queued relocs. */
832 return insn;
833 }
834
835 {
836 static char errbuf[150];
837#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
838 const char *tmp_errmsg;
839
840 /* If requesting verbose error messages, use insert_errmsg.
841 Failing that, use parse_errmsg. */
842 tmp_errmsg = (insert_errmsg ? insert_errmsg :
843 parse_errmsg ? parse_errmsg :
844 recognized_mnemonic ?
845 _("unrecognized form of instruction") :
846 _("unrecognized instruction"));
847
848 if (strlen (start) > 50)
849 /* xgettext:c-format */
850 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
851 else
852 /* xgettext:c-format */
853 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
854#else
855 if (strlen (start) > 50)
856 /* xgettext:c-format */
857 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
858 else
859 /* xgettext:c-format */
860 sprintf (errbuf, _("bad instruction `%.50s'"), start);
861#endif
862
863 *errmsg = errbuf;
864 return NULL;
865 }
866}
867
868
869#if 0 /* This calls back to GAS which we can't do without care. */
870
871/* Record each member of OPVALS in the assembler's symbol table.
872 This lets GAS parse registers for us.
873 ??? Interesting idea but not currently used. */
874
875/* Record each member of OPVALS in the assembler's symbol table.
876 FIXME: Not currently used. */
877
878void
879iq2000_cgen_asm_hash_keywords (cd, opvals)
880 CGEN_CPU_DESC cd;
881 CGEN_KEYWORD *opvals;
882{
883 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
884 const CGEN_KEYWORD_ENTRY * ke;
885
886 while ((ke = cgen_keyword_search_next (& search)) != NULL)
887 {
888#if 0 /* Unnecessary, should be done in the search routine. */
889 if (! iq2000_cgen_opval_supported (ke))
890 continue;
891#endif
892 cgen_asm_record_register (cd, ke->name, ke->value);
893 }
894}
895
896#endif /* 0 */
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