| 1 | /* Disassemble D30V instructions. | 
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| 2 | Copyright 1997, 1998, 2000, 2001 Free Software Foundation, Inc. | 
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| 3 |  | 
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| 4 | This program is free software; you can redistribute it and/or modify | 
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| 5 | it under the terms of the GNU General Public License as published by | 
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| 6 | the Free Software Foundation; either version 2 of the License, or | 
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| 7 | (at your option) any later version. | 
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| 8 |  | 
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| 9 | This program is distributed in the hope that it will be useful, | 
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| 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | 
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| 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
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| 12 | GNU General Public License for more details. | 
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| 13 |  | 
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| 14 | You should have received a copy of the GNU General Public License | 
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| 15 | along with this program; if not, write to the Free Software | 
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| 16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */ | 
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| 17 |  | 
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| 18 | #include <stdio.h> | 
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| 19 | #include "sysdep.h" | 
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| 20 | #include "opcode/d30v.h" | 
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| 21 | #include "dis-asm.h" | 
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| 22 | #include "opintl.h" | 
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| 23 |  | 
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| 24 | #define PC_MASK 0xFFFFFFFF | 
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| 25 |  | 
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| 26 | static int lookup_opcode PARAMS ((struct d30v_insn *insn, long num, int is_long)); | 
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| 27 | static void print_insn PARAMS ((struct disassemble_info *info, bfd_vma memaddr, long long num, | 
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| 28 | struct d30v_insn *insn, int is_long, int show_ext)); | 
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| 29 | static int extract_value PARAMS ((long long num, struct d30v_operand *oper, int is_long)); | 
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| 30 |  | 
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| 31 | int | 
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| 32 | print_insn_d30v (memaddr, info) | 
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| 33 | bfd_vma memaddr; | 
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| 34 | struct disassemble_info *info; | 
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| 35 | { | 
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| 36 | int status, result; | 
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| 37 | bfd_byte buffer[12]; | 
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| 38 | unsigned long in1, in2; | 
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| 39 | struct d30v_insn insn; | 
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| 40 | long long num; | 
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| 41 |  | 
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| 42 | insn.form = (struct d30v_format *) NULL; | 
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| 43 |  | 
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| 44 | info->bytes_per_line = 8; | 
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| 45 | info->bytes_per_chunk = 4; | 
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| 46 | info->display_endian = BFD_ENDIAN_BIG; | 
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| 47 |  | 
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| 48 | status = (*info->read_memory_func) (memaddr, buffer, 4, info); | 
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| 49 | if (status != 0) | 
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| 50 | { | 
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| 51 | (*info->memory_error_func) (status, memaddr, info); | 
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| 52 | return -1; | 
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| 53 | } | 
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| 54 | in1 = bfd_getb32 (buffer); | 
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| 55 |  | 
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| 56 | status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info); | 
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| 57 | if (status != 0) | 
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| 58 | { | 
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| 59 | info->bytes_per_line = 8; | 
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| 60 | if (!(result = lookup_opcode (&insn, in1, 0))) | 
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| 61 | (*info->fprintf_func) (info->stream, ".long\t0x%x", in1); | 
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| 62 | else | 
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| 63 | print_insn (info, memaddr, (long long) in1, &insn, 0, result); | 
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| 64 | return 4; | 
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| 65 | } | 
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| 66 | in2 = bfd_getb32 (buffer); | 
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| 67 |  | 
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| 68 | if (in1 & in2 & FM01) | 
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| 69 | { | 
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| 70 | /* LONG instruction.  */ | 
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| 71 | if (!(result = lookup_opcode (&insn, in1, 1))) | 
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| 72 | { | 
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| 73 | (*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2); | 
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| 74 | return 8; | 
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| 75 | } | 
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| 76 | num = (long long) in1 << 32 | in2; | 
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| 77 | print_insn (info, memaddr, num, &insn, 1, result); | 
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| 78 | } | 
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| 79 | else | 
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| 80 | { | 
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| 81 | num = in1; | 
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| 82 | if (!(result = lookup_opcode (&insn, in1, 0))) | 
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| 83 | (*info->fprintf_func) (info->stream, ".long\t0x%x", in1); | 
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| 84 | else | 
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| 85 | print_insn (info, memaddr, num, &insn, 0, result); | 
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| 86 |  | 
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| 87 | switch (((in1 >> 31) << 1) | (in2 >> 31)) | 
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| 88 | { | 
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| 89 | case 0: | 
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| 90 | (*info->fprintf_func) (info->stream, "\t||\t"); | 
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| 91 | break; | 
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| 92 | case 1: | 
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| 93 | (*info->fprintf_func) (info->stream, "\t->\t"); | 
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| 94 | break; | 
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| 95 | case 2: | 
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| 96 | (*info->fprintf_func) (info->stream, "\t<-\t"); | 
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| 97 | default: | 
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| 98 | break; | 
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| 99 | } | 
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| 100 |  | 
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| 101 | insn.form = (struct d30v_format *) NULL; | 
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| 102 | num = in2; | 
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| 103 | if (!(result = lookup_opcode (&insn, in2, 0))) | 
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| 104 | (*info->fprintf_func) (info->stream, ".long\t0x%x", in2); | 
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| 105 | else | 
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| 106 | print_insn (info, memaddr, num, &insn, 0, result); | 
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| 107 | } | 
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| 108 | return 8; | 
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| 109 | } | 
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| 110 |  | 
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| 111 | /* Return 0 if lookup fails, | 
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| 112 | 1 if found and only one form, | 
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| 113 | 2 if found and there are short and long forms.  */ | 
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| 114 |  | 
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| 115 | static int | 
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| 116 | lookup_opcode (insn, num, is_long) | 
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| 117 | struct d30v_insn *insn; | 
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| 118 | long num; | 
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| 119 | int is_long; | 
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| 120 | { | 
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| 121 | int i = 0, index; | 
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| 122 | struct d30v_format *f; | 
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| 123 | struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table; | 
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| 124 | int op1 = (num >> 25) & 0x7; | 
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| 125 | int op2 = (num >> 20) & 0x1f; | 
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| 126 | int mod = (num >> 18) & 0x3; | 
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| 127 |  | 
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| 128 | /* Find the opcode.  */ | 
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| 129 | do | 
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| 130 | { | 
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| 131 | if ((op->op1 == op1) && (op->op2 == op2)) | 
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| 132 | break; | 
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| 133 | op++; | 
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| 134 | } | 
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| 135 | while (op->name); | 
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| 136 |  | 
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| 137 | if (!op || !op->name) | 
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| 138 | return 0; | 
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| 139 |  | 
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| 140 | while (op->op1 == op1 && op->op2 == op2) | 
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| 141 | { | 
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| 142 | /* Scan through all the formats for the opcode.  */ | 
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| 143 | index = op->format[i++]; | 
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| 144 | do | 
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| 145 | { | 
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| 146 | f = (struct d30v_format *) &d30v_format_table[index]; | 
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| 147 | while (f->form == index) | 
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| 148 | { | 
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| 149 | if ((!is_long || f->form >= LONG) && (f->modifier == mod)) | 
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| 150 | { | 
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| 151 | insn->form = f; | 
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| 152 | break; | 
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| 153 | } | 
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| 154 | f++; | 
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| 155 | } | 
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| 156 | if (insn->form) | 
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| 157 | break; | 
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| 158 | } | 
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| 159 | while ((index = op->format[i++]) != 0); | 
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| 160 | if (insn->form) | 
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| 161 | break; | 
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| 162 | op++; | 
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| 163 | i = 0; | 
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| 164 | } | 
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| 165 | if (insn->form == NULL) | 
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| 166 | return 0; | 
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| 167 |  | 
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| 168 | insn->op = op; | 
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| 169 | insn->ecc = (num >> 28) & 0x7; | 
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| 170 | if (op->format[1]) | 
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| 171 | return 2; | 
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| 172 | else | 
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| 173 | return 1; | 
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| 174 | } | 
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| 175 |  | 
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| 176 | static void | 
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| 177 | print_insn (info, memaddr, num, insn, is_long, show_ext) | 
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| 178 | struct disassemble_info *info; | 
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| 179 | bfd_vma memaddr; | 
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| 180 | long long num; | 
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| 181 | struct d30v_insn *insn; | 
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| 182 | int is_long; | 
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| 183 | int show_ext; | 
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| 184 | { | 
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| 185 | int val, opnum, need_comma = 0; | 
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| 186 | struct d30v_operand *oper; | 
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| 187 | int i, match, opind = 0, need_paren = 0, found_control = 0; | 
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| 188 |  | 
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| 189 | (*info->fprintf_func) (info->stream, "%s", insn->op->name); | 
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| 190 |  | 
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| 191 | /* Check for CMP or CMPU.  */ | 
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| 192 | if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME) | 
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| 193 | { | 
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| 194 | opind++; | 
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| 195 | val = | 
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| 196 | extract_value (num, | 
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| 197 | (struct d30v_operand *) &d30v_operand_table[insn->form->operands[0]], | 
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| 198 | is_long); | 
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| 199 | (*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]); | 
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| 200 | } | 
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| 201 |  | 
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| 202 | /* Add in ".s" or ".l".  */ | 
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| 203 | if (show_ext == 2) | 
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| 204 | { | 
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| 205 | if (is_long) | 
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| 206 | (*info->fprintf_func) (info->stream, ".l"); | 
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| 207 | else | 
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| 208 | (*info->fprintf_func) (info->stream, ".s"); | 
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| 209 | } | 
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| 210 |  | 
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| 211 | if (insn->ecc) | 
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| 212 | (*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]); | 
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| 213 |  | 
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| 214 | (*info->fprintf_func) (info->stream, "\t"); | 
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| 215 |  | 
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| 216 | while ((opnum = insn->form->operands[opind++]) != 0) | 
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| 217 | { | 
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| 218 | int bits; | 
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| 219 | oper = (struct d30v_operand *) &d30v_operand_table[opnum]; | 
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| 220 | bits = oper->bits; | 
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| 221 | if (oper->flags & OPERAND_SHIFT) | 
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| 222 | bits += 3; | 
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| 223 |  | 
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| 224 | if (need_comma | 
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| 225 | && oper->flags != OPERAND_PLUS | 
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| 226 | && oper->flags != OPERAND_MINUS) | 
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| 227 | { | 
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| 228 | need_comma = 0; | 
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| 229 | (*info->fprintf_func) (info->stream, ", "); | 
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| 230 | } | 
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| 231 |  | 
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| 232 | if (oper->flags == OPERAND_ATMINUS) | 
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| 233 | { | 
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| 234 | (*info->fprintf_func) (info->stream, "@-"); | 
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| 235 | continue; | 
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| 236 | } | 
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| 237 | if (oper->flags == OPERAND_MINUS) | 
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| 238 | { | 
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| 239 | (*info->fprintf_func) (info->stream, "-"); | 
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| 240 | continue; | 
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| 241 | } | 
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| 242 | if (oper->flags == OPERAND_PLUS) | 
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| 243 | { | 
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| 244 | (*info->fprintf_func) (info->stream, "+"); | 
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| 245 | continue; | 
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| 246 | } | 
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| 247 | if (oper->flags == OPERAND_ATSIGN) | 
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| 248 | { | 
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| 249 | (*info->fprintf_func) (info->stream, "@"); | 
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| 250 | continue; | 
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| 251 | } | 
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| 252 | if (oper->flags == OPERAND_ATPAR) | 
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| 253 | { | 
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| 254 | (*info->fprintf_func) (info->stream, "@("); | 
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| 255 | need_paren = 1; | 
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| 256 | continue; | 
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| 257 | } | 
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| 258 |  | 
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| 259 | if (oper->flags == OPERAND_SPECIAL) | 
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| 260 | continue; | 
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| 261 |  | 
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| 262 | val = extract_value (num, oper, is_long); | 
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| 263 |  | 
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| 264 | if (oper->flags & OPERAND_REG) | 
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| 265 | { | 
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| 266 | match = 0; | 
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| 267 | if (oper->flags & OPERAND_CONTROL) | 
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| 268 | { | 
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| 269 | struct d30v_operand *oper3 = | 
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| 270 | (struct d30v_operand *) &d30v_operand_table[insn->form->operands[2]]; | 
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| 271 | int id = extract_value (num, oper3, is_long); | 
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| 272 | found_control = 1; | 
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| 273 | switch (id) | 
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| 274 | { | 
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| 275 | case 0: | 
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| 276 | val |= OPERAND_CONTROL; | 
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| 277 | break; | 
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| 278 | case 1: | 
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| 279 | case 2: | 
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| 280 | val = OPERAND_CONTROL + MAX_CONTROL_REG + id; | 
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| 281 | break; | 
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| 282 | case 3: | 
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| 283 | val |= OPERAND_FLAG; | 
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| 284 | break; | 
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| 285 | default: | 
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| 286 | fprintf (stderr, "illegal id (%d)\n", id); | 
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| 287 | } | 
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| 288 | } | 
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| 289 | else if (oper->flags & OPERAND_ACC) | 
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| 290 | val |= OPERAND_ACC; | 
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| 291 | else if (oper->flags & OPERAND_FLAG) | 
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| 292 | val |= OPERAND_FLAG; | 
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| 293 | for (i = 0; i < reg_name_cnt (); i++) | 
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| 294 | { | 
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| 295 | if (val == pre_defined_registers[i].value) | 
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| 296 | { | 
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| 297 | if (pre_defined_registers[i].pname) | 
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| 298 | (*info->fprintf_func) | 
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| 299 | (info->stream, "%s", pre_defined_registers[i].pname); | 
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| 300 | else | 
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| 301 | (*info->fprintf_func) | 
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| 302 | (info->stream, "%s", pre_defined_registers[i].name); | 
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| 303 | match = 1; | 
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| 304 | break; | 
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| 305 | } | 
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| 306 | } | 
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| 307 | if (match == 0) | 
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| 308 | { | 
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| 309 | /* This would only get executed if a register was not in | 
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| 310 | the register table.  */ | 
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| 311 | (*info->fprintf_func) | 
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| 312 | (info->stream, _("<unknown register %d>"), val & 0x3F); | 
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| 313 | } | 
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| 314 | } | 
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| 315 | /* repeati has a relocation, but its first argument is a plain | 
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| 316 | immediate.  OTOH instructions like djsri have a pc-relative | 
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| 317 | delay target, but an absolute jump target.  Therefore, a test | 
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| 318 | of insn->op->reloc_flag is not specific enough; we must test | 
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| 319 | if the actual operand we are handling now is pc-relative.  */ | 
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| 320 | else if (oper->flags & OPERAND_PCREL) | 
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| 321 | { | 
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| 322 | int neg = 0; | 
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| 323 |  | 
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| 324 | /* IMM6S3 is unsigned.  */ | 
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| 325 | if (oper->flags & OPERAND_SIGNED || bits == 32) | 
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| 326 | { | 
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| 327 | long max; | 
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| 328 | max = (1 << (bits - 1)); | 
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| 329 | if (val & max) | 
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| 330 | { | 
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| 331 | if (bits == 32) | 
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| 332 | val = -val; | 
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| 333 | else | 
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| 334 | val = -val & ((1 << bits) - 1); | 
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| 335 | neg = 1; | 
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| 336 | } | 
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| 337 | } | 
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| 338 | if (neg) | 
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| 339 | { | 
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| 340 | (*info->fprintf_func) (info->stream, "-%x\t(", val); | 
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| 341 | (*info->print_address_func) ((memaddr - val) & PC_MASK, info); | 
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| 342 | (*info->fprintf_func) (info->stream, ")"); | 
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| 343 | } | 
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| 344 | else | 
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| 345 | { | 
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| 346 | (*info->fprintf_func) (info->stream, "%x\t(", val); | 
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| 347 | (*info->print_address_func) ((memaddr + val) & PC_MASK, info); | 
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| 348 | (*info->fprintf_func) (info->stream, ")"); | 
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| 349 | } | 
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| 350 | } | 
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| 351 | else if (insn->op->reloc_flag == RELOC_ABS) | 
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| 352 | { | 
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| 353 | (*info->print_address_func) (val, info); | 
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| 354 | } | 
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| 355 | else | 
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| 356 | { | 
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| 357 | if (oper->flags & OPERAND_SIGNED) | 
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| 358 | { | 
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| 359 | int max = (1 << (bits - 1)); | 
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| 360 | if (val & max) | 
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| 361 | { | 
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| 362 | val = -val; | 
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| 363 | if (bits < 32) | 
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| 364 | val &= ((1 << bits) - 1); | 
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| 365 | (*info->fprintf_func) (info->stream, "-"); | 
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| 366 | } | 
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| 367 | } | 
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| 368 | (*info->fprintf_func) (info->stream, "0x%x", val); | 
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| 369 | } | 
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| 370 | /* If there is another operand, then write a comma and space.  */ | 
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| 371 | if (insn->form->operands[opind] && !(found_control && opind == 2)) | 
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| 372 | need_comma = 1; | 
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| 373 | } | 
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| 374 | if (need_paren) | 
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| 375 | (*info->fprintf_func) (info->stream, ")"); | 
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| 376 | } | 
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| 377 |  | 
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| 378 | static int | 
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| 379 | extract_value (num, oper, is_long) | 
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| 380 | long long num; | 
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| 381 | struct d30v_operand *oper; | 
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| 382 | int is_long; | 
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| 383 | { | 
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| 384 | int val; | 
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| 385 | int shift = 12 - oper->position; | 
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| 386 | int mask = (0xFFFFFFFF >> (32 - oper->bits)); | 
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| 387 |  | 
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| 388 | if (is_long) | 
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| 389 | { | 
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| 390 | if (oper->bits == 32) | 
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| 391 | { | 
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| 392 | /* Piece together 32-bit constant.  */ | 
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| 393 | val = ((num & 0x3FFFF) | 
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| 394 | | ((num & 0xFF00000) >> 2) | 
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| 395 | | ((num & 0x3F00000000LL) >> 6)); | 
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| 396 | } | 
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| 397 | else | 
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| 398 | val = (num >> (32 + shift)) & mask; | 
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| 399 | } | 
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| 400 | else | 
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| 401 | val = (num >> shift) & mask; | 
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| 402 |  | 
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| 403 | if (oper->flags & OPERAND_SHIFT) | 
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| 404 | val <<= 3; | 
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| 405 |  | 
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| 406 | return val; | 
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| 407 | } | 
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