| 1 | /* Print GOULD NPL instructions for GDB, the GNU debugger.
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| 2 | Copyright 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
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| 3 |
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| 4 | This file is part of GDB.
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| 5 |
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| 6 | GDB is free software; you can redistribute it and/or modify
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| 7 | it under the terms of the GNU General Public License as published by
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| 8 | the Free Software Foundation; either version 1, or (at your option)
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| 9 | any later version.
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| 10 |
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| 11 | GDB is distributed in the hope that it will be useful,
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| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 14 | GNU General Public License for more details.
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| 15 |
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| 16 | You should have received a copy of the GNU General Public License
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| 17 | along with GDB; see the file COPYING. If not, write to
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| 18 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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| 19 |
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| 20 | struct gld_opcode
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| 21 | {
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| 22 | char *name;
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| 23 | unsigned long opcode;
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| 24 | unsigned long mask;
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| 25 | char *args;
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| 26 | int length;
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| 27 | };
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| 28 |
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| 29 | /* We store four bytes of opcode for all opcodes because that
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| 30 | is the most any of them need. The actual length of an instruction
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| 31 | is always at least 2 bytes, and at most four. The length of the
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| 32 | instruction is based on the opcode.
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| 33 |
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| 34 | The mask component is a mask saying which bits must match
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| 35 | particular opcode in order for an instruction to be an instance
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| 36 | of that opcode.
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| 37 |
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| 38 | The args component is a string containing characters
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| 39 | that are used to format the arguments to the instruction. */
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| 40 |
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| 41 | /* Kinds of operands:
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| 42 | r Register in first field
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| 43 | R Register in second field
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| 44 | b Base register in first field
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| 45 | B Base register in second field
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| 46 | v Vector register in first field
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| 47 | V Vector register in first field
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| 48 | A Optional address register (base register)
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| 49 | X Optional index register
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| 50 | I Immediate data (16bits signed)
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| 51 | O Offset field (16bits signed)
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| 52 | h Offset field (15bits signed)
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| 53 | d Offset field (14bits signed)
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| 54 | S Shift count field
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| 55 |
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| 56 | any other characters are printed as is...
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| 57 | */
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| 58 |
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| 59 | /* The assembler requires that this array be sorted as follows:
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| 60 | all instances of the same mnemonic must be consecutive.
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| 61 | All instances of the same mnemonic with the same number of operands
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| 62 | must be consecutive.
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| 63 | */
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| 64 | struct gld_opcode gld_opcodes[] =
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| 65 | {
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| 66 | { "lb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 },
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| 67 | { "lnb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
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| 68 | { "lbs", 0xec080000, 0xfc080000, "r,xOA,X", 4 },
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| 69 | { "lh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 },
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| 70 | { "lnh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
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| 71 | { "lw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 },
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| 72 | { "lnw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
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| 73 | { "ld", 0xb4000002, 0xfc080002, "r,xOA,X", 4 },
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| 74 | { "lnd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
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| 75 | { "li", 0xf8000000, 0xfc7f0000, "r,I", 4 },
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| 76 | { "lpa", 0x50080000, 0xfc080000, "r,xOA,X", 4 },
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| 77 | { "la", 0x50000000, 0xfc080000, "r,xOA,X", 4 },
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| 78 | { "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 },
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| 79 | { "lbp", 0x90080000, 0xfc080000, "r,xOA,X", 4 },
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| 80 | { "lhp", 0x90000001, 0xfc080001, "r,xOA,X", 4 },
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| 81 | { "lwp", 0x90000000, 0xfc080000, "r,xOA,X", 4 },
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| 82 | { "ldp", 0x90000002, 0xfc080002, "r,xOA,X", 4 },
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| 83 | { "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 },
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| 84 | { "lf", 0xbc000000, 0xfc080000, "r,xOA,X", 4 },
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| 85 | { "lfbr", 0xbc080000, 0xfc080000, "b,xOA,X", 4 },
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| 86 | { "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 },
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| 87 | { "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 },
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| 88 | { "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 },
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| 89 | { "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 },
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| 90 | { "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 },
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| 91 | { "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 },
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| 92 | { "stfbr", 0xdc080000, 0xfc080000, "b,xOA,X", 4 },
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| 93 | { "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 },
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| 94 | { "zmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 },
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| 95 | { "zmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 },
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| 96 | { "zmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 },
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| 97 | { "zmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 },
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| 98 | { "stbp", 0x94080000, 0xfc080000, "r,xOA,X", 4 },
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| 99 | { "sthp", 0x94000001, 0xfc080001, "r,xOA,X", 4 },
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| 100 | { "stwp", 0x94000000, 0xfc080000, "r,xOA,X", 4 },
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| 101 | { "stdp", 0x94000002, 0xfc080002, "r,xOA,X", 4 },
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| 102 | { "lil", 0xf80b0000, 0xfc7f0000, "r,D", 4 },
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| 103 | { "lwsl1", 0xec000000, 0xfc080000, "r,xOA,X", 4 },
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| 104 | { "lwsl2", 0xfc000000, 0xfc080000, "r,xOA,X", 4 },
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| 105 | { "lwsl3", 0xfc080000, 0xfc080000, "r,xOA,X", 4 },
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| 106 |
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| 107 | { "lvb", 0xb0080000, 0xfc080000, "v,xOA,X", 4 },
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| 108 | { "lvh", 0xb0000001, 0xfc080001, "v,xOA,X", 4 },
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| 109 | { "lvw", 0xb0000000, 0xfc080000, "v,xOA,X", 4 },
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| 110 | { "lvd", 0xb0000002, 0xfc080002, "v,xOA,X", 4 },
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| 111 | { "liv", 0x3c040000, 0xfc0f0000, "v,R", 2 },
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| 112 | { "livf", 0x3c080000, 0xfc0f0000, "v,R", 2 },
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| 113 | { "stvb", 0xd0080000, 0xfc080000, "v,xOA,X", 4 },
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| 114 | { "stvh", 0xd0000001, 0xfc080001, "v,xOA,X", 4 },
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| 115 | { "stvw", 0xd0000000, 0xfc080000, "v,xOA,X", 4 },
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| 116 | { "stvd", 0xd0000002, 0xfc080002, "v,xOA,X", 4 },
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| 117 |
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| 118 | { "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 },
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| 119 | { "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 },
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| 120 | { "trnd", 0x2c0c0000, 0xfc0f0000, "r,R", 2 },
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| 121 | { "trabs", 0x2c010000, 0xfc0f0000, "r,R", 2 },
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| 122 | { "trabsd", 0x2c090000, 0xfc0f0000, "r,R", 2 },
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| 123 | { "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 },
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| 124 | { "xcr", 0x28040000, 0xfc0f0000, "r,R", 2 },
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| 125 | { "cxcr", 0x2c060000, 0xfc0f0000, "r,R", 2 },
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| 126 | { "cxcrd", 0x2c0e0000, 0xfc0f0000, "r,R", 2 },
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| 127 | { "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 },
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| 128 | { "trbr", 0x28030000, 0xfc0f0000, "b,R", 2 },
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| 129 | { "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 },
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| 130 | { "tbrbr", 0x28010000, 0xfc0f0000, "b,B", 2 },
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| 131 |
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| 132 | { "trvv", 0x28050000, 0xfc0f0000, "v,V", 2 },
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| 133 | { "trvvn", 0x2c050000, 0xfc0f0000, "v,V", 2 },
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| 134 | { "trvvnd", 0x2c0d0000, 0xfc0f0000, "v,V", 2 },
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| 135 | { "trvab", 0x2c070000, 0xfc0f0000, "v,V", 2 },
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| 136 | { "trvabd", 0x2c0f0000, 0xfc0f0000, "v,V", 2 },
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| 137 | { "cmpv", 0x14060000, 0xfc0f0000, "v,V", 2 },
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| 138 | { "expv", 0x14070000, 0xfc0f0000, "v,V", 2 },
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| 139 | { "mrvvlt", 0x10030000, 0xfc0f0000, "v,V", 2 },
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| 140 | { "mrvvle", 0x10040000, 0xfc0f0000, "v,V", 2 },
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| 141 | { "mrvvgt", 0x14030000, 0xfc0f0000, "v,V", 2 },
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| 142 | { "mrvvge", 0x14040000, 0xfc0f0000, "v,V", 2 },
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| 143 | { "mrvveq", 0x10050000, 0xfc0f0000, "v,V", 2 },
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| 144 | { "mrvvne", 0x10050000, 0xfc0f0000, "v,V", 2 },
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| 145 | { "mrvrlt", 0x100d0000, 0xfc0f0000, "v,R", 2 },
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| 146 | { "mrvrle", 0x100e0000, 0xfc0f0000, "v,R", 2 },
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| 147 | { "mrvrgt", 0x140d0000, 0xfc0f0000, "v,R", 2 },
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| 148 | { "mrvrge", 0x140e0000, 0xfc0f0000, "v,R", 2 },
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| 149 | { "mrvreq", 0x100f0000, 0xfc0f0000, "v,R", 2 },
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| 150 | { "mrvrne", 0x140f0000, 0xfc0f0000, "v,R", 2 },
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| 151 | { "trvr", 0x140b0000, 0xfc0f0000, "r,V", 2 },
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| 152 | { "trrv", 0x140c0000, 0xfc0f0000, "v,R", 2 },
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| 153 |
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| 154 | { "bu", 0x40000000, 0xff880000, "xOA,X", 4 },
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| 155 | { "bns", 0x70080000, 0xff880000, "xOA,X", 4 },
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| 156 | { "bnco", 0x70880000, 0xff880000, "xOA,X", 4 },
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| 157 | { "bge", 0x71080000, 0xff880000, "xOA,X", 4 },
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| 158 | { "bne", 0x71880000, 0xff880000, "xOA,X", 4 },
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| 159 | { "bunge", 0x72080000, 0xff880000, "xOA,X", 4 },
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| 160 | { "bunle", 0x72880000, 0xff880000, "xOA,X", 4 },
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| 161 | { "bgt", 0x73080000, 0xff880000, "xOA,X", 4 },
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| 162 | { "bnany", 0x73880000, 0xff880000, "xOA,X", 4 },
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| 163 | { "bs" , 0x70000000, 0xff880000, "xOA,X", 4 },
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| 164 | { "bco", 0x70800000, 0xff880000, "xOA,X", 4 },
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| 165 | { "blt", 0x71000000, 0xff880000, "xOA,X", 4 },
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| 166 | { "beq", 0x71800000, 0xff880000, "xOA,X", 4 },
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| 167 | { "buge", 0x72000000, 0xff880000, "xOA,X", 4 },
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| 168 | { "bult", 0x72800000, 0xff880000, "xOA,X", 4 },
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| 169 | { "ble", 0x73000000, 0xff880000, "xOA,X", 4 },
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| 170 | { "bany", 0x73800000, 0xff880000, "xOA,X", 4 },
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| 171 | { "brlnk", 0x44000000, 0xfc080000, "r,xOA,X", 4 },
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| 172 | { "bib", 0x48000000, 0xfc080000, "r,xOA,X", 4 },
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| 173 | { "bih", 0x48080000, 0xfc080000, "r,xOA,X", 4 },
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| 174 | { "biw", 0x4c000000, 0xfc080000, "r,xOA,X", 4 },
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| 175 | { "bid", 0x4c080000, 0xfc080000, "r,xOA,X", 4 },
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| 176 | { "bivb", 0x60000000, 0xfc080000, "r,xOA,X", 4 },
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| 177 | { "bivh", 0x60080000, 0xfc080000, "r,xOA,X", 4 },
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| 178 | { "bivw", 0x64000000, 0xfc080000, "r,xOA,X", 4 },
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| 179 | { "bivd", 0x64080000, 0xfc080000, "r,xOA,X", 4 },
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| 180 | { "bvsb", 0x68000000, 0xfc080000, "r,xOA,X", 4 },
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| 181 | { "bvsh", 0x68080000, 0xfc080000, "r,xOA,X", 4 },
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| 182 | { "bvsw", 0x6c000000, 0xfc080000, "r,xOA,X", 4 },
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| 183 | { "bvsd", 0x6c080000, 0xfc080000, "r,xOA,X", 4 },
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| 184 |
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| 185 | { "camb", 0x80080000, 0xfc080000, "r,xOA,X", 4 },
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| 186 | { "camh", 0x80000001, 0xfc080001, "r,xOA,X", 4 },
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| 187 | { "camw", 0x80000000, 0xfc080000, "r,xOA,X", 4 },
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| 188 | { "camd", 0x80000002, 0xfc080002, "r,xOA,X", 4 },
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| 189 | { "car", 0x10000000, 0xfc0f0000, "r,R", 2 },
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| 190 | { "card", 0x14000000, 0xfc0f0000, "r,R", 2 },
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| 191 | { "ci", 0xf8050000, 0xfc7f0000, "r,I", 4 },
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| 192 | { "chkbnd", 0x5c080000, 0xfc080000, "r,xOA,X", 4 },
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| 193 |
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| 194 | { "cavv", 0x10010000, 0xfc0f0000, "v,V", 2 },
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| 195 | { "cavr", 0x10020000, 0xfc0f0000, "v,R", 2 },
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| 196 | { "cavvd", 0x10090000, 0xfc0f0000, "v,V", 2 },
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| 197 | { "cavrd", 0x100b0000, 0xfc0f0000, "v,R", 2 },
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| 198 |
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| 199 | { "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 },
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| 200 | { "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 },
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| 201 | { "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 },
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| 202 | { "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 },
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| 203 | { "anr", 0x04000000, 0xfc0f0000, "r,R", 2 },
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| 204 | { "ani", 0xf8080000, 0xfc7f0000, "r,I", 4 },
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| 205 | { "ormb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 },
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| 206 | { "ormh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 },
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| 207 | { "ormw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 },
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| 208 | { "ormd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 },
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| 209 | { "orr", 0x08000000, 0xfc0f0000, "r,R", 2 },
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| 210 | { "oi", 0xf8090000, 0xfc7f0000, "r,I", 4 },
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| 211 | { "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 },
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| 212 | { "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 },
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| 213 | { "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 },
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| 214 | { "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 },
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| 215 | { "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 },
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| 216 | { "eoi", 0xf80a0000, 0xfc7f0000, "r,I", 4 },
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| 217 |
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| 218 | { "anvv", 0x04010000, 0xfc0f0000, "v,V", 2 },
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| 219 | { "anvr", 0x04020000, 0xfc0f0000, "v,R", 2 },
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| 220 | { "orvv", 0x08010000, 0xfc0f0000, "v,V", 2 },
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| 221 | { "orvr", 0x08020000, 0xfc0f0000, "v,R", 2 },
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| 222 | { "eovv", 0x0c010000, 0xfc0f0000, "v,V", 2 },
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| 223 | { "eovr", 0x0c020000, 0xfc0f0000, "v,R", 2 },
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| 224 |
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| 225 | { "sacz", 0x100c0000, 0xfc0f0000, "r,R", 2 },
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| 226 | { "sla", 0x1c400000, 0xfc600000, "r,S", 2 },
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| 227 | { "sll", 0x1c600000, 0xfc600000, "r,S", 2 },
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| 228 | { "slc", 0x24400000, 0xfc600000, "r,S", 2 },
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| 229 | { "slad", 0x20400000, 0xfc600000, "r,S", 2 },
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| 230 | { "slld", 0x20600000, 0xfc600000, "r,S", 2 },
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| 231 | { "sra", 0x1c000000, 0xfc600000, "r,S", 2 },
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| 232 | { "srl", 0x1c200000, 0xfc600000, "r,S", 2 },
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| 233 | { "src", 0x24000000, 0xfc600000, "r,S", 2 },
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| 234 | { "srad", 0x20000000, 0xfc600000, "r,S", 2 },
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| 235 | { "srld", 0x20200000, 0xfc600000, "r,S", 2 },
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| 236 | { "sda", 0x3c030000, 0xfc0f0000, "r,R", 2 },
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| 237 | { "sdl", 0x3c020000, 0xfc0f0000, "r,R", 2 },
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| 238 | { "sdc", 0x3c010000, 0xfc0f0000, "r,R", 2 },
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| 239 | { "sdad", 0x3c0b0000, 0xfc0f0000, "r,R", 2 },
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| 240 | { "sdld", 0x3c0a0000, 0xfc0f0000, "r,R", 2 },
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| 241 |
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| 242 | { "svda", 0x3c070000, 0xfc0f0000, "v,R", 2 },
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| 243 | { "svdl", 0x3c060000, 0xfc0f0000, "v,R", 2 },
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| 244 | { "svdc", 0x3c050000, 0xfc0f0000, "v,R", 2 },
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| 245 | { "svdad", 0x3c0e0000, 0xfc0f0000, "v,R", 2 },
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| 246 | { "svdld", 0x3c0d0000, 0xfc0f0000, "v,R", 2 },
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| 247 |
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| 248 | { "sbm", 0xac080000, 0xfc080000, "f,xOA,X", 4 },
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| 249 | { "zbm", 0xac000000, 0xfc080000, "f,xOA,X", 4 },
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| 250 | { "tbm", 0xa8080000, 0xfc080000, "f,xOA,X", 4 },
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| 251 | { "incmb", 0xa0000000, 0xfc080000, "xOA,X", 4 },
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| 252 | { "incmh", 0xa0080000, 0xfc080000, "xOA,X", 4 },
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| 253 | { "incmw", 0xa4000000, 0xfc080000, "xOA,X", 4 },
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| 254 | { "incmd", 0xa4080000, 0xfc080000, "xOA,X", 4 },
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| 255 | { "sbmd", 0x7c080000, 0xfc080000, "r,xOA,X", 4 },
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| 256 | { "zbmd", 0x7c000000, 0xfc080000, "r,xOA,X", 4 },
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|---|
| 257 | { "tbmd", 0x78080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 258 |
|
|---|
| 259 | { "ssm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 },
|
|---|
| 260 | { "zsm", 0x9c000000, 0xfc080000, "f,xOA,X", 4 },
|
|---|
| 261 | { "tsm", 0x98080000, 0xfc080000, "f,xOA,X", 4 },
|
|---|
| 262 |
|
|---|
| 263 | { "admb", 0xc8080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 264 | { "admh", 0xc8000001, 0xfc080001, "r,xOA,X", 4 },
|
|---|
| 265 | { "admw", 0xc8000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 266 | { "admd", 0xc8000002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 267 | { "adr", 0x38000000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 268 | { "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 269 | { "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 },
|
|---|
| 270 | { "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 271 | { "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 272 | { "adi", 0xf8010000, 0xfc0f0000, "r,I", 4 },
|
|---|
| 273 | { "sumb", 0xcc080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 274 | { "sumh", 0xcc000001, 0xfc080001, "r,xOA,X", 4 },
|
|---|
| 275 | { "sumw", 0xcc000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 276 | { "sumd", 0xcc000002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 277 | { "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 278 | { "sui", 0xf8020000, 0xfc0f0000, "r,I", 4 },
|
|---|
| 279 | { "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 280 | { "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 },
|
|---|
| 281 | { "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 282 | { "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 283 | { "mprd", 0x3c0f0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 284 | { "mpi", 0xf8030000, 0xfc0f0000, "r,I", 4 },
|
|---|
| 285 | { "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 286 | { "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 },
|
|---|
| 287 | { "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 288 | { "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 289 | { "dvi", 0xf8040000, 0xfc0f0000, "r,I", 4 },
|
|---|
| 290 | { "exs", 0x38080000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 291 |
|
|---|
| 292 | { "advv", 0x30000000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 293 | { "advvd", 0x30080000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 294 | { "adrv", 0x34000000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 295 | { "adrvd", 0x34080000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 296 | { "suvv", 0x30010000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 297 | { "suvvd", 0x30090000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 298 | { "surv", 0x34010000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 299 | { "survd", 0x34090000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 300 | { "mpvv", 0x30020000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 301 | { "mprv", 0x34020000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 302 |
|
|---|
| 303 | { "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 304 | { "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 305 | { "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 306 | { "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 307 | { "surfw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 308 | { "surfd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 309 | { "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 310 | { "surfd", 0x380b0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 311 | { "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 312 | { "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 313 | { "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 314 | { "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 315 | { "rfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 },
|
|---|
| 316 | { "rfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 },
|
|---|
| 317 | { "rrfw", 0x0c0e0000, 0xfc0f0000, "r", 2 },
|
|---|
| 318 | { "rrfd", 0x0c0f0000, 0xfc0f0000, "r", 2 },
|
|---|
| 319 |
|
|---|
| 320 | { "advvfw", 0x30040000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 321 | { "advvfd", 0x300c0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 322 | { "adrvfw", 0x34040000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 323 | { "adrvfd", 0x340c0000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 324 | { "suvvfw", 0x30050000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 325 | { "suvvfd", 0x300d0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 326 | { "survfw", 0x34050000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 327 | { "survfd", 0x340d0000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 328 | { "mpvvfw", 0x30060000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 329 | { "mpvvfd", 0x300e0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 330 | { "mprvfw", 0x34060000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 331 | { "mprvfd", 0x340e0000, 0xfc0f0000, "v,R", 2 },
|
|---|
| 332 | { "rvfw", 0x30070000, 0xfc0f0000, "v", 2 },
|
|---|
| 333 | { "rvfd", 0x300f0000, 0xfc0f0000, "v", 2 },
|
|---|
| 334 |
|
|---|
| 335 | { "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 336 | { "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 337 | { "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 338 | { "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 339 | { "cfpds", 0x3c090000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 340 |
|
|---|
| 341 | { "fltvw", 0x080d0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 342 | { "fltvd", 0x080f0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 343 | { "fixvw", 0x080c0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 344 | { "fixvd", 0x080e0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 345 | { "cfpvds", 0x0c0d0000, 0xfc0f0000, "v,V", 2 },
|
|---|
| 346 |
|
|---|
| 347 | { "orvrn", 0x000a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 348 | { "andvrn", 0x00080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 349 | { "frsteq", 0x04090000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 350 | { "sigma", 0x0c080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 351 | { "sigmad", 0x0c0a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 352 | { "sigmf", 0x08080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 353 | { "sigmfd", 0x080a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 354 | { "prodf", 0x04080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 355 | { "prodfd", 0x040a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 356 | { "maxv", 0x10080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 357 | { "maxvd", 0x100a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 358 | { "minv", 0x14080000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 359 | { "minvd", 0x140a0000, 0xfc0f0000, "r,V", 2 },
|
|---|
| 360 |
|
|---|
| 361 | { "lpsd", 0xf0000000, 0xfc080000, "xOA,X", 4 },
|
|---|
| 362 | { "ldc", 0xf0080000, 0xfc080000, "xOA,X", 4 },
|
|---|
| 363 | { "spm", 0x040c0000, 0xfc0f0000, "r", 2 },
|
|---|
| 364 | { "rpm", 0x040d0000, 0xfc0f0000, "r", 2 },
|
|---|
| 365 | { "tritr", 0x00070000, 0xfc0f0000, "r", 2 },
|
|---|
| 366 | { "trrit", 0x00060000, 0xfc0f0000, "r", 2 },
|
|---|
| 367 | { "rpswt", 0x04080000, 0xfc0f0000, "r", 2 },
|
|---|
| 368 | { "exr", 0xf8070000, 0xfc0f0000, "", 4 },
|
|---|
| 369 | { "halt", 0x00000000, 0xfc0f0000, "", 2 },
|
|---|
| 370 | { "wait", 0x00010000, 0xfc0f0000, "", 2 },
|
|---|
| 371 | { "nop", 0x00020000, 0xfc0f0000, "", 2 },
|
|---|
| 372 | { "eiae", 0x00030000, 0xfc0f0000, "", 2 },
|
|---|
| 373 | { "efae", 0x000d0000, 0xfc0f0000, "", 2 },
|
|---|
| 374 | { "diae", 0x000e0000, 0xfc0f0000, "", 2 },
|
|---|
| 375 | { "dfae", 0x000f0000, 0xfc0f0000, "", 2 },
|
|---|
| 376 | { "spvc", 0xf8060000, 0xfc0f0000, "r,T,N", 4 },
|
|---|
| 377 | { "rdsts", 0x00090000, 0xfc0f0000, "r", 2 },
|
|---|
| 378 | { "setcpu", 0x000c0000, 0xfc0f0000, "r", 2 },
|
|---|
| 379 | { "cmc", 0x000b0000, 0xfc0f0000, "r", 2 },
|
|---|
| 380 | { "trrcu", 0x00040000, 0xfc0f0000, "r", 2 },
|
|---|
| 381 | { "attnio", 0x00050000, 0xfc0f0000, "", 2 },
|
|---|
| 382 | { "fudit", 0x28080000, 0xfc0f0000, "", 2 },
|
|---|
| 383 | { "break", 0x28090000, 0xfc0f0000, "", 2 },
|
|---|
| 384 | { "frzss", 0x280a0000, 0xfc0f0000, "", 2 },
|
|---|
| 385 | { "ripi", 0x04040000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 386 | { "xcp", 0x04050000, 0xfc0f0000, "r", 2 },
|
|---|
| 387 | { "block", 0x04060000, 0xfc0f0000, "", 2 },
|
|---|
| 388 | { "unblock", 0x04070000, 0xfc0f0000, "", 2 },
|
|---|
| 389 | { "trsc", 0x08060000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 390 | { "tscr", 0x08070000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 391 | { "fq", 0x04080000, 0xfc0f0000, "r", 2 },
|
|---|
| 392 | { "flupte", 0x2c080000, 0xfc0f0000, "r", 2 },
|
|---|
| 393 | { "rviu", 0x040f0000, 0xfc0f0000, "", 2 },
|
|---|
| 394 | { "ldel", 0x280c0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 395 | { "ldu", 0x280d0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 396 | { "stdecc", 0x280b0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 397 | { "trpc", 0x08040000, 0xfc0f0000, "r", 2 },
|
|---|
| 398 | { "tpcr", 0x08050000, 0xfc0f0000, "r", 2 },
|
|---|
| 399 | { "ghalt", 0x0c050000, 0xfc0f0000, "r", 2 },
|
|---|
| 400 | { "grun", 0x0c040000, 0xfc0f0000, "", 2 },
|
|---|
| 401 | { "tmpr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 402 | { "trmp", 0x2c0b0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 403 |
|
|---|
| 404 | { "trrve", 0x28060000, 0xfc0f0000, "r", 2 },
|
|---|
| 405 | { "trver", 0x28070000, 0xfc0f0000, "r", 2 },
|
|---|
| 406 | { "trvlr", 0x280f0000, 0xfc0f0000, "r", 2 },
|
|---|
| 407 |
|
|---|
| 408 | { "linkfl", 0x18000000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 409 | { "linkbl", 0x18020000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 410 | { "linkfp", 0x18010000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 411 | { "linkbp", 0x18030000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 412 | { "linkpl", 0x18040000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 413 | { "ulinkl", 0x18080000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 414 | { "ulinkp", 0x18090000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 415 | { "ulinktl", 0x180a0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 416 | { "ulinktp", 0x180b0000, 0xfc0f0000, "r,R", 2 },
|
|---|
| 417 | };
|
|---|
| 418 |
|
|---|
| 419 | int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
|
|---|
| 420 |
|
|---|
| 421 | struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
|
|---|
| 422 | sizeof(gld_opcodes[0]);
|
|---|
