| 1 | /* coff information for Renesas SH
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| 2 |
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| 3 | Copyright 2001, 2003 Free Software Foundation, Inc.
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| 4 |
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| 5 | This program is free software; you can redistribute it and/or modify
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| 6 | it under the terms of the GNU General Public License as published by
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| 7 | the Free Software Foundation; either version 2 of the License, or
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| 8 | (at your option) any later version.
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| 9 |
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| 10 | This program is distributed in the hope that it will be useful,
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | GNU General Public License for more details.
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| 14 |
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| 15 | You should have received a copy of the GNU General Public License
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| 16 | along with this program; if not, write to the Free Software
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| 17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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| 18 |
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| 19 | #ifdef COFF_WITH_PE
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| 20 | #define L_LNNO_SIZE 2
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| 21 | #else
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| 22 | #define L_LNNO_SIZE 4
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| 23 | #endif
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| 24 | #define INCLUDE_COMDAT_FIELDS_IN_AUXENT
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| 25 | #include "coff/external.h"
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| 26 |
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| 27 | #define SH_ARCH_MAGIC_BIG 0x0500
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| 28 | #define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */
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| 29 | #define SH_ARCH_MAGIC_WINCE 0x01a2 /* Windows CE - little endian */
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| 30 | #define SH_PE_MAGIC 0x010b
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| 31 |
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| 32 | #define SHBADMAG(x) \
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| 33 | (((x).f_magic != SH_ARCH_MAGIC_BIG) && \
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| 34 | ((x).f_magic != SH_ARCH_MAGIC_WINCE) && \
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| 35 | ((x).f_magic != SH_ARCH_MAGIC_LITTLE))
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| 36 |
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| 37 | /* Define some NT default values. */
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| 38 | /* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
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| 39 | #define NT_SECTION_ALIGNMENT 0x1000
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| 40 | #define NT_FILE_ALIGNMENT 0x200
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| 41 | #define NT_DEF_RESERVE 0x100000
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| 42 | #define NT_DEF_COMMIT 0x1000
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| 43 |
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| 44 | /********************** RELOCATION DIRECTIVES **********************/
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| 45 |
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| 46 | /* The external reloc has an offset field, because some of the reloc
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| 47 | types on the h8 don't have room in the instruction for the entire
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| 48 | offset - eg the strange jump and high page addressing modes. */
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| 49 |
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| 50 | #ifndef COFF_WITH_PE
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| 51 | struct external_reloc
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| 52 | {
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| 53 | char r_vaddr[4];
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| 54 | char r_symndx[4];
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| 55 | char r_offset[4];
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| 56 | char r_type[2];
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| 57 | char r_stuff[2];
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| 58 | };
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| 59 | #else
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| 60 | struct external_reloc
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| 61 | {
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| 62 | char r_vaddr[4];
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| 63 | char r_symndx[4];
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| 64 | char r_type[2];
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| 65 | };
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| 66 | #endif
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| 67 |
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| 68 | #define RELOC struct external_reloc
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| 69 | #ifdef COFF_WITH_PE
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| 70 | #define RELSZ 10
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| 71 | #else
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| 72 | #define RELSZ 16
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| 73 | #endif
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| 74 |
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| 75 | /* SH relocation types. Not all of these are actually used. */
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| 76 |
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| 77 | #define R_SH_UNUSED 0 /* only used internally */
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| 78 | #define R_SH_IMM32CE 2 /* 32 bit immediate for WinCE */
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| 79 | #define R_SH_PCREL8 3 /* 8 bit pcrel */
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| 80 | #define R_SH_PCREL16 4 /* 16 bit pcrel */
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| 81 | #define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */
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| 82 | #define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */
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| 83 | #define R_SH_IMM24 6 /* 24 bit immediate */
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| 84 | #define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */
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| 85 | #define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */
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| 86 | #define R_SH_PCDISP8 11 /* 8 bit branch */
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| 87 | #define R_SH_PCDISP 12 /* 12 bit branch */
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| 88 | #define R_SH_IMM32 14 /* 32 bit immediate */
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| 89 | #define R_SH_IMM8 16 /* 8 bit immediate */
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| 90 | #define R_SH_IMAGEBASE 16 /* Windows CE */
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| 91 | #define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */
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| 92 | #define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */
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| 93 | #define R_SH_IMM4 19 /* 4 bit immediate */
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| 94 | #define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */
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| 95 | #define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */
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| 96 | #define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */
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| 97 | #define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */
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| 98 | #define R_SH_IMM16 24 /* 16 bit immediate */
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| 99 |
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| 100 | /* The switch table reloc types are used for relaxing. They are
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| 101 | generated for expressions such as
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| 102 | .word L1 - L2
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| 103 | The r_offset field holds the difference between the reloc address
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| 104 | and L2. */
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| 105 | #define R_SH_SWITCH8 33 /* 8 bit switch table entry */
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| 106 | #define R_SH_SWITCH16 25 /* 16 bit switch table entry */
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| 107 | #define R_SH_SWITCH32 26 /* 32 bit switch table entry */
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| 108 |
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| 109 | /* The USES reloc type is used for relaxing. The compiler will
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| 110 | generate .uses pseudo-ops when it finds a function call which it
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| 111 | can relax. The r_offset field of the USES reloc holds the PC
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| 112 | relative offset to the instruction which loads the register used in
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| 113 | the function call. */
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| 114 | #define R_SH_USES 27 /* .uses pseudo-op */
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| 115 |
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| 116 | /* The COUNT reloc type is used for relaxing. The assembler will
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| 117 | generate COUNT relocs for addresses referred to by the register
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| 118 | loads associated with USES relocs. The r_offset field of the COUNT
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| 119 | reloc holds the number of times the address is referenced in the
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| 120 | object file. */
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| 121 | #define R_SH_COUNT 28 /* Count of constant pool uses */
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| 122 |
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| 123 | /* The ALIGN reloc type is used for relaxing. The r_offset field is
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| 124 | the power of two to which subsequent portions of the object file
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| 125 | must be aligned. */
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| 126 | #define R_SH_ALIGN 29 /* .align pseudo-op */
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| 127 |
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| 128 | /* The CODE and DATA reloc types are used for aligning load and store
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| 129 | instructions. The assembler will generate a CODE reloc before a
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| 130 | block of instructions. It will generate a DATA reloc before data.
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| 131 | A section should be processed assuming it contains data, unless a
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| 132 | CODE reloc is seen. The only relevant pieces of information in the
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| 133 | CODE and DATA relocs are the section and the address. The symbol
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| 134 | and offset are meaningless. */
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| 135 | #define R_SH_CODE 30 /* start of code */
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| 136 | #define R_SH_DATA 31 /* start of data */
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| 137 |
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| 138 | /* The LABEL reloc type is used for aligning load and store
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| 139 | instructions. The assembler will generate a LABEL reloc for each
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| 140 | label within a block of instructions. This permits the linker to
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| 141 | avoid swapping instructions which are the targets of branches. */
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| 142 | #define R_SH_LABEL 32 /* label */
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| 143 |
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| 144 | /* NB: R_SH_SWITCH8 is 33 */
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| 145 |
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| 146 | #define R_SH_LOOP_START 34
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| 147 | #define R_SH_LOOP_END 35
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