| 1 | /* ARM COFF support for BFD.
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| 2 | Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
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| 3 |
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| 4 | This file is part of BFD, the Binary File Descriptor library.
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| 5 |
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| 6 | This program is free software; you can redistribute it and/or modify
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| 7 | it under the terms of the GNU General Public License as published by
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| 8 | the Free Software Foundation; either version 2 of the License, or
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| 9 | (at your option) any later version.
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| 10 |
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| 11 | This program is distributed in the hope that it will be useful,
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| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 14 | GNU General Public License for more details.
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| 15 |
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| 16 | You should have received a copy of the GNU General Public License
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| 17 | along with this program; if not, write to the Free Software Foundation,
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| 18 | Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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| 19 |
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| 20 | #define COFFARM 1
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| 21 |
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| 22 | #define L_LNNO_SIZE 2
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| 23 | #define INCLUDE_COMDAT_FIELDS_IN_AUXENT
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| 24 | #include "coff/external.h"
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| 25 |
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| 26 | /* Bits for f_flags:
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| 27 | F_RELFLG relocation info stripped from file
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| 28 | F_EXEC file is executable (no unresolved external references)
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| 29 | F_LNNO line numbers stripped from file
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| 30 | F_LSYMS local symbols stripped from file
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| 31 | F_INTERWORK file supports switching between ARM and Thumb instruction sets
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| 32 | F_INTERWORK_SET the F_INTERWORK bit is valid
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| 33 | F_APCS_FLOAT code passes float arguments in float registers
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| 34 | F_PIC code is reentrant/position-independent
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| 35 | F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax)
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| 36 | F_APCS_26 file uses 26 bit ARM Procedure Calling Standard
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| 37 | F_APCS_SET the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised
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| 38 | F_SOFT_FLOAT code does not use floating point instructions. */
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| 39 |
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| 40 | #define F_RELFLG (0x0001)
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| 41 | #define F_EXEC (0x0002)
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| 42 | #define F_LNNO (0x0004)
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| 43 | #define F_LSYMS (0x0008)
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| 44 | #define F_INTERWORK (0x0010)
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| 45 | #define F_INTERWORK_SET (0x0020)
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| 46 | #define F_APCS_FLOAT (0x0040)
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| 47 | #undef F_AR16WR
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| 48 | #define F_PIC (0x0080)
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| 49 | #define F_AR32WR (0x0100)
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| 50 | #define F_APCS_26 (0x0400)
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| 51 | #define F_APCS_SET (0x0800)
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| 52 | #define F_SOFT_FLOAT (0x2000)
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| 53 | #define F_VFP_FLOAT (0x4000)
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| 54 |
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| 55 | /* Bits stored in flags field of the internal_f structure */
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| 56 |
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| 57 | #define F_INTERWORK (0x0010)
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| 58 | #define F_APCS_FLOAT (0x0040)
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| 59 | #define F_PIC (0x0080)
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| 60 | #define F_APCS26 (0x1000)
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| 61 | #define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400)
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| 62 | #define F_ARM_2 (0x0400)
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| 63 | #define F_ARM_2a (0x0800)
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| 64 | #define F_ARM_3 (0x0c00)
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| 65 | #define F_ARM_3M (0x4000)
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| 66 | #define F_ARM_4 (0x4400)
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| 67 | #define F_ARM_4T (0x4800)
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| 68 | #define F_ARM_5 (0x4c00)
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| 69 |
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| 70 | /*
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| 71 | ARMMAGIC ought to encoded the procesor type,
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| 72 | but it is too late to change it now, instead
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| 73 | the flags field of the internal_f structure
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| 74 | is used as shown above.
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| 75 |
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| 76 | XXX - NC 5/6/97. */
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| 77 |
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| 78 | #define ARMMAGIC 0xa00 /* I just made this up */
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| 79 |
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| 80 | #define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
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| 81 |
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| 82 | #define ARMPEMAGIC 0x1c0
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| 83 | #define THUMBPEMAGIC 0x1c2
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| 84 |
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| 85 | #undef ARMBADMAG
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| 86 | #define ARMBADMAG(x) (((x).f_magic != ARMMAGIC) && ((x).f_magic != ARMPEMAGIC) && ((x).f_magic != THUMBPEMAGIC))
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| 87 |
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| 88 | #define OMAGIC 0404 /* object files, eg as output */
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| 89 | #define ZMAGIC 0413 /* demand load format, eg normal ld output */
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| 90 | #define STMAGIC 0401 /* target shlib */
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| 91 | #define SHMAGIC 0443 /* host shlib */
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| 92 |
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| 93 | /* define some NT default values */
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| 94 | /* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
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| 95 | #define NT_SECTION_ALIGNMENT 0x1000
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| 96 | #define NT_FILE_ALIGNMENT 0x200
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| 97 | #define NT_DEF_RESERVE 0x100000
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| 98 | #define NT_DEF_COMMIT 0x1000
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| 99 |
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| 100 | /* We use the .rdata section to hold read only data. */
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| 101 | #define _LIT ".rdata"
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| 102 |
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| 103 | /********************** RELOCATION DIRECTIVES **********************/
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| 104 | #ifdef ARM_WINCE
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| 105 | struct external_reloc
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| 106 | {
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| 107 | char r_vaddr[4];
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| 108 | char r_symndx[4];
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| 109 | char r_type[2];
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| 110 | };
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| 111 |
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| 112 | #define RELOC struct external_reloc
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| 113 | #define RELSZ 10
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| 114 |
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| 115 | #else
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| 116 | struct external_reloc
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| 117 | {
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| 118 | char r_vaddr[4];
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| 119 | char r_symndx[4];
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| 120 | char r_type[2];
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| 121 | char r_offset[4];
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| 122 | };
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| 123 |
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| 124 | #define RELOC struct external_reloc
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| 125 | #define RELSZ 14
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| 126 | #endif
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| 127 |
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| 128 | #define ARM_NOTE_SECTION ".note"
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