1 | @c Copyright (C) 2001, 2002 Free Software Foundation, Inc.
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2 | @c This is part of the GAS manual.
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3 | @c For copying conditions, see the file as.texinfo.
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4 | @page
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5 | @node SH64-Dependent
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6 | @chapter SuperH SH64 Dependent Features
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7 |
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8 | @cindex SH64 support
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9 | @menu
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10 | * SH64 Options:: Options
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11 | * SH64 Syntax:: Syntax
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12 | * SH64 Directives:: SH64 Machine Directives
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13 | * SH64 Opcodes:: Opcodes
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14 | @end menu
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15 |
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16 | @node SH64 Options
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17 | @section Options
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18 |
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19 | @cindex SH64 options
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20 | @cindex options, SH64
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21 | @table @code
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22 |
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23 | @cindex SH64 ISA options
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24 | @cindex ISA options, SH64
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25 | @item -isa=shmedia | -isa=shcompact
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26 | Specify the default instruction set. @code{SHmedia} specifies the
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27 | 32-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
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28 | compatible with previous SH families. The default depends on the ABI
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29 | selected; the default for the 64-bit ABI is SHmedia, and the default for
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30 | the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
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31 | specified, the default is 32-bit SHcompact.
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32 |
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33 | Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
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34 | specified on the command line.
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35 |
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36 | @cindex SH64 ABI options
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37 | @cindex ABI options, SH64
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38 | @item -abi=32 | -abi=64
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39 | Specify the default ABI. If the ISA is specified and the ABI is not,
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40 | the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
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41 | and SHcompact defaulting to 32-bit.
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42 |
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43 | Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
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44 | specified on the command line. When the ABI is specified on the command
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45 | line, any @code{.abi} pseudo-ops in the source must match it.
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46 |
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47 | @item -shcompact-const-crange
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48 | Emit code-range descriptors for constants in SHcompact code sections.
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49 |
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50 | @item -no-mix
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51 | Disallow SHmedia code in the same section as constants and SHcompact
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52 | code.
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53 |
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54 | @item -no-expand
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55 | Do not expand MOVI, PT, PTA or PTB instructions.
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56 |
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57 | @item -expand-pt32
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58 | With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
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59 |
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60 | @end table
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61 |
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62 | @node SH64 Syntax
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63 | @section Syntax
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64 |
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65 | @menu
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66 | * SH64-Chars:: Special Characters
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67 | * SH64-Regs:: Register Names
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68 | * SH64-Addressing:: Addressing Modes
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69 | @end menu
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70 |
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71 | @node SH64-Chars
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72 | @subsection Special Characters
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73 |
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74 | @cindex line comment character, SH64
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75 | @cindex SH64 line comment character
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76 | @samp{!} is the line comment character.
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77 |
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78 | @cindex line separator, SH64
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79 | @cindex statement separator, SH64
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80 | @cindex SH64 line separator
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81 | You can use @samp{;} instead of a newline to separate statements.
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82 |
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83 | @cindex symbol names, @samp{$} in
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84 | @cindex @code{$} in symbol names
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85 | Since @samp{$} has no special meaning, you may use it in symbol names.
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86 |
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87 | @node SH64-Regs
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88 | @subsection Register Names
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89 |
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90 | @cindex SH64 registers
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91 | @cindex registers, SH64
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92 | You can use the predefined symbols @samp{r0} through @samp{r63} to refer
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93 | to the SH64 general registers, @samp{cr0} through @code{cr63} for
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94 | control registers, @samp{tr0} through @samp{tr7} for target address
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95 | registers, @samp{fr0} through @samp{fr63} for single-precision floating
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96 | point registers, @samp{dr0} through @samp{dr62} (even numbered registers
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97 | only) for double-precision floating point registers, @samp{fv0} through
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98 | @samp{fv60} (multiples of four only) for single-precision floating point
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99 | vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
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100 | for single-precision floating point pairs, @samp{mtrx0} through
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101 | @samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
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102 | single-precision floating point registers, @samp{pc} for the program
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103 | counter, and @samp{fpscr} for the floating point status and control
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104 | register.
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105 |
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106 | You can also refer to the control registers by the mnemonics @samp{sr},
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107 | @samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
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108 | @samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
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109 | @samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
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110 | @samp{usr}.
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111 |
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112 | @node SH64-Addressing
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113 | @subsection Addressing Modes
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114 |
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115 | @cindex addressing modes, SH64
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116 | @cindex SH64 addressing modes
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117 |
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118 | SH64 operands consist of either a register or immediate value. The
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119 | immediate value can be a constant or label reference (or portion of a
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120 | label reference), as in this example:
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121 |
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122 | @example
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123 | movi 4,r2
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124 | pt function, tr4
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125 | movi (function >> 16) & 65535,r0
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126 | shori function & 65535, r0
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127 | ld.l r0,4,r0
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128 | @end example
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129 |
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130 | @cindex datalabel, SH64
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131 | Instruction label references can reference labels in either SHmedia or
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132 | SHcompact. To differentiate between the two, labels in SHmedia sections
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133 | will always have the least significant bit set (i.e. they will be odd),
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134 | which SHcompact labels will have the least significant bit reset
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135 | (i.e. they will be even). If you need to reference the actual address
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136 | of a label, you can use the @code{datalabel} modifier, as in this
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137 | example:
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138 |
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139 | @example
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140 | .long function
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141 | .long datalabel function
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142 | @end example
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143 |
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144 | In that example, the first longword may or may not have the least
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145 | significant bit set depending on whether the label is an SHmedia label
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146 | or an SHcompact label. The second longword will be the actual address
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147 | of the label, regardless of what type of label it is.
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148 |
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149 | @node SH64 Directives
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150 | @section SH64 Machine Directives
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151 |
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152 | In addition to the SH directives, the SH64 provides the following
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153 | directives:
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154 |
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155 | @cindex SH64 machine directives
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156 | @cindex machine directives, SH64
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157 |
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158 | @table @code
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159 |
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160 | @item .mode [shmedia|shcompact]
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161 | @itemx .isa [shmedia|shcompact]
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162 | Specify the ISA for the following instructions (the two directives are
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163 | equivalent). Note that programs such as @code{objdump} rely on symbolic
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164 | labels to determine when such mode switches occur (by checking the least
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165 | significant bit of the label's address), so such mode/isa changes should
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166 | always be followed by a label (in practice, this is true anyway). Note
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167 | that you cannot use these directives if you didn't specify an ISA on the
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168 | command line.
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169 |
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170 | @item .abi [32|64]
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171 | Specify the ABI for the following instructions. Note that you cannot use
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172 | this directive unless you specified an ABI on the command line, and the
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173 | ABIs specified must match.
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174 |
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175 | @item .uaquad
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176 | Like .uaword and .ualong, this allows you to specify an intenionally
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177 | unaligned quadword (64 bit word).
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178 |
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179 | @end table
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180 |
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181 | @node SH64 Opcodes
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182 | @section Opcodes
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183 |
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184 | @cindex SH64 opcode summary
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185 | @cindex opcode summary, SH64
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186 | @cindex mnemonics, SH64
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187 | @cindex instruction summary, SH64
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188 | For detailed information on the SH64 machine instruction set, see
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189 | @cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
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190 |
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191 | @code{@value{AS}} implements all the standard SH64 opcodes. In
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192 | addition, the following pseudo-opcodes may be expanded into one or more
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193 | alternate opcodes:
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194 |
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195 | @table @code
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196 |
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197 | @item movi
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198 | If the value doesn't fit into a standard @code{movi} opcode,
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199 | @code{@value{AS}} will replace the @code{movi} with a sequence of
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200 | @code{movi} and @code{shori} opcodes.
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201 |
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202 | @item pt
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203 | This expands to a sequence of @code{movi} and @code{shori} opcode,
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204 | followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
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205 | opcode, depending on the label referenced.
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206 |
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207 | @end table
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