| 1 | @c Copyright 2001 Free Software Foundation, Inc.
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| 2 | @c This is part of the GAS manual.
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| 3 | @c For copying conditions, see the file as.texinfo.
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| 4 | @ifset GENERIC
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| 5 | @page
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| 6 | @node PDP-11-Dependent
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| 7 | @chapter PDP-11 Dependent Features
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| 8 | @end ifset
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| 9 | @ifclear GENERIC
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| 10 | @node Machine Dependencies
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| 11 | @chapter PDP-11 Dependent Features
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| 12 | @end ifclear
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| 13 |
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| 14 | @cindex PDP-11 support
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| 15 |
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| 16 | @menu
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| 17 | * PDP-11-Options:: Options
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| 18 | * PDP-11-Pseudos:: Assembler Directives
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| 19 | * PDP-11-Syntax:: DEC Syntax versus BSD Syntax
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| 20 | * PDP-11-Mnemonics:: Instruction Naming
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| 21 | * PDP-11-Synthetic:: Synthetic Instructions
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| 22 | @end menu
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| 23 |
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| 24 | @node PDP-11-Options
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| 25 | @section Options
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| 26 |
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| 27 | @cindex options for PDP-11
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| 28 |
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| 29 | The PDP-11 version of @code{@value{AS}} has a rich set of machine
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| 30 | dependent options.
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| 31 |
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| 32 | @subsection Code Generation Options
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| 33 |
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| 34 | @table @code
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| 35 | @cindex -mpic
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| 36 | @cindex -mno-pic
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| 37 | @item -mpic | -mno-pic
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| 38 | Generate position-independent (or position-dependent) code.
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| 39 |
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| 40 | The default is to generate position-independent code.
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| 41 | @end table
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| 42 |
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| 43 | @subsection Instruction Set Extension Options
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| 44 |
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| 45 | These options enables or disables the use of extensions over the base
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| 46 | line instruction set as introduced by the first PDP-11 CPU: the KA11.
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| 47 | Most options come in two variants: a @code{-m}@var{extension} that
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| 48 | enables @var{extension}, and a @code{-mno-}@var{extension} that disables
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| 49 | @var{extension}.
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| 50 |
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| 51 | The default is to enable all extensions.
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| 52 |
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| 53 | @table @code
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| 54 | @cindex -mall
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| 55 | @cindex -mall-extensions
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| 56 | @item -mall | -mall-extensions
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| 57 | Enable all instruction set extensions.
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| 58 |
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| 59 | @cindex -mno-extensions
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| 60 | @item -mno-extensions
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| 61 | Disable all instruction set extensions.
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| 62 |
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| 63 | @cindex -mcis
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| 64 | @cindex -mno-cis
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| 65 | @item -mcis | -mno-cis
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| 66 | Enable (or disable) the use of the commercial instruction set, which
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| 67 | consists of these instructions: @code{ADDNI}, @code{ADDN}, @code{ADDPI},
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| 68 | @code{ADDP}, @code{ASHNI}, @code{ASHN}, @code{ASHPI}, @code{ASHP},
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| 69 | @code{CMPCI}, @code{CMPC}, @code{CMPNI}, @code{CMPN}, @code{CMPPI},
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| 70 | @code{CMPP}, @code{CVTLNI}, @code{CVTLN}, @code{CVTLPI}, @code{CVTLP},
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| 71 | @code{CVTNLI}, @code{CVTNL}, @code{CVTNPI}, @code{CVTNP}, @code{CVTPLI},
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| 72 | @code{CVTPL}, @code{CVTPNI}, @code{CVTPN}, @code{DIVPI}, @code{DIVP},
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| 73 | @code{L2DR}, @code{L3DR}, @code{LOCCI}, @code{LOCC}, @code{MATCI},
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| 74 | @code{MATC}, @code{MOVCI}, @code{MOVC}, @code{MOVRCI}, @code{MOVRC},
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| 75 | @code{MOVTCI}, @code{MOVTC}, @code{MULPI}, @code{MULP}, @code{SCANCI},
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| 76 | @code{SCANC}, @code{SKPCI}, @code{SKPC}, @code{SPANCI}, @code{SPANC},
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| 77 | @code{SUBNI}, @code{SUBN}, @code{SUBPI}, and @code{SUBP}.
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| 78 |
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| 79 | @cindex -mcsm
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| 80 | @cindex -mno-csm
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| 81 | @item -mcsm | -mno-csm
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| 82 | Enable (or disable) the use of the @code{CSM} instruction.
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| 83 |
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| 84 | @cindex -meis
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| 85 | @cindex -mno-eis
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| 86 | @item -meis | -mno-eis
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| 87 | Enable (or disable) the use of the extended instruction set, which
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| 88 | consists of these instructions: @code{ASHC}, @code{ASH}, @code{DIV},
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| 89 | @code{MARK}, @code{MUL}, @code{RTT}, @code{SOB} @code{SXT}, and
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| 90 | @code{XOR}.
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| 91 |
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| 92 | @cindex -mfis
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| 93 | @cindex -mno-fis
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| 94 | @cindex -mkev11
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| 95 | @cindex -mkev11
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| 96 | @cindex -mno-kev11
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| 97 | @item -mfis | -mkev11
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| 98 | @itemx -mno-fis | -mno-kev11
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| 99 | Enable (or disable) the use of the KEV11 floating-point instructions:
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| 100 | @code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.
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| 101 |
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| 102 | @cindex -mfpp
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| 103 | @cindex -mno-fpp
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| 104 | @cindex -mfpu
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| 105 | @cindex -mno-fpu
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| 106 | @cindex -mfp-11
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| 107 | @cindex -mno-fp-11
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| 108 | @item -mfpp | -mfpu | -mfp-11
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| 109 | @itemx -mno-fpp | -mno-fpu | -mno-fp-11
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| 110 | Enable (or disable) the use of FP-11 floating-point instructions:
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| 111 | @code{ABSF}, @code{ADDF}, @code{CFCC}, @code{CLRF}, @code{CMPF},
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| 112 | @code{DIVF}, @code{LDCFF}, @code{LDCIF}, @code{LDEXP}, @code{LDF},
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| 113 | @code{LDFPS}, @code{MODF}, @code{MULF}, @code{NEGF}, @code{SETD},
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| 114 | @code{SETF}, @code{SETI}, @code{SETL}, @code{STCFF}, @code{STCFI},
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| 115 | @code{STEXP}, @code{STF}, @code{STFPS}, @code{STST}, @code{SUBF}, and
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| 116 | @code{TSTF}.
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| 117 |
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| 118 | @cindex -mlimited-eis
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| 119 | @cindex -mno-limited-eis
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| 120 | @item -mlimited-eis | -mno-limited-eis
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| 121 | Enable (or disable) the use of the limited extended instruction set:
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| 122 | @code{MARK}, @code{RTT}, @code{SOB}, @code{SXT}, and @code{XOR}.
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| 123 |
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| 124 | The -mno-limited-eis options also implies -mno-eis.
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| 125 |
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| 126 | @cindex -mmfpt
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| 127 | @cindex -mno-mfpt
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| 128 | @item -mmfpt | -mno-mfpt
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| 129 | Enable (or disable) the use of the @code{MFPT} instruction.
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| 130 |
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| 131 | @cindex -mmutiproc
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| 132 | @cindex -mno-mutiproc
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| 133 | @item -mmultiproc | -mno-multiproc
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| 134 | Enable (or disable) the use of multiprocessor instructions: @code{TSTSET} and
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| 135 | @code{WRTLCK}.
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| 136 |
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| 137 | @cindex -mmxps
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| 138 | @cindex -mno-mxps
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| 139 | @item -mmxps | -mno-mxps
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| 140 | Enable (or disable) the use of the @code{MFPS} and @code{MTPS} instructions.
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| 141 |
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| 142 | @cindex -mspl
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| 143 | @cindex -mno-spl
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| 144 | @item -mspl | -mno-spl
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| 145 | Enable (or disable) the use of the @code{SPL} instruction.
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| 146 |
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| 147 | @cindex -mmicrocode
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| 148 | @cindex -mno-microcode
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| 149 | Enable (or disable) the use of the microcode instructions: @code{LDUB},
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| 150 | @code{MED}, and @code{XFC}.
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| 151 | @end table
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| 152 |
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| 153 | @subsection CPU Model Options
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| 154 |
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| 155 | These options enable the instruction set extensions supported by a
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| 156 | particular CPU, and disables all other extensions.
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| 157 |
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| 158 | @table @code
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| 159 | @cindex -mka11
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| 160 | @item -mka11
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| 161 | KA11 CPU. Base line instruction set only.
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| 162 |
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| 163 | @cindex -mkb11
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| 164 | @item -mkb11
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| 165 | KB11 CPU. Enable extended instruction set and @code{SPL}.
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| 166 |
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| 167 | @cindex -mkd11a
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| 168 | @item -mkd11a
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| 169 | KD11-A CPU. Enable limited extended instruction set.
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| 170 |
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| 171 | @cindex -mkd11b
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| 172 | @item -mkd11b
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| 173 | KD11-B CPU. Base line instruction set only.
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| 174 |
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| 175 | @cindex -mkd11d
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| 176 | @item -mkd11d
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| 177 | KD11-D CPU. Base line instruction set only.
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| 178 |
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| 179 | @cindex -mkd11e
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| 180 | @item -mkd11e
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| 181 | KD11-E CPU. Enable extended instruction set, @code{MFPS}, and @code{MTPS}.
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| 182 |
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| 183 | @cindex -mkd11f
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| 184 | @cindex -mkd11h
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| 185 | @cindex -mkd11q
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| 186 | @item -mkd11f | -mkd11h | -mkd11q
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| 187 | KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended instruction set,
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| 188 | @code{MFPS}, and @code{MTPS}.
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| 189 |
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| 190 | @cindex -mkd11k
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| 191 | @item -mkd11k
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| 192 | KD11-K CPU. Enable extended instruction set, @code{LDUB}, @code{MED},
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| 193 | @code{MFPS}, @code{MFPT}, @code{MTPS}, and @code{XFC}.
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| 194 |
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| 195 | @cindex -mkd11z
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| 196 | @item -mkd11z
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| 197 | KD11-Z CPU. Enable extended instruction set, @code{CSM}, @code{MFPS},
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| 198 | @code{MFPT}, @code{MTPS}, and @code{SPL}.
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| 199 |
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| 200 | @cindex -mf11
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| 201 | @item -mf11
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| 202 | F11 CPU. Enable extended instruction set, @code{MFPS}, @code{MFPT}, and
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| 203 | @code{MTPS}.
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| 204 |
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| 205 | @cindex -mj11
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| 206 | @item -mj11
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| 207 | J11 CPU. Enable extended instruction set, @code{CSM}, @code{MFPS},
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| 208 | @code{MFPT}, @code{MTPS}, @code{SPL}, @code{TSTSET}, and @code{WRTLCK}.
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| 209 |
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| 210 | @cindex -mt11
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| 211 | @item -mt11
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| 212 | T11 CPU. Enable limited extended instruction set, @code{MFPS}, and
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| 213 | @code{MTPS}.
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| 214 | @end table
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| 215 |
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| 216 | @subsection Machine Model Options
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| 217 |
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| 218 | These options enable the instruction set extensions supported by a
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| 219 | particular machine model, and disables all other extensions.
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| 220 |
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| 221 | @table @code
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| 222 | @cindex -m11/03
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| 223 | @item -m11/03
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| 224 | Same as @code{-mkd11f}.
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| 225 |
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| 226 | @cindex -m11/04
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| 227 | @item -m11/04
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| 228 | Same as @code{-mkd11d}.
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| 229 |
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| 230 | @cindex -m11/05
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| 231 | @cindex -m11/10
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| 232 | @item -m11/05 | -m11/10
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| 233 | Same as @code{-mkd11b}.
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| 234 |
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| 235 | @cindex -m11/15
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| 236 | @cindex -m11/20
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| 237 | @item -m11/15 | -m11/20
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| 238 | Same as @code{-mka11}.
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| 239 |
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| 240 | @cindex -m11/21
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| 241 | @item -m11/21
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| 242 | Same as @code{-mt11}.
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| 243 |
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| 244 | @cindex -m11/23
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| 245 | @cindex -m11/24
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| 246 | @item -m11/23 | -m11/24
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| 247 | Same as @code{-mf11}.
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| 248 |
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| 249 | @cindex -m11/34
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| 250 | @item -m11/34
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| 251 | Same as @code{-mkd11e}.
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| 252 |
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| 253 | @cindex -m11/34a
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| 254 | @item -m11/34a
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| 255 | Ame as @code{-mkd11e} @code{-mfpp}.
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| 256 |
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| 257 | @cindex -m11/35
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| 258 | @cindex -m11/40
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| 259 | @item -m11/35 | -m11/40
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| 260 | Same as @code{-mkd11a}.
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| 261 |
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| 262 | @cindex -m11/44
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| 263 | @item -m11/44
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| 264 | Same as @code{-mkd11z}.
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| 265 |
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| 266 | @cindex -m11/45
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| 267 | @cindex -m11/50
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| 268 | @cindex -m11/55
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| 269 | @cindex -m11/70
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| 270 | @item -m11/45 | -m11/50 | -m11/55 | -m11/70
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| 271 | Same as @code{-mkb11}.
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| 272 |
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| 273 | @cindex -m11/53
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| 274 | @cindex -m11/73
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| 275 | @cindex -m11/83
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| 276 | @cindex -m11/84
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| 277 | @cindex -m11/93
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| 278 | @cindex -m11/94
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| 279 | @item -m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94
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| 280 | Same as @code{-mj11}.
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| 281 |
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| 282 | @cindex -m11/60
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| 283 | @item -m11/60
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| 284 | Same as @code{-mkd11k}.
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| 285 | @end table
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| 286 |
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| 287 | @node PDP-11-Pseudos
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| 288 | @section Assembler Directives
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| 289 |
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| 290 | The PDP-11 version of @code{@value{AS}} has a few machine
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| 291 | dependent assembler directives.
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| 292 |
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| 293 | @table @code
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| 294 | @item .bss
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| 295 | Switch to the @code{bss} section.
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| 296 |
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| 297 | @item .even
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| 298 | Align the location counter to an even number.
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| 299 | @end table
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| 300 |
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| 301 | @node PDP-11-Syntax
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| 302 | @section PDP-11 Assembly Language Syntax
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| 303 |
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| 304 | @cindex PDP-11 syntax
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| 305 |
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| 306 | @cindex DEC syntax
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| 307 | @cindex BSD syntax
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| 308 | @code{@value{AS}} supports both DEC syntax and BSD syntax. The only
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| 309 | difference is that in DEC syntax, a @code{#} character is used to denote
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| 310 | an immediate constants, while in BSD syntax the character for this
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| 311 | purpose is @code{$}.
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| 312 |
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| 313 | @cindex PDP-11 general-purpose register syntax
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| 314 | eneral-purpose registers are named @code{r0} through @code{r7}.
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| 315 | Mnemonic alternatives for @code{r6} and @code{r7} are @code{sp} and
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| 316 | @code{pc}, respectively.
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| 317 |
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| 318 | @cindex PDP-11 floating-point register syntax
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| 319 | Floating-point registers are named @code{ac0} through @code{ac3}, or
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| 320 | alternatively @code{fr0} through @code{fr3}.
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| 321 |
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| 322 | @cindex PDP-11 comments
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| 323 | Comments are started with a @code{#} or a @code{/} character, and extend
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| 324 | to the end of the line. (FIXME: clash with immediates?)
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| 325 |
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| 326 | @node PDP-11-Mnemonics
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| 327 | @section Instruction Naming
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| 328 |
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| 329 | @cindex PDP-11 instruction naming
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| 330 |
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| 331 | Some instructions have alternative names.
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| 332 |
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| 333 | @table @code
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| 334 | @item BCC
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| 335 | @code{BHIS}
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| 336 |
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| 337 | @item BCS
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| 338 | @code{BLO}
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| 339 |
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| 340 | @item L2DR
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| 341 | @code{L2D}
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| 342 |
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| 343 | @item L3DR
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| 344 | @code{L3D}
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| 345 |
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| 346 | @item SYS
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| 347 | @code{TRAP}
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| 348 | @end table
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| 349 |
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| 350 | @node PDP-11-Synthetic
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| 351 | @section Synthetic Instructions
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| 352 |
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| 353 | The @code{JBR} and @code{J}@var{CC} synthetic instructions are not
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| 354 | supported yet.
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