1 | @c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003 Free Software Foundation, Inc.
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2 | @c This is part of the GAS manual.
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3 | @c For copying conditions, see the file as.texinfo.
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4 | @ifset GENERIC
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5 | @page
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6 | @end ifset
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7 | @node H8/300-Dependent
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8 | @chapter H8/300 Dependent Features
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9 |
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10 | @cindex H8/300 support
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11 | @menu
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12 | * H8/300 Options:: Options
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13 | * H8/300 Syntax:: Syntax
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14 | * H8/300 Floating Point:: Floating Point
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15 | * H8/300 Directives:: H8/300 Machine Directives
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16 | * H8/300 Opcodes:: Opcodes
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17 | @end menu
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18 |
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19 | @node H8/300 Options
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20 | @section Options
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21 |
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22 | @cindex H8/300 options (none)
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23 | @cindex options, H8/300 (none)
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24 | @code{@value{AS}} has no additional command-line options for the
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25 | Renesas (formerly Hitachi) H8/300 family.
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26 |
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27 | @node H8/300 Syntax
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28 | @section Syntax
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29 | @menu
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30 | * H8/300-Chars:: Special Characters
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31 | * H8/300-Regs:: Register Names
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32 | * H8/300-Addressing:: Addressing Modes
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33 | @end menu
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34 |
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35 | @node H8/300-Chars
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36 | @subsection Special Characters
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37 |
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38 | @cindex line comment character, H8/300
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39 | @cindex H8/300 line comment character
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40 | @samp{;} is the line comment character.
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41 |
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42 | @cindex line separator, H8/300
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43 | @cindex statement separator, H8/300
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44 | @cindex H8/300 line separator
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45 | @samp{$} can be used instead of a newline to separate statements.
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46 | Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
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47 |
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48 | @node H8/300-Regs
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49 | @subsection Register Names
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50 |
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51 | @cindex H8/300 registers
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52 | @cindex register names, H8/300
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53 | You can use predefined symbols of the form @samp{r@var{n}h} and
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54 | @samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
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55 | general-purpose registers. @var{n} is a digit from @samp{0} to
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56 | @samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
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57 | register names.
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58 |
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59 | You can also use the eight predefined symbols @samp{r@var{n}} to refer
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60 | to the H8/300 registers as 16-bit registers (you must use this form for
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61 | addressing).
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62 |
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63 | On the H8/300H, you can also use the eight predefined symbols
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64 | @samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
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65 | general purpose registers.
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66 |
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67 | The two control registers are called @code{pc} (program counter; a
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68 | 16-bit register, except on the H8/300H where it is 24 bits) and
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69 | @code{ccr} (condition code register; an 8-bit register). @code{r7} is
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70 | used as the stack pointer, and can also be called @code{sp}.
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71 |
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72 | @node H8/300-Addressing
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73 | @subsection Addressing Modes
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74 |
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75 | @cindex addressing modes, H8/300
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76 | @cindex H8/300 addressing modes
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77 | @value{AS} understands the following addressing modes for the H8/300:
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78 | @table @code
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79 | @item r@var{n}
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80 | Register direct
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81 |
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82 | @item @@r@var{n}
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83 | Register indirect
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84 |
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85 | @need 1200
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86 | @item @@(@var{d}, r@var{n})
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87 | @itemx @@(@var{d}:16, r@var{n})
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88 | @itemx @@(@var{d}:24, r@var{n})
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89 | Register indirect: 16-bit or 24-bit displacement @var{d} from register
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90 | @var{n}. (24-bit displacements are only meaningful on the H8/300H.)
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91 |
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92 | @item @@r@var{n}+
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93 | Register indirect with post-increment
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94 |
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95 | @item @@-r@var{n}
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96 | Register indirect with pre-decrement
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97 |
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98 | @item @code{@@}@var{aa}
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99 | @itemx @code{@@}@var{aa}:8
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100 | @itemx @code{@@}@var{aa}:16
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101 | @itemx @code{@@}@var{aa}:24
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102 | Absolute address @code{aa}. (The address size @samp{:24} only makes
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103 | sense on the H8/300H.)
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104 |
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105 | @item #@var{xx}
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106 | @itemx #@var{xx}:8
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107 | @itemx #@var{xx}:16
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108 | @itemx #@var{xx}:32
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109 | Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
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110 | @samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
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111 | requires this nor uses it---the data size required is taken from
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112 | context.
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113 |
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114 | @item @code{@@}@code{@@}@var{aa}
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115 | @itemx @code{@@}@code{@@}@var{aa}:8
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116 | Memory indirect. You may specify the @samp{:8} for clarity, if you
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117 | wish; but @code{@value{AS}} neither requires this nor uses it.
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118 | @end table
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119 |
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120 | @node H8/300 Floating Point
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121 | @section Floating Point
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122 |
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123 | @cindex floating point, H8/300 (@sc{ieee})
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124 | @cindex H8/300 floating point (@sc{ieee})
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125 | The H8/300 family has no hardware floating point, but the @code{.float}
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126 | directive generates @sc{ieee} floating-point numbers for compatibility
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127 | with other development tools.
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128 |
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129 | @page
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130 | @node H8/300 Directives
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131 | @section H8/300 Machine Directives
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132 |
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133 | @cindex H8/300 machine directives (none)
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134 | @cindex machine directives, H8/300 (none)
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135 | @cindex @code{word} directive, H8/300
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136 | @cindex @code{int} directive, H8/300
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137 | @code{@value{AS}} has the following machine-dependent directives for
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138 | the H8/300:
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139 |
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140 | @table @code
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141 | @cindex H8/300H, assembling for
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142 | @item .h8300h
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143 | Recognize and emit additional instructions for the H8/300H variant, and
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144 | also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
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145 | for the H8/300 family.
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146 |
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147 | @item .h8300s
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148 | Recognize and emit additional instructions for the H8S variant, and
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149 | also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
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150 | for the H8/300 family.
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151 |
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152 | @item .h8300hn
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153 | Recognize and emit additional instructions for the H8/300H variant in
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154 | normal mode, and also make @code{.int} emit 32-bit numbers rather than
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155 | the usual (16-bit) for the H8/300 family.
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156 |
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157 | @item .h8300sn
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158 | Recognize and emit additional instructions for the H8S variant in
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159 | normal mode, and also make @code{.int} emit 32-bit numbers rather than
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160 | the usual (16-bit) for the H8/300 family.
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161 | @end table
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162 |
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163 | On the H8/300 family (including the H8/300H) @samp{.word} directives
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164 | generate 16-bit numbers.
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165 |
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166 | @node H8/300 Opcodes
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167 | @section Opcodes
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168 |
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169 | @cindex H8/300 opcode summary
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170 | @cindex opcode summary, H8/300
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171 | @cindex mnemonics, H8/300
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172 | @cindex instruction summary, H8/300
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173 | For detailed information on the H8/300 machine instruction set, see
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174 | @cite{H8/300 Series Programming Manual}. For information specific to
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175 | the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
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176 |
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177 | @code{@value{AS}} implements all the standard H8/300 opcodes. No additional
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178 | pseudo-instructions are needed on this family.
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179 |
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180 | @ifset SMALL
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181 | @c this table, due to the multi-col faking and hardcoded order, looks silly
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182 | @c except in smallbook. See comments below "@set SMALL" near top of this file.
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183 |
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184 | The following table summarizes the H8/300 opcodes, and their arguments.
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185 | Entries marked @samp{*} are opcodes used only on the H8/300H.
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186 |
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187 | @smallexample
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188 | @c Using @group seems to use the normal baselineskip, not the smallexample
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189 | @c baselineskip; looks approx doublespaced.
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190 | @i{Legend:}
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191 | Rs @r{source register}
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192 | Rd @r{destination register}
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193 | abs @r{absolute address}
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194 | imm @r{immediate data}
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195 | disp:N @r{N-bit displacement from a register}
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196 | pcrel:N @r{N-bit displacement relative to program counter}
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197 |
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198 | add.b #imm,rd * andc #imm,ccr
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199 | add.b rs,rd band #imm,rd
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200 | add.w rs,rd band #imm,@@rd
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201 | * add.w #imm,rd band #imm,@@abs:8
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202 | * add.l rs,rd bra pcrel:8
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203 | * add.l #imm,rd * bra pcrel:16
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204 | adds #imm,rd bt pcrel:8
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205 | addx #imm,rd * bt pcrel:16
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206 | addx rs,rd brn pcrel:8
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207 | and.b #imm,rd * brn pcrel:16
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208 | and.b rs,rd bf pcrel:8
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209 | * and.w rs,rd * bf pcrel:16
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210 | * and.w #imm,rd bhi pcrel:8
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211 | * and.l #imm,rd * bhi pcrel:16
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212 | * and.l rs,rd bls pcrel:8
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213 | @page
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214 | * bls pcrel:16 bld #imm,rd
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215 | bcc pcrel:8 bld #imm,@@rd
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216 | * bcc pcrel:16 bld #imm,@@abs:8
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217 | bhs pcrel:8 bnot #imm,rd
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218 | * bhs pcrel:16 bnot #imm,@@rd
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219 | bcs pcrel:8 bnot #imm,@@abs:8
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220 | * bcs pcrel:16 bnot rs,rd
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221 | blo pcrel:8 bnot rs,@@rd
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222 | * blo pcrel:16 bnot rs,@@abs:8
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223 | bne pcrel:8 bor #imm,rd
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224 | * bne pcrel:16 bor #imm,@@rd
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225 | beq pcrel:8 bor #imm,@@abs:8
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226 | * beq pcrel:16 bset #imm,rd
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227 | bvc pcrel:8 bset #imm,@@rd
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228 | * bvc pcrel:16 bset #imm,@@abs:8
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229 | bvs pcrel:8 bset rs,rd
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230 | * bvs pcrel:16 bset rs,@@rd
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231 | bpl pcrel:8 bset rs,@@abs:8
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232 | * bpl pcrel:16 bsr pcrel:8
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233 | bmi pcrel:8 bsr pcrel:16
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234 | * bmi pcrel:16 bst #imm,rd
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235 | bge pcrel:8 bst #imm,@@rd
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236 | * bge pcrel:16 bst #imm,@@abs:8
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237 | blt pcrel:8 btst #imm,rd
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238 | * blt pcrel:16 btst #imm,@@rd
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239 | bgt pcrel:8 btst #imm,@@abs:8
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240 | * bgt pcrel:16 btst rs,rd
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241 | ble pcrel:8 btst rs,@@rd
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242 | * ble pcrel:16 btst rs,@@abs:8
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243 | bclr #imm,rd bxor #imm,rd
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244 | bclr #imm,@@rd bxor #imm,@@rd
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245 | bclr #imm,@@abs:8 bxor #imm,@@abs:8
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246 | bclr rs,rd cmp.b #imm,rd
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247 | bclr rs,@@rd cmp.b rs,rd
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248 | bclr rs,@@abs:8 cmp.w rs,rd
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249 | biand #imm,rd cmp.w rs,rd
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250 | biand #imm,@@rd * cmp.w #imm,rd
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251 | biand #imm,@@abs:8 * cmp.l #imm,rd
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252 | bild #imm,rd * cmp.l rs,rd
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253 | bild #imm,@@rd daa rs
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254 | bild #imm,@@abs:8 das rs
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255 | bior #imm,rd dec.b rs
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256 | bior #imm,@@rd * dec.w #imm,rd
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257 | bior #imm,@@abs:8 * dec.l #imm,rd
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258 | bist #imm,rd divxu.b rs,rd
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259 | bist #imm,@@rd * divxu.w rs,rd
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260 | bist #imm,@@abs:8 * divxs.b rs,rd
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261 | bixor #imm,rd * divxs.w rs,rd
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262 | bixor #imm,@@rd eepmov
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263 | bixor #imm,@@abs:8 * eepmovw
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264 | @page
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265 | * exts.w rd mov.w rs,@@abs:16
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266 | * exts.l rd * mov.l #imm,rd
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267 | * extu.w rd * mov.l rs,rd
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268 | * extu.l rd * mov.l @@rs,rd
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269 | inc rs * mov.l @@(disp:16,rs),rd
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270 | * inc.w #imm,rd * mov.l @@(disp:24,rs),rd
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271 | * inc.l #imm,rd * mov.l @@rs+,rd
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272 | jmp @@rs * mov.l @@abs:16,rd
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273 | jmp abs * mov.l @@abs:24,rd
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274 | jmp @@@@abs:8 * mov.l rs,@@rd
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275 | jsr @@rs * mov.l rs,@@(disp:16,rd)
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276 | jsr abs * mov.l rs,@@(disp:24,rd)
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277 | jsr @@@@abs:8 * mov.l rs,@@-rd
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278 | ldc #imm,ccr * mov.l rs,@@abs:16
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279 | ldc rs,ccr * mov.l rs,@@abs:24
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280 | * ldc @@abs:16,ccr movfpe @@abs:16,rd
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281 | * ldc @@abs:24,ccr movtpe rs,@@abs:16
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282 | * ldc @@(disp:16,rs),ccr mulxu.b rs,rd
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283 | * ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
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284 | * ldc @@rs+,ccr * mulxs.b rs,rd
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285 | * ldc @@rs,ccr * mulxs.w rs,rd
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286 | * mov.b @@(disp:24,rs),rd neg.b rs
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287 | * mov.b rs,@@(disp:24,rd) * neg.w rs
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288 | mov.b @@abs:16,rd * neg.l rs
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289 | mov.b rs,rd nop
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290 | mov.b @@abs:8,rd not.b rs
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291 | mov.b rs,@@abs:8 * not.w rs
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292 | mov.b rs,rd * not.l rs
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293 | mov.b #imm,rd or.b #imm,rd
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294 | mov.b @@rs,rd or.b rs,rd
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295 | mov.b @@(disp:16,rs),rd * or.w #imm,rd
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296 | mov.b @@rs+,rd * or.w rs,rd
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297 | mov.b @@abs:8,rd * or.l #imm,rd
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298 | mov.b rs,@@rd * or.l rs,rd
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299 | mov.b rs,@@(disp:16,rd) orc #imm,ccr
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300 | mov.b rs,@@-rd pop.w rs
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301 | mov.b rs,@@abs:8 * pop.l rs
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302 | mov.w rs,@@rd push.w rs
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303 | * mov.w @@(disp:24,rs),rd * push.l rs
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304 | * mov.w rs,@@(disp:24,rd) rotl.b rs
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305 | * mov.w @@abs:24,rd * rotl.w rs
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306 | * mov.w rs,@@abs:24 * rotl.l rs
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307 | mov.w rs,rd rotr.b rs
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308 | mov.w #imm,rd * rotr.w rs
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309 | mov.w @@rs,rd * rotr.l rs
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310 | mov.w @@(disp:16,rs),rd rotxl.b rs
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311 | mov.w @@rs+,rd * rotxl.w rs
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312 | mov.w @@abs:16,rd * rotxl.l rs
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313 | mov.w rs,@@(disp:16,rd) rotxr.b rs
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314 | mov.w rs,@@-rd * rotxr.w rs
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315 | @page
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316 | * rotxr.l rs * stc ccr,@@(disp:24,rd)
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317 | bpt * stc ccr,@@-rd
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318 | rte * stc ccr,@@abs:16
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319 | rts * stc ccr,@@abs:24
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320 | shal.b rs sub.b rs,rd
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321 | * shal.w rs sub.w rs,rd
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322 | * shal.l rs * sub.w #imm,rd
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323 | shar.b rs * sub.l rs,rd
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324 | * shar.w rs * sub.l #imm,rd
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325 | * shar.l rs subs #imm,rd
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326 | shll.b rs subx #imm,rd
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327 | * shll.w rs subx rs,rd
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328 | * shll.l rs * trapa #imm
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329 | shlr.b rs xor #imm,rd
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330 | * shlr.w rs xor rs,rd
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331 | * shlr.l rs * xor.w #imm,rd
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332 | sleep * xor.w rs,rd
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333 | stc ccr,rd * xor.l #imm,rd
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334 | * stc ccr,@@rs * xor.l rs,rd
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335 | * stc ccr,@@(disp:16,rd) xorc #imm,ccr
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336 | @end smallexample
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337 | @end ifset
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338 |
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339 | @cindex size suffixes, H8/300
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340 | @cindex H8/300 size suffixes
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341 | Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
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342 | @code{sub}) are defined with variants using the suffixes @samp{.b},
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343 | @samp{.w}, and @samp{.l} to specify the size of a memory operand.
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344 | @code{@value{AS}} supports these suffixes, but does not require them;
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345 | since one of the operands is always a register, @code{@value{AS}} can
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346 | deduce the correct size.
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347 |
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348 | For example, since @code{r0} refers to a 16-bit register,
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349 | @example
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350 | mov r0,@@foo
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351 | @exdent is equivalent to
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352 | mov.w r0,@@foo
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353 | @end example
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354 |
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355 | If you use the size suffixes, @code{@value{AS}} issues a warning when
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356 | the suffix and the register size do not match.
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