| 1 | @c Copyright 2000, 2001 Free Software Foundation, Inc.
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| 2 | @c This is part of the GAS manual.
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| 3 | @c For copying conditions, see the file as.texinfo.
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| 4 |
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| 5 | @ifset GENERIC
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| 6 | @page
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| 7 | @node ARC-Dependent
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| 8 | @chapter ARC Dependent Features
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| 9 | @end ifset
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| 10 |
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| 11 | @ifclear GENERIC
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| 12 | @node Machine Dependencies
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| 13 | @chapter ARC Dependent Features
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| 14 | @end ifclear
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| 15 |
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| 16 | @set ARC_CORE_DEFAULT 6
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| 17 |
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| 18 | @cindex ARC support
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| 19 | @menu
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| 20 | * ARC Options:: Options
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| 21 | * ARC Syntax:: Syntax
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| 22 | * ARC Floating Point:: Floating Point
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| 23 | * ARC Directives:: ARC Machine Directives
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| 24 | * ARC Opcodes:: Opcodes
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| 25 | @end menu
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| 26 |
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| 27 |
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| 28 | @node ARC Options
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| 29 | @section Options
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| 30 | @cindex ARC options (none)
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| 31 | @cindex options for ARC (none)
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| 32 |
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| 33 | @table @code
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| 34 |
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| 35 | @cindex @code{-marc[5|6|7|8]} command line option, ARC
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| 36 | @item -marc[5|6|7|8]
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| 37 | This option selects the core processor variant. Using
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| 38 | @code{-marc} is the same as @code{-marc@value{ARC_CORE_DEFAULT}}, which
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| 39 | is also the default.
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| 40 |
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| 41 | @table @code
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| 42 |
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| 43 | @cindex @code{arc5} arc5, ARC
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| 44 | @item arc5
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| 45 | Base instruction set.
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| 46 |
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| 47 | @cindex @code{arc6} arc6, ARC
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| 48 | @item arc6
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| 49 | Jump-and-link (jl) instruction. No requirement of an instruction between
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| 50 | setting flags and conditional jump. For example:
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| 51 |
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| 52 | @smallexample
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| 53 | mov.f r0,r1
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| 54 | beq foo
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| 55 | @end smallexample
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| 56 |
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| 57 | @cindex @code{arc7} arc7, ARC
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| 58 | @item arc7
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| 59 | Break (brk) and sleep (sleep) instructions.
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| 60 |
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| 61 | @cindex @code{arc8} arc8, ARC
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| 62 | @item arc8
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| 63 | Software interrupt (swi) instruction.
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| 64 |
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| 65 | @end table
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| 66 |
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| 67 | Note: the @code{.option} directive can to be used to select a core
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| 68 | variant from within assembly code.
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| 69 |
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| 70 | @cindex @code{-EB} command line option, ARC
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| 71 | @item -EB
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| 72 | This option specifies that the output generated by the assembler should
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| 73 | be marked as being encoded for a big-endian processor.
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| 74 |
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| 75 | @cindex @code{-EL} command line option, ARC
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| 76 | @item -EL
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| 77 | This option specifies that the output generated by the assembler should
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| 78 | be marked as being encoded for a little-endian processor - this is the
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| 79 | default.
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| 80 |
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| 81 | @end table
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| 82 |
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| 83 |
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| 84 | @node ARC Syntax
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| 85 | @section Syntax
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| 86 | @menu
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| 87 | * ARC-Chars:: Special Characters
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| 88 | * ARC-Regs:: Register Names
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| 89 | @end menu
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| 90 |
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| 91 | @node ARC-Chars
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| 92 | @subsection Special Characters
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| 93 |
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| 94 | @cindex ARC special characters
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| 95 | @cindex special characters, ARC
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| 96 | *TODO*
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| 97 |
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| 98 | @node ARC-Regs
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| 99 | @subsection Register Names
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| 100 |
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| 101 | @cindex ARC register names
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| 102 | @cindex register names, ARC
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| 103 | *TODO*
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| 104 |
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| 105 |
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| 106 | @node ARC Floating Point
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| 107 | @section Floating Point
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| 108 |
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| 109 | @cindex floating point, ARC (@sc{ieee})
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| 110 | @cindex ARC floating point (@sc{ieee})
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| 111 | The ARC core does not currently have hardware floating point
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| 112 | support. Software floating point support is provided by @code{GCC}
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| 113 | and uses @sc{ieee} floating-point numbers.
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| 114 |
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| 115 |
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| 116 | @node ARC Directives
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| 117 | @section ARC Machine Directives
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| 118 |
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| 119 | @cindex machine directives, ARC
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| 120 | @cindex ARC machine directives
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| 121 | The ARC version of @code{@value{AS}} supports the following additional
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| 122 | machine directives:
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| 123 |
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| 124 | @table @code
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| 125 |
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| 126 | @cindex @code{2byte} directive, ARC
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| 127 | @item .2byte @var{expressions}
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| 128 | *TODO*
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| 129 |
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| 130 | @cindex @code{3byte} directive, ARC
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| 131 | @item .3byte @var{expressions}
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| 132 | *TODO*
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| 133 |
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| 134 | @cindex @code{4byte} directive, ARC
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| 135 | @item .4byte @var{expressions}
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| 136 | *TODO*
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| 137 |
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| 138 | @cindex @code{extAuxRegister} directive, ARC
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| 139 | @item .extAuxRegister @var{name},@var{address},@var{mode}
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| 140 | *TODO*
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| 141 |
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| 142 | @smallexample
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| 143 | .extAuxRegister mulhi,0x12,w
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| 144 | @end smallexample
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| 145 |
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| 146 | @cindex @code{extCondCode} directive, ARC
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| 147 | @item .extCondCode @var{suffix},@var{value}
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| 148 | *TODO*
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| 149 |
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| 150 | @smallexample
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| 151 | .extCondCode is_busy,0x14
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| 152 | @end smallexample
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| 153 |
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| 154 | @cindex @code{extCoreRegister} directive, ARC
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| 155 | @item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
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| 156 | *TODO*
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| 157 |
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| 158 | @smallexample
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| 159 | .extCoreRegister mlo,57,r,can_shortcut
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| 160 | @end smallexample
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| 161 |
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| 162 | @cindex @code{extInstruction} directive, ARC
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| 163 | @item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
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| 164 | *TODO*
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| 165 |
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| 166 | @smallexample
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| 167 | .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM
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| 168 | @end smallexample
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| 169 |
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| 170 | @cindex @code{half} directive, ARC
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| 171 | @item .half @var{expressions}
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| 172 | *TODO*
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| 173 |
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| 174 | @cindex @code{long} directive, ARC
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| 175 | @item .long @var{expressions}
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| 176 | *TODO*
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| 177 |
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| 178 | @cindex @code{option} directive, ARC
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| 179 | @item .option @var{arc|arc5|arc6|arc7|arc8}
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| 180 | The @code{.option} directive must be followed by the desired core
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| 181 | version. Again @code{arc} is an alias for
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| 182 | @code{arc@value{ARC_CORE_DEFAULT}}.
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| 183 |
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| 184 | Note: the @code{.option} directive overrides the command line option
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| 185 | @code{-marc}; a warning is emitted when the version is not consistent
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| 186 | between the two - even for the implicit default core version
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| 187 | (arc@value{ARC_CORE_DEFAULT}).
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| 188 |
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| 189 | @cindex @code{short} directive, ARC
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| 190 | @item .short @var{expressions}
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| 191 | *TODO*
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| 192 |
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| 193 | @cindex @code{word} directive, ARC
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| 194 | @item .word @var{expressions}
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| 195 | *TODO*
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| 196 |
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| 197 | @end table
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| 198 |
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| 199 |
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| 200 | @node ARC Opcodes
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| 201 | @section Opcodes
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| 202 |
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| 203 | @cindex ARC opcodes
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| 204 | @cindex opcodes for ARC
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| 205 |
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| 206 | For information on the ARC instruction set, see @cite{ARC Programmers
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| 207 | Reference Manual}, ARC Cores Ltd.
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