1 | /* m68k-parse.h -- header file for m68k assembler
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2 | Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000
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3 | Free Software Foundation, Inc.
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4 |
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5 | This file is part of GAS, the GNU Assembler.
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6 |
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7 | GAS is free software; you can redistribute it and/or modify
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8 | it under the terms of the GNU General Public License as published by
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9 | the Free Software Foundation; either version 2, or (at your option)
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10 | any later version.
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11 |
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12 | GAS is distributed in the hope that it will be useful,
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13 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | GNU General Public License for more details.
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16 |
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17 | You should have received a copy of the GNU General Public License
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18 | along with GAS; see the file COPYING. If not, write to the Free
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19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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20 | 02111-1307, USA. */
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21 |
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22 | #ifndef M68K_PARSE_H
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23 | #define M68K_PARSE_H
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24 |
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25 | /* This header file defines things which are shared between the
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26 | operand parser in m68k.y and the m68k assembler proper in
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27 | tc-m68k.c. */
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28 |
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29 | /* The various m68k registers. */
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30 |
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31 | /* DATA and ADDR have to be contiguous, so that reg-DATA gives
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32 | 0-7==data reg, 8-15==addr reg for operands that take both types.
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33 |
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34 | We don't use forms like "ADDR0 = ADDR" here because this file is
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35 | likely to be used on an Apollo, and the broken Apollo compiler
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36 | gives an `undefined variable' error if we do that, according to
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37 | troy@cbme.unsw.edu.au. */
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38 |
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39 | #define DATA DATA0
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40 | #define ADDR ADDR0
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41 | #define SP ADDR7
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42 | #define BAD BAD0
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43 | #define BAC BAC0
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44 |
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45 | enum m68k_register
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46 | {
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47 | DATA0 = 1, /* 1- 8 == data registers 0-7 */
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48 | DATA1,
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49 | DATA2,
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50 | DATA3,
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51 | DATA4,
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52 | DATA5,
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53 | DATA6,
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54 | DATA7,
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55 |
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56 | ADDR0,
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57 | ADDR1,
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58 | ADDR2,
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59 | ADDR3,
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60 | ADDR4,
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61 | ADDR5,
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62 | ADDR6,
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63 | ADDR7,
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64 |
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65 | FP0, /* Eight FP registers */
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66 | FP1,
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67 | FP2,
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68 | FP3,
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69 | FP4,
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70 | FP5,
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71 | FP6,
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72 | FP7,
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73 |
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74 | COP0, /* Co-processor #0-#7 */
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75 | COP1,
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76 | COP2,
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77 | COP3,
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78 | COP4,
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79 | COP5,
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80 | COP6,
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81 | COP7,
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82 |
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83 | PC, /* Program counter */
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84 | ZPC, /* Hack for Program space, but 0 addressing */
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85 | SR, /* Status Reg */
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86 | CCR, /* Condition code Reg */
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87 | ACC, /* Accumulator Reg */
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88 | MACSR, /* MAC Status Reg */
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89 | MASK, /* Modulus Reg */
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90 |
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91 | /* These have to be grouped together for the movec instruction to work. */
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92 | USP, /* User Stack Pointer */
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93 | ISP, /* Interrupt stack pointer */
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94 | SFC,
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95 | DFC,
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96 | CACR,
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97 | VBR,
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98 | CAAR,
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99 | MSP,
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100 | ITT0,
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101 | ITT1,
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102 | DTT0,
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103 | DTT1,
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104 | MMUSR,
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105 | TC,
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106 | SRP,
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107 | URP,
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108 | BUSCR, /* 68060 added these */
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109 | PCR,
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110 | ROMBAR, /* mcf5200 added these */
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111 | RAMBAR0,
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112 | RAMBAR1,
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113 | MBAR,
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114 | #define last_movec_reg MBAR
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115 | /* end of movec ordering constraints */
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116 |
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117 | FPI,
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118 | FPS,
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119 | FPC,
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120 |
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121 | DRP, /* 68851 or 68030 MMU regs */
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122 | CRP,
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123 | CAL,
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124 | VAL,
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125 | SCC,
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126 | AC,
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127 | BAD0,
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128 | BAD1,
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129 | BAD2,
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130 | BAD3,
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131 | BAD4,
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132 | BAD5,
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133 | BAD6,
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134 | BAD7,
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135 | BAC0,
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136 | BAC1,
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137 | BAC2,
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138 | BAC3,
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139 | BAC4,
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140 | BAC5,
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141 | BAC6,
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142 | BAC7,
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143 | PSR, /* aka MMUSR on 68030 (but not MMUSR on 68040)
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144 | and ACUSR on 68ec030 */
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145 | PCSR,
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146 |
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147 | IC, /* instruction cache token */
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148 | DC, /* data cache token */
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149 | NC, /* no cache token */
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150 | BC, /* both caches token */
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151 |
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152 | TT0, /* 68030 access control unit regs */
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153 | TT1,
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154 |
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155 | ZDATA0, /* suppressed data registers. */
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156 | ZDATA1,
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157 | ZDATA2,
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158 | ZDATA3,
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159 | ZDATA4,
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160 | ZDATA5,
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161 | ZDATA6,
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162 | ZDATA7,
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163 |
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164 | ZADDR0, /* suppressed address registers. */
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165 | ZADDR1,
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166 | ZADDR2,
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167 | ZADDR3,
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168 | ZADDR4,
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169 | ZADDR5,
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170 | ZADDR6,
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171 | ZADDR7,
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172 |
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173 | /* Upper and lower half of data and address registers. Order *must*
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174 | be DATAxL, ADDRxL, DATAxU, ADDRxU. */
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175 | DATA0L, /* lower half of data registers */
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176 | DATA1L,
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177 | DATA2L,
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178 | DATA3L,
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179 | DATA4L,
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180 | DATA5L,
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181 | DATA6L,
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182 | DATA7L,
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183 |
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184 | ADDR0L, /* lower half of address registers */
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185 | ADDR1L,
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186 | ADDR2L,
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187 | ADDR3L,
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188 | ADDR4L,
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189 | ADDR5L,
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190 | ADDR6L,
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191 | ADDR7L,
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192 |
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193 | DATA0U, /* upper half of data registers */
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194 | DATA1U,
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195 | DATA2U,
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196 | DATA3U,
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197 | DATA4U,
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198 | DATA5U,
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199 | DATA6U,
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200 | DATA7U,
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201 |
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202 | ADDR0U, /* upper half of address registers */
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203 | ADDR1U,
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204 | ADDR2U,
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205 | ADDR3U,
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206 | ADDR4U,
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207 | ADDR5U,
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208 | ADDR6U,
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209 | ADDR7U,
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210 | };
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211 |
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212 | /* Size information. */
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213 |
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214 | enum m68k_size
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215 | {
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216 | /* Unspecified. */
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217 | SIZE_UNSPEC,
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218 |
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219 | /* Byte. */
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220 | SIZE_BYTE,
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221 |
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222 | /* Word (2 bytes). */
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223 | SIZE_WORD,
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224 |
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225 | /* Longword (4 bytes). */
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226 | SIZE_LONG
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227 | };
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228 |
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229 | /* The structure used to hold information about an index register. */
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230 |
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231 | struct m68k_indexreg
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232 | {
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233 | /* The index register itself. */
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234 | enum m68k_register reg;
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235 |
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236 | /* The size to use. */
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237 | enum m68k_size size;
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238 |
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239 | /* The value to scale by. */
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240 | int scale;
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241 | };
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242 |
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243 | #ifdef OBJ_ELF
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244 | /* The type of a PIC expression. */
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245 |
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246 | enum pic_relocation
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247 | {
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248 | pic_none, /* not pic */
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249 | pic_plt_pcrel, /* @PLTPC */
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250 | pic_got_pcrel, /* @GOTPC */
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251 | pic_plt_off, /* @PLT */
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252 | pic_got_off /* @GOT */
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253 | };
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254 | #endif
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255 |
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256 | /* The structure used to hold information about an expression. */
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257 |
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258 | struct m68k_exp
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259 | {
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260 | /* The size to use. */
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261 | enum m68k_size size;
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262 |
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263 | #ifdef OBJ_ELF
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264 | /* The type of pic relocation if any. */
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265 | enum pic_relocation pic_reloc;
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266 | #endif
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267 |
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268 | /* The expression itself. */
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269 | expressionS exp;
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270 | };
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271 |
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272 | /* The operand modes. */
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273 |
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274 | enum m68k_operand_type
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275 | {
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276 | IMMED = 1,
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277 | ABSL,
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278 | DREG,
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279 | AREG,
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280 | FPREG,
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281 | CONTROL,
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282 | AINDR,
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283 | AINC,
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284 | ADEC,
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285 | DISP,
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286 | BASE,
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287 | POST,
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288 | PRE,
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289 | REGLST
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290 | };
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291 |
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292 | /* The structure used to hold a parsed operand. */
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293 |
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294 | struct m68k_op
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295 | {
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296 | /* The type of operand. */
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297 | enum m68k_operand_type mode;
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298 |
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299 | /* The main register. */
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300 | enum m68k_register reg;
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301 |
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302 | /* The register mask for mode REGLST. */
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303 | unsigned long mask;
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304 |
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305 | /* An error message. */
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306 | const char *error;
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307 |
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308 | /* The index register. */
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309 | struct m68k_indexreg index;
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310 |
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311 | /* The displacement. */
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312 | struct m68k_exp disp;
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313 |
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314 | /* The outer displacement. */
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315 | struct m68k_exp odisp;
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316 | };
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317 |
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318 | #endif /* ! defined (M68K_PARSE_H) */
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319 |
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320 | /* The parsing function. */
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321 |
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322 | extern int m68k_ip_op PARAMS ((char *, struct m68k_op *));
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323 |
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324 | /* Whether register prefixes are optional. */
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325 | extern int flag_reg_prefix_optional;
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