source: branches/libc-0.6/src/binutils/opcodes/cris-dis.c

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1/* Disassembler code for CRIS.
2 Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB, Lund, Sweden.
4 Written by Hans-Peter Nilsson.
5
6This file is part of the GNU binutils and GDB, the GNU debugger.
7
8This program is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option)
11any later version.
12
13This program is distributed in the hope that it will be useful, but WITHOUT
14ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16more details.
17
18You should have received a copy of the GNU General Public License
19along with this program; if not, write to the Free Software
20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include "dis-asm.h"
23#include "sysdep.h"
24#include "opcode/cris.h"
25#include "libiberty.h"
26
27
28/* No instruction will be disassembled longer than this. In theory, and
29 in silicon, address prefixes can be cascaded. In practice, cascading
30 is not used by GCC, and not supported by the assembler. */
31#ifndef MAX_BYTES_PER_CRIS_INSN
32#define MAX_BYTES_PER_CRIS_INSN 8
33#endif
34
35/* Whether or not to decode prefixes, folding it into the following
36 instruction. FIXME: Make this optional later. */
37#ifndef PARSE_PREFIX
38#define PARSE_PREFIX 1
39#endif
40
41/* Sometimes we prefix all registers with this character. */
42#define REGISTER_PREFIX_CHAR '$'
43
44/* Whether or not to trace the following sequence:
45 sub* X,r%d
46 bound* Y,r%d
47 adds.w [pc+r%d.w],pc
48
49 This is the assembly form of a switch-statement in C.
50 The "sub is optional. If there is none, then X will be zero.
51 X is the value of the first case,
52 Y is the number of cases (including default).
53
54 This results in case offsets printed on the form:
55 case N: -> case_address
56 where N is an estimation on the corresponding 'case' operand in C,
57 and case_address is where execution of that case continues after the
58 sequence presented above.
59
60 The old style of output was to print the offsets as instructions,
61 which made it hard to follow "case"-constructs in the disassembly,
62 and caused a lot of annoying warnings about undefined instructions.
63
64 FIXME: Make this optional later. */
65#ifndef TRACE_CASE
66#define TRACE_CASE 1
67#endif
68
69/* Value of first element in switch. */
70static long case_offset = 0;
71
72/* How many more case-offsets to print. */
73static long case_offset_counter = 0;
74
75/* Number of case offsets. */
76static long no_of_case_offsets = 0;
77
78/* Candidate for next case_offset. */
79static long last_immediate = 0;
80
81static int number_of_bits
82 PARAMS ((unsigned int));
83static char *format_hex
84 PARAMS ((unsigned long, char *));
85static char *format_dec
86 PARAMS ((long, char *, int));
87static char *format_reg
88 PARAMS ((int, char *, bfd_boolean));
89static int cris_constraint
90 PARAMS ((const char *, unsigned int, unsigned int));
91static unsigned bytes_to_skip
92 PARAMS ((unsigned int, const struct cris_opcode *));
93static char *print_flags
94 PARAMS ((unsigned int, char *));
95static void print_with_operands
96 PARAMS ((const struct cris_opcode *, unsigned int, unsigned char *,
97 bfd_vma, disassemble_info *, const struct cris_opcode *,
98 unsigned int, unsigned char *, bfd_boolean));
99static const struct cris_spec_reg *spec_reg_info
100 PARAMS ((unsigned int));
101static int print_insn_cris_generic
102 PARAMS ((bfd_vma, disassemble_info *, bfd_boolean));
103static int print_insn_cris_with_register_prefix
104 PARAMS ((bfd_vma, disassemble_info *));
105static int print_insn_cris_without_register_prefix
106 PARAMS ((bfd_vma, disassemble_info *));
107static const struct cris_opcode *get_opcode_entry
108 PARAMS ((unsigned int, unsigned int));
109
110/* Return the descriptor of a special register.
111 FIXME: Depend on a CPU-version specific argument when all machinery
112 is in place. */
113
114static const struct cris_spec_reg *
115spec_reg_info (sreg)
116 unsigned int sreg;
117{
118 int i;
119 for (i = 0; cris_spec_regs[i].name != NULL; i++)
120 {
121 if (cris_spec_regs[i].number == sreg)
122 return &cris_spec_regs[i];
123 }
124
125 return NULL;
126}
127
128/* Return the number of bits in the argument. */
129
130static int
131number_of_bits (val)
132 unsigned int val;
133{
134 int bits;
135
136 for (bits = 0; val != 0; val &= val - 1)
137 bits++;
138
139 return bits;
140}
141
142/* Get an entry in the opcode-table. */
143
144static const struct cris_opcode *
145get_opcode_entry (insn, prefix_insn)
146 unsigned int insn;
147 unsigned int prefix_insn;
148{
149 /* For non-prefixed insns, we keep a table of pointers, indexed by the
150 insn code. Each entry is initialized when found to be NULL. */
151 static const struct cris_opcode **opc_table = NULL;
152
153 const struct cris_opcode *max_matchedp = NULL;
154 const struct cris_opcode **prefix_opc_table = NULL;
155
156 /* We hold a table for each prefix that need to be handled differently. */
157 static const struct cris_opcode **dip_prefixes = NULL;
158 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
159 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
160 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
161 static const struct cris_opcode **rest_prefixes = NULL;
162
163 /* Allocate and clear the opcode-table. */
164 if (opc_table == NULL)
165 {
166 opc_table = xmalloc (65536 * sizeof (opc_table[0]));
167 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *));
168
169 dip_prefixes
170 = xmalloc (65536 * sizeof (const struct cris_opcode **));
171 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0]));
172
173 bdapq_m1_prefixes
174 = xmalloc (65536 * sizeof (const struct cris_opcode **));
175 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0]));
176
177 bdapq_m2_prefixes
178 = xmalloc (65536 * sizeof (const struct cris_opcode **));
179 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0]));
180
181 bdapq_m4_prefixes
182 = xmalloc (65536 * sizeof (const struct cris_opcode **));
183 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0]));
184
185 rest_prefixes
186 = xmalloc (65536 * sizeof (const struct cris_opcode **));
187 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0]));
188 }
189
190 /* Get the right table if this is a prefix.
191 This code is connected to cris_constraints in that it knows what
192 prefixes play a role in recognition of patterns; the necessary
193 state is reflected by which table is used. If constraints
194 involving match or non-match of prefix insns are changed, then this
195 probably needs changing too. */
196 if (prefix_insn != NO_CRIS_PREFIX)
197 {
198 const struct cris_opcode *popcodep
199 = (opc_table[prefix_insn] != NULL
200 ? opc_table[prefix_insn]
201 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX));
202
203 if (popcodep == NULL)
204 return NULL;
205
206 if (popcodep->match == BDAP_QUICK_OPCODE)
207 {
208 /* Since some offsets are recognized with "push" macros, we
209 have to have different tables for them. */
210 int offset = (prefix_insn & 255);
211
212 if (offset > 127)
213 offset -= 256;
214
215 switch (offset)
216 {
217 case -4:
218 prefix_opc_table = bdapq_m4_prefixes;
219 break;
220
221 case -2:
222 prefix_opc_table = bdapq_m2_prefixes;
223 break;
224
225 case -1:
226 prefix_opc_table = bdapq_m1_prefixes;
227 break;
228
229 default:
230 prefix_opc_table = rest_prefixes;
231 break;
232 }
233 }
234 else if (popcodep->match == DIP_OPCODE)
235 /* We don't allow postincrement when the prefix is DIP, so use a
236 different table for DIP. */
237 prefix_opc_table = dip_prefixes;
238 else
239 prefix_opc_table = rest_prefixes;
240 }
241
242 if (prefix_insn != NO_CRIS_PREFIX
243 && prefix_opc_table[insn] != NULL)
244 max_matchedp = prefix_opc_table[insn];
245 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
246 max_matchedp = opc_table[insn];
247 else
248 {
249 const struct cris_opcode *opcodep;
250 int max_level_of_match = -1;
251
252 for (opcodep = cris_opcodes;
253 opcodep->name != NULL;
254 opcodep++)
255 {
256 int level_of_match;
257
258 /* We give a double lead for bits matching the template in
259 cris_opcodes. Not even, because then "move p8,r10" would
260 be given 2 bits lead over "clear.d r10". When there's a
261 tie, the first entry in the table wins. This is
262 deliberate, to avoid a more complicated recognition
263 formula. */
264 if ((opcodep->match & insn) == opcodep->match
265 && (opcodep->lose & insn) == 0
266 && ((level_of_match
267 = cris_constraint (opcodep->args,
268 insn,
269 prefix_insn))
270 >= 0)
271 && ((level_of_match
272 += 2 * number_of_bits (opcodep->match
273 | opcodep->lose))
274 > max_level_of_match))
275 {
276 max_matchedp = opcodep;
277 max_level_of_match = level_of_match;
278
279 /* If there was a full match, never mind looking
280 further. */
281 if (level_of_match >= 2 * 16)
282 break;
283 }
284 }
285 /* Fill in the new entry.
286
287 If there are changes to the opcode-table involving prefixes, and
288 disassembly then does not work correctly, try removing the
289 else-clause below that fills in the prefix-table. If that
290 helps, you need to change the prefix_opc_table setting above, or
291 something related. */
292 if (prefix_insn == NO_CRIS_PREFIX)
293 opc_table[insn] = max_matchedp;
294 else
295 prefix_opc_table[insn] = max_matchedp;
296 }
297
298 return max_matchedp;
299}
300
301/* Format number as hex with a leading "0x" into outbuffer. */
302
303static char *
304format_hex (number, outbuffer)
305 unsigned long number;
306 char *outbuffer;
307{
308 /* Obfuscate to avoid warning on 32-bit host, but properly truncate
309 negative numbers on >32-bit hosts. */
310 if (sizeof (number) > 4)
311 number &= (1 << (sizeof (number) > 4 ? 32 : 1)) - 1;
312
313 sprintf (outbuffer, "0x%lx", number);
314
315 /* Save this value for the "case" support. */
316 if (TRACE_CASE)
317 last_immediate = number;
318
319 return outbuffer + strlen (outbuffer);
320}
321
322/* Format number as decimal into outbuffer. Parameter signedp says
323 whether the number should be formatted as signed (!= 0) or
324 unsigned (== 0). */
325
326static char *
327format_dec (number, outbuffer, signedp)
328 long number;
329 char *outbuffer;
330 int signedp;
331{
332 last_immediate = number;
333 sprintf (outbuffer, signedp ? "%ld" : "%lu", number);
334
335 return outbuffer + strlen (outbuffer);
336}
337
338/* Format the name of the general register regno into outbuffer. */
339
340static char *
341format_reg (regno, outbuffer_start, with_reg_prefix)
342 int regno;
343 char *outbuffer_start;
344 bfd_boolean with_reg_prefix;
345{
346 char *outbuffer = outbuffer_start;
347
348 if (with_reg_prefix)
349 *outbuffer++ = REGISTER_PREFIX_CHAR;
350
351 switch (regno)
352 {
353 case 15:
354 strcpy (outbuffer, "pc");
355 break;
356
357 case 14:
358 strcpy (outbuffer, "sp");
359 break;
360
361 default:
362 sprintf (outbuffer, "r%d", regno);
363 break;
364 }
365
366 return outbuffer_start + strlen (outbuffer_start);
367}
368
369/* Return -1 if the constraints of a bitwise-matched instruction say
370 that there is no match. Otherwise return a nonnegative number
371 indicating the confidence in the match (higher is better). */
372
373static int
374cris_constraint (cs, insn, prefix_insn)
375 const char *cs;
376 unsigned int insn;
377 unsigned int prefix_insn;
378{
379 int retval = 0;
380 int tmp;
381 int prefix_ok = 0;
382
383 const char *s;
384 for (s = cs; *s; s++)
385 switch (*s)
386 {
387 case '!':
388 /* Do not recognize "pop" if there's a prefix. */
389 if (prefix_insn != NO_CRIS_PREFIX)
390 return -1;
391 break;
392
393 case 'M':
394 /* Size modifier for "clear", i.e. special register 0, 4 or 8.
395 Check that it is one of them. Only special register 12 could
396 be mismatched, but checking for matches is more logical than
397 checking for mismatches when there are only a few cases. */
398 tmp = ((insn >> 12) & 0xf);
399 if (tmp != 0 && tmp != 4 && tmp != 8)
400 return -1;
401 break;
402
403 case 'm':
404 if ((insn & 0x30) == 0x30)
405 return -1;
406 break;
407
408 case 'S':
409 /* A prefix operand without side-effect. */
410 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
411 {
412 prefix_ok = 1;
413 break;
414 }
415 else
416 return -1;
417
418 case 's':
419 case 'y':
420 /* If this is a prefixed insn with postincrement (side-effect),
421 the prefix must not be DIP. */
422 if (prefix_insn != NO_CRIS_PREFIX)
423 {
424 if (insn & 0x400)
425 {
426 const struct cris_opcode *prefix_opcodep
427 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX);
428
429 if (prefix_opcodep->match == DIP_OPCODE)
430 return -1;
431 }
432
433 prefix_ok = 1;
434 }
435 break;
436
437 case 'B':
438 /* If we don't fall through, then the prefix is ok. */
439 prefix_ok = 1;
440
441 /* A "push" prefix. Check for valid "push" size.
442 In case of special register, it may be != 4. */
443 if (prefix_insn != NO_CRIS_PREFIX)
444 {
445 /* Match the prefix insn to BDAPQ. */
446 const struct cris_opcode *prefix_opcodep
447 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX);
448
449 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
450 {
451 int pushsize = (prefix_insn & 255);
452
453 if (pushsize > 127)
454 pushsize -= 256;
455
456 if (s[1] == 'P')
457 {
458 unsigned int spec_reg = (insn >> 12) & 15;
459 const struct cris_spec_reg *sregp
460 = spec_reg_info (spec_reg);
461
462 /* For a special-register, the "prefix size" must
463 match the size of the register. */
464 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
465 break;
466 }
467 else if (s[1] == 'R')
468 {
469 if ((insn & 0x30) == 0x20 && pushsize == -4)
470 break;
471 }
472 /* FIXME: Should abort here; next constraint letter
473 *must* be 'P' or 'R'. */
474 }
475 }
476 return -1;
477
478 case 'D':
479 retval = (((insn >> 12) & 15) == (insn & 15));
480 if (!retval)
481 return -1;
482 else
483 retval += 4;
484 break;
485
486 case 'P':
487 {
488 const struct cris_spec_reg *sregp
489 = spec_reg_info ((insn >> 12) & 15);
490
491 /* Since we match four bits, we will give a value of 4-1 = 3
492 in a match. If there is a corresponding exact match of a
493 special register in another pattern, it will get a value of
494 4, which will be higher. This should be correct in that an
495 exact pattern would match better than a general pattern.
496
497 Note that there is a reason for not returning zero; the
498 pattern for "clear" is partly matched in the bit-pattern
499 (the two lower bits must be zero), while the bit-pattern
500 for a move from a special register is matched in the
501 register constraint. */
502
503 if (sregp != NULL)
504 {
505 retval += 3;
506 break;
507 }
508 else
509 return -1;
510 }
511 }
512
513 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
514 return -1;
515
516 return retval;
517}
518
519/* Return the length of an instruction. */
520
521static unsigned
522bytes_to_skip (insn, matchedp)
523 unsigned int insn;
524 const struct cris_opcode *matchedp;
525{
526 /* Each insn is a word plus "immediate" operands. */
527 unsigned to_skip = 2;
528 const char *template = matchedp->args;
529 const char *s;
530
531 for (s = template; *s; s++)
532 if (*s == 's' && (insn & 0x400) && (insn & 15) == 15)
533 {
534 /* Immediate via [pc+], so we have to check the size of the
535 operand. */
536 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3));
537
538 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
539 to_skip += 4;
540 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
541 {
542 const struct cris_spec_reg *sregp
543 = spec_reg_info ((insn >> 12) & 15);
544
545 /* FIXME: Improve error handling; should have been caught
546 earlier. */
547 if (sregp == NULL)
548 return 2;
549
550 /* PC is incremented by two, not one, for a byte. */
551 to_skip += (sregp->reg_size + 1) & ~1;
552 }
553 else
554 to_skip += (mode_size + 1) & ~1;
555 }
556 else if (*s == 'b')
557 to_skip += 2;
558
559 return to_skip;
560}
561
562/* Print condition code flags. */
563
564static char *
565print_flags (insn, cp)
566 unsigned int insn;
567 char *cp;
568{
569 /* Use the v8 (Etrax 100) flag definitions for disassembly.
570 The differences with v0 (Etrax 1..4) vs. Svinto are:
571 v0 'd' <=> v8 'm'
572 v0 'e' <=> v8 'b'. */
573 static const char fnames[] = "cvznxibm";
574
575 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
576 int i;
577
578 for (i = 0; i < 8; i++)
579 if (flagbits & (1 << i))
580 *cp++ = fnames[i];
581
582 return cp;
583}
584
585/* Print out an insn with its operands, and update the info->insn_type
586 fields. The prefix_opcodep and the rest hold a prefix insn that is
587 supposed to be output as an address mode. */
588
589static void
590print_with_operands (opcodep, insn, buffer, addr, info, prefix_opcodep,
591 prefix_insn, prefix_buffer, with_reg_prefix)
592 const struct cris_opcode *opcodep;
593 unsigned int insn;
594 unsigned char *buffer;
595 bfd_vma addr;
596 disassemble_info *info;
597
598 /* If a prefix insn was before this insn (and is supposed to be
599 output as an address), here is a description of it. */
600 const struct cris_opcode *prefix_opcodep;
601 unsigned int prefix_insn;
602 unsigned char *prefix_buffer;
603 bfd_boolean with_reg_prefix;
604{
605 /* Get a buffer of somewhat reasonable size where we store
606 intermediate parts of the insn. */
607 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2];
608 char *tp = temp;
609 static const char mode_char[] = "bwd?";
610 const char *s;
611 const char *cs;
612
613 /* Print out the name first thing we do. */
614 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
615
616 cs = opcodep->args;
617 s = cs;
618
619 /* Ignore any prefix indicator. */
620 if (*s == 'p')
621 s++;
622
623 if (*s == 'm' || *s == 'M' || *s == 'z')
624 {
625 *tp++ = '.';
626
627 /* Get the size-letter. */
628 *tp++ = *s == 'M'
629 ? (insn & 0x8000 ? 'd'
630 : insn & 0x4000 ? 'w' : 'b')
631 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
632
633 /* Ignore the size and the space character that follows. */
634 s += 2;
635 }
636
637 /* Add a space if this isn't a long-branch, because for those will add
638 the condition part of the name later. */
639 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
640 *tp++ = ' ';
641
642 /* Fill in the insn-type if deducible from the name (and there's no
643 better way). */
644 if (opcodep->name[0] == 'j')
645 {
646 if (strncmp (opcodep->name, "jsr", 3) == 0)
647 /* It's "jsr" or "jsrc". */
648 info->insn_type = dis_jsr;
649 else
650 /* Any other jump-type insn is considered a branch. */
651 info->insn_type = dis_branch;
652 }
653
654 /* We might know some more fields right now. */
655 info->branch_delay_insns = opcodep->delayed;
656
657 /* Handle operands. */
658 for (; *s; s++)
659 {
660 switch (*s)
661 {
662 case ',':
663 *tp++ = *s;
664 break;
665
666 case '!':
667 /* Ignore at this point; used at earlier stages to avoid recognition
668 if there's a prefixes at something that in other ways looks like
669 a "pop". */
670 break;
671
672 case 'B':
673 /* This was the prefix that made this a "push". We've already
674 handled it by recognizing it, so signal that the prefix is
675 handled by setting it to NULL. */
676 prefix_opcodep = NULL;
677 break;
678
679 case 'D':
680 case 'r':
681 tp = format_reg (insn & 15, tp, with_reg_prefix);
682 break;
683
684 case 'R':
685 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix);
686 break;
687
688 case 'y':
689 case 'S':
690 case 's':
691 /* Any "normal" memory operand. */
692 if ((insn & 0x400) && (insn & 15) == 15)
693 {
694 /* We're looking at [pc+], i.e. we need to output an immediate
695 number, where the size can depend on different things. */
696 long number;
697 int signedp
698 = ((*cs == 'z' && (insn & 0x20))
699 || opcodep->match == BDAP_QUICK_OPCODE);
700 int nbytes;
701
702 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
703 nbytes = 4;
704 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
705 {
706 const struct cris_spec_reg *sregp
707 = spec_reg_info ((insn >> 12) & 15);
708
709 /* A NULL return should have been as a non-match earlier,
710 so catch it as an internal error in the error-case
711 below. */
712 if (sregp == NULL)
713 /* Whatever non-valid size. */
714 nbytes = 42;
715 else
716 /* PC is always incremented by a multiple of two. */
717 nbytes = (sregp->reg_size + 1) & ~1;
718 }
719 else
720 {
721 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
722
723 if (mode_size == 1)
724 nbytes = 2;
725 else
726 nbytes = mode_size;
727 }
728
729 switch (nbytes)
730 {
731 case 1:
732 number = buffer[2];
733 if (signedp && number > 127)
734 number -= 256;
735 break;
736
737 case 2:
738 number = buffer[2] + buffer[3] * 256;
739 if (signedp && number > 32767)
740 number -= 65536;
741 break;
742
743 case 4:
744 number
745 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
746 + buffer[5] * 0x1000000;
747 break;
748
749 default:
750 strcpy (tp, "bug");
751 tp += 3;
752 number = 42;
753 }
754
755 if ((*cs == 'z' && (insn & 0x20))
756 || (opcodep->match == BDAP_QUICK_OPCODE
757 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
758 tp = format_dec (number, tp, signedp);
759 else
760 {
761 unsigned int highbyte = (number >> 24) & 0xff;
762
763 /* Either output this as an address or as a number. If it's
764 a dword with the same high-byte as the address of the
765 insn, assume it's an address, and also if it's a non-zero
766 non-0xff high-byte. If this is a jsr or a jump, then
767 it's definitely an address. */
768 if (nbytes == 4
769 && (highbyte == ((addr >> 24) & 0xff)
770 || (highbyte != 0 && highbyte != 0xff)
771 || info->insn_type == dis_branch
772 || info->insn_type == dis_jsr))
773 {
774 /* Finish off and output previous formatted bytes. */
775 *tp = 0;
776 tp = temp;
777 if (temp[0])
778 (*info->fprintf_func) (info->stream, "%s", temp);
779
780 (*info->print_address_func) ((bfd_vma) number, info);
781
782 info->target = number;
783 }
784 else
785 tp = format_hex (number, tp);
786 }
787 }
788 else
789 {
790 /* Not an immediate number. Then this is a (possibly
791 prefixed) memory operand. */
792 if (info->insn_type != dis_nonbranch)
793 {
794 int mode_size
795 = 1 << ((insn >> 4)
796 & (opcodep->args[0] == 'z' ? 1 : 3));
797 int size;
798 info->insn_type = dis_dref;
799 info->flags |= CRIS_DIS_FLAG_MEMREF;
800
801 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
802 size = 4;
803 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
804 {
805 const struct cris_spec_reg *sregp
806 = spec_reg_info ((insn >> 12) & 15);
807
808 /* FIXME: Improve error handling; should have been caught
809 earlier. */
810 if (sregp == NULL)
811 size = 4;
812 else
813 size = sregp->reg_size;
814 }
815 else
816 size = mode_size;
817
818 info->data_size = size;
819 }
820
821 *tp++ = '[';
822
823 if (prefix_opcodep
824 /* We don't match dip with a postincremented field
825 as a side-effect address mode. */
826 && ((insn & 0x400) == 0
827 || prefix_opcodep->match != DIP_OPCODE))
828 {
829 if (insn & 0x400)
830 {
831 tp = format_reg (insn & 15, tp, with_reg_prefix);
832 *tp++ = '=';
833 }
834
835
836 /* We mainly ignore the prefix format string when the
837 address-mode syntax is output. */
838 switch (prefix_opcodep->match)
839 {
840 case DIP_OPCODE:
841 /* It's [r], [r+] or [pc+]. */
842 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
843 {
844 /* It's [pc+]. This cannot possibly be anything
845 but an address. */
846 unsigned long number
847 = prefix_buffer[2] + prefix_buffer[3] * 256
848 + prefix_buffer[4] * 65536
849 + prefix_buffer[5] * 0x1000000;
850
851 info->target = (bfd_vma) number;
852
853 /* Finish off and output previous formatted
854 data. */
855 *tp = 0;
856 tp = temp;
857 if (temp[0])
858 (*info->fprintf_func) (info->stream, "%s", temp);
859
860 (*info->print_address_func) ((bfd_vma) number, info);
861 }
862 else
863 {
864 /* For a memref in an address, we use target2.
865 In this case, target is zero. */
866 info->flags
867 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
868 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
869
870 info->target2 = prefix_insn & 15;
871
872 *tp++ = '[';
873 tp = format_reg (prefix_insn & 15, tp,
874 with_reg_prefix);
875 if (prefix_insn & 0x400)
876 *tp++ = '+';
877 *tp++ = ']';
878 }
879 break;
880
881 case BDAP_QUICK_OPCODE:
882 {
883 int number;
884
885 number = prefix_buffer[0];
886 if (number > 127)
887 number -= 256;
888
889 /* Output "reg+num" or, if num < 0, "reg-num". */
890 tp = format_reg ((prefix_insn >> 12) & 15, tp,
891 with_reg_prefix);
892 if (number >= 0)
893 *tp++ = '+';
894 tp = format_dec (number, tp, 1);
895
896 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
897 info->target = (prefix_insn >> 12) & 15;
898 info->target2 = (bfd_vma) number;
899 break;
900 }
901
902 case BIAP_OPCODE:
903 /* Output "r+R.m". */
904 tp = format_reg (prefix_insn & 15, tp, with_reg_prefix);
905 *tp++ = '+';
906 tp = format_reg ((prefix_insn >> 12) & 15, tp,
907 with_reg_prefix);
908 *tp++ = '.';
909 *tp++ = mode_char[(prefix_insn >> 4) & 3];
910
911 info->flags
912 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
913 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
914
915 | ((prefix_insn & 0x8000)
916 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
917 : ((prefix_insn & 0x8000)
918 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
919
920 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */
921 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
922 /* Then start interpreting data as offsets. */
923 case_offset_counter = no_of_case_offsets;
924 break;
925
926 case BDAP_INDIR_OPCODE:
927 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or
928 "r-s". */
929 tp = format_reg ((prefix_insn >> 12) & 15, tp,
930 with_reg_prefix);
931
932 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
933 {
934 long number;
935 unsigned int nbytes;
936
937 /* It's a value. Get its size. */
938 int mode_size = 1 << ((prefix_insn >> 4) & 3);
939
940 if (mode_size == 1)
941 nbytes = 2;
942 else
943 nbytes = mode_size;
944
945 switch (nbytes)
946 {
947 case 1:
948 number = prefix_buffer[2];
949 if (number > 127)
950 number -= 256;
951 break;
952
953 case 2:
954 number = prefix_buffer[2] + prefix_buffer[3] * 256;
955 if (number > 32767)
956 number -= 65536;
957 break;
958
959 case 4:
960 number
961 = prefix_buffer[2] + prefix_buffer[3] * 256
962 + prefix_buffer[4] * 65536
963 + prefix_buffer[5] * 0x1000000;
964 break;
965
966 default:
967 strcpy (tp, "bug");
968 tp += 3;
969 number = 42;
970 }
971
972 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
973 info->target2 = (bfd_vma) number;
974
975 /* If the size is dword, then assume it's an
976 address. */
977 if (nbytes == 4)
978 {
979 /* Finish off and output previous formatted
980 bytes. */
981 *tp++ = '+';
982 *tp = 0;
983 tp = temp;
984 (*info->fprintf_func) (info->stream, "%s", temp);
985
986 (*info->print_address_func) ((bfd_vma) number, info);
987 }
988 else
989 {
990 if (number >= 0)
991 *tp++ = '+';
992 tp = format_dec (number, tp, 1);
993 }
994 }
995 else
996 {
997 /* Output "r+[R].m" or "r+[R+].m". */
998 *tp++ = '+';
999 *tp++ = '[';
1000 tp = format_reg (prefix_insn & 15, tp,
1001 with_reg_prefix);
1002 if (prefix_insn & 0x400)
1003 *tp++ = '+';
1004 *tp++ = ']';
1005 *tp++ = '.';
1006 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1007
1008 info->flags
1009 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1010 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
1011 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1012
1013 | (((prefix_insn >> 4) == 2)
1014 ? 0
1015 : (((prefix_insn >> 4) & 3) == 1
1016 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
1017 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
1018 }
1019 break;
1020
1021 default:
1022 (*info->fprintf_func) (info->stream, "?prefix-bug");
1023 }
1024
1025 /* To mark that the prefix is used, reset it. */
1026 prefix_opcodep = NULL;
1027 }
1028 else
1029 {
1030 tp = format_reg (insn & 15, tp, with_reg_prefix);
1031
1032 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1033 info->target = insn & 15;
1034
1035 if (insn & 0x400)
1036 *tp++ = '+';
1037 }
1038 *tp++ = ']';
1039 }
1040 break;
1041
1042 case 'x':
1043 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix);
1044 *tp++ = '.';
1045 *tp++ = mode_char[(insn >> 4) & 3];
1046 break;
1047
1048 case 'I':
1049 tp = format_dec (insn & 63, tp, 0);
1050 break;
1051
1052 case 'b':
1053 {
1054 int where = buffer[2] + buffer[3] * 256;
1055
1056 if (where > 32767)
1057 where -= 65536;
1058
1059 where += addr + 4;
1060
1061 if (insn == BA_PC_INCR_OPCODE)
1062 info->insn_type = dis_branch;
1063 else
1064 info->insn_type = dis_condbranch;
1065
1066 info->target = (bfd_vma) where;
1067
1068 *tp = 0;
1069 tp = temp;
1070 (*info->fprintf_func) (info->stream, "%s%s ",
1071 temp, cris_cc_strings[insn >> 12]);
1072
1073 (*info->print_address_func) ((bfd_vma) where, info);
1074 }
1075 break;
1076
1077 case 'c':
1078 tp = format_dec (insn & 31, tp, 0);
1079 break;
1080
1081 case 'C':
1082 tp = format_dec (insn & 15, tp, 0);
1083 break;
1084
1085 case 'o':
1086 {
1087 long offset = insn & 0xfe;
1088
1089 if (insn & 1)
1090 offset |= ~0xff;
1091
1092 if (opcodep->match == BA_QUICK_OPCODE)
1093 info->insn_type = dis_branch;
1094 else
1095 info->insn_type = dis_condbranch;
1096
1097 info->target = (bfd_vma) (addr + 2 + offset);
1098 *tp = 0;
1099 tp = temp;
1100 (*info->fprintf_func) (info->stream, "%s", temp);
1101
1102 (*info->print_address_func) ((bfd_vma) (addr + 2 + offset), info);
1103 }
1104 break;
1105
1106 case 'O':
1107 {
1108 long number = buffer[0];
1109
1110 if (number > 127)
1111 number = number - 256;
1112
1113 tp = format_dec (number, tp, 1);
1114 *tp++ = ',';
1115 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix);
1116 }
1117 break;
1118
1119 case 'f':
1120 tp = print_flags (insn, tp);
1121 break;
1122
1123 case 'i':
1124 tp = format_dec ((insn & 32) ? (insn & 31) | ~31 : insn & 31, tp, 1);
1125 break;
1126
1127 case 'P':
1128 {
1129 const struct cris_spec_reg *sregp
1130 = spec_reg_info ((insn >> 12) & 15);
1131
1132 if (sregp->name == NULL)
1133 /* Should have been caught as a non-match eariler. */
1134 *tp++ = '?';
1135 else
1136 {
1137 if (with_reg_prefix)
1138 *tp++ = REGISTER_PREFIX_CHAR;
1139 strcpy (tp, sregp->name);
1140 tp += strlen (tp);
1141 }
1142 }
1143 break;
1144
1145 default:
1146 strcpy (tp, "???");
1147 tp += 3;
1148 }
1149 }
1150
1151 *tp = 0;
1152
1153 if (prefix_opcodep)
1154 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
1155 prefix_opcodep->name, prefix_opcodep->args);
1156
1157 (*info->fprintf_func) (info->stream, "%s", temp);
1158
1159 /* Get info for matching case-tables, if we don't have any active.
1160 We assume that the last constant seen is used; either in the insn
1161 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */
1162 if (TRACE_CASE && case_offset_counter == 0)
1163 {
1164 if (strncmp (opcodep->name, "sub", 3) == 0)
1165 case_offset = last_immediate;
1166
1167 /* It could also be an "add", if there are negative case-values. */
1168 else if (strncmp (opcodep->name, "add", 3) == 0)
1169 {
1170 /* The first case is the negated operand to the add. */
1171 case_offset = -last_immediate;
1172 }
1173 /* A bound insn will tell us the number of cases. */
1174 else if (strncmp (opcodep->name, "bound", 5) == 0)
1175 {
1176 no_of_case_offsets = last_immediate + 1;
1177 }
1178 /* A jump or jsr or branch breaks the chain of insns for a
1179 case-table, so assume default first-case again. */
1180 else if (info->insn_type == dis_jsr
1181 || info->insn_type == dis_branch
1182 || info->insn_type == dis_condbranch)
1183 case_offset = 0;
1184 }
1185}
1186
1187
1188/* Print the CRIS instruction at address memaddr on stream. Returns
1189 length of the instruction, in bytes. Prefix register names with `$' if
1190 WITH_REG_PREFIX. */
1191
1192static int
1193print_insn_cris_generic (memaddr, info, with_reg_prefix)
1194 bfd_vma memaddr;
1195 disassemble_info *info;
1196 bfd_boolean with_reg_prefix;
1197{
1198 int nbytes;
1199 unsigned int insn;
1200 const struct cris_opcode *matchedp;
1201 int advance = 0;
1202
1203 /* No instruction will be disassembled as longer than this number of
1204 bytes; stacked prefixes will not be expanded. */
1205 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
1206 unsigned char *bufp;
1207 int status = 0;
1208 bfd_vma addr;
1209
1210 /* There will be an "out of range" error after the last instruction.
1211 Reading pairs of bytes in decreasing number, we hope that we will get
1212 at least the amount that we will consume.
1213
1214 If we can't get any data, or we do not get enough data, we print
1215 the error message. */
1216
1217 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2)
1218 {
1219 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
1220 if (status == 0)
1221 break;
1222 }
1223
1224 /* If we did not get all we asked for, then clear the rest.
1225 Hopefully this makes a reproducible result in case of errors. */
1226 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
1227 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
1228
1229 addr = memaddr;
1230 bufp = buffer;
1231
1232 /* Set some defaults for the insn info. */
1233 info->insn_info_valid = 1;
1234 info->branch_delay_insns = 0;
1235 info->data_size = 0;
1236 info->insn_type = dis_nonbranch;
1237 info->flags = 0;
1238 info->target = 0;
1239 info->target2 = 0;
1240
1241 /* If we got any data, disassemble it. */
1242 if (nbytes != 0)
1243 {
1244 matchedp = NULL;
1245
1246 insn = bufp[0] + bufp[1] * 256;
1247
1248 /* If we're in a case-table, don't disassemble the offsets. */
1249 if (TRACE_CASE && case_offset_counter != 0)
1250 {
1251 info->insn_type = dis_noninsn;
1252 advance += 2;
1253
1254 /* If to print data as offsets, then shortcut here. */
1255 (*info->fprintf_func) (info->stream, "case %d%s: -> ",
1256 case_offset + no_of_case_offsets
1257 - case_offset_counter,
1258 case_offset_counter == 1 ? "/default" :
1259 "");
1260
1261 (*info->print_address_func) ((bfd_vma)
1262 ((short) (insn)
1263 + (long) (addr
1264 - (no_of_case_offsets
1265 - case_offset_counter)
1266 * 2)), info);
1267 case_offset_counter--;
1268
1269 /* The default case start (without a "sub" or "add") must be
1270 zero. */
1271 if (case_offset_counter == 0)
1272 case_offset = 0;
1273 }
1274 else if (insn == 0)
1275 {
1276 /* We're often called to disassemble zeroes. While this is a
1277 valid "bcc .+2" insn, it is also useless enough and enough
1278 of a nuiscance that we will just output "bcc .+2" for it
1279 and signal it as a noninsn. */
1280 (*info->fprintf_func) (info->stream, "bcc .+2");
1281 info->insn_type = dis_noninsn;
1282 advance += 2;
1283 }
1284 else
1285 {
1286 const struct cris_opcode *prefix_opcodep = NULL;
1287 unsigned char *prefix_buffer = bufp;
1288 unsigned int prefix_insn = insn;
1289 int prefix_size = 0;
1290
1291 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX);
1292
1293 /* Check if we're supposed to write out prefixes as address
1294 modes and if this was a prefix. */
1295 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
1296 {
1297 /* If it's a prefix, put it into the prefix vars and get the
1298 main insn. */
1299 prefix_size = bytes_to_skip (prefix_insn, matchedp);
1300 prefix_opcodep = matchedp;
1301
1302 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
1303 matchedp = get_opcode_entry (insn, prefix_insn);
1304
1305 if (matchedp != NULL)
1306 {
1307 addr += prefix_size;
1308 bufp += prefix_size;
1309 advance += prefix_size;
1310 }
1311 else
1312 {
1313 /* The "main" insn wasn't valid, at least not when
1314 prefixed. Put back things enough to output the
1315 prefix insn only, as a normal insn. */
1316 matchedp = prefix_opcodep;
1317 insn = prefix_insn;
1318 prefix_opcodep = NULL;
1319 }
1320 }
1321
1322 if (matchedp == NULL)
1323 {
1324 (*info->fprintf_func) (info->stream, "??0x%lx", insn);
1325 advance += 2;
1326
1327 info->insn_type = dis_noninsn;
1328 }
1329 else
1330 {
1331 advance += bytes_to_skip (insn, matchedp);
1332
1333 /* The info_type and assorted fields will be set according
1334 to the operands. */
1335 print_with_operands (matchedp, insn, bufp, addr, info,
1336 prefix_opcodep, prefix_insn,
1337 prefix_buffer, with_reg_prefix);
1338 }
1339 }
1340 }
1341 else
1342 info->insn_type = dis_noninsn;
1343
1344 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error
1345 status when reading that much, and the insn decoding indicated a
1346 length exceeding what we read, there is an error. */
1347 if (status != 0 && (nbytes == 0 || advance > nbytes))
1348 {
1349 (*info->memory_error_func) (status, memaddr, info);
1350 return -1;
1351 }
1352
1353 /* Max supported insn size with one folded prefix insn. */
1354 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
1355
1356 /* I would like to set this to a fixed value larger than the actual
1357 number of bytes to print in order to avoid spaces between bytes,
1358 but objdump.c (2.9.1) does not like that, so we print 16-bit
1359 chunks, which is the next choice. */
1360 info->bytes_per_chunk = 2;
1361
1362 /* Printing bytes in order of increasing addresses makes sense,
1363 especially on a little-endian target.
1364 This is completely the opposite of what you think; setting this to
1365 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N
1366 we want. */
1367 info->display_endian = BFD_ENDIAN_BIG;
1368
1369 return advance;
1370}
1371
1372/* Disassemble, prefixing register names with `$'. */
1373
1374static int
1375print_insn_cris_with_register_prefix (vma, info)
1376 bfd_vma vma;
1377 disassemble_info *info;
1378{
1379 return print_insn_cris_generic (vma, info, TRUE);
1380}
1381
1382/* Disassemble, no prefixes on register names. */
1383
1384static int
1385print_insn_cris_without_register_prefix (vma, info)
1386 bfd_vma vma;
1387 disassemble_info *info;
1388{
1389 return print_insn_cris_generic (vma, info, FALSE);
1390}
1391
1392/* Return a disassembler-function that prints registers with a `$' prefix,
1393 or one that prints registers without a prefix. */
1394
1395disassembler_ftype
1396cris_get_disassembler (abfd)
1397 bfd *abfd;
1398{
1399 /* If there's no bfd in sight, we return what is valid as input in all
1400 contexts if fed back to the assembler: disassembly *with* register
1401 prefix. */
1402 if (abfd == NULL || bfd_get_symbol_leading_char (abfd) == 0)
1403 return print_insn_cris_with_register_prefix;
1404
1405 return print_insn_cris_without_register_prefix;
1406}
1407
1408/*
1409 * Local variables:
1410 * eval: (c-set-style "gnu")
1411 * indent-tabs-mode: t
1412 * End:
1413 */
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