source: branches/libc-0.6/src/binutils/include/opcode/ChangeLog

Last change on this file was 610, checked in by bird, 22 years ago

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File size: 93.8 KB
Line 
12003-05-13 Stephane Carrez <stcarrez@nerim.fr>
2
3 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
4
52003-04-07 Michael Snyder <msnyder@redhat.com>
6
7 * h8300.h (ldc/stc): Fix up src/dst swaps.
8
92003-04-09 J. Grant <jg-binutils@jguk.org>
10
11 * mips.h: Correct comment typo.
12
132003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
14
15 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
16 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
17 (s390_opcode): Remove architecture. Add modes and min_cpu.
18
192003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
20
21 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
22 processing.
23
242003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
25
26 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
27
282003-01-23 Alan Modra <amodra@bigpond.net.au>
29
30 * m68hc11.h (cpu6812s): Define.
31
322003-01-07 Chris Demetriou <cgd@broadcom.com>
33
34 * mips.h: Fix missing space in comment.
35 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
36 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
37 by four bits.
38
392003-01-02 Chris Demetriou <cgd@broadcom.com>
40
41 * mips.h: Update copyright years to include 2002 (which had
42 been missed previously) and 2003. Make comments about "+A",
43 "+B", and "+C" operand types more descriptive.
44
452002-12-31 Chris Demetriou <cgd@broadcom.com>
46
47 * mips.h: Note that the "+D" operand type name is now used.
48
492002-12-30 Chris Demetriou <cgd@broadcom.com>
50
51 * mips.h: Document "+" as the start of two-character operand
52 type names, and add new "K", "+A", "+B", and "+C" operand types.
53 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
54 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
55 defines.
56
572002-12-24 Dmitry Diky <diwil@mail.ru>
58
59 * msp430.h: New file. Defines msp430 opcodes.
60
612002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
62
63 * h8300.h: Added some more pseudo opcodes for system call
64 processing.
65
662002-12-19 Chris Demetriou <cgd@broadcom.com>
67
68 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
69 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
70 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
71 (OP_OP_SDC2, OP_OP_SDC3): Define.
72
732002-12-16 Alan Modra <amodra@bigpond.net.au>
74
75 * hppa.h (completer_chars): #if 0 out.
76
77 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
78 "default_args".
79 (struct not_wot): Constify "args".
80 (struct not): Constify "name".
81 (numopcodes): Delete.
82 (endop): Delete.
83
842002-12-13 Alan Modra <amodra@bigpond.net.au>
85
86 * pj.h (pj_opc_info_t): Add union.
87
882002-12-04 David Mosberger <davidm@hpl.hp.com>
89
90 * ia64.h: Fix copyright message.
91 (IA64_OPND_AR_CSD): New operand kind.
92
932002-12-03 Richard Henderson <rth@redhat.com>
94
95 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
96
972002-12-03 Alan Modra <amodra@bigpond.net.au>
98
99 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
100 Constify "leaf" and "multi".
101
1022002-11-19 Klee Dienes <kdienes@apple.com>
103
104 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
105 fields.
106 (h8_opcodes). Modify initializer and initializer macros to no
107 longer initialize the removed fields.
108
1092002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
110
111 * tic4x.h (c4x_insts): Fixed LDHI constraint
112
1132002-11-18 Klee Dienes <kdienes@apple.com>
114
115 * h8300.h (h8_opcode): Remove 'length' field.
116 (h8_opcodes): Mark as 'const' (both the declaration and
117 definition). Modify initializer and initializer macros to no
118 longer initialize the length field.
119
1202002-11-18 Klee Dienes <kdienes@apple.com>
121
122 * arc.h (arc_ext_opcodes): Declare as extern.
123 (arc_ext_operands): Declare as extern.
124 * i860.h (i860_opcodes): Declare as const.
125
1262002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
127
128 * tic4x.h: File reordering. Added enhanced opcodes.
129
1302002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
131
132 * tic4x.h: Major rewrite of entire file. Define instruction
133 classes, and put each instruction into a class.
134
1352002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
136
137 * tic4x.h: Added new opcodes and corrected some bugs. Add support
138 for new DSP types.
139
1402002-10-14 Alan Modra <amodra@bigpond.net.au>
141
142 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
143
1442002-09-30 Gavin Romig-Koch <gavin@redhat.com>
145 Ken Raeburn <raeburn@cygnus.com>
146 Aldy Hernandez <aldyh@redhat.com>
147 Eric Christopher <echristo@redhat.com>
148 Richard Sandiford <rsandifo@redhat.com>
149
150 * mips.h: Update comment for new opcodes.
151 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
152 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
153 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
154 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
155 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
156 Don't match CPU_R4111 with INSN_4100.
157
1582002-08-19 Elena Zannoni <ezannoni@redhat.com>
159
160 From matthew green <mrg@redhat.com>
161
162 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
163 instructions.
164 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
165 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
166 e500x2 Integer select, branch locking, performance monitor,
167 cache locking and machine check APUs, respectively.
168 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
169 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
170
1712002-08-13 Stephane Carrez <stcarrez@nerim.fr>
172
173 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
174 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
175 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
176 memory banks.
177 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
178
1792002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
180
181 * mips.h (INSN_MIPS16): New define.
182
1832002-07-08 Alan Modra <amodra@bigpond.net.au>
184
185 * i386.h: Remove IgnoreSize from movsx and movzx.
186
1872002-06-08 Alan Modra <amodra@bigpond.net.au>
188
189 * a29k.h: Replace CONST with const.
190 (CONST): Don't define.
191 * convex.h: Replace CONST with const.
192 (CONST): Don't define.
193 * dlx.h: Replace CONST with const.
194 * or32.h (CONST): Don't define.
195
1962002-05-30 Chris G. Demetriou <cgd@broadcom.com>
197
198 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
199 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
200 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
201 (INSN_MDMX): New constants, for MDMX support.
202 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
203
2042002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
205
206 * dlx.h: New file.
207
2082002-05-25 Alan Modra <amodra@bigpond.net.au>
209
210 * ia64.h: Use #include "" instead of <> for local header files.
211 * sparc.h: Likewise.
212
2132002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
214
215 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
216
2172002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
218
219 * h8300.h: Corrected defs of all control regs
220 and eepmov instr.
221
2222002-04-11 Alan Modra <amodra@bigpond.net.au>
223
224 * i386.h: Add intel mode cmpsd and movsd.
225 Put them before SSE2 insns, so that rep prefix works.
226
2272002-03-15 Chris G. Demetriou <cgd@broadcom.com>
228
229 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
230 instructions.
231 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
232 may be passed along with the ISA bitmask.
233
2342002-03-05 Paul Koning <pkoning@equallogic.com>
235
236 * pdp11.h: Add format codes for float instruction formats.
237
2382002-02-25 Alan Modra <amodra@bigpond.net.au>
239
240 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
241
242Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
243
244 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
245
246Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
247
248 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
249 (xchg): Fix.
250 (in, out): Disable 64bit operands.
251 (call, jmp): Avoid REX prefixes.
252 (jcxz): Prohibit in 64bit mode
253 (jrcxz, loop): Add 64bit variants.
254 (movq): Fix patterns.
255 (movmskps, pextrw, pinstrw): Add 64bit variants.
256
2572002-01-31 Ivan Guzvinec <ivang@opencores.org>
258
259 * or32.h: New file.
260
2612002-01-22 Graydon Hoare <graydon@redhat.com>
262
263 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
264 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
265
2662002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
267
268 * h8300.h: Comment typo fix.
269
2702002-01-03 matthew green <mrg@redhat.com>
271
272 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
273 (PPC_OPCODE_BOOKE64): Likewise.
274
275Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
276
277 * hppa.h (call, ret): Move to end of table.
278 (addb, addib): PA2.0 variants should have been PA2.0W.
279 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
280 happy.
281 (fldw, fldd, fstw, fstd, bb): Likewise.
282 (short loads/stores): Tweak format specifier slightly to keep
283 disassembler happy.
284 (indexed loads/stores): Likewise.
285 (absolute loads/stores): Likewise.
286
2872001-12-04 Alexandre Oliva <aoliva@redhat.com>
288
289 * d10v.h (OPERAND_NOSP): New macro.
290
2912001-11-29 Alexandre Oliva <aoliva@redhat.com>
292
293 * d10v.h (OPERAND_SP): New macro.
294
2952001-11-15 Alan Modra <amodra@bigpond.net.au>
296
297 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
298
2992001-11-11 Timothy Wall <twall@alum.mit.edu>
300
301 * tic54x.h: Revise opcode layout; don't really need a separate
302 structure for parallel opcodes.
303
3042001-11-13 Zack Weinberg <zack@codesourcery.com>
305 Alan Modra <amodra@bigpond.net.au>
306
307 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
308 accept WordReg.
309
3102001-11-04 Chris Demetriou <cgd@broadcom.com>
311
312 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
313
3142001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
315
316 * mmix.h: New file.
317
3182001-10-18 Chris Demetriou <cgd@broadcom.com>
319
320 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
321 of the expression, to make source code merging easier.
322
3232001-10-17 Chris Demetriou <cgd@broadcom.com>
324
325 * mips.h: Sort coprocessor instruction argument characters
326 in comment, add a few more words of description for "H".
327
3282001-10-17 Chris Demetriou <cgd@broadcom.com>
329
330 * mips.h (INSN_SB1): New cpu-specific instruction bit.
331 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
332 if cpu is CPU_SB1.
333
3342001-10-17 matthew green <mrg@redhat.com>
335
336 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
337
3382001-10-12 matthew green <mrg@redhat.com>
339
340 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
341 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
342 instructions, respectively.
343
3442001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
345
346 * v850.h: Remove spurious comment.
347
3482001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
349
350 * h8300.h: Fix compile time warning messages
351
3522001-09-04 Richard Henderson <rth@redhat.com>
353
354 * alpha.h (struct alpha_operand): Pack elements into bitfields.
355
3562001-08-31 Eric Christopher <echristo@redhat.com>
357
358 * mips.h: Remove CPU_MIPS32_4K.
359
3602001-08-27 Torbjorn Granlund <tege@swox.com>
361
362 * ppc.h (PPC_OPERAND_DS): Define.
363
3642001-08-25 Andreas Jaeger <aj@suse.de>
365
366 * d30v.h: Fix declaration of reg_name_cnt.
367
368 * d10v.h: Fix declaration of d10v_reg_name_cnt.
369
370 * arc.h: Add prototypes from opcodes/arc-opc.c.
371
3722001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
373
374 * mips.h (INSN_10000): Define.
375 (OPCODE_IS_MEMBER): Check for INSN_10000.
376
3772001-08-10 Alan Modra <amodra@one.net.au>
378
379 * ppc.h: Revert 2001-08-08.
380
3812001-08-10 Richard Sandiford <rsandifo@redhat.com>
382
383 * mips.h (INSN_GP32): Remove.
384 (OPCODE_IS_MEMBER): Remove gp32 parameter.
385 (M_MOVE): New macro identifier.
386
3872001-08-08 Alan Modra <amodra@one.net.au>
388
389 1999-10-25 Torbjorn Granlund <tege@swox.com>
390 * ppc.h (struct powerpc_operand): New field `reloc'.
391
3922001-08-01 Aldy Hernandez <aldyh@redhat.com>
393
394 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
395
3962001-07-12 Jeff Johnston <jjohnstn@redhat.com>
397
398 * cgen.h (CGEN_INSN): Add regex support.
399 (build_insn_regex): Declare.
400
4012001-07-11 Frank Ch. Eigler <fche@redhat.com>
402
403 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
404 (cgen_cpu_desc): Ditto.
405
4062001-07-07 Ben Elliston <bje@redhat.com>
407
408 * m88k.h: Clean up and reformat. Remove unused code.
409
4102001-06-14 Geoffrey Keating <geoffk@redhat.com>
411
412 * cgen.h (cgen_keyword): Add nonalpha_chars field.
413
4142001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
415
416 * mips.h (CPU_R12000): Define.
417
4182001-05-23 John Healy <jhealy@redhat.com>
419
420 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
421
4222001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
423
424 * mips.h (INSN_ISA_MASK): Define.
425
4262001-05-12 Alan Modra <amodra@one.net.au>
427
428 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
429 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
430 and use InvMem as these insns must have register operands.
431
4322001-05-04 Alan Modra <amodra@one.net.au>
433
434 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
435 and pextrw to swap reg/rm assignments.
436
4372001-04-05 Hans-Peter Nilsson <hp@axis.com>
438
439 * cris.h (enum cris_insn_version_usage): Correct comment for
440 cris_ver_v3p.
441
4422001-03-24 Alan Modra <alan@linuxcare.com.au>
443
444 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
445 Add InvMem to first operand of "maskmovdqu".
446
4472001-03-22 Hans-Peter Nilsson <hp@axis.com>
448
449 * cris.h (ADD_PC_INCR_OPCODE): New macro.
450
4512001-03-21 Kazu Hirata <kazu@hxi.com>
452
453 * h8300.h: Fix formatting.
454
4552001-03-22 Alan Modra <alan@linuxcare.com.au>
456
457 * i386.h (i386_optab): Add paddq, psubq.
458
4592001-03-19 Alan Modra <alan@linuxcare.com.au>
460
461 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
462
4632001-02-28 Igor Shevlyakov <igor@windriver.com>
464
465 * m68k.h: new defines for Coldfire V4. Update mcf to know
466 about mcf5407.
467
4682001-02-18 lars brinkhoff <lars@nocrew.org>
469
470 * pdp11.h: New file.
471
4722001-02-12 Jan Hubicka <jh@suse.cz>
473
474 * i386.h (i386_optab): SSE integer converison instructions have
475 64bit versions on x86-64.
476
4772001-02-10 Nick Clifton <nickc@redhat.com>
478
479 * mips.h: Remove extraneous whitespace. Formating change to allow
480 for future contribution.
481
4822001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
483
484 * s390.h: New file.
485
4862001-02-02 Patrick Macdonald <patrickm@redhat.com>
487
488 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
489 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
490 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
491
4922001-01-24 Karsten Keil <kkeil@suse.de>
493
494 * i386.h (i386_optab): Fix swapgs
495
4962001-01-14 Alan Modra <alan@linuxcare.com.au>
497
498 * hppa.h: Describe new '<' and '>' operand types, and tidy
499 existing comments.
500 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
501 Remove duplicate "ldw j(s,b),x". Sort some entries.
502
5032001-01-13 Jan Hubicka <jh@suse.cz>
504
505 * i386.h (i386_optab): Fix pusha and ret templates.
506
5072001-01-11 Peter Targett <peter.targett@arccores.com>
508
509 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
510 definitions for masking cpu type.
511 (arc_ext_operand_value) New structure for storing extended
512 operands.
513 (ARC_OPERAND_*) Flags for operand values.
514
5152001-01-10 Jan Hubicka <jh@suse.cz>
516
517 * i386.h (pinsrw): Add.
518 (pshufw): Remove.
519 (cvttpd2dq): Fix operands.
520 (cvttps2dq): Likewise.
521 (movq2q): Rename to movdq2q.
522
5232001-01-10 Richard Schaal <richard.schaal@intel.com>
524
525 * i386.h: Correct movnti instruction.
526
5272001-01-09 Jeff Johnston <jjohnstn@redhat.com>
528
529 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
530 of operands (unsigned char or unsigned short).
531 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
532 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
533
5342001-01-05 Jan Hubicka <jh@suse.cz>
535
536 * i386.h (i386_optab): Make [sml]fence template to use immext field.
537
5382001-01-03 Jan Hubicka <jh@suse.cz>
539
540 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
541 introduced by Pentium4
542
5432000-12-30 Jan Hubicka <jh@suse.cz>
544
545 * i386.h (i386_optab): Add "rex*" instructions;
546 add swapgs; disable jmp/call far direct instructions for
547 64bit mode; add syscall and sysret; disable registers for 0xc6
548 template. Add 'q' suffixes to extendable instructions, disable
549 obsolete instructions, add new sign/zero extension ones.
550 (i386_regtab): Add extended registers.
551 (*Suf): Add No_qSuf.
552 (q_Suf, wlq_Suf, bwlq_Suf): New.
553
5542000-12-20 Jan Hubicka <jh@suse.cz>
555
556 * i386.h (i386_optab): Replace "Imm" with "EncImm".
557 (i386_regtab): Add flags field.
558
5592000-12-12 Nick Clifton <nickc@redhat.com>
560
561 * mips.h: Fix formatting.
562
5632000-12-01 Chris Demetriou <cgd@sibyte.com>
564
565 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
566 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
567 OP_*_SYSCALL definitions.
568 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
569 19 bit wait codes.
570 (MIPS operand specifier comments): Remove 'm', add 'U' and
571 'J', and update the meaning of 'B' so that it's more general.
572
573 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
574 INSN_ISA5): Renumber, redefine to mean the ISA at which the
575 instruction was added.
576 (INSN_ISA32): New constant.
577 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
578 Renumber to avoid new and/or renumbered INSN_* constants.
579 (INSN_MIPS32): Delete.
580 (ISA_UNKNOWN): New constant to indicate unknown ISA.
581 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
582 ISA_MIPS32): New constants, defined to be the mask of INSN_*
583 constants available at that ISA level.
584 (CPU_UNKNOWN): New constant to indicate unknown CPU.
585 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
586 define it with a unique value.
587 (OPCODE_IS_MEMBER): Update for new ISA membership-related
588 constant meanings.
589
590 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
591 definitions.
592
593 * mips.h (CPU_SB1): New constant.
594
5952000-10-20 Jakub Jelinek <jakub@redhat.com>
596
597 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
598 Note that '3' is used for siam operand.
599
6002000-09-22 Jim Wilson <wilson@cygnus.com>
601
602 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
603
6042000-09-13 Anders Norlander <anorland@acc.umu.se>
605
606 * mips.h: Use defines instead of hard-coded processor numbers.
607 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
608 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
609 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
610 CPU_4KC, CPU_4KM, CPU_4KP): Define..
611 (OPCODE_IS_MEMBER): Use new defines.
612 (OP_MASK_SEL, OP_SH_SEL): Define.
613 (OP_MASK_CODE20, OP_SH_CODE20): Define.
614 Add 'P' to used characters.
615 Use 'H' for coprocessor select field.
616 Use 'm' for 20 bit breakpoint code.
617 Document new arg characters and add to used characters.
618 (INSN_MIPS32): New define for MIPS32 extensions.
619 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
620
6212000-09-05 Alan Modra <alan@linuxcare.com.au>
622
623 * hppa.h: Mention cz completer.
624
6252000-08-16 Jim Wilson <wilson@cygnus.com>
626
627 * ia64.h (IA64_OPCODE_POSTINC): New.
628
6292000-08-15 H.J. Lu <hjl@gnu.org>
630
631 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
632 IgnoreSize change.
633
6342000-08-08 Jason Eckhardt <jle@cygnus.com>
635
636 * i860.h: Small formatting adjustments.
637
6382000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
639
640 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
641 Move related opcodes closer to each other.
642 Minor changes in comments, list undefined opcodes.
643
6442000-07-26 Dave Brolley <brolley@redhat.com>
645
646 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
647
6482000-07-22 Jason Eckhardt <jle@cygnus.com>
649
650 * i860.h (btne, bte, bla): Changed these opcodes
651 to use sbroff ('r') instead of split16 ('s').
652 (J, K, L, M): New operand types for 16-bit aligned fields.
653 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
654 use I, J, K, L, M instead of just I.
655 (T, U): New operand types for split 16-bit aligned fields.
656 (st.x): Changed these opcodes to use S, T, U instead of just S.
657 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
658 exist on the i860.
659 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
660 (pfeq.ss, pfeq.dd): New opcodes.
661 (st.s): Fixed incorrect mask bits.
662 (fmlow): Fixed incorrect mask bits.
663 (fzchkl, pfzchkl): Fixed incorrect mask bits.
664 (faddz, pfaddz): Fixed incorrect mask bits.
665 (form, pform): Fixed incorrect mask bits.
666 (pfld.l): Fixed incorrect mask bits.
667 (fst.q): Fixed incorrect mask bits.
668 (all floating point opcodes): Fixed incorrect mask bits for
669 handling of dual bit.
670
6712000-07-20 Hans-Peter Nilsson <hp@axis.com>
672
673 cris.h: New file.
674
6752000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
676
677 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
678 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
679 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
680 (AVR_ISA_M83): Define for ATmega83, ATmega85.
681 (espm): Remove, because ESPM removed in databook update.
682 (eicall, eijmp): Move to the end of opcode table.
683
6842000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
685
686 * m68hc11.h: New file for support of Motorola 68hc11.
687
688Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
689
690 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
691
692Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
693
694 * avr.h: New file with AVR opcodes.
695
696Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
697
698 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
699
7002000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
701
702 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
703
7042000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
705
706 * i386.h: Use sl_FP, not sl_Suf for fild.
707
7082000-05-16 Frank Ch. Eigler <fche@redhat.com>
709
710 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
711 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
712 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
713 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
714
7152000-05-13 Alan Modra <alan@linuxcare.com.au>,
716
717 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
718
7192000-05-13 Alan Modra <alan@linuxcare.com.au>,
720 Alexander Sokolov <robocop@netlink.ru>
721
722 * i386.h (i386_optab): Add cpu_flags for all instructions.
723
7242000-05-13 Alan Modra <alan@linuxcare.com.au>
725
726 From Gavin Romig-Koch <gavin@cygnus.com>
727 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
728
7292000-05-04 Timothy Wall <twall@cygnus.com>
730
731 * tic54x.h: New.
732
7332000-05-03 J.T. Conklin <jtc@redback.com>
734
735 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
736 (PPC_OPERAND_VR): New operand flag for vector registers.
737
7382000-05-01 Kazu Hirata <kazu@hxi.com>
739
740 * h8300.h (EOP): Add missing initializer.
741
742Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
743
744 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
745 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
746 New operand types l,y,&,fe,fE,fx added to support above forms.
747 (pa_opcodes): Replaced usage of 'x' as source/target for
748 floating point double-word loads/stores with 'fx'.
749
750Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
751 David Mosberger <davidm@hpl.hp.com>
752 Timothy Wall <twall@cygnus.com>
753 Jim Wilson <wilson@cygnus.com>
754
755 * ia64.h: New file.
756
7572000-03-27 Nick Clifton <nickc@cygnus.com>
758
759 * d30v.h (SHORT_A1): Fix value.
760 (SHORT_AR): Renumber so that it is at the end of the list of short
761 instructions, not the end of the list of long instructions.
762
7632000-03-26 Alan Modra <alan@linuxcare.com>
764
765 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
766 problem isn't really specific to Unixware.
767 (OLDGCC_COMPAT): Define.
768 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
769 destination %st(0).
770 Fix lots of comments.
771
7722000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
773
774 * d30v.h:
775 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
776 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
777 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
778 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
779 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
780 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
781 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
782
7832000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
784
785 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
786 fistpd without suffix.
787
7882000-02-24 Nick Clifton <nickc@cygnus.com>
789
790 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
791 'signed_overflow_ok_p'.
792 Delete prototypes for cgen_set_flags() and cgen_get_flags().
793
7942000-02-24 Andrew Haley <aph@cygnus.com>
795
796 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
797 (CGEN_CPU_TABLE): flags: new field.
798 Add prototypes for new functions.
799
8002000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
801
802 * i386.h: Add some more UNIXWARE_COMPAT comments.
803
8042000-02-23 Linas Vepstas <linas@linas.org>
805
806 * i370.h: New file.
807
8082000-02-22 Chandra Chavva <cchavva@cygnus.com>
809
810 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
811 cannot be combined in parallel with ADD/SUBppp.
812
8132000-02-22 Andrew Haley <aph@cygnus.com>
814
815 * mips.h: (OPCODE_IS_MEMBER): Add comment.
816
8171999-12-30 Andrew Haley <aph@cygnus.com>
818
819 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
820 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
821 insns.
822
8232000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
824
825 * i386.h: Qualify intel mode far call and jmp with x_Suf.
826
8271999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
828
829 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
830 indirect jumps and calls. Add FF/3 call for intel mode.
831
832Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
833
834 * mn10300.h: Add new operand types. Add new instruction formats.
835
836Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
837
838 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
839 instruction.
840
8411999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
842
843 * mips.h (INSN_ISA5): New.
844
8451999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
846
847 * mips.h (OPCODE_IS_MEMBER): New.
848
8491999-10-29 Nick Clifton <nickc@cygnus.com>
850
851 * d30v.h (SHORT_AR): Define.
852
8531999-10-18 Michael Meissner <meissner@cygnus.com>
854
855 * alpha.h (alpha_num_opcodes): Convert to unsigned.
856 (alpha_num_operands): Ditto.
857
858Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
859
860 * hppa.h (pa_opcodes): Add load and store cache control to
861 instructions. Add ordered access load and store.
862
863 * hppa.h (pa_opcode): Add new entries for addb and addib.
864
865 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
866
867 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
868
869Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
870
871 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
872
873Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
874
875 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
876 and "be" using completer prefixes.
877
878 * hppa.h (pa_opcodes): Add initializers to silence compiler.
879
880 * hppa.h: Update comments about character usage.
881
882Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
883
884 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
885 up the new fstw & bve instructions.
886
887Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
888
889 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
890 instructions.
891
892 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
893
894 * hppa.h (pa_opcodes): Add long offset double word load/store
895 instructions.
896
897 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
898 stores.
899
900 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
901
902 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
903
904 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
905
906 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
907
908 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
909
910 * hppa.h (pa_opcodes): Add support for "b,l".
911
912 * hppa.h (pa_opcodes): Add support for "b,gate".
913
914Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
915
916 * hppa.h (pa_opcodes): Use 'fX' for first register operand
917 in xmpyu.
918
919 * hppa.h (pa_opcodes): Fix mask for probe and probei.
920
921 * hppa.h (pa_opcodes): Fix mask for depwi.
922
923Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
924
925 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
926 an explicit output argument.
927
928Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
929
930 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
931 Add a few PA2.0 loads and store variants.
932
9331999-09-04 Steve Chamberlain <sac@pobox.com>
934
935 * pj.h: New file.
936
9371999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
938
939 * i386.h (i386_regtab): Move %st to top of table, and split off
940 other fp reg entries.
941 (i386_float_regtab): To here.
942
943Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
944
945 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
946 by 'f'.
947
948 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
949 Add supporting args.
950
951 * hppa.h: Document new completers and args.
952 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
953 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
954 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
955 pmenb and pmdis.
956
957 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
958 hshr, hsub, mixh, mixw, permh.
959
960 * hppa.h (pa_opcodes): Change completers in instructions to
961 use 'c' prefix.
962
963 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
964 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
965
966 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
967 fnegabs to use 'I' instead of 'F'.
968
9691999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
970
971 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
972 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
973 Alphabetically sort PIII insns.
974
975Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
976
977 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
978
979Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
980
981 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
982 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
983
984 * hppa.h: Document 64 bit condition completers.
985
986Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
987
988 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
989
9901999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
991
992 * i386.h (i386_optab): Add DefaultSize modifier to all insns
993 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
994 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
995
996Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
997 Jeff Law <law@cygnus.com>
998
999 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1000
1001 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1002
1003 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1004 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1005
10061999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1007
1008 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1009
1010Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1011
1012 * hppa.h (struct pa_opcode): Add new field "flags".
1013 (FLAGS_STRICT): Define.
1014
1015Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1016 Jeff Law <law@cygnus.com>
1017
1018 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1019
1020 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1021
10221999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1023
1024 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1025 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1026 flag to fcomi and friends.
1027
1028Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1029
1030 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1031 integer logical instructions.
1032
10331999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1034
1035 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1036 `n', `o'.
1037
1038 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1039 and new places `m', `M', `h'.
1040
1041Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1042
1043 * hppa.h (pa_opcodes): Add several processor specific system
1044 instructions.
1045
1046Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1047
1048 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1049 "addb", and "addib" to be used by the disassembler.
1050
10511999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1052
1053 * i386.h (ReverseModrm): Remove all occurences.
1054 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1055 movmskps, pextrw, pmovmskb, maskmovq.
1056 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1057 ignore the data size prefix.
1058
1059 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1060 Mostly stolen from Doug Ledford <dledford@redhat.com>
1061
1062Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1063
1064 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1065
10661999-04-14 Doug Evans <devans@casey.cygnus.com>
1067
1068 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1069 (CGEN_ATTR_TYPE): Update.
1070 (CGEN_ATTR_MASK): Number booleans starting at 0.
1071 (CGEN_ATTR_VALUE): Update.
1072 (CGEN_INSN_ATTR): Update.
1073
1074Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1075
1076 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1077 instructions.
1078
1079Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1080
1081 * hppa.h (bb, bvb): Tweak opcode/mask.
1082
1083
10841999-03-22 Doug Evans <devans@casey.cygnus.com>
1085
1086 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1087 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1088 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1089 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1090 Delete member max_insn_size.
1091 (enum cgen_cpu_open_arg): New enum.
1092 (cpu_open): Update prototype.
1093 (cpu_open_1): Declare.
1094 (cgen_set_cpu): Delete.
1095
10961999-03-11 Doug Evans <devans@casey.cygnus.com>
1097
1098 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1099 (CGEN_OPERAND_NIL): New macro.
1100 (CGEN_OPERAND): New member `type'.
1101 (@arch@_cgen_operand_table): Delete decl.
1102 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1103 (CGEN_OPERAND_TABLE): New struct.
1104 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1105 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1106 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1107 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1108 {get,set}_{int,vma}_operand.
1109 (@arch@_cgen_cpu_open): New arg `isa'.
1110 (cgen_set_cpu): Ditto.
1111
1112Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1113
1114 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1115
11161999-02-25 Doug Evans <devans@casey.cygnus.com>
1117
1118 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1119 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1120 enum cgen_hw_type.
1121 (CGEN_HW_TABLE): New struct.
1122 (hw_table): Delete declaration.
1123 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1124 to table entry to enum.
1125 (CGEN_OPINST): Ditto.
1126 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1127
1128Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1129
1130 * alpha.h (AXP_OPCODE_EV6): New.
1131 (AXP_OPCODE_NOPAL): Include it.
1132
11331999-02-09 Doug Evans <devans@casey.cygnus.com>
1134
1135 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1136 All uses updated. New members int_insn_p, max_insn_size,
1137 parse_operand,insert_operand,extract_operand,print_operand,
1138 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1139 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1140 extract_handlers,print_handlers.
1141 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1142 (CGEN_ATTR_BOOL_OFFSET): New macro.
1143 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1144 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1145 (cgen_opcode_handler): Renamed from cgen_base.
1146 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1147 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1148 all uses updated.
1149 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1150 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1151 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1152 (CGEN_OPCODE,CGEN_IBASE): New types.
1153 (CGEN_INSN): Rewrite.
1154 (CGEN_{ASM,DIS}_HASH*): Delete.
1155 (init_opcode_table,init_ibld_table): Declare.
1156 (CGEN_INSN_ATTR): New type.
1157
1158Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1159
1160 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1161 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1162 Change *Suf definitions to include x and d suffixes.
1163 (movsx): Use w_Suf and b_Suf.
1164 (movzx): Likewise.
1165 (movs): Use bwld_Suf.
1166 (fld): Change ordering. Use sld_FP.
1167 (fild): Add Intel Syntax equivalent of fildq.
1168 (fst): Use sld_FP.
1169 (fist): Use sld_FP.
1170 (fstp): Use sld_FP. Add x_FP version.
1171 (fistp): LLongMem version for Intel Syntax.
1172 (fcom, fcomp): Use sld_FP.
1173 (fadd, fiadd, fsub): Use sld_FP.
1174 (fsubr): Use sld_FP.
1175 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1176
11771999-01-27 Doug Evans <devans@casey.cygnus.com>
1178
1179 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1180 CGEN_MODE_UINT.
1181
11821999-01-16 Jeffrey A Law (law@cygnus.com)
1183
1184 * hppa.h (bv): Fix mask.
1185
11861999-01-05 Doug Evans <devans@casey.cygnus.com>
1187
1188 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1189 (CGEN_ATTR): Use it.
1190 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1191 (CGEN_ATTR_TABLE): New member dfault.
1192
11931998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1194
1195 * mips.h (MIPS16_INSN_BRANCH): New.
1196
1197Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1198
1199 The following is part of a change made by Edith Epstein
1200 <eepstein@sophia.cygnus.com> as part of a project to merge in
1201 changes by HP; HP did not create ChangeLog entries.
1202
1203 * hppa.h (completer_chars): list of chars to not put a space
1204 after.
1205
1206Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1207
1208 * i386.h (i386_optab): Permit w suffix on processor control and
1209 status word instructions.
1210
12111998-11-30 Doug Evans <devans@casey.cygnus.com>
1212
1213 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1214 (struct cgen_keyword_entry): Ditto.
1215 (struct cgen_operand): Ditto.
1216 (CGEN_IFLD): New typedef, with associated access macros.
1217 (CGEN_IFMT): New typedef, with associated access macros.
1218 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1219 (CGEN_IVALUE): New typedef.
1220 (struct cgen_insn): Delete const on syntax,attrs members.
1221 `format' now points to format data. Type of `value' is now
1222 CGEN_IVALUE.
1223 (struct cgen_opcode_table): New member ifld_table.
1224
12251998-11-18 Doug Evans <devans@casey.cygnus.com>
1226
1227 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1228 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1229 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1230 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1231 (cgen_opcode_table): Update type of dis_hash fn.
1232 (extract_operand): Update type of `insn_value' arg.
1233
1234Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1235
1236 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1237
1238Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1239
1240 * mips.h (INSN_MULT): Added.
1241
1242Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1243
1244 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1245
1246Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1247
1248 * cgen.h (CGEN_INSN_INT): New typedef.
1249 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1250 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1251 (CGEN_INSN_BYTES_PTR): New typedef.
1252 (CGEN_EXTRACT_INFO): New typedef.
1253 (cgen_insert_fn,cgen_extract_fn): Update.
1254 (cgen_opcode_table): New member `insn_endian'.
1255 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1256 (insert_operand,extract_operand): Update.
1257 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1258
1259Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1260
1261 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1262 (struct CGEN_HW_ENTRY): New member `attrs'.
1263 (CGEN_HW_ATTR): New macro.
1264 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1265 (CGEN_INSN_INVALID_P): New macro.
1266
1267Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1268
1269 * hppa.h: Add "fid".
1270
1271Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1272
1273 From Robert Andrew Dale <rob@nb.net>
1274 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1275 (AMD_3DNOW_OPCODE): Define.
1276
1277Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1278
1279 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1280
1281Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1282
1283 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1284
1285Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1286
1287 Move all global state data into opcode table struct, and treat
1288 opcode table as something that is "opened/closed".
1289 * cgen.h (CGEN_OPCODE_DESC): New type.
1290 (all fns): New first arg of opcode table descriptor.
1291 (cgen_set_parse_operand_fn): Add prototype.
1292 (cgen_current_machine,cgen_current_endian): Delete.
1293 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1294 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1295 dis_hash_table,dis_hash_table_entries.
1296 (opcode_open,opcode_close): Add prototypes.
1297
1298 * cgen.h (cgen_insn): New element `cdx'.
1299
1300Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1301
1302 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1303
1304Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1305
1306 * mn10300.h: Add "no_match_operands" field for instructions.
1307 (MN10300_MAX_OPERANDS): Define.
1308
1309Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1310
1311 * cgen.h (cgen_macro_insn_count): Declare.
1312
1313Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1314
1315 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1316 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1317 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1318 set_{int,vma}_operand.
1319
1320Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1321
1322 * mn10300.h: Add "machine" field for instructions.
1323 (MN103, AM30): Define machine types.
1324
1325Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1326
1327 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1328
13291998-06-18 Ulrich Drepper <drepper@cygnus.com>
1330
1331 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1332
1333Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1334
1335 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1336 and ud2b.
1337 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1338 those that happen to be implemented on pentiums.
1339
1340Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1341
1342 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1343 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1344 with Size16|IgnoreSize or Size32|IgnoreSize.
1345
1346Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1347
1348 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1349 (REPE): Rename to REPE_PREFIX_OPCODE.
1350 (i386_regtab_end): Remove.
1351 (i386_prefixtab, i386_prefixtab_end): Remove.
1352 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1353 of md_begin.
1354 (MAX_OPCODE_SIZE): Define.
1355 (i386_optab_end): Remove.
1356 (sl_Suf): Define.
1357 (sl_FP): Use sl_Suf.
1358
1359 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1360 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1361 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1362 data32, dword, and adword prefixes.
1363 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1364 regs.
1365
1366Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1367
1368 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1369
1370 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1371 register operands, because this is a common idiom. Flag them with
1372 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1373 fdivrp because gcc erroneously generates them. Also flag with a
1374 warning.
1375
1376 * i386.h: Add suffix modifiers to most insns, and tighter operand
1377 checks in some cases. Fix a number of UnixWare compatibility
1378 issues with float insns. Merge some floating point opcodes, using
1379 new FloatMF modifier.
1380 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1381 consistency.
1382
1383 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1384 IgnoreDataSize where appropriate.
1385
1386Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1387
1388 * i386.h: (one_byte_segment_defaults): Remove.
1389 (two_byte_segment_defaults): Remove.
1390 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1391
1392Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1393
1394 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1395 (cgen_hw_lookup_by_num): Declare.
1396
1397Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1398
1399 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1400 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1401
1402Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1403
1404 * cgen.h (cgen_asm_init_parse): Delete.
1405 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1406 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1407
1408Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1409
1410 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1411 (cgen_asm_finish_insn): Update prototype.
1412 (cgen_insn): New members num, data.
1413 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1414 dis_hash, dis_hash_table_size moved to ...
1415 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1416 All uses updated. New members asm_hash_p, dis_hash_p.
1417 (CGEN_MINSN_EXPANSION): New struct.
1418 (cgen_expand_macro_insn): Declare.
1419 (cgen_macro_insn_count): Declare.
1420 (get_insn_operands): Update prototype.
1421 (lookup_get_insn_operands): Declare.
1422
1423Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1424
1425 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1426 regKludge. Add operands types for string instructions.
1427
1428Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1429
1430 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1431 table.
1432
1433Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1434
1435 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1436 for `gettext'.
1437
1438Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1439
1440 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1441 Add IsString flag to string instructions.
1442 (IS_STRING): Don't define.
1443 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1444 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1445 (SS_PREFIX_OPCODE): Define.
1446
1447Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1448
1449 * i386.h: Revert March 24 patch; no more LinearAddress.
1450
1451Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1452
1453 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1454 instructions, and instead add FWait opcode modifier. Add short
1455 form of fldenv and fstenv.
1456 (FWAIT_OPCODE): Define.
1457
1458 * i386.h (i386_optab): Change second operand constraint of `mov
1459 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1460 allow legal instructions such as `movl %gs,%esi'
1461
1462Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1463
1464 * h8300.h: Various changes to fully bracket initializers.
1465
1466Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1467
1468 * i386.h: Set LinearAddress for lidt and lgdt.
1469
1470Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1471
1472 * cgen.h (CGEN_BOOL_ATTR): New macro.
1473
1474Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1475
1476 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1477
1478Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1479
1480 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1481 (cgen_insn): Record syntax and format entries here, rather than
1482 separately.
1483
1484Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1485
1486 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1487
1488Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1489
1490 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1491 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1492 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1493
1494Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1495
1496 * cgen.h (lookup_insn): New argument alias_p.
1497
1498Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1499
1500Fix rac to accept only a0:
1501 * d10v.h (OPERAND_ACC): Split into:
1502 (OPERAND_ACC0, OPERAND_ACC1) .
1503 (OPERAND_GPR): Define.
1504
1505Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1506
1507 * cgen.h (CGEN_FIELDS): Define here.
1508 (CGEN_HW_ENTRY): New member `type'.
1509 (hw_list): Delete decl.
1510 (enum cgen_mode): Declare.
1511 (CGEN_OPERAND): New member `hw'.
1512 (enum cgen_operand_instance_type): Declare.
1513 (CGEN_OPERAND_INSTANCE): New type.
1514 (CGEN_INSN): New member `operands'.
1515 (CGEN_OPCODE_DATA): Make hw_list const.
1516 (get_insn_operands,lookup_insn): Add prototypes for.
1517
1518Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1519
1520 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1521 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1522 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1523 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1524
1525Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1526
1527 * cgen.h: Correct typo in comment end marker.
1528
1529Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1530
1531 * tic30.h: New file.
1532
1533Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1534
1535 * cgen.h: Add prototypes for cgen_save_fixups(),
1536 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1537 of cgen_asm_finish_insn() to return a char *.
1538
1539Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1540
1541 * cgen.h: Formatting changes to improve readability.
1542
1543Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1544
1545 * cgen.h (*): Clean up pass over `struct foo' usage.
1546 (CGEN_ATTR): Make unsigned char.
1547 (CGEN_ATTR_TYPE): Update.
1548 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1549 (cgen_base): Move member `attrs' to cgen_insn.
1550 (CGEN_KEYWORD): New member `null_entry'.
1551 (CGEN_{SYNTAX,FORMAT}): New types.
1552 (cgen_insn): Format and syntax separated from each other.
1553
1554Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1555
1556 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1557 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1558 flags_{used,set} long.
1559 (d30v_operand): Make flags field long.
1560
1561Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1562
1563 * m68k.h: Fix comment describing operand types.
1564
1565Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1566
1567 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1568 everything else after down.
1569
1570Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1571
1572 * d10v.h (OPERAND_FLAG): Split into:
1573 (OPERAND_FFLAG, OPERAND_CFLAG) .
1574
1575Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1576
1577 * mips.h (struct mips_opcode): Changed comments to reflect new
1578 field usage.
1579
1580Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1581
1582 * mips.h: Added to comments a quick-ref list of all assigned
1583 operand type characters.
1584 (OP_{MASK,SH}_PERFREG): New macros.
1585
1586Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1587
1588 * sparc.h: Add '_' and '/' for v9a asr's.
1589 Patch from David Miller <davem@vger.rutgers.edu>
1590
1591Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1592
1593 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1594 area are not available in the base model (H8/300).
1595
1596Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1597
1598 * m68k.h: Remove documentation of ` operand specifier.
1599
1600Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1601
1602 * m68k.h: Document q and v operand specifiers.
1603
1604Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1605
1606 * v850.h (struct v850_opcode): Add processors field.
1607 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1608 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1609 (PROCESSOR_V850EA): New bit constants.
1610
1611Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1612
1613 Merge changes from Martin Hunt:
1614
1615 * d30v.h: Allow up to 64 control registers. Add
1616 SHORT_A5S format.
1617
1618 * d30v.h (LONG_Db): New form for delayed branches.
1619
1620 * d30v.h: (LONG_Db): New form for repeati.
1621
1622 * d30v.h (SHORT_D2B): New form.
1623
1624 * d30v.h (SHORT_A2): New form.
1625
1626 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1627 registers are used. Needed for VLIW optimization.
1628
1629Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1630
1631 * cgen.h: Move assembler interface section
1632 up so cgen_parse_operand_result is defined for cgen_parse_address.
1633 (cgen_parse_address): Update prototype.
1634
1635Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1636
1637 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1638
1639Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1640
1641 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1642 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1643 <paubert@iram.es>.
1644
1645 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1646 <paubert@iram.es>.
1647
1648 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1649 <paubert@iram.es>.
1650
1651 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1652 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1653
1654Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1655
1656 * v850.h (V850_NOT_R0): New flag.
1657
1658Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1659
1660 * v850.h (struct v850_opcode): Remove flags field.
1661
1662Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1663
1664 * v850.h (struct v850_opcode): Add flags field.
1665 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1666 fields.
1667 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1668 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1669
1670Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1671
1672 * arc.h: New file.
1673
1674Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1675
1676 * sparc.h (sparc_opcodes): Declare as const.
1677
1678Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1679
1680 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1681 uses single or double precision floating point resources.
1682 (INSN_NO_ISA, INSN_ISA1): Define.
1683 (cpu specific INSN macros): Tweak into bitmasks outside the range
1684 of INSN_ISA field.
1685
1686Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1687
1688 * i386.h: Fix pand opcode.
1689
1690Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1691
1692 * mips.h: Widen INSN_ISA and move it to a more convenient
1693 bit position. Add INSN_3900.
1694
1695Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1696
1697 * mips.h (struct mips_opcode): added new field membership.
1698
1699Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1700
1701 * i386.h (movd): only Reg32 is allowed.
1702
1703 * i386.h: add fcomp and ud2. From Wayne Scott
1704 <wscott@ichips.intel.com>.
1705
1706Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1707
1708 * i386.h: Add MMX instructions.
1709
1710Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1711
1712 * i386.h: Remove W modifier from conditional move instructions.
1713
1714Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1715
1716 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1717 with no arguments to match that generated by the UnixWare
1718 assembler.
1719
1720Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1721
1722 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1723 (cgen_parse_operand_fn): Declare.
1724 (cgen_init_parse_operand): Declare.
1725 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1726 new argument `want'.
1727 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1728 (enum cgen_parse_operand_type): New enum.
1729
1730Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1731
1732 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1733
1734Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1735
1736 * cgen.h: New file.
1737
1738Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1739
1740 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1741 fdivrp.
1742
1743Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1744
1745 * v850.h (extract): Make unsigned.
1746
1747Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1748
1749 * i386.h: Add iclr.
1750
1751Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1752
1753 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1754 take a direction bit.
1755
1756Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1757
1758 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1759
1760Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1761
1762 * sparc.h: Include <ansidecl.h>. Update function declarations to
1763 use prototypes, and to use const when appropriate.
1764
1765Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1766
1767 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1768
1769Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1770
1771 * d10v.h: Change pre_defined_registers to
1772 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1773
1774Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1775
1776 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1777 Change mips_opcodes from const array to a pointer,
1778 and change bfd_mips_num_opcodes from const int to int,
1779 so that we can increase the size of the mips opcodes table
1780 dynamically.
1781
1782Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1783
1784 * d30v.h (FLAG_X): Remove unused flag.
1785
1786Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1787
1788 * d30v.h: New file.
1789
1790Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1791
1792 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1793 (PDS_VALUE): Macro to access value field of predefined symbols.
1794 (tic80_next_predefined_symbol): Add prototype.
1795
1796Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1797
1798 * tic80.h (tic80_symbol_to_value): Change prototype to match
1799 change in function, added class parameter.
1800
1801Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1802
1803 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1804 endmask fields, which are somewhat weird in that 0 and 32 are
1805 treated exactly the same.
1806
1807Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1808
1809 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1810 rather than a constant that is 2**X. Reorder them to put bits for
1811 operands that have symbolic names in the upper bits, so they can
1812 be packed into an int where the lower bits contain the value that
1813 corresponds to that symbolic name.
1814 (predefined_symbo): Add struct.
1815 (tic80_predefined_symbols): Declare array of translations.
1816 (tic80_num_predefined_symbols): Declare size of that array.
1817 (tic80_value_to_symbol): Declare function.
1818 (tic80_symbol_to_value): Declare function.
1819
1820Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1821
1822 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1823
1824Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1825
1826 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1827 be the destination register.
1828
1829Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1830
1831 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1832 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1833 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1834 that the opcode can have two vector instructions in a single
1835 32 bit word and we have to encode/decode both.
1836
1837Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1838
1839 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1840 TIC80_OPERAND_RELATIVE for PC relative.
1841 (TIC80_OPERAND_BASEREL): New flag bit for register
1842 base relative.
1843
1844Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1845
1846 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1847
1848Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1849
1850 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1851 ":s" modifier for scaling.
1852
1853Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1854
1855 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1856 (TIC80_OPERAND_M_LI): Ditto
1857
1858Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1859
1860 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1861 (TIC80_OPERAND_CC): New define for condition code operand.
1862 (TIC80_OPERAND_CR): New define for control register operand.
1863
1864Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1865
1866 * tic80.h (struct tic80_opcode): Name changed.
1867 (struct tic80_opcode): Remove format field.
1868 (struct tic80_operand): Add insertion and extraction functions.
1869 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1870 correct ones.
1871 (FMT_*): Ditto.
1872
1873Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1874
1875 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1876 type IV instruction offsets.
1877
1878Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1879
1880 * tic80.h: New file.
1881
1882Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1883
1884 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1885
1886Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1887
1888 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1889 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1890 * v850.h: Fix comment, v850_operand not powerpc_operand.
1891
1892Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1893
1894 * mn10200.h: Flesh out structures and definitions needed by
1895 the mn10200 assembler & disassembler.
1896
1897Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1898
1899 * mips.h: Add mips16 definitions.
1900
1901Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1902
1903 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1904
1905Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1906
1907 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1908 (MN10300_OPERAND_MEMADDR): Define.
1909
1910Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1911
1912 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1913
1914Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1915
1916 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1917
1918Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1919
1920 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1921
1922Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1923
1924 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1925
1926Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1927
1928 * alpha.h: Don't include "bfd.h"; private relocation types are now
1929 negative to minimize problems with shared libraries. Organize
1930 instruction subsets by AMASK extensions and PALcode
1931 implementation.
1932 (struct alpha_operand): Move flags slot for better packing.
1933
1934Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1935
1936 * v850.h (V850_OPERAND_RELAX): New operand flag.
1937
1938Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1939
1940 * mn10300.h (FMT_*): Move operand format definitions
1941 here.
1942
1943Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1944
1945 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1946
1947Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1948
1949 * mn10300.h (mn10300_opcode): Add "format" field.
1950 (MN10300_OPERAND_*): Define.
1951
1952Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1953
1954 * mn10x00.h: Delete.
1955 * mn10200.h, mn10300.h: New files.
1956
1957Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1958
1959 * mn10x00.h: New file.
1960
1961Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1962
1963 * v850.h: Add new flag to indicate this instruction uses a PC
1964 displacement.
1965
1966Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1967
1968 * h8300.h (stmac): Add missing instruction.
1969
1970Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1971
1972 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1973 field.
1974
1975Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1976
1977 * v850.h (V850_OPERAND_EP): Define.
1978
1979 * v850.h (v850_opcode): Add size field.
1980
1981Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1982
1983 * v850.h (v850_operands): Add insert and extract fields, pointers
1984 to functions used to handle unusual operand encoding.
1985 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1986 V850_OPERAND_SIGNED): Defined.
1987
1988Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1989
1990 * v850.h (v850_operands): Add flags field.
1991 (OPERAND_REG, OPERAND_NUM): Defined.
1992
1993Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1994
1995 * v850.h: New file.
1996
1997Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1998
1999 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2000 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2001 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2002 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2003 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2004 Defined.
2005
2006Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2007
2008 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2009 a 3 bit space id instead of a 2 bit space id.
2010
2011Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2012
2013 * d10v.h: Add some additional defines to support the
2014 assembler in determining which operations can be done in parallel.
2015
2016Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2017
2018 * h8300.h (SN): Define.
2019 (eepmov.b): Renamed from "eepmov"
2020 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2021 with them.
2022
2023Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2024
2025 * d10v.h (OPERAND_SHIFT): New operand flag.
2026
2027Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2028
2029 * d10v.h: Changes for divs, parallel-only instructions, and
2030 signed numbers.
2031
2032Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2033
2034 * d10v.h (pd_reg): Define. Putting the definition here allows
2035 the assembler and disassembler to share the same struct.
2036
2037Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2038
2039 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2040 Williams <steve@icarus.com>.
2041
2042Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2043
2044 * d10v.h: New file.
2045
2046Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2047
2048 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2049
2050Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2051
2052 * m68k.h (mcf5200): New macro.
2053 Document names of coldfire control registers.
2054
2055Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2056
2057 * h8300.h (SRC_IN_DST): Define.
2058
2059 * h8300.h (UNOP3): Mark the register operand in this insn
2060 as a source operand, not a destination operand.
2061 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2062 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2063 register operand with SRC_IN_DST.
2064
2065Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2066
2067 * alpha.h: New file.
2068
2069Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2070
2071 * rs6k.h: Remove obsolete file.
2072
2073Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2074
2075 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2076 fdivp, and fdivrp. Add ffreep.
2077
2078Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2079
2080 * h8300.h: Reorder various #defines for readability.
2081 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2082 (BITOP): Accept additional (unused) argument. All callers changed.
2083 (EBITOP): Likewise.
2084 (O_LAST): Bump.
2085 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2086
2087 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2088 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2089 (BITOP, EBITOP): Handle new H8/S addressing modes for
2090 bit insns.
2091 (UNOP3): Handle new shift/rotate insns on the H8/S.
2092 (insns using exr): New instructions.
2093 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2094
2095Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2096
2097 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2098 was incorrect.
2099
2100Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2101
2102 * h8300.h (START): Remove.
2103 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2104 and mov.l insns that can be relaxed.
2105
2106Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2107
2108 * i386.h: Remove Abs32 from lcall.
2109
2110Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2111
2112 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2113 (SLCPOP): New macro.
2114 Mark X,Y opcode letters as in use.
2115
2116Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2117
2118 * sparc.h (F_FLOAT, F_FBR): Define.
2119
2120Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2121
2122 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2123 from all insns.
2124 (ABS8SRC,ABS8DST): Add ABS8MEM.
2125 (add.l): Fix reg+reg variant.
2126 (eepmov.w): Renamed from eepmovw.
2127 (ldc,stc): Fix many cases.
2128
2129Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2130
2131 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2132
2133Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2134
2135 * sparc.h (O): Mark operand letter as in use.
2136
2137Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2138
2139 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2140 Mark operand letters uU as in use.
2141
2142Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2143
2144 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2145 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2146 (SPARC_OPCODE_SUPPORTED): New macro.
2147 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2148 (F_NOTV9): Delete.
2149
2150Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2151
2152 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2153 declaration consistent with return type in definition.
2154
2155Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2156
2157 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2158
2159Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2160
2161 * i386.h (i386_regtab): Add 80486 test registers.
2162
2163Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2164
2165 * i960.h (I_HX): Define.
2166 (i960_opcodes): Add HX instruction.
2167
2168Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2169
2170 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2171 and fclex.
2172
2173Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2174
2175 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2176 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2177 (bfd_* defines): Delete.
2178 (sparc_opcode_archs): Replaces architecture_pname.
2179 (sparc_opcode_lookup_arch): Declare.
2180 (NUMOPCODES): Delete.
2181
2182Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2183
2184 * sparc.h (enum sparc_architecture): Add v9a.
2185 (ARCHITECTURES_CONFLICT_P): Update.
2186
2187Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2188
2189 * i386.h: Added Pentium Pro instructions.
2190
2191Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2192
2193 * m68k.h: Document new 'W' operand place.
2194
2195Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2196
2197 * hppa.h: Add lci and syncdma instructions.
2198
2199Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2200
2201 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2202 instructions.
2203
2204Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2205
2206 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2207 assembler's -mcom and -many switches.
2208
2209Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2210
2211 * i386.h: Fix cmpxchg8b extension opcode description.
2212
2213Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2214
2215 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2216 and register cr4.
2217
2218Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2219
2220 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2221
2222Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2223
2224 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2225
2226Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2227
2228 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2229
2230Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2231
2232 * m68kmri.h: Remove.
2233
2234 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2235 declarations. Remove F_ALIAS and flag field of struct
2236 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2237 int. Make name and args fields of struct m68k_opcode const.
2238
2239Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2240
2241 * sparc.h (F_NOTV9): Define.
2242
2243Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2244
2245 * mips.h (INSN_4010): Define.
2246
2247Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2248
2249 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2250
2251 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2252 * m68k.h: Fix argument descriptions of coprocessor
2253 instructions to allow only alterable operands where appropriate.
2254 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2255 (m68k_opcode_aliases): Add more aliases.
2256
2257Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2258
2259 * m68k.h: Added explcitly short-sized conditional branches, and a
2260 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2261 svr4-based configurations.
2262
2263Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2264
2265 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2266 * i386.h: added missing Data16/Data32 flags to a few instructions.
2267
2268Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2269
2270 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2271 (OP_MASK_BCC, OP_SH_BCC): Define.
2272 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2273 (OP_MASK_CCC, OP_SH_CCC): Define.
2274 (INSN_READ_FPR_R): Define.
2275 (INSN_RFE): Delete.
2276
2277Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2278
2279 * m68k.h (enum m68k_architecture): Deleted.
2280 (struct m68k_opcode_alias): New type.
2281 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2282 matching constraints, values and flags. As a side effect of this,
2283 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2284 as I know were never used, now may need re-examining.
2285 (numopcodes): Now const.
2286 (m68k_opcode_aliases, numaliases): New variables.
2287 (endop): Deleted.
2288 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2289 m68k_opcode_aliases; update declaration of m68k_opcodes.
2290
2291Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2292
2293 * hppa.h (delay_type): Delete unused enumeration.
2294 (pa_opcode): Replace unused delayed field with an architecture
2295 field.
2296 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2297
2298Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2299
2300 * mips.h (INSN_ISA4): Define.
2301
2302Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2303
2304 * mips.h (M_DLA_AB, M_DLI): Define.
2305
2306Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2307
2308 * hppa.h (fstwx): Fix single-bit error.
2309
2310Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2311
2312 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2313
2314Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2315
2316 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2317 debug registers. From Charles Hannum (mycroft@netbsd.org).
2318
2319Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2320
2321 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2322 i386 support:
2323 * i386.h (MOV_AX_DISP32): New macro.
2324 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2325 of several call/return instructions.
2326 (ADDR_PREFIX_OPCODE): New macro.
2327
2328Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2329
2330 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2331
2332 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2333 char.
2334 (struct vot, field `name'): ditto.
2335
2336Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2337
2338 * vax.h: Supply and properly group all values in end sentinel.
2339
2340Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2341
2342 * mips.h (INSN_ISA, INSN_4650): Define.
2343
2344Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2345
2346 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2347 systems with a separate instruction and data cache, such as the
2348 29040, these instructions take an optional argument.
2349
2350Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2351
2352 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2353 INSN_TRAP.
2354
2355Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2356
2357 * mips.h (INSN_STORE_MEMORY): Define.
2358
2359Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2360
2361 * sparc.h: Document new operand type 'x'.
2362
2363Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * i960.h (I_CX2): New instruction category. It includes
2366 instructions available on Cx and Jx processors.
2367 (I_JX): New instruction category, for JX-only instructions.
2368 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2369 Jx-only instructions, in I_JX category.
2370
2371Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2372
2373 * ns32k.h (endop): Made pointer const too.
2374
2375Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2376
2377 * ns32k.h: Drop Q operand type as there is no correct use
2378 for it. Add I and Z operand types which allow better checking.
2379
2380Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2381
2382 * h8300.h (xor.l) :fix bit pattern.
2383 (L_2): New size of operand.
2384 (trapa): Use it.
2385
2386Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2387
2388 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2389
2390Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2391
2392 * sparc.h: Include v9 definitions.
2393
2394Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2395
2396 * m68k.h (m68060): Defined.
2397 (m68040up, mfloat, mmmu): Include it.
2398 (struct m68k_opcode): Widen `arch' field.
2399 (m68k_opcodes): Updated for M68060. Removed comments that were
2400 instructions commented out by "JF" years ago.
2401
2402Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2403
2404 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2405 add a one-bit `flags' field.
2406 (F_ALIAS): New macro.
2407
2408Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2409
2410 * h8300.h (dec, inc): Get encoding right.
2411
2412Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2413
2414 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2415 a flag instead.
2416 (PPC_OPERAND_SIGNED): Define.
2417 (PPC_OPERAND_SIGNOPT): Define.
2418
2419Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2420
2421 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2422 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2423
2424Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2425
2426 * i386.h: Reverse last change. It'll be handled in gas instead.
2427
2428Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2429
2430 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2431 slower on the 486 and used the implicit shift count despite the
2432 explicit operand. The one-operand form is still available to get
2433 the shorter form with the implicit shift count.
2434
2435Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2436
2437 * hppa.h: Fix typo in fstws arg string.
2438
2439Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2440
2441 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2442
2443Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2444
2445 * ppc.h (PPC_OPCODE_601): Define.
2446
2447Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2448
2449 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2450 (so we can determine valid completers for both addb and addb[tf].)
2451
2452 * hppa.h (xmpyu): No floating point format specifier for the
2453 xmpyu instruction.
2454
2455Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2456
2457 * ppc.h (PPC_OPERAND_NEXT): Define.
2458 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2459 (struct powerpc_macro): Define.
2460 (powerpc_macros, powerpc_num_macros): Declare.
2461
2462Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2463
2464 * ppc.h: New file. Header file for PowerPC opcode table.
2465
2466Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2467
2468 * hppa.h: More minor template fixes for sfu and copr (to allow
2469 for easier disassembly).
2470
2471 * hppa.h: Fix templates for all the sfu and copr instructions.
2472
2473Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2474
2475 * i386.h (push): Permit Imm16 operand too.
2476
2477Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2478
2479 * h8300.h (andc): Exists in base arch.
2480
2481Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2482
2483 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2484 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2485
2486Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2487
2488 * hppa.h: Add FP quadword store instructions.
2489
2490Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2491
2492 * mips.h: (M_J_A): Added.
2493 (M_LA): Removed.
2494
2495Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2496
2497 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2498 <mellon@pepper.ncd.com>.
2499
2500Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2501
2502 * hppa.h: Immediate field in probei instructions is unsigned,
2503 not low-sign extended.
2504
2505Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2506
2507 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2508
2509Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2510
2511 * i386.h: Add "fxch" without operand.
2512
2513Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2514
2515 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2516
2517Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2518
2519 * hppa.h: Add gfw and gfr to the opcode table.
2520
2521Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2522
2523 * m88k.h: extended to handle m88110.
2524
2525Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2526
2527 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2528 addresses.
2529
2530Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2531
2532 * i960.h (i960_opcodes): Properly bracket initializers.
2533
2534Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2535
2536 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2537
2538Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2539
2540 * m68k.h (two): Protect second argument with parentheses.
2541
2542Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2543
2544 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2545 Deleted old in/out instructions in "#if 0" section.
2546
2547Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2548
2549 * i386.h (i386_optab): Properly bracket initializers.
2550
2551Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2552
2553 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2554 Jeff Law, law@cs.utah.edu).
2555
2556Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2557
2558 * i386.h (lcall): Accept Imm32 operand also.
2559
2560Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2561
2562 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2563 (M_DABS): Added.
2564
2565Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2566
2567 * mips.h (INSN_*): Changed values. Removed unused definitions.
2568 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2569 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2570 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2571 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2572 (M_*): Added new values for r6000 and r4000 macros.
2573 (ANY_DELAY): Removed.
2574
2575Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2576
2577 * mips.h: Added M_LI_S and M_LI_SS.
2578
2579Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2580
2581 * h8300.h: Get some rare mov.bs correct.
2582
2583Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2584
2585 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2586 been included.
2587
2588Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2589
2590 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2591 jump instructions, for use in disassemblers.
2592
2593Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2594
2595 * m88k.h: Make bitfields just unsigned, not unsigned long or
2596 unsigned short.
2597
2598Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2599
2600 * hppa.h: New argument type 'y'. Use in various float instructions.
2601
2602Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2603
2604 * hppa.h (break): First immediate field is unsigned.
2605
2606 * hppa.h: Add rfir instruction.
2607
2608Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2609
2610 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2611
2612Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2613
2614 * mips.h: Reworked the hazard information somewhat, and fixed some
2615 bugs in the instruction hazard descriptions.
2616
2617Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2618
2619 * m88k.h: Corrected a couple of opcodes.
2620
2621Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2622
2623 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2624 new version includes instruction hazard information, but is
2625 otherwise reasonably similar.
2626
2627Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2628
2629 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2630
2631Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2632
2633 Patches from Jeff Law, law@cs.utah.edu:
2634 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2635 Make the tables be the same for the following instructions:
2636 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2637 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2638 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2639 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2640 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2641 "fcmp", and "ftest".
2642
2643 * hppa.h: Make new and old tables the same for "break", "mtctl",
2644 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2645 Fix typo in last patch. Collapse several #ifdefs into a
2646 single #ifdef.
2647
2648 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2649 of the comments up-to-date.
2650
2651 * hppa.h: Update "free list" of letters and update
2652 comments describing each letter's function.
2653
2654Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2655
2656 * h8300.h: Lots of little fixes for the h8/300h.
2657
2658Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2659
2660 Support for H8/300-H
2661 * h8300.h: Lots of new opcodes.
2662
2663Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2664
2665 * h8300.h: checkpoint, includes H8/300-H opcodes.
2666
2667Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2668
2669 * Patches from Jeffrey Law <law@cs.utah.edu>.
2670 * hppa.h: Rework single precision FP
2671 instructions so that they correctly disassemble code
2672 PA1.1 code.
2673
2674Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2675
2676 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2677 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2678
2679Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2680
2681 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2682 gdb will define it for now.
2683
2684Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2685
2686 * sparc.h: Don't end enumerator list with comma.
2687
2688Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2689
2690 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2691 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2692 ("bc2t"): Correct typo.
2693 ("[ls]wc[023]"): Use T rather than t.
2694 ("c[0123]"): Define general coprocessor instructions.
2695
2696Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2697
2698 * m68k.h: Move split point for gcc compilation more towards
2699 middle.
2700
2701Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2702
2703 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2704 simply wrong, ics, rfi, & rfsvc were missing).
2705 Add "a" to opr_ext for "bb". Doc fix.
2706
2707Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2708
2709 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2710 * mips.h: Add casts, to suppress warnings about shifting too much.
2711 * m68k.h: Document the placement code '9'.
2712
2713Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2714
2715 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2716 allows callers to break up the large initialized struct full of
2717 opcodes into two half-sized ones. This permits GCC to compile
2718 this module, since it takes exponential space for initializers.
2719 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2720
2721Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2722
2723 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2724 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2725 initialized structs in it.
2726
2727Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2728
2729 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2730 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2731 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2732
2733Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2734
2735 * mips.h: document "i" and "j" operands correctly.
2736
2737Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2738
2739 * mips.h: Removed endianness dependency.
2740
2741Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2742
2743 * h8300.h: include info on number of cycles per instruction.
2744
2745Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2746
2747 * hppa.h: Move handy aliases to the front. Fix masks for extract
2748 and deposit instructions.
2749
2750Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2751
2752 * i386.h: accept shld and shrd both with and without the shift
2753 count argument, which is always %cl.
2754
2755Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2756
2757 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2758 (one_byte_segment_defaults, two_byte_segment_defaults,
2759 i386_prefixtab_end): Ditto.
2760
2761Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2762
2763 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2764 for operand 2; from John Carr, jfc@dsg.dec.com.
2765
2766Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2767
2768 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2769 always use 16-bit offsets. Makes calculated-size jump tables
2770 feasible.
2771
2772Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2773
2774 * i386.h: Fix one-operand forms of in* and out* patterns.
2775
2776Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2777
2778 * m68k.h: Added CPU32 support.
2779
2780Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2781
2782 * mips.h (break): Disassemble the argument. Patch from
2783 jonathan@cs.stanford.edu (Jonathan Stone).
2784
2785Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2786
2787 * m68k.h: merged Motorola and MIT syntax.
2788
2789Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2790
2791 * m68k.h (pmove): make the tests less strict, the 68k book is
2792 wrong.
2793
2794Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2795
2796 * m68k.h (m68ec030): Defined as alias for 68030.
2797 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2798 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2799 them. Tightened description of "fmovex" to distinguish it from
2800 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2801 up descriptions that claimed versions were available for chips not
2802 supporting them. Added "pmovefd".
2803
2804Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2805
2806 * m68k.h: fix where the . goes in divull
2807
2808Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2809
2810 * m68k.h: the cas2 instruction is supposed to be written with
2811 indirection on the last two operands, which can be either data or
2812 address registers. Added a new operand type 'r' which accepts
2813 either register type. Added new cases for cas2l and cas2w which
2814 use them. Corrected masks for cas2 which failed to recognize use
2815 of address register.
2816
2817Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2818
2819 * m68k.h: Merged in patches (mostly m68040-specific) from
2820 Colin Smith <colin@wrs.com>.
2821
2822 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2823 base). Also cleaned up duplicates, re-ordered instructions for
2824 the sake of dis-assembling (so aliases come after standard names).
2825 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2826
2827Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2828
2829 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2830 all missing .s
2831
2832Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2833
2834 * sparc.h: Moved tables to BFD library.
2835
2836 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2837
2838Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2839
2840 * h8300.h: Finish filling in all the holes in the opcode table,
2841 so that the Lucid C compiler can digest this as well...
2842
2843Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2844
2845 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2846 Fix opcodes on various sizes of fild/fist instructions
2847 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2848 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2849
2850Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2851
2852 * h8300.h: Fill in all the holes in the opcode table so that the
2853 losing HPUX C compiler can digest this...
2854
2855Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2856
2857 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2858 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2859
2860Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2861
2862 * sparc.h: Add new architecture variant sparclite; add its scan
2863 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2864
2865Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2866
2867 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2868 fy@lucid.com).
2869
2870Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2871
2872 * rs6k.h: New version from IBM (Metin).
2873
2874Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2875
2876 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2877 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2878
2879Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2880
2881 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2882
2883Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2884
2885 * m68k.h (one, two): Cast macro args to unsigned to suppress
2886 complaints from compiler and lint about integer overflow during
2887 shift.
2888
2889Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2890
2891 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2892
2893Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2894
2895 * mips.h: Make bitfield layout depend on the HOST compiler,
2896 not on the TARGET system.
2897
2898Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2899
2900 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2901 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2902 <TRANLE@INTELLICORP.COM>.
2903
2904Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2905
2906 * h8300.h: turned op_type enum into #define list
2907
2908Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2909
2910 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2911 similar instructions -- they've been renamed to "fitoq", etc.
2912 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2913 number of arguments.
2914 * h8300.h: Remove extra ; which produces compiler warning.
2915
2916Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2917
2918 * sparc.h: fix opcode for tsubcctv.
2919
2920Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2921
2922 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2923
2924Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2925
2926 * sparc.h (nop): Made the 'lose' field be even tighter,
2927 so only a standard 'nop' is disassembled as a nop.
2928
2929Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2930
2931 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2932 disassembled as a nop.
2933
2934Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2935
2936 * m68k.h, sparc.h: ANSIfy enums.
2937
2938Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2939
2940 * sparc.h: fix a typo.
2941
2942Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2943
2944 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2945 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2946 vax.h: Renamed from ../<foo>-opcode.h.
2947
2948
2949
2950Local Variables:
2951version-control: never
2952End:
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