source: branches/libc-0.6/src/binutils/bfd/elf32-m32r.c

Last change on this file was 610, checked in by bird, 22 years ago

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1/* M32R-specific support for 32-bit ELF.
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/m32r.h"
26
27static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
39bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
41static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
47bfd_boolean _bfd_m32r_elf_section_from_bfd_section
48 PARAMS ((bfd *, asection *, int *));
49void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51static bfd_boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54static bfd_boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
57#if 0 /* not yet */
58static bfd_boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
60#endif
61static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63static bfd_boolean m32r_elf_object_p
64 PARAMS ((bfd *));
65static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, bfd_boolean));
67static bfd_boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
69static bfd_boolean m32r_elf_merge_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71static bfd_boolean m32r_elf_print_private_bfd_data
72 PARAMS ((bfd *, PTR));
73static bfd_boolean m32r_elf_gc_sweep_hook
74 PARAMS ((bfd *, struct bfd_link_info *, asection *,
75 const Elf_Internal_Rela *));
76static bfd_boolean m32r_elf_check_relocs
77 PARAMS ((bfd *, struct bfd_link_info *, asection *,
78 const Elf_Internal_Rela *));
79
80asection * m32r_elf_gc_mark_hook
81 PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *,
82 struct elf_link_hash_entry *, Elf_Internal_Sym *));
83
84#define NOP_INSN 0x7000
85#define MAKE_PARALLEL(insn) ((insn) | 0x8000)
86
87/* Use REL instead of RELA to save space.
88 This only saves space in libraries and object files, but perhaps
89 relocs will be put in ROM? All in all though, REL relocs are a pain
90 to work with. */
91#define USE_REL 1
92
93#ifndef USE_REL
94#define USE_REL 0
95#endif
96
97static reloc_howto_type m32r_elf_howto_table[] =
98{
99 /* This reloc does nothing. */
100 HOWTO (R_M32R_NONE, /* type */
101 0, /* rightshift */
102 2, /* size (0 = byte, 1 = short, 2 = long) */
103 32, /* bitsize */
104 FALSE, /* pc_relative */
105 0, /* bitpos */
106 complain_overflow_bitfield, /* complain_on_overflow */
107 bfd_elf_generic_reloc, /* special_function */
108 "R_M32R_NONE", /* name */
109 FALSE, /* partial_inplace */
110 0, /* src_mask */
111 0, /* dst_mask */
112 FALSE), /* pcrel_offset */
113
114 /* A 16 bit absolute relocation. */
115 HOWTO (R_M32R_16, /* type */
116 0, /* rightshift */
117 1, /* size (0 = byte, 1 = short, 2 = long) */
118 16, /* bitsize */
119 FALSE, /* pc_relative */
120 0, /* bitpos */
121 complain_overflow_bitfield, /* complain_on_overflow */
122 m32r_elf_generic_reloc,/* special_function */
123 "R_M32R_16", /* name */
124 TRUE, /* partial_inplace */
125 0xffff, /* src_mask */
126 0xffff, /* dst_mask */
127 FALSE), /* pcrel_offset */
128
129 /* A 32 bit absolute relocation. */
130 HOWTO (R_M32R_32, /* type */
131 0, /* rightshift */
132 2, /* size (0 = byte, 1 = short, 2 = long) */
133 32, /* bitsize */
134 FALSE, /* pc_relative */
135 0, /* bitpos */
136 complain_overflow_bitfield, /* complain_on_overflow */
137 m32r_elf_generic_reloc,/* special_function */
138 "R_M32R_32", /* name */
139 TRUE, /* partial_inplace */
140 0xffffffff, /* src_mask */
141 0xffffffff, /* dst_mask */
142 FALSE), /* pcrel_offset */
143
144 /* A 24 bit address. */
145 HOWTO (R_M32R_24, /* type */
146 0, /* rightshift */
147 2, /* size (0 = byte, 1 = short, 2 = long) */
148 24, /* bitsize */
149 FALSE, /* pc_relative */
150 0, /* bitpos */
151 complain_overflow_unsigned, /* complain_on_overflow */
152 m32r_elf_generic_reloc,/* special_function */
153 "R_M32R_24", /* name */
154 TRUE, /* partial_inplace */
155 0xffffff, /* src_mask */
156 0xffffff, /* dst_mask */
157 FALSE), /* pcrel_offset */
158
159 /* An PC Relative 10-bit relocation, shifted by 2.
160 This reloc is complicated because relocations are relative to pc & -4.
161 i.e. branches in the right insn slot use the address of the left insn
162 slot for pc. */
163 /* ??? It's not clear whether this should have partial_inplace set or not.
164 Branch relaxing in the assembler can store the addend in the insn,
165 and if bfd_install_relocation gets called the addend may get added
166 again. */
167 HOWTO (R_M32R_10_PCREL, /* type */
168 2, /* rightshift */
169 1, /* size (0 = byte, 1 = short, 2 = long) */
170 10, /* bitsize */
171 TRUE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_signed, /* complain_on_overflow */
174 m32r_elf_10_pcrel_reloc, /* special_function */
175 "R_M32R_10_PCREL", /* name */
176 FALSE, /* partial_inplace */
177 0xff, /* src_mask */
178 0xff, /* dst_mask */
179 TRUE), /* pcrel_offset */
180
181 /* A relative 18 bit relocation, right shifted by 2. */
182 HOWTO (R_M32R_18_PCREL, /* type */
183 2, /* rightshift */
184 2, /* size (0 = byte, 1 = short, 2 = long) */
185 16, /* bitsize */
186 TRUE, /* pc_relative */
187 0, /* bitpos */
188 complain_overflow_signed, /* complain_on_overflow */
189 bfd_elf_generic_reloc, /* special_function */
190 "R_M32R_18_PCREL", /* name */
191 FALSE, /* partial_inplace */
192 0xffff, /* src_mask */
193 0xffff, /* dst_mask */
194 TRUE), /* pcrel_offset */
195
196 /* A relative 26 bit relocation, right shifted by 2. */
197 /* ??? It's not clear whether this should have partial_inplace set or not.
198 Branch relaxing in the assembler can store the addend in the insn,
199 and if bfd_install_relocation gets called the addend may get added
200 again. */
201 HOWTO (R_M32R_26_PCREL, /* type */
202 2, /* rightshift */
203 2, /* size (0 = byte, 1 = short, 2 = long) */
204 26, /* bitsize */
205 TRUE, /* pc_relative */
206 0, /* bitpos */
207 complain_overflow_signed, /* complain_on_overflow */
208 bfd_elf_generic_reloc, /* special_function */
209 "R_M32R_26_PCREL", /* name */
210 FALSE, /* partial_inplace */
211 0xffffff, /* src_mask */
212 0xffffff, /* dst_mask */
213 TRUE), /* pcrel_offset */
214
215 /* High 16 bits of address when lower 16 is or'd in. */
216 HOWTO (R_M32R_HI16_ULO, /* type */
217 16, /* rightshift */
218 2, /* size (0 = byte, 1 = short, 2 = long) */
219 16, /* bitsize */
220 FALSE, /* pc_relative */
221 0, /* bitpos */
222 complain_overflow_dont, /* complain_on_overflow */
223 m32r_elf_hi16_reloc, /* special_function */
224 "R_M32R_HI16_ULO", /* name */
225 TRUE, /* partial_inplace */
226 0x0000ffff, /* src_mask */
227 0x0000ffff, /* dst_mask */
228 FALSE), /* pcrel_offset */
229
230 /* High 16 bits of address when lower 16 is added in. */
231 HOWTO (R_M32R_HI16_SLO, /* type */
232 16, /* rightshift */
233 2, /* size (0 = byte, 1 = short, 2 = long) */
234 16, /* bitsize */
235 FALSE, /* pc_relative */
236 0, /* bitpos */
237 complain_overflow_dont, /* complain_on_overflow */
238 m32r_elf_hi16_reloc, /* special_function */
239 "R_M32R_HI16_SLO", /* name */
240 TRUE, /* partial_inplace */
241 0x0000ffff, /* src_mask */
242 0x0000ffff, /* dst_mask */
243 FALSE), /* pcrel_offset */
244
245 /* Lower 16 bits of address. */
246 HOWTO (R_M32R_LO16, /* type */
247 0, /* rightshift */
248 2, /* size (0 = byte, 1 = short, 2 = long) */
249 16, /* bitsize */
250 FALSE, /* pc_relative */
251 0, /* bitpos */
252 complain_overflow_dont, /* complain_on_overflow */
253 m32r_elf_lo16_reloc, /* special_function */
254 "R_M32R_LO16", /* name */
255 TRUE, /* partial_inplace */
256 0x0000ffff, /* src_mask */
257 0x0000ffff, /* dst_mask */
258 FALSE), /* pcrel_offset */
259
260 /* Small data area 16 bits offset. */
261 HOWTO (R_M32R_SDA16, /* type */
262 0, /* rightshift */
263 2, /* size (0 = byte, 1 = short, 2 = long) */
264 16, /* bitsize */
265 FALSE, /* pc_relative */
266 0, /* bitpos */
267 complain_overflow_signed, /* complain_on_overflow */
268 m32r_elf_sda16_reloc, /* special_function */
269 "R_M32R_SDA16", /* name */
270 TRUE, /* partial_inplace */ /* FIXME: correct? */
271 0x0000ffff, /* src_mask */
272 0x0000ffff, /* dst_mask */
273 FALSE), /* pcrel_offset */
274
275 /* GNU extension to record C++ vtable hierarchy */
276 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
277 0, /* rightshift */
278 2, /* size (0 = byte, 1 = short, 2 = long) */
279 0, /* bitsize */
280 FALSE, /* pc_relative */
281 0, /* bitpos */
282 complain_overflow_dont, /* complain_on_overflow */
283 NULL, /* special_function */
284 "R_M32R_GNU_VTINHERIT", /* name */
285 FALSE, /* partial_inplace */
286 0, /* src_mask */
287 0, /* dst_mask */
288 FALSE), /* pcrel_offset */
289
290 /* GNU extension to record C++ vtable member usage */
291 HOWTO (R_M32R_GNU_VTENTRY, /* type */
292 0, /* rightshift */
293 2, /* size (0 = byte, 1 = short, 2 = long) */
294 0, /* bitsize */
295 FALSE, /* pc_relative */
296 0, /* bitpos */
297 complain_overflow_dont, /* complain_on_overflow */
298 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
299 "R_M32R_GNU_VTENTRY", /* name */
300 FALSE, /* partial_inplace */
301 0, /* src_mask */
302 0, /* dst_mask */
303 FALSE), /* pcrel_offset */
304
305};
306
307
308/* Handle the R_M32R_10_PCREL reloc. */
309
310static bfd_reloc_status_type
311m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
312 input_section, output_bfd, error_message)
313 bfd * abfd;
314 arelent * reloc_entry;
315 asymbol * symbol;
316 PTR data;
317 asection * input_section;
318 bfd * output_bfd;
319 char ** error_message ATTRIBUTE_UNUSED;
320{
321 /* This part is from bfd_elf_generic_reloc. */
322 if (output_bfd != (bfd *) NULL
323 && (symbol->flags & BSF_SECTION_SYM) == 0
324 && (! reloc_entry->howto->partial_inplace
325 || reloc_entry->addend == 0))
326 {
327 reloc_entry->address += input_section->output_offset;
328 return bfd_reloc_ok;
329 }
330
331 if (output_bfd != NULL)
332 {
333 /* FIXME: See bfd_perform_relocation. Is this right? */
334 return bfd_reloc_continue;
335 }
336
337 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
338 input_section,
339 data, reloc_entry->address,
340 symbol->section,
341 (symbol->value
342 + symbol->section->output_section->vma
343 + symbol->section->output_offset),
344 reloc_entry->addend);
345}
346
347/* Utility to actually perform an R_M32R_10_PCREL reloc. */
348
349static bfd_reloc_status_type
350m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
351 symbol_section, symbol_value, addend)
352 bfd *abfd;
353 reloc_howto_type *howto;
354 asection *input_section;
355 bfd_byte *data;
356 bfd_vma offset;
357 asection *symbol_section ATTRIBUTE_UNUSED;
358 bfd_vma symbol_value;
359 bfd_vma addend;
360{
361 bfd_signed_vma relocation;
362 unsigned long x;
363 bfd_reloc_status_type status;
364
365 /* Sanity check the address (offset in section). */
366 if (offset > input_section->_cooked_size)
367 return bfd_reloc_outofrange;
368
369 relocation = symbol_value + addend;
370 /* Make it pc relative. */
371 relocation -= (input_section->output_section->vma
372 + input_section->output_offset);
373 /* These jumps mask off the lower two bits of the current address
374 before doing pcrel calculations. */
375 relocation -= (offset & -(bfd_vma) 4);
376
377 if (relocation < -0x200 || relocation > 0x1ff)
378 status = bfd_reloc_overflow;
379 else
380 status = bfd_reloc_ok;
381
382 x = bfd_get_16 (abfd, data + offset);
383 relocation >>= howto->rightshift;
384 relocation <<= howto->bitpos;
385 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
386 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
387
388 return status;
389}
390
391/* Handle the R_M32R_HI16_[SU]LO relocs.
392 HI16_SLO is for the add3 and load/store with displacement instructions.
393 HI16_ULO is for the or3 instruction.
394 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
395 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
396 we must add one to the high 16 bytes (which will get subtracted off when
397 the low 16 bits are added).
398 These relocs have to be done in combination with an R_M32R_LO16 reloc
399 because there is a carry from the LO16 to the HI16. Here we just save
400 the information we need; we do the actual relocation when we see the LO16.
401 This code is copied from the elf32-mips.c. We also support an arbitrary
402 number of HI16 relocs to be associated with a single LO16 reloc. The
403 assembler sorts the relocs to ensure each HI16 immediately precedes its
404 LO16. However if there are multiple copies, the assembler may not find
405 the real LO16 so it picks the first one it finds. */
406
407struct m32r_hi16
408{
409 struct m32r_hi16 *next;
410 bfd_byte *addr;
411 bfd_vma addend;
412};
413
414/* FIXME: This should not be a static variable. */
415
416static struct m32r_hi16 *m32r_hi16_list;
417
418static bfd_reloc_status_type
419m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
420 input_section, output_bfd, error_message)
421 bfd *abfd ATTRIBUTE_UNUSED;
422 arelent *reloc_entry;
423 asymbol *symbol;
424 PTR data;
425 asection *input_section;
426 bfd *output_bfd;
427 char **error_message ATTRIBUTE_UNUSED;
428{
429 bfd_reloc_status_type ret;
430 bfd_vma relocation;
431 struct m32r_hi16 *n;
432
433 /* This part is from bfd_elf_generic_reloc.
434 If we're relocating, and this an external symbol, we don't want
435 to change anything. */
436 if (output_bfd != (bfd *) NULL
437 && (symbol->flags & BSF_SECTION_SYM) == 0
438 && reloc_entry->addend == 0)
439 {
440 reloc_entry->address += input_section->output_offset;
441 return bfd_reloc_ok;
442 }
443
444 /* Sanity check the address (offset in section). */
445 if (reloc_entry->address > input_section->_cooked_size)
446 return bfd_reloc_outofrange;
447
448 ret = bfd_reloc_ok;
449 if (bfd_is_und_section (symbol->section)
450 && output_bfd == (bfd *) NULL)
451 ret = bfd_reloc_undefined;
452
453 if (bfd_is_com_section (symbol->section))
454 relocation = 0;
455 else
456 relocation = symbol->value;
457
458 relocation += symbol->section->output_section->vma;
459 relocation += symbol->section->output_offset;
460 relocation += reloc_entry->addend;
461
462 /* Save the information, and let LO16 do the actual relocation. */
463 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
464 if (n == NULL)
465 return bfd_reloc_outofrange;
466 n->addr = (bfd_byte *) data + reloc_entry->address;
467 n->addend = relocation;
468 n->next = m32r_hi16_list;
469 m32r_hi16_list = n;
470
471 if (output_bfd != (bfd *) NULL)
472 reloc_entry->address += input_section->output_offset;
473
474 return ret;
475}
476
477/* Handle an M32R ELF HI16 reloc. */
478
479static void
480m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
481 bfd *input_bfd;
482 int type;
483 Elf_Internal_Rela *relhi;
484 Elf_Internal_Rela *rello;
485 bfd_byte *contents;
486 bfd_vma addend;
487{
488 unsigned long insn;
489 bfd_vma addlo;
490
491 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
492
493 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
494 if (type == R_M32R_HI16_SLO)
495 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
496 else
497 addlo &= 0xffff;
498
499 addend += ((insn & 0xffff) << 16) + addlo;
500
501 /* Reaccount for sign extension of low part. */
502 if (type == R_M32R_HI16_SLO
503 && (addend & 0x8000) != 0)
504 addend += 0x10000;
505
506 bfd_put_32 (input_bfd,
507 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
508 contents + relhi->r_offset);
509}
510
511/* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
512 inplace relocation; this function exists in order to do the
513 R_M32R_HI16_[SU]LO relocation described above. */
514
515bfd_reloc_status_type
516m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
517 input_section, output_bfd, error_message)
518 bfd *input_bfd;
519 arelent *reloc_entry;
520 asymbol *symbol;
521 PTR data;
522 asection *input_section;
523 bfd *output_bfd;
524 char **error_message;
525{
526 /* This part is from bfd_elf_generic_reloc.
527 If we're relocating, and this an external symbol, we don't want
528 to change anything. */
529 if (output_bfd != (bfd *) NULL
530 && (symbol->flags & BSF_SECTION_SYM) == 0
531 && reloc_entry->addend == 0)
532 {
533 reloc_entry->address += input_section->output_offset;
534 return bfd_reloc_ok;
535 }
536
537 if (m32r_hi16_list != NULL)
538 {
539 struct m32r_hi16 *l;
540
541 l = m32r_hi16_list;
542 while (l != NULL)
543 {
544 unsigned long insn;
545 unsigned long val;
546 unsigned long vallo;
547 struct m32r_hi16 *next;
548
549 /* Do the HI16 relocation. Note that we actually don't need
550 to know anything about the LO16 itself, except where to
551 find the low 16 bits of the addend needed by the LO16. */
552 insn = bfd_get_32 (input_bfd, l->addr);
553 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
554 & 0xffff) ^ 0x8000) - 0x8000;
555 val = ((insn & 0xffff) << 16) + vallo;
556 val += l->addend;
557
558 /* Reaccount for sign extension of low part. */
559 if ((val & 0x8000) != 0)
560 val += 0x10000;
561
562 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
563 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
564
565 next = l->next;
566 free (l);
567 l = next;
568 }
569
570 m32r_hi16_list = NULL;
571 }
572
573 /* Now do the LO16 reloc in the usual way.
574 ??? It would be nice to call bfd_elf_generic_reloc here,
575 but we have partial_inplace set. bfd_elf_generic_reloc will
576 pass the handling back to bfd_install_relocation which will install
577 a section relative addend which is wrong. */
578 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
579 input_section, output_bfd, error_message);
580}
581
582/* Do generic partial_inplace relocation.
583 This is a local replacement for bfd_elf_generic_reloc. */
584
585bfd_reloc_status_type
586m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
587 input_section, output_bfd, error_message)
588 bfd *input_bfd;
589 arelent *reloc_entry;
590 asymbol *symbol;
591 PTR data;
592 asection *input_section;
593 bfd *output_bfd;
594 char **error_message ATTRIBUTE_UNUSED;
595{
596 bfd_reloc_status_type ret;
597 bfd_vma relocation;
598 bfd_byte *inplace_address;
599
600 /* This part is from bfd_elf_generic_reloc.
601 If we're relocating, and this an external symbol, we don't want
602 to change anything. */
603 if (output_bfd != (bfd *) NULL
604 && (symbol->flags & BSF_SECTION_SYM) == 0
605 && reloc_entry->addend == 0)
606 {
607 reloc_entry->address += input_section->output_offset;
608 return bfd_reloc_ok;
609 }
610
611 /* Now do the reloc in the usual way.
612 ??? It would be nice to call bfd_elf_generic_reloc here,
613 but we have partial_inplace set. bfd_elf_generic_reloc will
614 pass the handling back to bfd_install_relocation which will install
615 a section relative addend which is wrong. */
616
617 /* Sanity check the address (offset in section). */
618 if (reloc_entry->address > input_section->_cooked_size)
619 return bfd_reloc_outofrange;
620
621 ret = bfd_reloc_ok;
622 if (bfd_is_und_section (symbol->section)
623 && output_bfd == (bfd *) NULL)
624 ret = bfd_reloc_undefined;
625
626 if (bfd_is_com_section (symbol->section)
627 || output_bfd != (bfd *) NULL)
628 relocation = 0;
629 else
630 relocation = symbol->value;
631
632 /* Only do this for a final link. */
633 if (output_bfd == (bfd *) NULL)
634 {
635 relocation += symbol->section->output_section->vma;
636 relocation += symbol->section->output_offset;
637 }
638
639 relocation += reloc_entry->addend;
640 inplace_address = (bfd_byte *) data + reloc_entry->address;
641
642#define DOIT(x) \
643 x = ( (x & ~reloc_entry->howto->dst_mask) | \
644 (((x & reloc_entry->howto->src_mask) + relocation) & \
645 reloc_entry->howto->dst_mask))
646
647 switch (reloc_entry->howto->size)
648 {
649 case 1:
650 {
651 short x = bfd_get_16 (input_bfd, inplace_address);
652 DOIT (x);
653 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
654 }
655 break;
656 case 2:
657 {
658 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
659 DOIT (x);
660 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
661 }
662 break;
663 default:
664 BFD_ASSERT (0);
665 }
666
667 if (output_bfd != (bfd *) NULL)
668 reloc_entry->address += input_section->output_offset;
669
670 return ret;
671}
672
673/* Handle the R_M32R_SDA16 reloc.
674 This reloc is used to compute the address of objects in the small data area
675 and to perform loads and stores from that area.
676 The lower 16 bits are sign extended and added to the register specified
677 in the instruction, which is assumed to point to _SDA_BASE_. */
678
679static bfd_reloc_status_type
680m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
681 input_section, output_bfd, error_message)
682 bfd *abfd ATTRIBUTE_UNUSED;
683 arelent *reloc_entry;
684 asymbol *symbol;
685 PTR data ATTRIBUTE_UNUSED;
686 asection *input_section;
687 bfd *output_bfd;
688 char **error_message ATTRIBUTE_UNUSED;
689{
690 /* This part is from bfd_elf_generic_reloc. */
691 if (output_bfd != (bfd *) NULL
692 && (symbol->flags & BSF_SECTION_SYM) == 0
693 && (! reloc_entry->howto->partial_inplace
694 || reloc_entry->addend == 0))
695 {
696 reloc_entry->address += input_section->output_offset;
697 return bfd_reloc_ok;
698 }
699
700 if (output_bfd != NULL)
701 {
702 /* FIXME: See bfd_perform_relocation. Is this right? */
703 return bfd_reloc_continue;
704 }
705
706 /* FIXME: not sure what to do here yet. But then again, the linker
707 may never call us. */
708 abort ();
709}
710
711
712/* Map BFD reloc types to M32R ELF reloc types. */
713
714struct m32r_reloc_map
715{
716 bfd_reloc_code_real_type bfd_reloc_val;
717 unsigned char elf_reloc_val;
718};
719
720static const struct m32r_reloc_map m32r_reloc_map[] =
721{
722 { BFD_RELOC_NONE, R_M32R_NONE },
723 { BFD_RELOC_16, R_M32R_16 },
724 { BFD_RELOC_32, R_M32R_32 },
725 { BFD_RELOC_M32R_24, R_M32R_24 },
726 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
727 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
728 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
729 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
730 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
731 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
732 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
733 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
734 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
735};
736
737static reloc_howto_type *
738bfd_elf32_bfd_reloc_type_lookup (abfd, code)
739 bfd *abfd ATTRIBUTE_UNUSED;
740 bfd_reloc_code_real_type code;
741{
742 unsigned int i;
743
744 for (i = 0;
745 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
746 i++)
747 {
748 if (m32r_reloc_map[i].bfd_reloc_val == code)
749 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
750 }
751
752 return NULL;
753}
754
755/* Set the howto pointer for an M32R ELF reloc. */
756
757static void
758m32r_info_to_howto_rel (abfd, cache_ptr, dst)
759 bfd *abfd ATTRIBUTE_UNUSED;
760 arelent *cache_ptr;
761 Elf_Internal_Rela *dst;
762{
763 unsigned int r_type;
764
765 r_type = ELF32_R_TYPE (dst->r_info);
766 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
767 cache_ptr->howto = &m32r_elf_howto_table[r_type];
768}
769
770
771/* Given a BFD section, try to locate the corresponding ELF section
772 index. */
773
774bfd_boolean
775_bfd_m32r_elf_section_from_bfd_section (abfd, sec, retval)
776 bfd *abfd ATTRIBUTE_UNUSED;
777 asection *sec;
778 int *retval;
779{
780 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
781 {
782 *retval = SHN_M32R_SCOMMON;
783 return TRUE;
784 }
785 return FALSE;
786}
787
788/* M32R ELF uses two common sections. One is the usual one, and the other
789 is for small objects. All the small objects are kept together, and then
790 referenced via one register, which yields faster assembler code. It is
791 up to the compiler to emit an instruction to load the register with
792 _SDA_BASE. This is what we use for the small common section. This
793 approach is copied from elf32-mips.c. */
794static asection m32r_elf_scom_section;
795static asymbol m32r_elf_scom_symbol;
796static asymbol *m32r_elf_scom_symbol_ptr;
797
798/* Handle the special M32R section numbers that a symbol may use. */
799
800void
801_bfd_m32r_elf_symbol_processing (abfd, asym)
802 bfd *abfd ATTRIBUTE_UNUSED;
803 asymbol *asym;
804{
805 elf_symbol_type *elfsym;
806
807 elfsym = (elf_symbol_type *) asym;
808
809 switch (elfsym->internal_elf_sym.st_shndx)
810 {
811 case SHN_M32R_SCOMMON:
812 if (m32r_elf_scom_section.name == NULL)
813 {
814 /* Initialize the small common section. */
815 m32r_elf_scom_section.name = ".scommon";
816 m32r_elf_scom_section.flags = SEC_IS_COMMON;
817 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
818 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
819 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
820 m32r_elf_scom_symbol.name = ".scommon";
821 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
822 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
823 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
824 }
825 asym->section = &m32r_elf_scom_section;
826 asym->value = elfsym->internal_elf_sym.st_size;
827 break;
828 }
829}
830
831/* Hook called by the linker routine which adds symbols from an object
832 file. We must handle the special M32R section numbers here.
833 We also keep watching for whether we need to create the sdata special
834 linker sections. */
835
836static bfd_boolean
837m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
838 bfd *abfd;
839 struct bfd_link_info *info;
840 const Elf_Internal_Sym *sym;
841 const char **namep;
842 flagword *flagsp ATTRIBUTE_UNUSED;
843 asection **secp;
844 bfd_vma *valp;
845{
846 if (! info->relocateable
847 && (*namep)[0] == '_' && (*namep)[1] == 'S'
848 && strcmp (*namep, "_SDA_BASE_") == 0
849 && info->hash->creator->flavour == bfd_target_elf_flavour)
850 {
851 /* This is simpler than using _bfd_elf_create_linker_section
852 (our needs are simpler than ppc's needs). Also
853 _bfd_elf_create_linker_section currently has a bug where if a .sdata
854 section already exists a new one is created that follows it which
855 screws of _SDA_BASE_ address calcs because output_offset != 0. */
856 struct elf_link_hash_entry *h;
857 struct bfd_link_hash_entry *bh;
858 asection *s = bfd_get_section_by_name (abfd, ".sdata");
859
860 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
861
862 if (s == NULL)
863 {
864 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
865 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
866
867 s = bfd_make_section_anyway (abfd, ".sdata");
868 if (s == NULL)
869 return FALSE;
870 bfd_set_section_flags (abfd, s, flags);
871 bfd_set_section_alignment (abfd, s, 2);
872 }
873
874 bh = bfd_link_hash_lookup (info->hash, "_SDA_BASE_",
875 FALSE, FALSE, FALSE);
876
877 if ((bh == NULL || bh->type == bfd_link_hash_undefined)
878 && !(_bfd_generic_link_add_one_symbol (info,
879 abfd,
880 "_SDA_BASE_",
881 BSF_GLOBAL,
882 s,
883 (bfd_vma) 32768,
884 (const char *) NULL,
885 FALSE,
886 get_elf_backend_data (abfd)->collect,
887 &bh)))
888 return FALSE;
889 h = (struct elf_link_hash_entry *) bh;
890 h->type = STT_OBJECT;
891 }
892
893 switch (sym->st_shndx)
894 {
895 case SHN_M32R_SCOMMON:
896 *secp = bfd_make_section_old_way (abfd, ".scommon");
897 (*secp)->flags |= SEC_IS_COMMON;
898 *valp = sym->st_size;
899 break;
900 }
901
902 return TRUE;
903}
904
905/* We have to figure out the SDA_BASE value, so that we can adjust the
906 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
907 BFD. If we can't find it, we're stuck. We cache it in the ELF
908 target data. We don't need to adjust the symbol value for an
909 external symbol if we are producing relocateable output. */
910
911static bfd_reloc_status_type
912m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
913 bfd *output_bfd;
914 struct bfd_link_info *info;
915 const char **error_message;
916 bfd_vma *psb;
917{
918 if (elf_gp (output_bfd) == 0)
919 {
920 struct bfd_link_hash_entry *h;
921
922 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
923 if (h != (struct bfd_link_hash_entry *) NULL
924 && h->type == bfd_link_hash_defined)
925 elf_gp (output_bfd) = (h->u.def.value
926 + h->u.def.section->output_section->vma
927 + h->u.def.section->output_offset);
928 else
929 {
930 /* Only get the error once. */
931 *psb = elf_gp (output_bfd) = 4;
932 *error_message =
933 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
934 return bfd_reloc_dangerous;
935 }
936 }
937 *psb = elf_gp (output_bfd);
938 return bfd_reloc_ok;
939}
940
941
942/* Relocate an M32R/D ELF section.
943 There is some attempt to make this function usable for many architectures,
944 both for RELA and REL type relocs, if only to serve as a learning tool.
945
946 The RELOCATE_SECTION function is called by the new ELF backend linker
947 to handle the relocations for a section.
948
949 The relocs are always passed as Rela structures; if the section
950 actually uses Rel structures, the r_addend field will always be
951 zero.
952
953 This function is responsible for adjust the section contents as
954 necessary, and (if using Rela relocs and generating a
955 relocateable output file) adjusting the reloc addend as
956 necessary.
957
958 This function does not have to worry about setting the reloc
959 address or the reloc symbol index.
960
961 LOCAL_SYMS is a pointer to the swapped in local symbols.
962
963 LOCAL_SECTIONS is an array giving the section in the input file
964 corresponding to the st_shndx field of each local symbol.
965
966 The global hash table entry for the global symbols can be found
967 via elf_sym_hashes (input_bfd).
968
969 When generating relocateable output, this function must handle
970 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
971 going to be the section symbol corresponding to the output
972 section, which means that the addend must be adjusted
973 accordingly. */
974
975static bfd_boolean
976m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
977 contents, relocs, local_syms, local_sections)
978 bfd *output_bfd ATTRIBUTE_UNUSED;
979 struct bfd_link_info *info;
980 bfd *input_bfd;
981 asection *input_section;
982 bfd_byte *contents;
983 Elf_Internal_Rela *relocs;
984 Elf_Internal_Sym *local_syms;
985 asection **local_sections;
986{
987 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
988 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
989 Elf_Internal_Rela *rel, *relend;
990 /* Assume success. */
991 bfd_boolean ret = TRUE;
992
993#if !USE_REL
994 if (info->relocateable)
995 return TRUE;
996#endif
997
998 rel = relocs;
999 relend = relocs + input_section->reloc_count;
1000 for (; rel < relend; rel++)
1001 {
1002 int r_type;
1003 reloc_howto_type *howto;
1004 unsigned long r_symndx;
1005 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
1006 ensure it's zero (we use REL relocs, not RELA). Therefore this
1007 should be assigning zero to `addend', but for clarity we use
1008 `r_addend'. */
1009 bfd_vma addend = rel->r_addend;
1010 bfd_vma offset = rel->r_offset;
1011 struct elf_link_hash_entry *h;
1012 Elf_Internal_Sym *sym;
1013 asection *sec;
1014 const char *sym_name;
1015 bfd_reloc_status_type r;
1016 const char *errmsg = NULL;
1017
1018 h = NULL;
1019 r_type = ELF32_R_TYPE (rel->r_info);
1020 if (r_type < 0 || r_type >= (int) R_M32R_max)
1021 {
1022 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
1023 bfd_archive_filename (input_bfd),
1024 (int) r_type);
1025 bfd_set_error (bfd_error_bad_value);
1026 ret = FALSE;
1027 continue;
1028 }
1029
1030 if (r_type == R_M32R_GNU_VTENTRY
1031 || r_type == R_M32R_GNU_VTINHERIT)
1032 continue;
1033
1034 howto = m32r_elf_howto_table + r_type;
1035 r_symndx = ELF32_R_SYM (rel->r_info);
1036
1037#if USE_REL
1038 if (info->relocateable)
1039 {
1040 /* This is a relocateable link. We don't have to change
1041 anything, unless the reloc is against a section symbol,
1042 in which case we have to adjust according to where the
1043 section symbol winds up in the output section. */
1044 sec = NULL;
1045 if (r_symndx >= symtab_hdr->sh_info)
1046 {
1047 /* External symbol. */
1048 continue;
1049 }
1050
1051 /* Local symbol. */
1052 sym = local_syms + r_symndx;
1053 sym_name = "<local symbol>";
1054 /* STT_SECTION: symbol is associated with a section. */
1055 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1056 {
1057 /* Symbol isn't associated with a section. Nothing to do. */
1058 continue;
1059 }
1060
1061 sec = local_sections[r_symndx];
1062 addend += sec->output_offset + sym->st_value;
1063
1064 /* If partial_inplace, we need to store any additional addend
1065 back in the section. */
1066 if (! howto->partial_inplace)
1067 continue;
1068 /* ??? Here is a nice place to call a special_function
1069 like handler. */
1070 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1071 r = _bfd_relocate_contents (howto, input_bfd,
1072 addend, contents + offset);
1073 else
1074 {
1075 Elf_Internal_Rela *lorel;
1076
1077 /* We allow an arbitrary number of HI16 relocs before the
1078 LO16 reloc. This permits gcc to emit the HI and LO relocs
1079 itself. */
1080 for (lorel = rel + 1;
1081 (lorel < relend
1082 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1083 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1084 lorel++)
1085 continue;
1086 if (lorel < relend
1087 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1088 {
1089 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1090 contents, addend);
1091 r = bfd_reloc_ok;
1092 }
1093 else
1094 r = _bfd_relocate_contents (howto, input_bfd,
1095 addend, contents + offset);
1096 }
1097 }
1098 else
1099#endif /* USE_REL */
1100 {
1101 bfd_vma relocation;
1102
1103 /* This is a final link. */
1104 sym = NULL;
1105 sec = NULL;
1106
1107 if (r_symndx < symtab_hdr->sh_info)
1108 {
1109 /* Local symbol. */
1110 sym = local_syms + r_symndx;
1111 sec = local_sections[r_symndx];
1112 sym_name = "<local symbol>";
1113#if !USE_REL
1114 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel);
1115 addend = rel->r_addend;
1116#else
1117 /* FIXME: This won't handle local relocations against SEC_MERGE
1118 symbols. See elf32-i386.c for how to do this. */
1119 relocation = (sec->output_section->vma
1120 + sec->output_offset
1121 + sym->st_value);
1122#endif
1123 }
1124 else
1125 {
1126 /* External symbol. */
1127 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1128 while (h->root.type == bfd_link_hash_indirect
1129 || h->root.type == bfd_link_hash_warning)
1130 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1131 sym_name = h->root.root.string;
1132
1133 if (h->root.type == bfd_link_hash_defined
1134 || h->root.type == bfd_link_hash_defweak)
1135 {
1136 sec = h->root.u.def.section;
1137 if (sec->output_section == NULL)
1138 relocation = 0;
1139 else
1140 relocation = (h->root.u.def.value
1141 + sec->output_section->vma
1142 + sec->output_offset);
1143 }
1144 else if (h->root.type == bfd_link_hash_undefweak)
1145 relocation = 0;
1146 else
1147 {
1148 if (! ((*info->callbacks->undefined_symbol)
1149 (info, h->root.root.string, input_bfd,
1150 input_section, offset, TRUE)))
1151 return FALSE;
1152 relocation = 0;
1153 }
1154 }
1155
1156 /* Sanity check the address. */
1157 if (offset > input_section->_raw_size)
1158 {
1159 r = bfd_reloc_outofrange;
1160 goto check_reloc;
1161 }
1162
1163 switch ((int) r_type)
1164 {
1165 case (int) R_M32R_10_PCREL :
1166 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1167 contents, offset,
1168 sec, relocation, addend);
1169 break;
1170
1171 case (int) R_M32R_HI16_SLO :
1172 case (int) R_M32R_HI16_ULO :
1173 {
1174 Elf_Internal_Rela *lorel;
1175
1176 /* We allow an arbitrary number of HI16 relocs before the
1177 LO16 reloc. This permits gcc to emit the HI and LO relocs
1178 itself. */
1179 for (lorel = rel + 1;
1180 (lorel < relend
1181 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1182 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1183 lorel++)
1184 continue;
1185 if (lorel < relend
1186 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1187 {
1188 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1189 contents, relocation + addend);
1190 r = bfd_reloc_ok;
1191 }
1192 else
1193 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1194 contents, offset,
1195 relocation, addend);
1196 }
1197 break;
1198
1199 case (int) R_M32R_SDA16 :
1200 {
1201 const char *name;
1202
1203 BFD_ASSERT (sec != NULL);
1204 name = bfd_get_section_name (abfd, sec);
1205
1206 if (strcmp (name, ".sdata") == 0
1207 || strcmp (name, ".sbss") == 0
1208 || strcmp (name, ".scommon") == 0)
1209 {
1210 bfd_vma sda_base;
1211 bfd *out_bfd = sec->output_section->owner;
1212
1213 r = m32r_elf_final_sda_base (out_bfd, info,
1214 &errmsg,
1215 &sda_base);
1216 if (r != bfd_reloc_ok)
1217 {
1218 ret = FALSE;
1219 goto check_reloc;
1220 }
1221
1222 /* At this point `relocation' contains the object's
1223 address. */
1224 relocation -= sda_base;
1225 /* Now it contains the offset from _SDA_BASE_. */
1226 }
1227 else
1228 {
1229 (*_bfd_error_handler)
1230 (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1231 bfd_archive_filename (input_bfd),
1232 sym_name,
1233 m32r_elf_howto_table[(int) r_type].name,
1234 bfd_get_section_name (abfd, sec));
1235 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1236 ret = FALSE;
1237 continue;
1238 }
1239 }
1240 /* fall through */
1241
1242 default :
1243 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1244 contents, offset,
1245 relocation, addend);
1246 break;
1247 }
1248 }
1249
1250 check_reloc:
1251
1252 if (r != bfd_reloc_ok)
1253 {
1254 /* FIXME: This should be generic enough to go in a utility. */
1255 const char *name;
1256
1257 if (h != NULL)
1258 name = h->root.root.string;
1259 else
1260 {
1261 name = (bfd_elf_string_from_elf_section
1262 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1263 if (name == NULL || *name == '\0')
1264 name = bfd_section_name (input_bfd, sec);
1265 }
1266
1267 if (errmsg != NULL)
1268 goto common_error;
1269
1270 switch (r)
1271 {
1272 case bfd_reloc_overflow:
1273 if (! ((*info->callbacks->reloc_overflow)
1274 (info, name, howto->name, (bfd_vma) 0,
1275 input_bfd, input_section, offset)))
1276 return FALSE;
1277 break;
1278
1279 case bfd_reloc_undefined:
1280 if (! ((*info->callbacks->undefined_symbol)
1281 (info, name, input_bfd, input_section,
1282 offset, TRUE)))
1283 return FALSE;
1284 break;
1285
1286 case bfd_reloc_outofrange:
1287 errmsg = _("internal error: out of range error");
1288 goto common_error;
1289
1290 case bfd_reloc_notsupported:
1291 errmsg = _("internal error: unsupported relocation error");
1292 goto common_error;
1293
1294 case bfd_reloc_dangerous:
1295 errmsg = _("internal error: dangerous error");
1296 goto common_error;
1297
1298 default:
1299 errmsg = _("internal error: unknown error");
1300 /* fall through */
1301
1302 common_error:
1303 if (!((*info->callbacks->warning)
1304 (info, errmsg, name, input_bfd, input_section,
1305 offset)))
1306 return FALSE;
1307 break;
1308 }
1309 }
1310 }
1311
1312 return ret;
1313}
1314
1315
1316#if 0 /* relaxing not supported yet */
1317
1318/* This function handles relaxing for the m32r.
1319 Relaxing on the m32r is tricky because of instruction alignment
1320 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1321
1322 The following relaxing opportunities are handled:
1323
1324 seth/add3/jl -> bl24 or bl8
1325 seth/add3 -> ld24
1326
1327 It would be nice to handle bl24 -> bl8 but given:
1328
1329 - 4 byte insns must be on 4 byte boundaries
1330 - branch instructions only branch to insns on 4 byte boundaries
1331
1332 this isn't much of a win because the insn in the 2 "deleted" bytes
1333 must become a nop. With some complexity some real relaxation could be
1334 done but the frequency just wouldn't make it worth it; it's better to
1335 try to do all the code compaction one can elsewhere.
1336 When the chip supports parallel 16 bit insns, things may change.
1337*/
1338
1339static bfd_boolean
1340m32r_elf_relax_section (abfd, sec, link_info, again)
1341 bfd *abfd;
1342 asection *sec;
1343 struct bfd_link_info *link_info;
1344 bfd_boolean *again;
1345{
1346 Elf_Internal_Shdr *symtab_hdr;
1347 /* The Rela structures are used here because that's what
1348 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1349 field to 0]. */
1350 Elf_Internal_Rela *internal_relocs = NULL;
1351 Elf_Internal_Rela *irel, *irelend;
1352 bfd_byte *contents = NULL;
1353 Elf_Internal_Sym *isymbuf = NULL;
1354
1355 /* Assume nothing changes. */
1356 *again = FALSE;
1357
1358 /* We don't have to do anything for a relocateable link, if
1359 this section does not have relocs, or if this is not a
1360 code section. */
1361 if (link_info->relocateable
1362 || (sec->flags & SEC_RELOC) == 0
1363 || sec->reloc_count == 0
1364 || (sec->flags & SEC_CODE) == 0
1365 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1366 return TRUE;
1367
1368 /* If this is the first time we have been called for this section,
1369 initialize the cooked size. */
1370 if (sec->_cooked_size == 0)
1371 sec->_cooked_size = sec->_raw_size;
1372
1373 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1374
1375 /* Get a copy of the native relocations. */
1376 internal_relocs = (_bfd_elf32_link_read_relocs
1377 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1378 link_info->keep_memory));
1379 if (internal_relocs == NULL)
1380 goto error_return;
1381
1382 /* Walk through them looking for relaxing opportunities. */
1383 irelend = internal_relocs + sec->reloc_count;
1384 for (irel = internal_relocs; irel < irelend; irel++)
1385 {
1386 bfd_vma symval;
1387
1388 /* If this isn't something that can be relaxed, then ignore
1389 this reloc. */
1390 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1391 continue;
1392
1393 /* Get the section contents if we haven't done so already. */
1394 if (contents == NULL)
1395 {
1396 /* Get cached copy if it exists. */
1397 if (elf_section_data (sec)->this_hdr.contents != NULL)
1398 contents = elf_section_data (sec)->this_hdr.contents;
1399 else
1400 {
1401 /* Go get them off disk. */
1402 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1403 if (contents == NULL)
1404 goto error_return;
1405
1406 if (! bfd_get_section_contents (abfd, sec, contents,
1407 (file_ptr) 0, sec->_raw_size))
1408 goto error_return;
1409 }
1410 }
1411
1412 /* Read this BFD's local symbols if we haven't done so already. */
1413 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
1414 {
1415 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1416 if (isymbuf == NULL)
1417 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1418 symtab_hdr->sh_info, 0,
1419 NULL, NULL, NULL);
1420 if (isymbuf == NULL)
1421 goto error_return;
1422 }
1423
1424 /* Get the value of the symbol referred to by the reloc. */
1425 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1426 {
1427 /* A local symbol. */
1428 Elf_Internal_Sym *isym;
1429 asection *sym_sec;
1430
1431 isym = isymbuf + ELF32_R_SYM (irel->r_info),
1432 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1433 symval = (isym->st_value
1434 + sym_sec->output_section->vma
1435 + sym_sec->output_offset);
1436 }
1437 else
1438 {
1439 unsigned long indx;
1440 struct elf_link_hash_entry *h;
1441
1442 /* An external symbol. */
1443 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1444 h = elf_sym_hashes (abfd)[indx];
1445 BFD_ASSERT (h != NULL);
1446 if (h->root.type != bfd_link_hash_defined
1447 && h->root.type != bfd_link_hash_defweak)
1448 {
1449 /* This appears to be a reference to an undefined
1450 symbol. Just ignore it--it will be caught by the
1451 regular reloc processing. */
1452 continue;
1453 }
1454
1455 symval = (h->root.u.def.value
1456 + h->root.u.def.section->output_section->vma
1457 + h->root.u.def.section->output_offset);
1458 }
1459
1460 /* For simplicity of coding, we are going to modify the section
1461 contents, the section relocs, and the BFD symbol table. We
1462 must tell the rest of the code not to free up this
1463 information. It would be possible to instead create a table
1464 of changes which have to be made, as is done in coff-mips.c;
1465 that would be more work, but would require less memory when
1466 the linker is run. */
1467
1468 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1469 This sequence is generated by the compiler when compiling in
1470 32 bit mode. Also look for seth/add3 -> ld24. */
1471
1472 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1473 {
1474 Elf_Internal_Rela *nrel;
1475 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1476 + irel->r_offset);
1477 bfd_signed_vma pcrel_value = symval - pc;
1478 unsigned int code,reg;
1479 int addend,nop_p,bl8_p,to_delete;
1480
1481 /* The tests are ordered so that we get out as quickly as possible
1482 if this isn't something we can relax, taking into account that
1483 we are looking for two separate possibilities (jl/ld24). */
1484
1485 /* Do nothing if no room in the section for this to be what we're
1486 looking for. */
1487 if (irel->r_offset > sec->_cooked_size - 8)
1488 continue;
1489
1490 /* Make sure the next relocation applies to the next
1491 instruction and that it's the add3's reloc. */
1492 nrel = irel + 1;
1493 if (nrel == irelend
1494 || irel->r_offset + 4 != nrel->r_offset
1495 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1496 continue;
1497
1498 /* See if the instructions are seth/add3. */
1499 /* FIXME: This is where macros from cgen can come in. */
1500 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1501 if ((code & 0xf0ff) != 0xd0c0)
1502 continue; /* not seth rN,foo */
1503 reg = (code & 0x0f00) >> 8;
1504 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1505 if (code != (0x80a0 | reg | (reg << 8)))
1506 continue; /* not add3 rN,rN,foo */
1507
1508 /* At this point we've confirmed we have seth/add3. Now check
1509 whether the next insn is a jl, in which case try to change this
1510 to bl24 or bl8. */
1511
1512 /* Ensure the branch target is in range.
1513 The bl24 instruction has a 24 bit operand which is the target
1514 address right shifted by 2, giving a signed range of 26 bits.
1515 Note that 4 bytes are added to the high value because the target
1516 will be at least 4 bytes closer if we can relax. It'll actually
1517 be 4 or 8 bytes closer, but we don't know which just yet and
1518 the difference isn't significant enough to worry about. */
1519#if !USE_REL /* put in for learning purposes */
1520 pcrel_value += irel->r_addend;
1521#else
1522 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1523 pcrel_value += addend;
1524#endif
1525
1526 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1527 /* Do nothing if no room in the section for this to be what we're
1528 looking for. */
1529 && (irel->r_offset <= sec->_cooked_size - 12)
1530 /* Ensure the next insn is "jl rN". */
1531 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1532 code != (0x1ec0 | reg)))
1533 {
1534 /* We can relax to bl24/bl8. */
1535
1536 /* See if there's a nop following the jl.
1537 Also see if we can use a bl8 insn. */
1538 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1539 nop_p = (code & 0x7fff) == NOP_INSN;
1540 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1541
1542 if (bl8_p)
1543 {
1544 /* Change "seth rN,foo" to "bl8 foo || nop".
1545 We OR in CODE just in case it's not a nop (technically,
1546 CODE currently must be a nop, but for cleanness we
1547 allow it to be anything). */
1548#if !USE_REL /* put in for learning purposes */
1549 code = 0x7e000000 | MAKE_PARALLEL (code);
1550#else
1551 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1552#endif
1553 to_delete = 8;
1554 }
1555 else
1556 {
1557 /* Change the seth rN,foo to a bl24 foo. */
1558#if !USE_REL /* put in for learning purposes */
1559 code = 0xfe000000;
1560#else
1561 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1562#endif
1563 to_delete = nop_p ? 8 : 4;
1564 }
1565
1566 bfd_put_32 (abfd, code, contents + irel->r_offset);
1567
1568 /* Set the new reloc type. */
1569 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1570 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1571
1572 /* Delete the add3 reloc by making it a null reloc. */
1573 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1574 R_M32R_NONE);
1575 }
1576 else if (addend >= 0
1577 && symval + addend <= 0xffffff)
1578 {
1579 /* We can relax to ld24. */
1580
1581 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1582 bfd_put_32 (abfd, code, contents + irel->r_offset);
1583 to_delete = 4;
1584 /* Tell the following code a nop filler isn't needed. */
1585 nop_p = 1;
1586 }
1587 else
1588 {
1589 /* Can't do anything here. */
1590 continue;
1591 }
1592
1593 /* Note that we've changed the relocs, section contents, etc. */
1594 elf_section_data (sec)->relocs = internal_relocs;
1595 elf_section_data (sec)->this_hdr.contents = contents;
1596 symtab_hdr->contents = (unsigned char *) isymbuf;
1597
1598 /* Delete TO_DELETE bytes of data. */
1599 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1600 irel->r_offset + 4, to_delete))
1601 goto error_return;
1602
1603 /* Now that the following bytes have been moved into place, see if
1604 we need to replace the jl with a nop. This happens when we had
1605 to use a bl24 insn and the insn following the jl isn't a nop.
1606 Technically, this situation can't happen (since the insn can
1607 never be executed) but to be clean we do this. When the chip
1608 supports parallel 16 bit insns things may change.
1609 We don't need to do this in the case of relaxing to ld24,
1610 and the above code sets nop_p so this isn't done. */
1611 if (! nop_p && to_delete == 4)
1612 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1613
1614 /* That will change things, so we should relax again.
1615 Note that this is not required, and it may be slow. */
1616 *again = TRUE;
1617
1618 continue;
1619 }
1620
1621 /* loop to try the next reloc */
1622 }
1623
1624 if (isymbuf != NULL
1625 && symtab_hdr->contents != (unsigned char *) isymbuf)
1626 {
1627 if (! link_info->keep_memory)
1628 free (isymbuf);
1629 else
1630 {
1631 /* Cache the symbols for elf_link_input_bfd. */
1632 symtab_hdr->contents = (unsigned char *) isymbuf;
1633 }
1634 }
1635
1636 if (contents != NULL
1637 && elf_section_data (sec)->this_hdr.contents != contents)
1638 {
1639 if (! link_info->keep_memory)
1640 free (contents);
1641 else
1642 {
1643 /* Cache the section contents for elf_link_input_bfd. */
1644 elf_section_data (sec)->this_hdr.contents = contents;
1645 }
1646 }
1647
1648 if (internal_relocs != NULL
1649 && elf_section_data (sec)->relocs != internal_relocs)
1650 free (internal_relocs);
1651
1652 return TRUE;
1653
1654 error_return:
1655 if (isymbuf != NULL
1656 && symtab_hdr->contents != (unsigned char *) isymbuf)
1657 free (isymbuf);
1658 if (contents != NULL
1659 && elf_section_data (sec)->this_hdr.contents != contents)
1660 free (contents);
1661 if (internal_relocs != NULL
1662 && elf_section_data (sec)->relocs != internal_relocs)
1663 free (internal_relocs);
1664
1665 return FALSE;
1666}
1667
1668/* Delete some bytes from a section while relaxing. */
1669
1670static bfd_boolean
1671m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1672 bfd *abfd;
1673 asection *sec;
1674 bfd_vma addr;
1675 int count;
1676{
1677 Elf_Internal_Shdr *symtab_hdr;
1678 int shndx;
1679 bfd_byte *contents;
1680 Elf_Internal_Rela *irel, *irelend;
1681 Elf_Internal_Rela *irelalign;
1682 bfd_vma toaddr;
1683 Elf_Internal_Sym *isym, *isymend;
1684 struct elf_link_hash_entry **sym_hashes;
1685 struct elf_link_hash_entry **end_hashes;
1686 unsigned int symcount;
1687
1688 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1689
1690 contents = elf_section_data (sec)->this_hdr.contents;
1691
1692 /* The deletion must stop at the next ALIGN reloc for an aligment
1693 power larger than the number of bytes we are deleting. */
1694
1695 irelalign = NULL;
1696 toaddr = sec->_cooked_size;
1697
1698 irel = elf_section_data (sec)->relocs;
1699 irelend = irel + sec->reloc_count;
1700
1701 /* Actually delete the bytes. */
1702 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1703 sec->_cooked_size -= count;
1704
1705 /* Adjust all the relocs. */
1706 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1707 {
1708 /* Get the new reloc address. */
1709 if ((irel->r_offset > addr
1710 && irel->r_offset < toaddr))
1711 irel->r_offset -= count;
1712 }
1713
1714 /* Adjust the local symbols defined in this section. */
1715 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1716 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1717 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1718 {
1719 if (isym->st_shndx == shndx
1720 && isym->st_value > addr
1721 && isym->st_value < toaddr)
1722 isym->st_value -= count;
1723 }
1724
1725 /* Now adjust the global symbols defined in this section. */
1726 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1727 - symtab_hdr->sh_info);
1728 sym_hashes = elf_sym_hashes (abfd);
1729 end_hashes = sym_hashes + symcount;
1730 for (; sym_hashes < end_hashes; sym_hashes++)
1731 {
1732 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1733
1734 if ((sym_hash->root.type == bfd_link_hash_defined
1735 || sym_hash->root.type == bfd_link_hash_defweak)
1736 && sym_hash->root.u.def.section == sec
1737 && sym_hash->root.u.def.value > addr
1738 && sym_hash->root.u.def.value < toaddr)
1739 {
1740 sym_hash->root.u.def.value -= count;
1741 }
1742 }
1743
1744 return TRUE;
1745}
1746
1747/* This is a version of bfd_generic_get_relocated_section_contents
1748 which uses m32r_elf_relocate_section. */
1749
1750static bfd_byte *
1751m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1752 data, relocateable, symbols)
1753 bfd *output_bfd;
1754 struct bfd_link_info *link_info;
1755 struct bfd_link_order *link_order;
1756 bfd_byte *data;
1757 bfd_boolean relocateable;
1758 asymbol **symbols;
1759{
1760 Elf_Internal_Shdr *symtab_hdr;
1761 asection *input_section = link_order->u.indirect.section;
1762 bfd *input_bfd = input_section->owner;
1763 asection **sections = NULL;
1764 Elf_Internal_Rela *internal_relocs = NULL;
1765 Elf_Internal_Sym *isymbuf = NULL;
1766 bfd_size_type amt;
1767
1768 /* We only need to handle the case of relaxing, or of having a
1769 particular set of section contents, specially. */
1770 if (relocateable
1771 || elf_section_data (input_section)->this_hdr.contents == NULL)
1772 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1773 link_order, data,
1774 relocateable,
1775 symbols);
1776
1777 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1778
1779 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1780 input_section->_raw_size);
1781
1782 if ((input_section->flags & SEC_RELOC) != 0
1783 && input_section->reloc_count > 0)
1784 {
1785 Elf_Internal_Sym *isymp;
1786 asection **secpp;
1787 Elf32_External_Sym *esym, *esymend;
1788
1789 internal_relocs = (_bfd_elf32_link_read_relocs
1790 (input_bfd, input_section, (PTR) NULL,
1791 (Elf_Internal_Rela *) NULL, FALSE));
1792 if (internal_relocs == NULL)
1793 goto error_return;
1794
1795 if (symtab_hdr->sh_info != 0)
1796 {
1797 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1798 if (isymbuf == NULL)
1799 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1800 symtab_hdr->sh_info, 0,
1801 NULL, NULL, NULL);
1802 if (isymbuf == NULL)
1803 goto error_return;
1804 }
1805
1806 amt = symtab_hdr->sh_info;
1807 amt *= sizeof (asection *);
1808 sections = (asection **) bfd_malloc (amt);
1809 if (sections == NULL && symtab_hdr->sh_info > 0)
1810 goto error_return;
1811
1812 isymend = isymbuf + symtab_hdr->sh_info;
1813 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
1814 {
1815 asection *isec;
1816
1817 if (isym->st_shndx == SHN_UNDEF)
1818 isec = bfd_und_section_ptr;
1819 else if (isym->st_shndx == SHN_ABS)
1820 isec = bfd_abs_section_ptr;
1821 else if (isym->st_shndx == SHN_COMMON)
1822 isec = bfd_com_section_ptr;
1823 else if (isym->st_shndx == SHN_M32R_SCOMMON)
1824 isec = &m32r_elf_scom_section;
1825 else
1826 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
1827
1828 *secpp = isec;
1829 }
1830
1831 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1832 input_section, data, internal_relocs,
1833 isymbuf, sections))
1834 goto error_return;
1835
1836 if (sections != NULL)
1837 free (sections);
1838 if (isymbuf != NULL
1839 && symtab_hdr->contents != (unsigned char *) isymbuf)
1840 free (isymbuf);
1841 if (elf_section_data (input_section)->relocs != internal_relocs)
1842 free (internal_relocs);
1843 }
1844
1845 return data;
1846
1847 error_return:
1848 if (sections != NULL)
1849 free (sections);
1850 if (isymbuf != NULL
1851 && symtab_hdr->contents != (unsigned char *) isymbuf)
1852 free (isymbuf);
1853 if (internal_relocs != NULL
1854 && elf_section_data (input_section)->relocs != internal_relocs)
1855 free (internal_relocs);
1856 return NULL;
1857}
1858
1859#endif /* #if 0 */
1860
1861
1862/* Set the right machine number. */
1863static bfd_boolean
1864m32r_elf_object_p (abfd)
1865 bfd *abfd;
1866{
1867 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1868 {
1869 default:
1870 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
1871 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
1872 }
1873 return TRUE;
1874}
1875
1876/* Store the machine number in the flags field. */
1877static void
1878m32r_elf_final_write_processing (abfd, linker)
1879 bfd *abfd;
1880 bfd_boolean linker ATTRIBUTE_UNUSED;
1881{
1882 unsigned long val;
1883
1884 switch (bfd_get_mach (abfd))
1885 {
1886 default:
1887 case bfd_mach_m32r: val = E_M32R_ARCH; break;
1888 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
1889 }
1890
1891 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1892 elf_elfheader (abfd)->e_flags |= val;
1893}
1894
1895/* Function to keep M32R specific file flags. */
1896static bfd_boolean
1897m32r_elf_set_private_flags (abfd, flags)
1898 bfd *abfd;
1899 flagword flags;
1900{
1901 BFD_ASSERT (!elf_flags_init (abfd)
1902 || elf_elfheader (abfd)->e_flags == flags);
1903
1904 elf_elfheader (abfd)->e_flags = flags;
1905 elf_flags_init (abfd) = TRUE;
1906 return TRUE;
1907}
1908
1909/* Merge backend specific data from an object file to the output
1910 object file when linking. */
1911static bfd_boolean
1912m32r_elf_merge_private_bfd_data (ibfd, obfd)
1913 bfd *ibfd;
1914 bfd *obfd;
1915{
1916 flagword out_flags;
1917 flagword in_flags;
1918
1919 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1920 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1921 return TRUE;
1922
1923 in_flags = elf_elfheader (ibfd)->e_flags;
1924 out_flags = elf_elfheader (obfd)->e_flags;
1925
1926 if (! elf_flags_init (obfd))
1927 {
1928 /* If the input is the default architecture then do not
1929 bother setting the flags for the output architecture,
1930 instead allow future merges to do this. If no future
1931 merges ever set these flags then they will retain their
1932 unitialised values, which surprise surprise, correspond
1933 to the default values. */
1934 if (bfd_get_arch_info (ibfd)->the_default)
1935 return TRUE;
1936
1937 elf_flags_init (obfd) = TRUE;
1938 elf_elfheader (obfd)->e_flags = in_flags;
1939
1940 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1941 && bfd_get_arch_info (obfd)->the_default)
1942 {
1943 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1944 }
1945
1946 return TRUE;
1947 }
1948
1949 /* Check flag compatibility. */
1950 if (in_flags == out_flags)
1951 return TRUE;
1952
1953 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
1954 {
1955 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
1956 {
1957 (*_bfd_error_handler)
1958 (_("%s: Instruction set mismatch with previous modules"),
1959 bfd_archive_filename (ibfd));
1960
1961 bfd_set_error (bfd_error_bad_value);
1962 return FALSE;
1963 }
1964 }
1965
1966 return TRUE;
1967}
1968
1969/* Display the flags field */
1970static bfd_boolean
1971m32r_elf_print_private_bfd_data (abfd, ptr)
1972 bfd *abfd;
1973 PTR ptr;
1974{
1975 FILE * file = (FILE *) ptr;
1976
1977 BFD_ASSERT (abfd != NULL && ptr != NULL)
1978
1979 _bfd_elf_print_private_bfd_data (abfd, ptr);
1980
1981 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
1982
1983 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1984 {
1985 default:
1986 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
1987 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
1988 }
1989
1990 fputc ('\n', file);
1991
1992 return TRUE;
1993}
1994
1995asection *
1996m32r_elf_gc_mark_hook (sec, info, rel, h, sym)
1997 asection *sec;
1998 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1999 Elf_Internal_Rela *rel;
2000 struct elf_link_hash_entry *h;
2001 Elf_Internal_Sym *sym;
2002{
2003 if (h != NULL)
2004 {
2005 switch (ELF32_R_TYPE (rel->r_info))
2006 {
2007 case R_M32R_GNU_VTINHERIT:
2008 case R_M32R_GNU_VTENTRY:
2009 break;
2010
2011 default:
2012 switch (h->root.type)
2013 {
2014 case bfd_link_hash_defined:
2015 case bfd_link_hash_defweak:
2016 return h->root.u.def.section;
2017
2018 case bfd_link_hash_common:
2019 return h->root.u.c.p->section;
2020
2021 default:
2022 break;
2023 }
2024 }
2025 }
2026 else
2027 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
2028
2029 return NULL;
2030}
2031
2032static bfd_boolean
2033m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
2034 bfd *abfd ATTRIBUTE_UNUSED;
2035 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2036 asection *sec ATTRIBUTE_UNUSED;
2037 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
2038{
2039 /* we don't use got and plt entries for m32r */
2040 return TRUE;
2041}
2042
2043/* Look through the relocs for a section during the first phase.
2044 Since we don't do .gots or .plts, we just need to consider the
2045 virtual table relocs for gc. */
2046
2047static bfd_boolean
2048m32r_elf_check_relocs (abfd, info, sec, relocs)
2049 bfd *abfd;
2050 struct bfd_link_info *info;
2051 asection *sec;
2052 const Elf_Internal_Rela *relocs;
2053{
2054 Elf_Internal_Shdr *symtab_hdr;
2055 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2056 const Elf_Internal_Rela *rel;
2057 const Elf_Internal_Rela *rel_end;
2058
2059 if (info->relocateable)
2060 return TRUE;
2061
2062 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2063 sym_hashes = elf_sym_hashes (abfd);
2064 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
2065 if (!elf_bad_symtab (abfd))
2066 sym_hashes_end -= symtab_hdr->sh_info;
2067
2068 rel_end = relocs + sec->reloc_count;
2069 for (rel = relocs; rel < rel_end; rel++)
2070 {
2071 struct elf_link_hash_entry *h;
2072 unsigned long r_symndx;
2073
2074 r_symndx = ELF32_R_SYM (rel->r_info);
2075 if (r_symndx < symtab_hdr->sh_info)
2076 h = NULL;
2077 else
2078 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
2079
2080 switch (ELF32_R_TYPE (rel->r_info))
2081 {
2082 /* This relocation describes the C++ object vtable hierarchy.
2083 Reconstruct it for later use during GC. */
2084 case R_M32R_GNU_VTINHERIT:
2085 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2086 return FALSE;
2087 break;
2088
2089 /* This relocation describes which C++ vtable entries are actually
2090 used. Record for later use during GC. */
2091 case R_M32R_GNU_VTENTRY:
2092 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2093 return FALSE;
2094 break;
2095 }
2096 }
2097
2098 return TRUE;
2099}
2100
2101
2102#define ELF_ARCH bfd_arch_m32r
2103#define ELF_MACHINE_CODE EM_M32R
2104#define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
2105#define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
2106
2107#define TARGET_BIG_SYM bfd_elf32_m32r_vec
2108#define TARGET_BIG_NAME "elf32-m32r"
2109
2110#define elf_info_to_howto 0
2111#define elf_info_to_howto_rel m32r_info_to_howto_rel
2112#define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2113#define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2114#define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2115#define elf_backend_relocate_section m32r_elf_relocate_section
2116#define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2117#define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2118#define elf_backend_check_relocs m32r_elf_check_relocs
2119
2120#define elf_backend_can_gc_sections 1
2121#if !USE_REL
2122#define elf_backend_rela_normal 1
2123#endif
2124#if 0 /* not yet */
2125/* relax support */
2126#define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2127#define bfd_elf32_bfd_get_relocated_section_contents \
2128 m32r_elf_get_relocated_section_contents
2129#endif
2130
2131#define elf_backend_object_p m32r_elf_object_p
2132#define elf_backend_final_write_processing m32r_elf_final_write_processing
2133#define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2134#define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2135#define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
2136
2137#include "elf32-target.h"
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